blob: 151fe41c149220c3b7b19cfe24831d8a6838c26c [file] [log] [blame]
/* Atomic 64-byte load/store instructions limit register number Rt to below
condition: the <Xt> register number should be even and <= 22. */
.arch armv8.7-a+ls64
/* Single-copy Atomic 64-byte Load. */
ld64b x0, [x1]
ld64b x1, [x1]
ld64b x2, [x1]
ld64b x3, [x1]
ld64b x4, [x1]
ld64b x5, [x1]
ld64b x6, [x1]
ld64b x7, [x1]
ld64b x8, [x1]
ld64b x9, [x1]
ld64b x10, [x1]
ld64b x11, [x1]
ld64b x12, [x1]
ld64b x13, [x1]
ld64b x14, [x1]
ld64b x15, [x1]
ld64b x16, [x1]
ld64b x17, [x1]
ld64b x18, [x1]
ld64b x19, [x1]
ld64b x20, [x1]
ld64b x21, [x1]
ld64b x22, [x1]
ld64b x23, [x1]
ld64b x24, [x1]
ld64b x25, [x1]
ld64b x26, [x1]
ld64b x27, [x1]
ld64b x28, [x1]
ld64b x29, [x1]
ld64b x30, [x1]
/* Single-copy Atomic 64-byte Store without Return. */
st64b x0, [x1]
st64b x1, [x1]
st64b x2, [x1]
st64b x3, [x1]
st64b x4, [x1]
st64b x5, [x1]
st64b x6, [x1]
st64b x7, [x1]
st64b x8, [x1]
st64b x9, [x1]
st64b x10, [x1]
st64b x11, [x1]
st64b x12, [x1]
st64b x13, [x1]
st64b x14, [x1]
st64b x15, [x1]
st64b x16, [x1]
st64b x17, [x1]
st64b x18, [x1]
st64b x19, [x1]
st64b x20, [x1]
st64b x21, [x1]
st64b x22, [x1]
st64b x23, [x1]
st64b x24, [x1]
st64b x25, [x1]
st64b x26, [x1]
st64b x27, [x1]
st64b x28, [x1]
st64b x29, [x1]
st64b x30, [x1]
/* Single-copy Atomic 64-byte Store with Return. */
st64bv x1, x0, [x2]
st64bv x0, x1, [x2]
st64bv x0, x2, [x1]
st64bv x0, x3, [x1]
st64bv x0, x4, [x1]
st64bv x0, x5, [x1]
st64bv x0, x6, [x1]
st64bv x0, x7, [x1]
st64bv x0, x8, [x1]
st64bv x0, x9, [x1]
st64bv x0, x10, [x1]
st64bv x0, x11, [x1]
st64bv x0, x12, [x1]
st64bv x0, x13, [x1]
st64bv x0, x14, [x1]
st64bv x0, x15, [x1]
st64bv x0, x16, [x1]
st64bv x0, x17, [x1]
st64bv x0, x18, [x1]
st64bv x0, x19, [x1]
st64bv x0, x20, [x1]
st64bv x0, x21, [x1]
st64bv x0, x22, [x1]
st64bv x0, x23, [x1]
st64bv x0, x24, [x1]
st64bv x0, x25, [x1]
st64bv x0, x26, [x1]
st64bv x0, x27, [x1]
st64bv x0, x28, [x1]
st64bv x0, x29, [x1]
st64bv x0, x30, [x1]
/* Single-copy Atomic 64-byte EL0 Store with Return. */
st64bv0 x1, x0, [x2]
st64bv0 x0, x1, [x2]
st64bv0 x0, x2, [x1]
st64bv0 x0, x3, [x1]
st64bv0 x0, x4, [x1]
st64bv0 x0, x5, [x1]
st64bv0 x0, x6, [x1]
st64bv0 x0, x7, [x1]
st64bv0 x0, x8, [x1]
st64bv0 x0, x9, [x1]
st64bv0 x0, x10, [x1]
st64bv0 x0, x11, [x1]
st64bv0 x0, x12, [x1]
st64bv0 x0, x13, [x1]
st64bv0 x0, x14, [x1]
st64bv0 x0, x15, [x1]
st64bv0 x0, x16, [x1]
st64bv0 x0, x17, [x1]
st64bv0 x0, x18, [x1]
st64bv0 x0, x19, [x1]
st64bv0 x0, x20, [x1]
st64bv0 x0, x21, [x1]
st64bv0 x0, x22, [x1]
st64bv0 x0, x23, [x1]
st64bv0 x0, x24, [x1]
st64bv0 x0, x25, [x1]
st64bv0 x0, x26, [x1]
st64bv0 x0, x27, [x1]
st64bv0 x0, x28, [x1]
st64bv0 x0, x29, [x1]
st64bv0 x0, x30, [x1]