blob: 76c80bd647076afc9e98581a94d6787da2ff345a [file] [log] [blame]
// Armv8-R system registers
mrs x0, mpuir_el1
mrs x0, mpuir_el2
mrs x0, prbar_el1
msr prbar_el1, x0
mrs x0, prbar_el2
msr prbar_el2, x0
mrs x0, prbar1_el1
msr prbar1_el1, x0
mrs x0, prbar2_el1
msr prbar2_el1, x0
mrs x0, prbar3_el1
msr prbar3_el1, x0
mrs x0, prbar4_el1
msr prbar4_el1, x0
mrs x0, prbar5_el1
msr prbar5_el1, x0
mrs x0, prbar6_el1
msr prbar6_el1, x0
mrs x0, prbar7_el1
msr prbar7_el1, x0
mrs x0, prbar8_el1
msr prbar8_el1, x0
mrs x0, prbar9_el1
msr prbar9_el1, x0
mrs x0, prbar10_el1
msr prbar10_el1, x0
mrs x0, prbar11_el1
msr prbar11_el1, x0
mrs x0, prbar12_el1
msr prbar12_el1, x0
mrs x0, prbar13_el1
msr prbar13_el1, x0
mrs x0, prbar14_el1
msr prbar14_el1, x0
mrs x0, prbar15_el1
msr prbar15_el1, x0
mrs x0, prbar1_el2
msr prbar1_el2, x0
mrs x0, prbar2_el2
msr prbar2_el2, x0
mrs x0, prbar3_el2
msr prbar3_el2, x0
mrs x0, prbar4_el2
msr prbar4_el2, x0
mrs x0, prbar5_el2
msr prbar5_el2, x0
mrs x0, prbar6_el2
msr prbar6_el2, x0
mrs x0, prbar7_el2
msr prbar7_el2, x0
mrs x0, prbar8_el2
msr prbar8_el2, x0
mrs x0, prbar9_el2
msr prbar9_el2, x0
mrs x0, prbar10_el2
msr prbar10_el2, x0
mrs x0, prbar11_el2
msr prbar11_el2, x0
mrs x0, prbar12_el2
msr prbar12_el2, x0
mrs x0, prbar13_el2
msr prbar13_el2, x0
mrs x0, prbar14_el2
msr prbar14_el2, x0
mrs x0, prbar15_el2
msr prbar15_el2, x0
mrs x0, prenr_el1
msr prenr_el1, x0
mrs x0, prenr_el2
msr prenr_el2, x0
mrs x0, prlar_el1
msr prlar_el1, x0
mrs x0, prlar_el2
msr prlar_el2, x0
mrs x0, prlar1_el1
msr prlar1_el1, x0
mrs x0, prlar2_el1
msr prlar2_el1, x0
mrs x0, prlar3_el1
msr prlar3_el1, x0
mrs x0, prlar4_el1
msr prlar4_el1, x0
mrs x0, prlar5_el1
msr prlar5_el1, x0
mrs x0, prlar6_el1
msr prlar6_el1, x0
mrs x0, prlar7_el1
msr prlar7_el1, x0
mrs x0, prlar8_el1
msr prlar8_el1, x0
mrs x0, prlar9_el1
msr prlar9_el1, x0
mrs x0, prlar10_el1
msr prlar10_el1, x0
mrs x0, prlar11_el1
msr prlar11_el1, x0
mrs x0, prlar12_el1
msr prlar12_el1, x0
mrs x0, prlar13_el1
msr prlar13_el1, x0
mrs x0, prlar14_el1
msr prlar14_el1, x0
mrs x0, prlar15_el1
msr prlar15_el1, x0
mrs x0, prlar1_el2
msr prlar1_el2, x0
mrs x0, prlar2_el2
msr prlar2_el2, x0
mrs x0, prlar3_el2
msr prlar3_el2, x0
mrs x0, prlar4_el2
msr prlar4_el2, x0
mrs x0, prlar5_el2
msr prlar5_el2, x0
mrs x0, prlar6_el2
msr prlar6_el2, x0
mrs x0, prlar7_el2
msr prlar7_el2, x0
mrs x0, prlar8_el2
msr prlar8_el2, x0
mrs x0, prlar9_el2
msr prlar9_el2, x0
mrs x0, prlar10_el2
msr prlar10_el2, x0
mrs x0, prlar11_el2
msr prlar11_el2, x0
mrs x0, prlar12_el2
msr prlar12_el2, x0
mrs x0, prlar13_el2
msr prlar13_el2, x0
mrs x0, prlar14_el2
msr prlar14_el2, x0
mrs x0, prlar15_el2
msr prlar15_el2, x0
mrs x0, prselr_el1
msr prselr_el1, x0
mrs x0, prselr_el2
msr prselr_el2, x0
mrs x0, vsctlr_el2
msr vsctlr_el2, x0