| # Copyright 2003-2024 Free Software Foundation, Inc. |
| |
| # This program is free software; you can redistribute it and/or modify |
| # it under the terms of the GNU General Public License as published by |
| # the Free Software Foundation; either version 3 of the License, or |
| # (at your option) any later version. |
| # |
| # This program is distributed in the hope that it will be useful, |
| # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| # GNU General Public License for more details. |
| # |
| # You should have received a copy of the GNU General Public License |
| # along with this program. If not, see <http://www.gnu.org/licenses/>. |
| |
| # Please email any bugs, comments, and/or additions to this file to: |
| # bug-gdb@gnu.org |
| |
| # This file is part of the gdb testsuite. |
| |
| # |
| # Test floating-point related functionality. |
| # |
| |
| |
| if { [prepare_for_testing "failed to prepare" float float.c] } { |
| return -1 |
| } |
| |
| # Set it up at a breakpoint so we have its registers. |
| |
| if {![runto_main]} { |
| return |
| } |
| |
| # Test "info float". |
| |
| if {[is_aarch64_target]} { |
| gdb_test "info float" "d0.*d1.*d31.*s0.*s1.*s31.*" |
| } elseif {[istarget "alpha*-*-*"]} { |
| gdb_test "info float" "f0.*" |
| } elseif {[is_aarch32_target]} { |
| gdb_test_multiple "info float" "info float" { |
| -re "Software FPU type.*mask:.*flags:.*$gdb_prompt $" { |
| pass "info float (FPA)" |
| } |
| -re "fpscr.*s0.*s1.*s31.*$gdb_prompt $" { |
| # Only check for single precision; d0 might be a vector register |
| # if we have NEON. |
| pass "info float (VFP)" |
| } |
| -re "No floating.point info available for this processor.*$gdb_prompt $" { |
| pass "info float (without FPU)" |
| } |
| } |
| } elseif {[istarget "i?86-*-*"] || [istarget "x86_64-*-*"]} { |
| gdb_test "info float" "R7:.*Status Word:.*Opcode:.*" |
| } elseif {[istarget "ia64-*-*"]} { |
| gdb_test "info float" "f0.*f1.*f127.*" |
| } elseif {[istarget "m68k-*-*"]} { |
| gdb_test_multiple "info float" "info_float" { |
| -re "fp0.*fp1.*fp7.*$gdb_prompt $" { |
| pass "info float (with FPU)" |
| } |
| -re "No floating.point info available for this processor.*$gdb_prompt $" { |
| pass "info float (without FPU)" |
| } |
| } |
| } elseif {[istarget "mips*-*-*"]} { |
| gdb_test_multiple "info float" "info float" { |
| -re "fpu type: none / unused\r\n$gdb_prompt $" { |
| pass "info float (without FPU)" |
| } |
| -re "fpu type:.*cause.*mask.*flags.*round.*flush.*f0:.*flt:.*dbl:.*$gdb_prompt $" { |
| pass "info float (with FPU)" |
| } |
| } |
| } elseif {[istarget "nds32*-*-*"]} { |
| gdb_test_multiple "info float" "info_float" { |
| -re "fd0.*fd3.*$gdb_prompt $" { |
| pass "info float (with FPU)" |
| } |
| -re "No floating.point info available for this processor.*$gdb_prompt $" { |
| pass "info float (without FPU)" |
| } |
| } |
| } elseif {[istarget "powerpc*-*-*"]} { |
| gdb_test_multiple "info float" "info_float" { |
| -re "f0.*f1.*f31.*fpscr.*$gdb_prompt $" { |
| pass "info float (with FPU)" |
| } |
| -re "No floating.point info available for this processor.*$gdb_prompt $" { |
| pass "info float (without FPU)" |
| } |
| } |
| } elseif {[istarget "s390*-*-*"]} { |
| gdb_test "info float" "fpc.*f0.*f1.*f15.*" "info float" |
| } elseif {[istarget "sh*-*"]} { |
| # SH may or may not have an FPU |
| gdb_test_multiple "info float" "info float" { |
| -re "fpul.*fr0.*fr1.*fr15.*$gdb_prompt $" { |
| pass "info float (with FPU)" |
| } |
| -re "No floating.point info available for this processor.*$gdb_prompt $" { |
| pass "info float (without FPU)" |
| } |
| } |
| } elseif {[istarget "hppa*-*"]} { |
| gdb_test "info float" "fr4.*fr4R.*fr31R.*" "info float" |
| } elseif {[istarget "sparc*-*-*"]} { |
| gdb_test "info float" "f0.*f1.*f31.*d0.*d30.*" "info float" |
| } elseif {[istarget "riscv*-*-*"]} { |
| # RISC-V may or may not have an FPU. Additionally, the order of |
| # fcsr relative to fflags and frm can change depending on whether |
| # the fflags and frm registers are implemented as real registers |
| # (supplied in the target description) or pseudo-registers |
| # (supplied by GDB as a view into fcsr). |
| gdb_test_multiple "info float" "info float" { |
| -re "ft0.*ft1.*ft11.*fflags.*frm.*fcsr.*$gdb_prompt $" { |
| pass "info float (with FPU)" |
| } |
| -re "ft0.*ft1.*ft11.*fcsr.*fflags.*frm.*$gdb_prompt $" { |
| pass "info float (with FPU)" |
| } |
| -re "No floating.point info available for this processor.*$gdb_prompt $" { |
| pass "info float (without FPU)" |
| } |
| } |
| } elseif {[istarget "loongarch*-*-*"]} { |
| gdb_test "info float" "f.*fcc0.*fcsr.*" "info float" |
| } else { |
| gdb_test "info float" "No floating.point info available for this processor." "info float (unknown target)" |
| } |
| |
| gdb_test "step" |
| gdb_test "finish" "Value returned is .* = (inf|nan).*" |