| This is bfd.info, produced by makeinfo version 4.1 from bfd.texinfo. |
| |
| START-INFO-DIR-ENTRY |
| * Bfd: (bfd). The Binary File Descriptor library. |
| END-INFO-DIR-ENTRY |
| |
| This file documents the BFD library. |
| |
| Copyright (C) 1991, 2000, 2001 Free Software Foundation, Inc. |
| |
| Permission is granted to copy, distribute and/or modify this document |
| under the terms of the GNU Free Documentation License, Version 1.1 |
| or any later version published by the Free Software Foundation; |
| with no Invariant Sections, with no Front-Cover Texts, and with no |
| Back-Cover Texts. A copy of the license is included in the |
| section entitled "GNU Free Documentation License". |
| |
| |
| File: bfd.info, Node: howto manager, Prev: typedef arelent, Up: Relocations |
| |
| The howto manager |
| ================= |
| |
| When an application wants to create a relocation, but doesn't know |
| what the target machine might call it, it can find out by using this |
| bit of code. |
| |
| `bfd_reloc_code_type' |
| ..................... |
| |
| *Description* |
| The insides of a reloc code. The idea is that, eventually, there will |
| be one enumerator for every type of relocation we ever do. Pass one of |
| these values to `bfd_reloc_type_lookup', and it'll return a howto |
| pointer. |
| |
| This does mean that the application must determine the correct |
| enumerator value; you can't get a howto pointer from a random set of |
| attributes. |
| |
| Here are the possible values for `enum bfd_reloc_code_real': |
| |
| - : BFD_RELOC_64 |
| - : BFD_RELOC_32 |
| - : BFD_RELOC_26 |
| - : BFD_RELOC_24 |
| - : BFD_RELOC_16 |
| - : BFD_RELOC_14 |
| - : BFD_RELOC_8 |
| Basic absolute relocations of N bits. |
| |
| - : BFD_RELOC_64_PCREL |
| - : BFD_RELOC_32_PCREL |
| - : BFD_RELOC_24_PCREL |
| - : BFD_RELOC_16_PCREL |
| - : BFD_RELOC_12_PCREL |
| - : BFD_RELOC_8_PCREL |
| PC-relative relocations. Sometimes these are relative to the |
| address of the relocation itself; sometimes they are relative to |
| the start of the section containing the relocation. It depends on |
| the specific target. |
| |
| The 24-bit relocation is used in some Intel 960 configurations. |
| |
| - : BFD_RELOC_32_GOT_PCREL |
| - : BFD_RELOC_16_GOT_PCREL |
| - : BFD_RELOC_8_GOT_PCREL |
| - : BFD_RELOC_32_GOTOFF |
| - : BFD_RELOC_16_GOTOFF |
| - : BFD_RELOC_LO16_GOTOFF |
| - : BFD_RELOC_HI16_GOTOFF |
| - : BFD_RELOC_HI16_S_GOTOFF |
| - : BFD_RELOC_8_GOTOFF |
| - : BFD_RELOC_64_PLT_PCREL |
| - : BFD_RELOC_32_PLT_PCREL |
| - : BFD_RELOC_24_PLT_PCREL |
| - : BFD_RELOC_16_PLT_PCREL |
| - : BFD_RELOC_8_PLT_PCREL |
| - : BFD_RELOC_64_PLTOFF |
| - : BFD_RELOC_32_PLTOFF |
| - : BFD_RELOC_16_PLTOFF |
| - : BFD_RELOC_LO16_PLTOFF |
| - : BFD_RELOC_HI16_PLTOFF |
| - : BFD_RELOC_HI16_S_PLTOFF |
| - : BFD_RELOC_8_PLTOFF |
| For ELF. |
| |
| - : BFD_RELOC_68K_GLOB_DAT |
| - : BFD_RELOC_68K_JMP_SLOT |
| - : BFD_RELOC_68K_RELATIVE |
| Relocations used by 68K ELF. |
| |
| - : BFD_RELOC_32_BASEREL |
| - : BFD_RELOC_16_BASEREL |
| - : BFD_RELOC_LO16_BASEREL |
| - : BFD_RELOC_HI16_BASEREL |
| - : BFD_RELOC_HI16_S_BASEREL |
| - : BFD_RELOC_8_BASEREL |
| - : BFD_RELOC_RVA |
| Linkage-table relative. |
| |
| - : BFD_RELOC_8_FFnn |
| Absolute 8-bit relocation, but used to form an address like 0xFFnn. |
| |
| - : BFD_RELOC_32_PCREL_S2 |
| - : BFD_RELOC_16_PCREL_S2 |
| - : BFD_RELOC_23_PCREL_S2 |
| These PC-relative relocations are stored as word displacements - |
| i.e., byte displacements shifted right two bits. The 30-bit word |
| displacement (<<32_PCREL_S2>> - 32 bits, shifted 2) is used on the |
| SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The |
| signed 16-bit displacement is used on the MIPS, and the 23-bit |
| displacement is used on the Alpha. |
| |
| - : BFD_RELOC_HI22 |
| - : BFD_RELOC_LO10 |
| High 22 bits and low 10 bits of 32-bit value, placed into lower |
| bits of the target word. These are used on the SPARC. |
| |
| - : BFD_RELOC_GPREL16 |
| - : BFD_RELOC_GPREL32 |
| For systems that allocate a Global Pointer register, these are |
| displacements off that register. These relocation types are |
| handled specially, because the value the register will have is |
| decided relatively late. |
| |
| - : BFD_RELOC_I960_CALLJ |
| Reloc types used for i960/b.out. |
| |
| - : BFD_RELOC_NONE |
| - : BFD_RELOC_SPARC_WDISP22 |
| - : BFD_RELOC_SPARC22 |
| - : BFD_RELOC_SPARC13 |
| - : BFD_RELOC_SPARC_GOT10 |
| - : BFD_RELOC_SPARC_GOT13 |
| - : BFD_RELOC_SPARC_GOT22 |
| - : BFD_RELOC_SPARC_PC10 |
| - : BFD_RELOC_SPARC_PC22 |
| - : BFD_RELOC_SPARC_WPLT30 |
| - : BFD_RELOC_SPARC_COPY |
| - : BFD_RELOC_SPARC_GLOB_DAT |
| - : BFD_RELOC_SPARC_JMP_SLOT |
| - : BFD_RELOC_SPARC_RELATIVE |
| - : BFD_RELOC_SPARC_UA16 |
| - : BFD_RELOC_SPARC_UA32 |
| - : BFD_RELOC_SPARC_UA64 |
| SPARC ELF relocations. There is probably some overlap with other |
| relocation types already defined. |
| |
| - : BFD_RELOC_SPARC_BASE13 |
| - : BFD_RELOC_SPARC_BASE22 |
| I think these are specific to SPARC a.out (e.g., Sun 4). |
| |
| - : BFD_RELOC_SPARC_64 |
| - : BFD_RELOC_SPARC_10 |
| - : BFD_RELOC_SPARC_11 |
| - : BFD_RELOC_SPARC_OLO10 |
| - : BFD_RELOC_SPARC_HH22 |
| - : BFD_RELOC_SPARC_HM10 |
| - : BFD_RELOC_SPARC_LM22 |
| - : BFD_RELOC_SPARC_PC_HH22 |
| - : BFD_RELOC_SPARC_PC_HM10 |
| - : BFD_RELOC_SPARC_PC_LM22 |
| - : BFD_RELOC_SPARC_WDISP16 |
| - : BFD_RELOC_SPARC_WDISP19 |
| - : BFD_RELOC_SPARC_7 |
| - : BFD_RELOC_SPARC_6 |
| - : BFD_RELOC_SPARC_5 |
| - : BFD_RELOC_SPARC_DISP64 |
| - : BFD_RELOC_SPARC_PLT32 |
| - : BFD_RELOC_SPARC_PLT64 |
| - : BFD_RELOC_SPARC_HIX22 |
| - : BFD_RELOC_SPARC_LOX10 |
| - : BFD_RELOC_SPARC_H44 |
| - : BFD_RELOC_SPARC_M44 |
| - : BFD_RELOC_SPARC_L44 |
| - : BFD_RELOC_SPARC_REGISTER |
| SPARC64 relocations |
| |
| - : BFD_RELOC_SPARC_REV32 |
| SPARC little endian relocation |
| |
| - : BFD_RELOC_ALPHA_GPDISP_HI16 |
| Alpha ECOFF and ELF relocations. Some of these treat the symbol or |
| "addend" in some special way. For GPDISP_HI16 ("gpdisp") |
| relocations, the symbol is ignored when writing; when reading, it |
| will be the absolute section symbol. The addend is the |
| displacement in bytes of the "lda" instruction from the "ldah" |
| instruction (which is at the address of this reloc). |
| |
| - : BFD_RELOC_ALPHA_GPDISP_LO16 |
| For GPDISP_LO16 ("ignore") relocations, the symbol is handled as |
| with GPDISP_HI16 relocs. The addend is ignored when writing the |
| relocations out, and is filled in with the file's GP value on |
| reading, for convenience. |
| |
| - : BFD_RELOC_ALPHA_GPDISP |
| The ELF GPDISP relocation is exactly the same as the GPDISP_HI16 |
| relocation except that there is no accompanying GPDISP_LO16 |
| relocation. |
| |
| - : BFD_RELOC_ALPHA_LITERAL |
| - : BFD_RELOC_ALPHA_ELF_LITERAL |
| - : BFD_RELOC_ALPHA_LITUSE |
| The Alpha LITERAL/LITUSE relocs are produced by a symbol reference; |
| the assembler turns it into a LDQ instruction to load the address |
| of the symbol, and then fills in a register in the real |
| instruction. |
| |
| The LITERAL reloc, at the LDQ instruction, refers to the .lita |
| section symbol. The addend is ignored when writing, but is filled |
| in with the file's GP value on reading, for convenience, as with |
| the GPDISP_LO16 reloc. |
| |
| The ELF_LITERAL reloc is somewhere between 16_GOTOFF and |
| GPDISP_LO16. It should refer to the symbol to be referenced, as |
| with 16_GOTOFF, but it generates output not based on the position |
| within the .got section, but relative to the GP value chosen for |
| the file during the final link stage. |
| |
| The LITUSE reloc, on the instruction using the loaded address, |
| gives information to the linker that it might be able to use to |
| optimize away some literal section references. The symbol is |
| ignored (read as the absolute section symbol), and the "addend" |
| indicates the type of instruction using the register: 1 - "memory" |
| fmt insn 2 - byte-manipulation (byte offset reg) 3 - jsr (target |
| of branch) |
| |
| - : BFD_RELOC_ALPHA_HINT |
| The HINT relocation indicates a value that should be filled into |
| the "hint" field of a jmp/jsr/ret instruction, for possible branch- |
| prediction logic which may be provided on some processors. |
| |
| - : BFD_RELOC_ALPHA_LINKAGE |
| The LINKAGE relocation outputs a linkage pair in the object file, |
| which is filled by the linker. |
| |
| - : BFD_RELOC_ALPHA_CODEADDR |
| The CODEADDR relocation outputs a STO_CA in the object file, which |
| is filled by the linker. |
| |
| - : BFD_RELOC_ALPHA_GPREL_HI16 |
| - : BFD_RELOC_ALPHA_GPREL_LO16 |
| The GPREL_HI/LO relocations together form a 32-bit offset from the |
| GP register. |
| |
| - : BFD_RELOC_ALPHA_BRSGP |
| Like BFD_RELOC_23_PCREL_S2, except that the source and target must |
| share a common GP, and the target address is adjusted for |
| STO_ALPHA_STD_GPLOAD. |
| |
| - : BFD_RELOC_MIPS_JMP |
| Bits 27..2 of the relocation address shifted right 2 bits; simple |
| reloc otherwise. |
| |
| - : BFD_RELOC_MIPS16_JMP |
| The MIPS16 jump instruction. |
| |
| - : BFD_RELOC_MIPS16_GPREL |
| MIPS16 GP relative reloc. |
| |
| - : BFD_RELOC_HI16 |
| High 16 bits of 32-bit value; simple reloc. |
| |
| - : BFD_RELOC_HI16_S |
| High 16 bits of 32-bit value but the low 16 bits will be sign |
| extended and added to form the final result. If the low 16 bits |
| form a negative number, we need to add one to the high value to |
| compensate for the borrow when the low bits are added. |
| |
| - : BFD_RELOC_LO16 |
| Low 16 bits. |
| |
| - : BFD_RELOC_PCREL_HI16_S |
| Like BFD_RELOC_HI16_S, but PC relative. |
| |
| - : BFD_RELOC_PCREL_LO16 |
| Like BFD_RELOC_LO16, but PC relative. |
| |
| - : BFD_RELOC_MIPS_LITERAL |
| Relocation against a MIPS literal section. |
| |
| - : BFD_RELOC_MIPS_GOT16 |
| - : BFD_RELOC_MIPS_CALL16 |
| - : BFD_RELOC_MIPS_GOT_HI16 |
| - : BFD_RELOC_MIPS_GOT_LO16 |
| - : BFD_RELOC_MIPS_CALL_HI16 |
| - : BFD_RELOC_MIPS_CALL_LO16 |
| - : BFD_RELOC_MIPS_SUB |
| - : BFD_RELOC_MIPS_GOT_PAGE |
| - : BFD_RELOC_MIPS_GOT_OFST |
| - : BFD_RELOC_MIPS_GOT_DISP |
| - : BFD_RELOC_MIPS_SHIFT5 |
| - : BFD_RELOC_MIPS_SHIFT6 |
| - : BFD_RELOC_MIPS_INSERT_A |
| - : BFD_RELOC_MIPS_INSERT_B |
| - : BFD_RELOC_MIPS_DELETE |
| - : BFD_RELOC_MIPS_HIGHEST |
| - : BFD_RELOC_MIPS_HIGHER |
| - : BFD_RELOC_MIPS_SCN_DISP |
| - : BFD_RELOC_MIPS_REL16 |
| - : BFD_RELOC_MIPS_RELGOT |
| - : BFD_RELOC_MIPS_JALR |
| MIPS ELF relocations. |
| |
| - : BFD_RELOC_386_GOT32 |
| - : BFD_RELOC_386_PLT32 |
| - : BFD_RELOC_386_COPY |
| - : BFD_RELOC_386_GLOB_DAT |
| - : BFD_RELOC_386_JUMP_SLOT |
| - : BFD_RELOC_386_RELATIVE |
| - : BFD_RELOC_386_GOTOFF |
| - : BFD_RELOC_386_GOTPC |
| i386/elf relocations |
| |
| - : BFD_RELOC_X86_64_GOT32 |
| - : BFD_RELOC_X86_64_PLT32 |
| - : BFD_RELOC_X86_64_COPY |
| - : BFD_RELOC_X86_64_GLOB_DAT |
| - : BFD_RELOC_X86_64_JUMP_SLOT |
| - : BFD_RELOC_X86_64_RELATIVE |
| - : BFD_RELOC_X86_64_GOTPCREL |
| - : BFD_RELOC_X86_64_32S |
| x86-64/elf relocations |
| |
| - : BFD_RELOC_NS32K_IMM_8 |
| - : BFD_RELOC_NS32K_IMM_16 |
| - : BFD_RELOC_NS32K_IMM_32 |
| - : BFD_RELOC_NS32K_IMM_8_PCREL |
| - : BFD_RELOC_NS32K_IMM_16_PCREL |
| - : BFD_RELOC_NS32K_IMM_32_PCREL |
| - : BFD_RELOC_NS32K_DISP_8 |
| - : BFD_RELOC_NS32K_DISP_16 |
| - : BFD_RELOC_NS32K_DISP_32 |
| - : BFD_RELOC_NS32K_DISP_8_PCREL |
| - : BFD_RELOC_NS32K_DISP_16_PCREL |
| - : BFD_RELOC_NS32K_DISP_32_PCREL |
| ns32k relocations |
| |
| - : BFD_RELOC_PDP11_DISP_8_PCREL |
| - : BFD_RELOC_PDP11_DISP_6_PCREL |
| PDP11 relocations |
| |
| - : BFD_RELOC_PJ_CODE_HI16 |
| - : BFD_RELOC_PJ_CODE_LO16 |
| - : BFD_RELOC_PJ_CODE_DIR16 |
| - : BFD_RELOC_PJ_CODE_DIR32 |
| - : BFD_RELOC_PJ_CODE_REL16 |
| - : BFD_RELOC_PJ_CODE_REL32 |
| Picojava relocs. Not all of these appear in object files. |
| |
| - : BFD_RELOC_PPC_B26 |
| - : BFD_RELOC_PPC_BA26 |
| - : BFD_RELOC_PPC_TOC16 |
| - : BFD_RELOC_PPC_B16 |
| - : BFD_RELOC_PPC_B16_BRTAKEN |
| - : BFD_RELOC_PPC_B16_BRNTAKEN |
| - : BFD_RELOC_PPC_BA16 |
| - : BFD_RELOC_PPC_BA16_BRTAKEN |
| - : BFD_RELOC_PPC_BA16_BRNTAKEN |
| - : BFD_RELOC_PPC_COPY |
| - : BFD_RELOC_PPC_GLOB_DAT |
| - : BFD_RELOC_PPC_JMP_SLOT |
| - : BFD_RELOC_PPC_RELATIVE |
| - : BFD_RELOC_PPC_LOCAL24PC |
| - : BFD_RELOC_PPC_EMB_NADDR32 |
| - : BFD_RELOC_PPC_EMB_NADDR16 |
| - : BFD_RELOC_PPC_EMB_NADDR16_LO |
| - : BFD_RELOC_PPC_EMB_NADDR16_HI |
| - : BFD_RELOC_PPC_EMB_NADDR16_HA |
| - : BFD_RELOC_PPC_EMB_SDAI16 |
| - : BFD_RELOC_PPC_EMB_SDA2I16 |
| - : BFD_RELOC_PPC_EMB_SDA2REL |
| - : BFD_RELOC_PPC_EMB_SDA21 |
| - : BFD_RELOC_PPC_EMB_MRKREF |
| - : BFD_RELOC_PPC_EMB_RELSEC16 |
| - : BFD_RELOC_PPC_EMB_RELST_LO |
| - : BFD_RELOC_PPC_EMB_RELST_HI |
| - : BFD_RELOC_PPC_EMB_RELST_HA |
| - : BFD_RELOC_PPC_EMB_BIT_FLD |
| - : BFD_RELOC_PPC_EMB_RELSDA |
| - : BFD_RELOC_PPC64_HIGHER |
| - : BFD_RELOC_PPC64_HIGHER_S |
| - : BFD_RELOC_PPC64_HIGHEST |
| - : BFD_RELOC_PPC64_HIGHEST_S |
| - : BFD_RELOC_PPC64_TOC16_LO |
| - : BFD_RELOC_PPC64_TOC16_HI |
| - : BFD_RELOC_PPC64_TOC16_HA |
| - : BFD_RELOC_PPC64_TOC |
| - : BFD_RELOC_PPC64_PLTGOT16 |
| - : BFD_RELOC_PPC64_PLTGOT16_LO |
| - : BFD_RELOC_PPC64_PLTGOT16_HI |
| - : BFD_RELOC_PPC64_PLTGOT16_HA |
| - : BFD_RELOC_PPC64_ADDR16_DS |
| - : BFD_RELOC_PPC64_ADDR16_LO_DS |
| - : BFD_RELOC_PPC64_GOT16_DS |
| - : BFD_RELOC_PPC64_GOT16_LO_DS |
| - : BFD_RELOC_PPC64_PLT16_LO_DS |
| - : BFD_RELOC_PPC64_SECTOFF_DS |
| - : BFD_RELOC_PPC64_SECTOFF_LO_DS |
| - : BFD_RELOC_PPC64_TOC16_DS |
| - : BFD_RELOC_PPC64_TOC16_LO_DS |
| - : BFD_RELOC_PPC64_PLTGOT16_DS |
| - : BFD_RELOC_PPC64_PLTGOT16_LO_DS |
| Power(rs6000) and PowerPC relocations. |
| |
| - : BFD_RELOC_I370_D12 |
| IBM 370/390 relocations |
| |
| - : BFD_RELOC_CTOR |
| The type of reloc used to build a contructor table - at the moment |
| probably a 32 bit wide absolute relocation, but the target can |
| choose. It generally does map to one of the other relocation |
| types. |
| |
| - : BFD_RELOC_ARM_PCREL_BRANCH |
| ARM 26 bit pc-relative branch. The lowest two bits must be zero |
| and are not stored in the instruction. |
| |
| - : BFD_RELOC_ARM_PCREL_BLX |
| ARM 26 bit pc-relative branch. The lowest bit must be zero and is |
| not stored in the instruction. The 2nd lowest bit comes from a 1 |
| bit field in the instruction. |
| |
| - : BFD_RELOC_THUMB_PCREL_BLX |
| Thumb 22 bit pc-relative branch. The lowest bit must be zero and |
| is not stored in the instruction. The 2nd lowest bit comes from a |
| 1 bit field in the instruction. |
| |
| - : BFD_RELOC_ARM_IMMEDIATE |
| - : BFD_RELOC_ARM_ADRL_IMMEDIATE |
| - : BFD_RELOC_ARM_OFFSET_IMM |
| - : BFD_RELOC_ARM_SHIFT_IMM |
| - : BFD_RELOC_ARM_SWI |
| - : BFD_RELOC_ARM_MULTI |
| - : BFD_RELOC_ARM_CP_OFF_IMM |
| - : BFD_RELOC_ARM_ADR_IMM |
| - : BFD_RELOC_ARM_LDR_IMM |
| - : BFD_RELOC_ARM_LITERAL |
| - : BFD_RELOC_ARM_IN_POOL |
| - : BFD_RELOC_ARM_OFFSET_IMM8 |
| - : BFD_RELOC_ARM_HWLITERAL |
| - : BFD_RELOC_ARM_THUMB_ADD |
| - : BFD_RELOC_ARM_THUMB_IMM |
| - : BFD_RELOC_ARM_THUMB_SHIFT |
| - : BFD_RELOC_ARM_THUMB_OFFSET |
| - : BFD_RELOC_ARM_GOT12 |
| - : BFD_RELOC_ARM_GOT32 |
| - : BFD_RELOC_ARM_JUMP_SLOT |
| - : BFD_RELOC_ARM_COPY |
| - : BFD_RELOC_ARM_GLOB_DAT |
| - : BFD_RELOC_ARM_PLT32 |
| - : BFD_RELOC_ARM_RELATIVE |
| - : BFD_RELOC_ARM_GOTOFF |
| - : BFD_RELOC_ARM_GOTPC |
| These relocs are only used within the ARM assembler. They are not |
| (at present) written to any object files. |
| |
| - : BFD_RELOC_SH_PCDISP8BY2 |
| - : BFD_RELOC_SH_PCDISP12BY2 |
| - : BFD_RELOC_SH_IMM4 |
| - : BFD_RELOC_SH_IMM4BY2 |
| - : BFD_RELOC_SH_IMM4BY4 |
| - : BFD_RELOC_SH_IMM8 |
| - : BFD_RELOC_SH_IMM8BY2 |
| - : BFD_RELOC_SH_IMM8BY4 |
| - : BFD_RELOC_SH_PCRELIMM8BY2 |
| - : BFD_RELOC_SH_PCRELIMM8BY4 |
| - : BFD_RELOC_SH_SWITCH16 |
| - : BFD_RELOC_SH_SWITCH32 |
| - : BFD_RELOC_SH_USES |
| - : BFD_RELOC_SH_COUNT |
| - : BFD_RELOC_SH_ALIGN |
| - : BFD_RELOC_SH_CODE |
| - : BFD_RELOC_SH_DATA |
| - : BFD_RELOC_SH_LABEL |
| - : BFD_RELOC_SH_LOOP_START |
| - : BFD_RELOC_SH_LOOP_END |
| - : BFD_RELOC_SH_COPY |
| - : BFD_RELOC_SH_GLOB_DAT |
| - : BFD_RELOC_SH_JMP_SLOT |
| - : BFD_RELOC_SH_RELATIVE |
| - : BFD_RELOC_SH_GOTPC |
| - : BFD_RELOC_SH_GOT_LOW16 |
| - : BFD_RELOC_SH_GOT_MEDLOW16 |
| - : BFD_RELOC_SH_GOT_MEDHI16 |
| - : BFD_RELOC_SH_GOT_HI16 |
| - : BFD_RELOC_SH_GOTPLT_LOW16 |
| - : BFD_RELOC_SH_GOTPLT_MEDLOW16 |
| - : BFD_RELOC_SH_GOTPLT_MEDHI16 |
| - : BFD_RELOC_SH_GOTPLT_HI16 |
| - : BFD_RELOC_SH_PLT_LOW16 |
| - : BFD_RELOC_SH_PLT_MEDLOW16 |
| - : BFD_RELOC_SH_PLT_MEDHI16 |
| - : BFD_RELOC_SH_PLT_HI16 |
| - : BFD_RELOC_SH_GOTOFF_LOW16 |
| - : BFD_RELOC_SH_GOTOFF_MEDLOW16 |
| - : BFD_RELOC_SH_GOTOFF_MEDHI16 |
| - : BFD_RELOC_SH_GOTOFF_HI16 |
| - : BFD_RELOC_SH_GOTPC_LOW16 |
| - : BFD_RELOC_SH_GOTPC_MEDLOW16 |
| - : BFD_RELOC_SH_GOTPC_MEDHI16 |
| - : BFD_RELOC_SH_GOTPC_HI16 |
| - : BFD_RELOC_SH_COPY64 |
| - : BFD_RELOC_SH_GLOB_DAT64 |
| - : BFD_RELOC_SH_JMP_SLOT64 |
| - : BFD_RELOC_SH_RELATIVE64 |
| - : BFD_RELOC_SH_GOT10BY4 |
| - : BFD_RELOC_SH_GOT10BY8 |
| - : BFD_RELOC_SH_GOTPLT10BY4 |
| - : BFD_RELOC_SH_GOTPLT10BY8 |
| - : BFD_RELOC_SH_GOTPLT32 |
| - : BFD_RELOC_SH_SHMEDIA_CODE |
| - : BFD_RELOC_SH_IMMU5 |
| - : BFD_RELOC_SH_IMMS6 |
| - : BFD_RELOC_SH_IMMS6BY32 |
| - : BFD_RELOC_SH_IMMU6 |
| - : BFD_RELOC_SH_IMMS10 |
| - : BFD_RELOC_SH_IMMS10BY2 |
| - : BFD_RELOC_SH_IMMS10BY4 |
| - : BFD_RELOC_SH_IMMS10BY8 |
| - : BFD_RELOC_SH_IMMS16 |
| - : BFD_RELOC_SH_IMMU16 |
| - : BFD_RELOC_SH_IMM_LOW16 |
| - : BFD_RELOC_SH_IMM_LOW16_PCREL |
| - : BFD_RELOC_SH_IMM_MEDLOW16 |
| - : BFD_RELOC_SH_IMM_MEDLOW16_PCREL |
| - : BFD_RELOC_SH_IMM_MEDHI16 |
| - : BFD_RELOC_SH_IMM_MEDHI16_PCREL |
| - : BFD_RELOC_SH_IMM_HI16 |
| - : BFD_RELOC_SH_IMM_HI16_PCREL |
| - : BFD_RELOC_SH_PT_16 |
| Hitachi SH relocs. Not all of these appear in object files. |
| |
| - : BFD_RELOC_THUMB_PCREL_BRANCH9 |
| - : BFD_RELOC_THUMB_PCREL_BRANCH12 |
| - : BFD_RELOC_THUMB_PCREL_BRANCH23 |
| Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must |
| be zero and is not stored in the instruction. |
| |
| - : BFD_RELOC_ARC_B22_PCREL |
| ARC Cores relocs. ARC 22 bit pc-relative branch. The lowest two |
| bits must be zero and are not stored in the instruction. The high |
| 20 bits are installed in bits 26 through 7 of the instruction. |
| |
| - : BFD_RELOC_ARC_B26 |
| ARC 26 bit absolute branch. The lowest two bits must be zero and |
| are not stored in the instruction. The high 24 bits are installed |
| in bits 23 through 0. |
| |
| - : BFD_RELOC_D10V_10_PCREL_R |
| Mitsubishi D10V relocs. This is a 10-bit reloc with the right 2 |
| bits assumed to be 0. |
| |
| - : BFD_RELOC_D10V_10_PCREL_L |
| Mitsubishi D10V relocs. This is a 10-bit reloc with the right 2 |
| bits assumed to be 0. This is the same as the previous reloc |
| except it is in the left container, i.e., shifted left 15 bits. |
| |
| - : BFD_RELOC_D10V_18 |
| This is an 18-bit reloc with the right 2 bits assumed to be 0. |
| |
| - : BFD_RELOC_D10V_18_PCREL |
| This is an 18-bit reloc with the right 2 bits assumed to be 0. |
| |
| - : BFD_RELOC_D30V_6 |
| Mitsubishi D30V relocs. This is a 6-bit absolute reloc. |
| |
| - : BFD_RELOC_D30V_9_PCREL |
| This is a 6-bit pc-relative reloc with the right 3 bits assumed to |
| be 0. |
| |
| - : BFD_RELOC_D30V_9_PCREL_R |
| This is a 6-bit pc-relative reloc with the right 3 bits assumed to |
| be 0. Same as the previous reloc but on the right side of the |
| container. |
| |
| - : BFD_RELOC_D30V_15 |
| This is a 12-bit absolute reloc with the right 3 bitsassumed to be |
| 0. |
| |
| - : BFD_RELOC_D30V_15_PCREL |
| This is a 12-bit pc-relative reloc with the right 3 bits assumed |
| to be 0. |
| |
| - : BFD_RELOC_D30V_15_PCREL_R |
| This is a 12-bit pc-relative reloc with the right 3 bits assumed |
| to be 0. Same as the previous reloc but on the right side of the |
| container. |
| |
| - : BFD_RELOC_D30V_21 |
| This is an 18-bit absolute reloc with the right 3 bits assumed to |
| be 0. |
| |
| - : BFD_RELOC_D30V_21_PCREL |
| This is an 18-bit pc-relative reloc with the right 3 bits assumed |
| to be 0. |
| |
| - : BFD_RELOC_D30V_21_PCREL_R |
| This is an 18-bit pc-relative reloc with the right 3 bits assumed |
| to be 0. Same as the previous reloc but on the right side of the |
| container. |
| |
| - : BFD_RELOC_D30V_32 |
| This is a 32-bit absolute reloc. |
| |
| - : BFD_RELOC_D30V_32_PCREL |
| This is a 32-bit pc-relative reloc. |
| |
| - : BFD_RELOC_M32R_24 |
| Mitsubishi M32R relocs. This is a 24 bit absolute address. |
| |
| - : BFD_RELOC_M32R_10_PCREL |
| This is a 10-bit pc-relative reloc with the right 2 bits assumed |
| to be 0. |
| |
| - : BFD_RELOC_M32R_18_PCREL |
| This is an 18-bit reloc with the right 2 bits assumed to be 0. |
| |
| - : BFD_RELOC_M32R_26_PCREL |
| This is a 26-bit reloc with the right 2 bits assumed to be 0. |
| |
| - : BFD_RELOC_M32R_HI16_ULO |
| This is a 16-bit reloc containing the high 16 bits of an address |
| used when the lower 16 bits are treated as unsigned. |
| |
| - : BFD_RELOC_M32R_HI16_SLO |
| This is a 16-bit reloc containing the high 16 bits of an address |
| used when the lower 16 bits are treated as signed. |
| |
| - : BFD_RELOC_M32R_LO16 |
| This is a 16-bit reloc containing the lower 16 bits of an address. |
| |
| - : BFD_RELOC_M32R_SDA16 |
| This is a 16-bit reloc containing the small data area offset for |
| use in add3, load, and store instructions. |
| |
| - : BFD_RELOC_V850_9_PCREL |
| This is a 9-bit reloc |
| |
| - : BFD_RELOC_V850_22_PCREL |
| This is a 22-bit reloc |
| |
| - : BFD_RELOC_V850_SDA_16_16_OFFSET |
| This is a 16 bit offset from the short data area pointer. |
| |
| - : BFD_RELOC_V850_SDA_15_16_OFFSET |
| This is a 16 bit offset (of which only 15 bits are used) from the |
| short data area pointer. |
| |
| - : BFD_RELOC_V850_ZDA_16_16_OFFSET |
| This is a 16 bit offset from the zero data area pointer. |
| |
| - : BFD_RELOC_V850_ZDA_15_16_OFFSET |
| This is a 16 bit offset (of which only 15 bits are used) from the |
| zero data area pointer. |
| |
| - : BFD_RELOC_V850_TDA_6_8_OFFSET |
| This is an 8 bit offset (of which only 6 bits are used) from the |
| tiny data area pointer. |
| |
| - : BFD_RELOC_V850_TDA_7_8_OFFSET |
| This is an 8bit offset (of which only 7 bits are used) from the |
| tiny data area pointer. |
| |
| - : BFD_RELOC_V850_TDA_7_7_OFFSET |
| This is a 7 bit offset from the tiny data area pointer. |
| |
| - : BFD_RELOC_V850_TDA_16_16_OFFSET |
| This is a 16 bit offset from the tiny data area pointer. |
| |
| - : BFD_RELOC_V850_TDA_4_5_OFFSET |
| This is a 5 bit offset (of which only 4 bits are used) from the |
| tiny data area pointer. |
| |
| - : BFD_RELOC_V850_TDA_4_4_OFFSET |
| This is a 4 bit offset from the tiny data area pointer. |
| |
| - : BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET |
| This is a 16 bit offset from the short data area pointer, with the |
| bits placed non-contigously in the instruction. |
| |
| - : BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET |
| This is a 16 bit offset from the zero data area pointer, with the |
| bits placed non-contigously in the instruction. |
| |
| - : BFD_RELOC_V850_CALLT_6_7_OFFSET |
| This is a 6 bit offset from the call table base pointer. |
| |
| - : BFD_RELOC_V850_CALLT_16_16_OFFSET |
| This is a 16 bit offset from the call table base pointer. |
| |
| - : BFD_RELOC_MN10300_32_PCREL |
| This is a 32bit pcrel reloc for the mn10300, offset by two bytes |
| in the instruction. |
| |
| - : BFD_RELOC_MN10300_16_PCREL |
| This is a 16bit pcrel reloc for the mn10300, offset by two bytes |
| in the instruction. |
| |
| - : BFD_RELOC_TIC30_LDP |
| This is a 8bit DP reloc for the tms320c30, where the most |
| significant 8 bits of a 24 bit word are placed into the least |
| significant 8 bits of the opcode. |
| |
| - : BFD_RELOC_TIC54X_PARTLS7 |
| This is a 7bit reloc for the tms320c54x, where the least |
| significant 7 bits of a 16 bit word are placed into the least |
| significant 7 bits of the opcode. |
| |
| - : BFD_RELOC_TIC54X_PARTMS9 |
| This is a 9bit DP reloc for the tms320c54x, where the most |
| significant 9 bits of a 16 bit word are placed into the least |
| significant 9 bits of the opcode. |
| |
| - : BFD_RELOC_TIC54X_23 |
| This is an extended address 23-bit reloc for the tms320c54x. |
| |
| - : BFD_RELOC_TIC54X_16_OF_23 |
| This is a 16-bit reloc for the tms320c54x, where the least |
| significant 16 bits of a 23-bit extended address are placed into |
| the opcode. |
| |
| - : BFD_RELOC_TIC54X_MS7_OF_23 |
| This is a reloc for the tms320c54x, where the most significant 7 |
| bits of a 23-bit extended address are placed into the opcode. |
| |
| - : BFD_RELOC_FR30_48 |
| This is a 48 bit reloc for the FR30 that stores 32 bits. |
| |
| - : BFD_RELOC_FR30_20 |
| This is a 32 bit reloc for the FR30 that stores 20 bits split up |
| into two sections. |
| |
| - : BFD_RELOC_FR30_6_IN_4 |
| This is a 16 bit reloc for the FR30 that stores a 6 bit word |
| offset in 4 bits. |
| |
| - : BFD_RELOC_FR30_8_IN_8 |
| This is a 16 bit reloc for the FR30 that stores an 8 bit byte |
| offset into 8 bits. |
| |
| - : BFD_RELOC_FR30_9_IN_8 |
| This is a 16 bit reloc for the FR30 that stores a 9 bit short |
| offset into 8 bits. |
| |
| - : BFD_RELOC_FR30_10_IN_8 |
| This is a 16 bit reloc for the FR30 that stores a 10 bit word |
| offset into 8 bits. |
| |
| - : BFD_RELOC_FR30_9_PCREL |
| This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative |
| short offset into 8 bits. |
| |
| - : BFD_RELOC_FR30_12_PCREL |
| This is a 16 bit reloc for the FR30 that stores a 12 bit pc |
| relative short offset into 11 bits. |
| |
| - : BFD_RELOC_MCORE_PCREL_IMM8BY4 |
| - : BFD_RELOC_MCORE_PCREL_IMM11BY2 |
| - : BFD_RELOC_MCORE_PCREL_IMM4BY2 |
| - : BFD_RELOC_MCORE_PCREL_32 |
| - : BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2 |
| - : BFD_RELOC_MCORE_RVA |
| Motorola Mcore relocations. |
| |
| - : BFD_RELOC_MMIX_GETA |
| - : BFD_RELOC_MMIX_GETA_1 |
| - : BFD_RELOC_MMIX_GETA_2 |
| - : BFD_RELOC_MMIX_GETA_3 |
| These are relocations for the GETA instruction. |
| |
| - : BFD_RELOC_MMIX_CBRANCH |
| - : BFD_RELOC_MMIX_CBRANCH_J |
| - : BFD_RELOC_MMIX_CBRANCH_1 |
| - : BFD_RELOC_MMIX_CBRANCH_2 |
| - : BFD_RELOC_MMIX_CBRANCH_3 |
| These are relocations for a conditional branch instruction. |
| |
| - : BFD_RELOC_MMIX_PUSHJ |
| - : BFD_RELOC_MMIX_PUSHJ_1 |
| - : BFD_RELOC_MMIX_PUSHJ_2 |
| - : BFD_RELOC_MMIX_PUSHJ_3 |
| These are relocations for the PUSHJ instruction. |
| |
| - : BFD_RELOC_MMIX_JMP |
| - : BFD_RELOC_MMIX_JMP_1 |
| - : BFD_RELOC_MMIX_JMP_2 |
| - : BFD_RELOC_MMIX_JMP_3 |
| These are relocations for the JMP instruction. |
| |
| - : BFD_RELOC_MMIX_ADDR19 |
| This is a relocation for a relative address as in a GETA |
| instruction or a branch. |
| |
| - : BFD_RELOC_MMIX_ADDR27 |
| This is a relocation for a relative address as in a JMP |
| instruction. |
| |
| - : BFD_RELOC_MMIX_REG_OR_BYTE |
| This is a relocation for an instruction field that may be a general |
| register or a value 0..255. |
| |
| - : BFD_RELOC_MMIX_REG |
| This is a relocation for an instruction field that may be a general |
| register. |
| |
| - : BFD_RELOC_MMIX_BASE_PLUS_OFFSET |
| This is a relocation for two instruction fields holding a register |
| and an offset, the equivalent of the relocation. |
| |
| - : BFD_RELOC_MMIX_LOCAL |
| This relocation is an assertion that the expression is not |
| allocated as a global register. It does not modify contents. |
| |
| - : BFD_RELOC_AVR_7_PCREL |
| This is a 16 bit reloc for the AVR that stores 8 bit pc relative |
| short offset into 7 bits. |
| |
| - : BFD_RELOC_AVR_13_PCREL |
| This is a 16 bit reloc for the AVR that stores 13 bit pc relative |
| short offset into 12 bits. |
| |
| - : BFD_RELOC_AVR_16_PM |
| This is a 16 bit reloc for the AVR that stores 17 bit value |
| (usually program memory address) into 16 bits. |
| |
| - : BFD_RELOC_AVR_LO8_LDI |
| This is a 16 bit reloc for the AVR that stores 8 bit value (usually |
| data memory address) into 8 bit immediate value of LDI insn. |
| |
| - : BFD_RELOC_AVR_HI8_LDI |
| This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 |
| bit of data memory address) into 8 bit immediate value of LDI insn. |
| |
| - : BFD_RELOC_AVR_HH8_LDI |
| This is a 16 bit reloc for the AVR that stores 8 bit value (most |
| high 8 bit of program memory address) into 8 bit immediate value |
| of LDI insn. |
| |
| - : BFD_RELOC_AVR_LO8_LDI_NEG |
| This is a 16 bit reloc for the AVR that stores negated 8 bit value |
| (usually data memory address) into 8 bit immediate value of SUBI |
| insn. |
| |
| - : BFD_RELOC_AVR_HI8_LDI_NEG |
| This is a 16 bit reloc for the AVR that stores negated 8 bit value |
| (high 8 bit of data memory address) into 8 bit immediate value of |
| SUBI insn. |
| |
| - : BFD_RELOC_AVR_HH8_LDI_NEG |
| This is a 16 bit reloc for the AVR that stores negated 8 bit value |
| (most high 8 bit of program memory address) into 8 bit immediate |
| value of LDI or SUBI insn. |
| |
| - : BFD_RELOC_AVR_LO8_LDI_PM |
| This is a 16 bit reloc for the AVR that stores 8 bit value (usually |
| command address) into 8 bit immediate value of LDI insn. |
| |
| - : BFD_RELOC_AVR_HI8_LDI_PM |
| This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 |
| bit of command address) into 8 bit immediate value of LDI insn. |
| |
| - : BFD_RELOC_AVR_HH8_LDI_PM |
| This is a 16 bit reloc for the AVR that stores 8 bit value (most |
| high 8 bit of command address) into 8 bit immediate value of LDI |
| insn. |
| |
| - : BFD_RELOC_AVR_LO8_LDI_PM_NEG |
| This is a 16 bit reloc for the AVR that stores negated 8 bit value |
| (usually command address) into 8 bit immediate value of SUBI insn. |
| |
| - : BFD_RELOC_AVR_HI8_LDI_PM_NEG |
| This is a 16 bit reloc for the AVR that stores negated 8 bit value |
| (high 8 bit of 16 bit command address) into 8 bit immediate value |
| of SUBI insn. |
| |
| - : BFD_RELOC_AVR_HH8_LDI_PM_NEG |
| This is a 16 bit reloc for the AVR that stores negated 8 bit value |
| (high 6 bit of 22 bit command address) into 8 bit immediate value |
| of SUBI insn. |
| |
| - : BFD_RELOC_AVR_CALL |
| This is a 32 bit reloc for the AVR that stores 23 bit value into |
| 22 bits. |
| |
| - : BFD_RELOC_390_12 |
| Direct 12 bit. |
| |
| - : BFD_RELOC_390_GOT12 |
| 12 bit GOT offset. |
| |
| - : BFD_RELOC_390_PLT32 |
| 32 bit PC relative PLT address. |
| |
| - : BFD_RELOC_390_COPY |
| Copy symbol at runtime. |
| |
| - : BFD_RELOC_390_GLOB_DAT |
| Create GOT entry. |
| |
| - : BFD_RELOC_390_JMP_SLOT |
| Create PLT entry. |
| |
| - : BFD_RELOC_390_RELATIVE |
| Adjust by program base. |
| |
| - : BFD_RELOC_390_GOTPC |
| 32 bit PC relative offset to GOT. |
| |
| - : BFD_RELOC_390_GOT16 |
| 16 bit GOT offset. |
| |
| - : BFD_RELOC_390_PC16DBL |
| PC relative 16 bit shifted by 1. |
| |
| - : BFD_RELOC_390_PLT16DBL |
| 16 bit PC rel. PLT shifted by 1. |
| |
| - : BFD_RELOC_390_PC32DBL |
| PC relative 32 bit shifted by 1. |
| |
| - : BFD_RELOC_390_PLT32DBL |
| 32 bit PC rel. PLT shifted by 1. |
| |
| - : BFD_RELOC_390_GOTPCDBL |
| 32 bit PC rel. GOT shifted by 1. |
| |
| - : BFD_RELOC_390_GOT64 |
| 64 bit GOT offset. |
| |
| - : BFD_RELOC_390_PLT64 |
| 64 bit PC relative PLT address. |
| |
| - : BFD_RELOC_390_GOTENT |
| 32 bit rel. offset to GOT entry. |
| |
| - : BFD_RELOC_VTABLE_INHERIT |
| - : BFD_RELOC_VTABLE_ENTRY |
| These two relocations are used by the linker to determine which of |
| the entries in a C++ virtual function table are actually used. |
| When the -gc-sections option is given, the linker will zero out |
| the entries that are not used, so that the code for those |
| functions need not be included in the output. |
| |
| VTABLE_INHERIT is a zero-space relocation used to describe to the |
| linker the inheritence tree of a C++ virtual function table. The |
| relocation's symbol should be the parent class' vtable, and the |
| relocation should be located at the child vtable. |
| |
| VTABLE_ENTRY is a zero-space relocation that describes the use of a |
| virtual function table entry. The reloc's symbol should refer to |
| the table of the class mentioned in the code. Off of that base, |
| an offset describes the entry that is being used. For Rela hosts, |
| this offset is stored in the reloc's addend. For Rel hosts, we |
| are forced to put this offset in the reloc's section offset. |
| |
| - : BFD_RELOC_IA64_IMM14 |
| - : BFD_RELOC_IA64_IMM22 |
| - : BFD_RELOC_IA64_IMM64 |
| - : BFD_RELOC_IA64_DIR32MSB |
| - : BFD_RELOC_IA64_DIR32LSB |
| - : BFD_RELOC_IA64_DIR64MSB |
| - : BFD_RELOC_IA64_DIR64LSB |
| - : BFD_RELOC_IA64_GPREL22 |
| - : BFD_RELOC_IA64_GPREL64I |
| - : BFD_RELOC_IA64_GPREL32MSB |
| - : BFD_RELOC_IA64_GPREL32LSB |
| - : BFD_RELOC_IA64_GPREL64MSB |
| - : BFD_RELOC_IA64_GPREL64LSB |
| - : BFD_RELOC_IA64_LTOFF22 |
| - : BFD_RELOC_IA64_LTOFF64I |
| - : BFD_RELOC_IA64_PLTOFF22 |
| - : BFD_RELOC_IA64_PLTOFF64I |
| - : BFD_RELOC_IA64_PLTOFF64MSB |
| - : BFD_RELOC_IA64_PLTOFF64LSB |
| - : BFD_RELOC_IA64_FPTR64I |
| - : BFD_RELOC_IA64_FPTR32MSB |
| - : BFD_RELOC_IA64_FPTR32LSB |
| - : BFD_RELOC_IA64_FPTR64MSB |
| - : BFD_RELOC_IA64_FPTR64LSB |
| - : BFD_RELOC_IA64_PCREL21B |
| - : BFD_RELOC_IA64_PCREL21BI |
| - : BFD_RELOC_IA64_PCREL21M |
| - : BFD_RELOC_IA64_PCREL21F |
| - : BFD_RELOC_IA64_PCREL22 |
| - : BFD_RELOC_IA64_PCREL60B |
| - : BFD_RELOC_IA64_PCREL64I |
| - : BFD_RELOC_IA64_PCREL32MSB |
| - : BFD_RELOC_IA64_PCREL32LSB |
| - : BFD_RELOC_IA64_PCREL64MSB |
| - : BFD_RELOC_IA64_PCREL64LSB |
| - : BFD_RELOC_IA64_LTOFF_FPTR22 |
| - : BFD_RELOC_IA64_LTOFF_FPTR64I |
| - : BFD_RELOC_IA64_LTOFF_FPTR32MSB |
| - : BFD_RELOC_IA64_LTOFF_FPTR32LSB |
| - : BFD_RELOC_IA64_LTOFF_FPTR64MSB |
| - : BFD_RELOC_IA64_LTOFF_FPTR64LSB |
| - : BFD_RELOC_IA64_SEGREL32MSB |
| - : BFD_RELOC_IA64_SEGREL32LSB |
| - : BFD_RELOC_IA64_SEGREL64MSB |
| - : BFD_RELOC_IA64_SEGREL64LSB |
| - : BFD_RELOC_IA64_SECREL32MSB |
| - : BFD_RELOC_IA64_SECREL32LSB |
| - : BFD_RELOC_IA64_SECREL64MSB |
| - : BFD_RELOC_IA64_SECREL64LSB |
| - : BFD_RELOC_IA64_REL32MSB |
| - : BFD_RELOC_IA64_REL32LSB |
| - : BFD_RELOC_IA64_REL64MSB |
| - : BFD_RELOC_IA64_REL64LSB |
| - : BFD_RELOC_IA64_LTV32MSB |
| - : BFD_RELOC_IA64_LTV32LSB |
| - : BFD_RELOC_IA64_LTV64MSB |
| - : BFD_RELOC_IA64_LTV64LSB |
| - : BFD_RELOC_IA64_IPLTMSB |
| - : BFD_RELOC_IA64_IPLTLSB |
| - : BFD_RELOC_IA64_COPY |
| - : BFD_RELOC_IA64_TPREL22 |
| - : BFD_RELOC_IA64_TPREL64MSB |
| - : BFD_RELOC_IA64_TPREL64LSB |
| - : BFD_RELOC_IA64_LTOFF_TP22 |
| - : BFD_RELOC_IA64_LTOFF22X |
| - : BFD_RELOC_IA64_LDXMOV |
| Intel IA64 Relocations. |
| |
| - : BFD_RELOC_M68HC11_HI8 |
| Motorola 68HC11 reloc. This is the 8 bits high part of an |
| absolute address. |
| |
| - : BFD_RELOC_M68HC11_LO8 |
| Motorola 68HC11 reloc. This is the 8 bits low part of an absolute |
| address. |
| |
| - : BFD_RELOC_M68HC11_3B |
| Motorola 68HC11 reloc. This is the 3 bits of a value. |
| |
| - : BFD_RELOC_CRIS_BDISP8 |
| - : BFD_RELOC_CRIS_UNSIGNED_5 |
| - : BFD_RELOC_CRIS_SIGNED_6 |
| - : BFD_RELOC_CRIS_UNSIGNED_6 |
| - : BFD_RELOC_CRIS_UNSIGNED_4 |
| These relocs are only used within the CRIS assembler. They are not |
| (at present) written to any object files. |
| |
| - : BFD_RELOC_CRIS_COPY |
| - : BFD_RELOC_CRIS_GLOB_DAT |
| - : BFD_RELOC_CRIS_JUMP_SLOT |
| - : BFD_RELOC_CRIS_RELATIVE |
| Relocs used in ELF shared libraries for CRIS. |
| |
| - : BFD_RELOC_CRIS_32_GOT |
| 32-bit offset to symbol-entry within GOT. |
| |
| - : BFD_RELOC_CRIS_16_GOT |
| 16-bit offset to symbol-entry within GOT. |
| |
| - : BFD_RELOC_CRIS_32_GOTPLT |
| 32-bit offset to symbol-entry within GOT, with PLT handling. |
| |
| - : BFD_RELOC_CRIS_16_GOTPLT |
| 16-bit offset to symbol-entry within GOT, with PLT handling. |
| |
| - : BFD_RELOC_CRIS_32_GOTREL |
| 32-bit offset to symbol, relative to GOT. |
| |
| - : BFD_RELOC_CRIS_32_PLT_GOTREL |
| 32-bit offset to symbol with PLT entry, relative to GOT. |
| |
| - : BFD_RELOC_CRIS_32_PLT_PCREL |
| 32-bit offset to symbol with PLT entry, relative to this |
| relocation. |
| |
| - : BFD_RELOC_860_COPY |
| - : BFD_RELOC_860_GLOB_DAT |
| - : BFD_RELOC_860_JUMP_SLOT |
| - : BFD_RELOC_860_RELATIVE |
| - : BFD_RELOC_860_PC26 |
| - : BFD_RELOC_860_PLT26 |
| - : BFD_RELOC_860_PC16 |
| - : BFD_RELOC_860_LOW0 |
| - : BFD_RELOC_860_SPLIT0 |
| - : BFD_RELOC_860_LOW1 |
| - : BFD_RELOC_860_SPLIT1 |
| - : BFD_RELOC_860_LOW2 |
| - : BFD_RELOC_860_SPLIT2 |
| - : BFD_RELOC_860_LOW3 |
| - : BFD_RELOC_860_LOGOT0 |
| - : BFD_RELOC_860_SPGOT0 |
| - : BFD_RELOC_860_LOGOT1 |
| - : BFD_RELOC_860_SPGOT1 |
| - : BFD_RELOC_860_LOGOTOFF0 |
| - : BFD_RELOC_860_SPGOTOFF0 |
| - : BFD_RELOC_860_LOGOTOFF1 |
| - : BFD_RELOC_860_SPGOTOFF1 |
| - : BFD_RELOC_860_LOGOTOFF2 |
| - : BFD_RELOC_860_LOGOTOFF3 |
| - : BFD_RELOC_860_LOPC |
| - : BFD_RELOC_860_HIGHADJ |
| - : BFD_RELOC_860_HAGOT |
| - : BFD_RELOC_860_HAGOTOFF |
| - : BFD_RELOC_860_HAPC |
| - : BFD_RELOC_860_HIGH |
| - : BFD_RELOC_860_HIGOT |
| - : BFD_RELOC_860_HIGOTOFF |
| Intel i860 Relocations. |
| |
| - : BFD_RELOC_OPENRISC_ABS_26 |
| - : BFD_RELOC_OPENRISC_REL_26 |
| OpenRISC Relocations. |
| |
| - : BFD_RELOC_H8_DIR16A8 |
| - : BFD_RELOC_H8_DIR16R8 |
| - : BFD_RELOC_H8_DIR24A8 |
| - : BFD_RELOC_H8_DIR24R8 |
| - : BFD_RELOC_H8_DIR32A16 |
| H8 elf Relocations. |
| |
| - : BFD_RELOC_XSTORMY16_REL_12 |
| - : BFD_RELOC_XSTORMY16_24 |
| - : BFD_RELOC_XSTORMY16_FPTR16 |
| Sony Xstormy16 Relocations. |
| |
| |
| typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; |
| |
| `bfd_reloc_type_lookup' |
| ....................... |
| |
| *Synopsis* |
| reloc_howto_type * |
| bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code); |
| *Description* |
| Return a pointer to a howto structure which, when invoked, will perform |
| the relocation CODE on data from the architecture noted. |
| |
| `bfd_default_reloc_type_lookup' |
| ............................... |
| |
| *Synopsis* |
| reloc_howto_type *bfd_default_reloc_type_lookup |
| (bfd *abfd, bfd_reloc_code_real_type code); |
| *Description* |
| Provides a default relocation lookup routine for any architecture. |
| |
| `bfd_get_reloc_code_name' |
| ......................... |
| |
| *Synopsis* |
| const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code); |
| *Description* |
| Provides a printable name for the supplied relocation code. Useful |
| mainly for printing error messages. |
| |
| `bfd_generic_relax_section' |
| ........................... |
| |
| *Synopsis* |
| boolean bfd_generic_relax_section |
| (bfd *abfd, |
| asection *section, |
| struct bfd_link_info *, |
| boolean *); |
| *Description* |
| Provides default handling for relaxing for back ends which don't do |
| relaxing - i.e., does nothing. |
| |
| `bfd_generic_gc_sections' |
| ......................... |
| |
| *Synopsis* |
| boolean bfd_generic_gc_sections |
| (bfd *, struct bfd_link_info *); |
| *Description* |
| Provides default handling for relaxing for back ends which don't do |
| section gc - i.e., does nothing. |
| |
| `bfd_generic_merge_sections' |
| ............................ |
| |
| *Synopsis* |
| boolean bfd_generic_merge_sections |
| (bfd *, struct bfd_link_info *); |
| *Description* |
| Provides default handling for SEC_MERGE section merging for back ends |
| which don't have SEC_MERGE support - i.e., does nothing. |
| |
| `bfd_generic_get_relocated_section_contents' |
| ............................................ |
| |
| *Synopsis* |
| bfd_byte * |
| bfd_generic_get_relocated_section_contents (bfd *abfd, |
| struct bfd_link_info *link_info, |
| struct bfd_link_order *link_order, |
| bfd_byte *data, |
| boolean relocateable, |
| asymbol **symbols); |
| *Description* |
| Provides default handling of relocation effort for back ends which |
| can't be bothered to do it efficiently. |
| |
| |
| File: bfd.info, Node: Core Files, Next: Targets, Prev: Relocations, Up: BFD front end |
| |
| Core files |
| ========== |
| |
| *Description* |
| These are functions pertaining to core files. |
| |
| `bfd_core_file_failing_command' |
| ............................... |
| |
| *Synopsis* |
| const char *bfd_core_file_failing_command(bfd *abfd); |
| *Description* |
| Return a read-only string explaining which program was running when it |
| failed and produced the core file ABFD. |
| |
| `bfd_core_file_failing_signal' |
| .............................. |
| |
| *Synopsis* |
| int bfd_core_file_failing_signal(bfd *abfd); |
| *Description* |
| Returns the signal number which caused the core dump which generated |
| the file the BFD ABFD is attached to. |
| |
| `core_file_matches_executable_p' |
| ................................ |
| |
| *Synopsis* |
| boolean core_file_matches_executable_p |
| (bfd *core_bfd, bfd *exec_bfd); |
| *Description* |
| Return `true' if the core file attached to CORE_BFD was generated by a |
| run of the executable file attached to EXEC_BFD, `false' otherwise. |
| |
| |
| File: bfd.info, Node: Targets, Next: Architectures, Prev: Core Files, Up: BFD front end |
| |
| Targets |
| ======= |
| |
| *Description* |
| Each port of BFD to a different machine requries the creation of a |
| target back end. All the back end provides to the root part of BFD is a |
| structure containing pointers to functions which perform certain low |
| level operations on files. BFD translates the applications's requests |
| through a pointer into calls to the back end routines. |
| |
| When a file is opened with `bfd_openr', its format and target are |
| unknown. BFD uses various mechanisms to determine how to interpret the |
| file. The operations performed are: |
| |
| * Create a BFD by calling the internal routine `_bfd_new_bfd', then |
| call `bfd_find_target' with the target string supplied to |
| `bfd_openr' and the new BFD pointer. |
| |
| * If a null target string was provided to `bfd_find_target', look up |
| the environment variable `GNUTARGET' and use that as the target |
| string. |
| |
| * If the target string is still `NULL', or the target string is |
| `default', then use the first item in the target vector as the |
| target type, and set `target_defaulted' in the BFD to cause |
| `bfd_check_format' to loop through all the targets. *Note |
| bfd_target::. *Note Formats::. |
| |
| * Otherwise, inspect the elements in the target vector one by one, |
| until a match on target name is found. When found, use it. |
| |
| * Otherwise return the error `bfd_error_invalid_target' to |
| `bfd_openr'. |
| |
| * `bfd_openr' attempts to open the file using `bfd_open_file', and |
| returns the BFD. |
| Once the BFD has been opened and the target selected, the file |
| format may be determined. This is done by calling `bfd_check_format' on |
| the BFD with a suggested format. If `target_defaulted' has been set, |
| each possible target type is tried to see if it recognizes the |
| specified format. `bfd_check_format' returns `true' when the caller |
| guesses right. |
| |
| * Menu: |
| |
| * bfd_target:: |
| |
