blob: fcf04b5db7abbbc7b8fcd1a2b57708fd96df132f [file] [log] [blame]
# frv testcase for bltlr $ICCi,$hint
# mach: all
.include "testutils.inc"
start
.global bltlr
bltlr:
set_spr_addr bad,lr
set_icc 0x0 0
bltlr icc0,0
set_spr_addr bad,lr
set_icc 0x1 1
bltlr icc1,1
set_spr_addr ok3,lr
set_icc 0x2 2
bltlr icc2,2
fail
ok3:
set_spr_addr ok4,lr
set_icc 0x3 3
bltlr icc3,3
fail
ok4:
set_spr_addr bad,lr
set_icc 0x4 0
bltlr icc0,0
set_spr_addr bad,lr
set_icc 0x5 1
bltlr icc1,1
set_spr_addr ok7,lr
set_icc 0x6 2
bltlr icc2,2
fail
ok7:
set_spr_addr ok8,lr
set_icc 0x7 3
bltlr icc3,3
fail
ok8:
set_spr_addr ok9,lr
set_icc 0x8 0
bltlr icc0,0
fail
ok9:
set_spr_addr oka,lr
set_icc 0x9 1
bltlr icc1,1
fail
oka:
set_spr_addr bad,lr
set_icc 0xa 2
bltlr icc2,2
set_spr_addr bad,lr
set_icc 0xb 3
bltlr icc3,3
set_spr_addr okd,lr
set_icc 0xc 0
bltlr icc0,0
fail
okd:
set_spr_addr oke,lr
set_icc 0xd 1
bltlr icc1,1
fail
oke:
set_spr_addr bad,lr
set_icc 0xe 2
bltlr icc2,2
set_spr_addr bad,lr
set_icc 0xf 3
bltlr icc3,3
pass
bad:
fail