blob: 91a1efdfa9e51256317476f34c26910fd6c4d028 [file] [log] [blame]
# frv testcase for fckge $FCCi,$CCj_float
# mach: all
.include "testutils.inc"
start
.global fckge
fckge:
set_spr_immed 0x1b1b,cccr
set_fcc 0x0 0
fckge fcc0,cc3
test_spr_immed 0x1b9b,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x1 0
fckge fcc0,cc3
test_spr_immed 0x1b9b,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x2 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x3 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x4 0
fckge fcc0,cc3
test_spr_immed 0x1b9b,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x5 0
fckge fcc0,cc3
test_spr_immed 0x1b9b,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x6 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x7 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x8 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x9 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xa 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xb 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xc 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xd 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xe 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xf 0
fckge fcc0,cc3
test_spr_immed 0x1bdb,cccr
pass