| 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| PR 25376 |
| * opcodes/arm.h (FPU_MVE, FPU_MVE_FPU): Move these features to... |
| (ARM_EXT2_MVE, ARM_EXT2_MVE_FP): ... the CORE_HIGH space. |
| (ARM_ANY): Redefine to not include any MVE bits. |
| (ARM_FEATURE_ALL): Removed. |
| |
| 2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * opcode/msp430.h (enum msp430_expp_e): New. |
| (struct msp430_operand_s): Add expp member to struct. |
| |
| 2020-01-13 Claudiu Zissulescu <claziss@gmail.com> |
| |
| * elf/arc-cpu.def: Update ARC cpu list. |
| |
| 2020-01-13 Alan Modra <amodra@gmail.com> |
| |
| * opcode/tic4x.h (EXTR): Delete. |
| (EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign |
| extension using shifts. Do trim INSERTU value to specified bitfield. |
| |
| 2020-01-10 Alan Modra <amodra@gmail.com> |
| |
| * opcode/spu.h: Formatting. |
| (UNSIGNED_EXTRACT): Use 1u. |
| (SIGNED_EXTRACT): Don't sign extend with shifts. |
| (DECODE_INSN_I9a, DECODE_INSN_I9b): Avoid left shift of signed value. |
| Keep result signed. |
| (DECODE_INSN_U9a, DECODE_INSN_U9b): Delete. |
| |
| 2020-01-07 Shahab Vahedi <shahab@synopsys.com> |
| |
| * opcode/arc.h (insn_class_t): Add 'LLOCK' and 'SCOND'. |
| |
| 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com> |
| |
| * coff/internal.h: Add defintions of Z80 reloc names. |
| |
| 2020-01-02 Christian Biesinger <cbiesinger@google.com> |
| |
| * opcode/s12z.h: Undef REG_Y. |
| |
| 2020-01-01 Alan Modra <amodra@gmail.com> |
| |
| Update year range in copyright notice of all files. |
| |
| For older changes see ChangeLog-2019 |
| |
| Copyright (C) 2020 Free Software Foundation, Inc. |
| |
| Copying and distribution of this file, with or without modification, |
| are permitted in any medium without royalty provided the copyright |
| notice and this notice are preserved. |
| |
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