x86: SKINIT with operand needs IgnoreSize
Without it in 16-bit mode a pointless operand size prefix would be
emitted.
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index c7822c4..1d27dfc 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -109,6 +109,7 @@
run_list_test "cr-err" ""
run_dump_test "cdr"
run_dump_test "svme"
+ run_dump_test "svme16"
run_dump_test "amdfam10"
run_dump_test "ssse3"
run_dump_test "rep"
diff --git a/gas/testsuite/gas/i386/svme.s b/gas/testsuite/gas/i386/svme.s
index a721e36..3d42fad 100644
--- a/gas/testsuite/gas/i386/svme.s
+++ b/gas/testsuite/gas/i386/svme.s
@@ -1,4 +1,7 @@
.text
+.ifdef __ia16__
+ .code16
+.endif
common:
clgi
invlpga
diff --git a/gas/testsuite/gas/i386/svme16.d b/gas/testsuite/gas/i386/svme16.d
new file mode 100644
index 0000000..bd3424f
--- /dev/null
+++ b/gas/testsuite/gas/i386/svme16.d
@@ -0,0 +1,41 @@
+#as: --defsym __ia16__=1
+#objdump: -dw -Mi8086
+#name: 16-bit SVME
+#source: svme.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <common>:
+[ ]*[0-9a-f]+:[ ]+0f 01 dd[ ]+clgi
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+0f 01 dc[ ]+stgi
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d9[ ]+vmmcall
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
+[0-9a-f]+ <att32>:
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga
+[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload
+[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun
+[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave
+[0-9a-f]+ <att16>:
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
+[0-9a-f]+ <intel32>:
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga
+[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload
+[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun
+[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave
+[0-9a-f]+ <intel16>:
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
+#pass
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 94763f9..5122351 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -2068,7 +2068,7 @@
invlpga, 0xf01df, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
invlpga, 0xf01df, None, CpuSVME, AddrPrefixOpReg, { Acc|Word|Dword|Qword, RegC|Dword }
skinit, 0xf01de, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
-skinit, 0xf01de, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Acc|Dword }
+skinit, 0xf01de, None, CpuSVME, No_bSuf|IgnoreSize|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Acc|Dword }
stgi, 0xf01dc, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
vmgexit, 0xf30f01d9, None, CpuSEV_ES, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
vmload, 0xf01da, None, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index ebf5414..7df3b29 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -44880,7 +44880,7 @@
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ "skinit", 0x01de, 1, None,
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
