ChangeLog.csl

2006-04-28  Mark Mitchell  <mark@codesourcery.com>

	* doc/as.texinfo: Mention that some .type syntaxes are not
	supported on all architectures.

2006-04-27  Richard Sandiford  <richard@codesourcery.com>

	include/opcodes/
	* m68k.h (mcf_mask): Define.

	opcodes/
	* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
	and fmovem entries.  Put register list entries before immediate
	mask entries.  Use "l" rather than "L" in the fmovem entries.
	* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
	out from INFO.
	(m68k_scan_mask): New function, split out from...
	(print_insn_m68k): ...here.  If no architecture has been set,
	first try printing an m680x0 instruction, then try a Coldfire one.

2006-04-27  Richard Sandiford  <richard@codesourcery.com>

	bfd/
	* elf32-m68k.c (elf_m68k_pcrel_insn): New structure.
	(elf_m68k_plt_info): Likewise.
	(elf_m68k_plt_info): New table.
	(CFV4E_PLT_ENTRY_SIZE): Rename to...
	(ISAB_PLT_ENTRY_SIZE): ...this.
	(CFV4E_FLAG): Delete.
	(elf_cfv4e_plt0_entry): Rename to...
	(elf_isab_plt0_entry): ...this.  Adjust comments.  Use (-6,%pc,%d0)
	for the second instruction too.
	(elf_cfv4e_plt_entry): Rename to...
	(elf_isab_plt_entry): ...this.  Adjust comments and use (-6,%pc,%d0).
	(elf_isab_plt_info): New table.
	(CPU32_FLAG): Delete.
	(PLT_CPU32_ENTRY_SIZE): Rename to...
	(CPU32_PLT_ENTRY_SIZE): ...this.
	(elf_cpu32_plt0_entry): Update bounds accordingly.
	(elf_cpu32_plt_entry): Likewise.
	(elf_cpu32_plt_info): New table.
	(elf_m68k_link_hash_table): Add a plt_info field.
	(elf_m68k_link_hash_table_create): Initialize it.
	(elf_m68k_get_plt_info): New function.
	(elf_m68k_always_size_sections): Likewise.
	(elf_m68k_adjust_dynamic_symbol): Use the plt_info hash table field.
	(elf_m68k_install_pcrel_field): New function.
	(elf_m68k_finish_dynamic_symbol): Factor code using plt_info and
	elf_m68k_install_pcrel_field.
	(elf_m68k_finish_dynamic_sections): Likewise.
	(elf_m68k_plt_sym_val): Use elf_m68k_get_plt_info.
	(elf_backend_always_size_sections): Define.

2006-04-26  Julian Brown  <julian@codesourcery.com>

	* gas/config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
	checking.
	(do_neon_mov): Enable several VMOV variants for VFP. Add suitable
	architecture version checks.
	(insns): Allow overlapping instructions to be used in VFP mode.

   	* gas/testsuite/gas/arm/vfp-neon-overlap.s: New test. Overlapping
	VFP/Neon instructions.
	* gas/testsuite/gas/arm/vfp-neon-overlap.d: Expected output of above.
	* gas/testsuite/gas/arm/vfp1xD.d: Test for fldmx/fstmx.
	* gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
	* gas/testsuite/gas/arm/vfpv3-32drs.d: Likewise.

   	* opcodes/arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx
	as vldm/vstm.

2006-04-26  Julian Brown  <julian@codesourcery.com>

	* gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
	(is_quarter_float): Rename from above. Simplify slightly.
	(parse_qfloat_immediate): Parse a "quarter precision" floating-point
	number.
	(parse_neon_mov): Parse floating-point constants.
	(neon_qfloat_bits): Fix encoding.
	(neon_cmode_for_move_imm): Tweak to use floating-point encoding in
	preference to integer encoding when using the F32 type.

   	* gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point
	constants.
	* gas/testsuite/gas/arm/neon-const.d: Expected output of above.
	* gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly
	for VMOV.F32.

   	* opcodes/arm-dis.c (print_insn_neon): Disassemble floating-point
	constant VMOV.

2006-04-24  Julian Brown  <julian@codesourcery.com>

	* libiberty/floatformat.c (floatformat_to_double): Fix (biased)
	exponent=0 case.

2006-04-12  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.tpl: Add install-html to install target deps.
	* Makefile.in: Regenerate.

2006-04-07  Julian Brown  <julian@codesourcery.com>

	* gas/config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
	zero-initialising structures containing it will lead to invalid
	types).
	(arm_it): Add vectype to each operand.
	(NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
	defined field.
	(neon_typed_alias): New structure. Extra information for typed
	register aliases.
	(reg_entry): Add neon type info field.
	(arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
	Break out alternative syntax for coprocessor registers, etc. into...
	(arm_reg_alt_syntax): New function. Alternate syntax handling broken
	out from arm_reg_parse.
	(parse_neon_type): Move. Return SUCCESS/FAIL.
	(first_error): New function. Call to ensure first error which occurs
	is reported.
	(parse_neon_operand_type): Parse exactly one type.
	(NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
	(parse_typed_reg_or_scalar): New function. Handle core of both
	arm_typed_reg_parse and parse_scalar.
	(arm_typed_reg_parse): Parse a register with an optional type.
	(NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
	result.
	(parse_scalar): Parse a Neon scalar with optional type.
	(parse_reg_list): Use first_error.
	(parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
	(neon_alias_types_same): New function. Return true if two (alias) types
	are the same.
	(parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
	of elements.
	(insert_reg_alias): Return new reg_entry not void.
	(insert_neon_reg_alias): New function. Insert type/index information as
	well as register for alias.
	(create_neon_reg_alias): New function. Parse .dn/.qn directives and
	make typed register aliases accordingly.
	(s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
	of line.
	(s_unreq): Delete type information if present.
	(s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
	(s_arm_unwind_save_mmxwcg): Likewise.
	(s_arm_unwind_movsp): Likewise.
	(s_arm_unwind_setfp): Likewise.
	(parse_shift): Likewise.
	(parse_shifter_operand): Likewise.
	(parse_address): Likewise.
	(parse_tb): Likewise.
	(tc_arm_regname_to_dw2regnum): Likewise.
	(md_pseudo_table): Add dn, qn.
	(parse_neon_mov): Handle typed operands.
	(parse_operands): Likewise.
	(neon_type_mask): Add N_SIZ.
	(N_ALLMODS): New macro.
	(neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
	(el_type_of_type_chk): Add some safeguards.
	(modify_types_allowed): Fix logic bug.
	(neon_check_type): Handle operands with types.
	(neon_three_same): Remove redundant optional arg handling.
	(do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
	(do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
	(do_neon_step): Adjust accordingly.
	(neon_cmode_for_logic_imm): Use first_error.
	(do_neon_bitfield): Call neon_check_type.
	(neon_dyadic): Rename to...
	(neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield to
	allow modification of type of the destination.
	(do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
	(do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
	(do_neon_compare): Make destination be an untyped bitfield.
	(neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
	(neon_mul_mac): Return early in case of errors.
	(neon_move_immediate): Use first_error.
	(neon_mac_reg_scalar_long): Fix type to include scalar.
	(do_neon_dup): Likewise.
	(do_neon_mov): Likewise (in several places).
	(do_neon_tbl_tbx): Fix type.
	(do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
	(do_neon_ld_dup): Exit early in case of errors and/or use first_error.
	(opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
	Handle .dn/.qn directives.
	(REGDEF): Add zero for reg_entry neon field.

	* gas/testsuite/gas/arm/neon-psyn.s: Basic test of programmers syntax.
	* gas/testsuite/gas/arm/neon-psyn.d: Expected output of above.

2006-04-03  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.tpl: Add install-html target.
	* Makefile.def: Add install-html target.
	* Makefile.in: Regenerate.
	* configure.in: Add --with-datarootdir, --with-docdir,
	and --with-htmldir options.
	* configure: Regenerate.
	* opcodes/Makefile.am: Add install-html target.
	* opcodes/Makefile.in: Regenerate.
	* libiberty/Makefile.in: Add install-html, install-html-am, and
	install-html-recursive targets. Define mkdir_p and 
	NORMAL_INSTALL. 
	* libiberty/configure.ac: AC_SUBST datarootdir, docdir, htmldir.
	* libiberty/configure: Regenerate.
	* libiberty/testsuite/Makefile.in: Add install-html and html targets.
	* ld/Makefile.am: Add install-html, install-html-am, and
	install-html-recursive targets.
	* ld/Makefile.in: Regenerate.
	* ld/configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* ld/configure: Regenerate.
	* ld/po/Make-in: Add install-html target.
	* intl/Makefile.in: Add html info and dvi and install-html to .PHONY
	Add install-html target.
	* gprof/po/Make-in: Add install-html target.
	* gprof/Makefile.am: Add install-html, install-html-am and 
	install-html-recursive targets. 
	* gprof/Makefile.in: Regenerate.
	* gprof/configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* gprof/configure: Regenerate.
	* gas/po/Make-in: Add install-html target.
	* gas/Makefile.am: Add install-html and install-html-recursive targets.
	* gas/Makefile.in: Regenerate.
	* gas/configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* gas/configure: Regenerate.
	* gas/doc/Makefile.am: Add install-html and install-html-am targets.
	* gas/doc/Makefile.in: Regenerate.
	* binutils/po/Make-in: Add install-html target.
	* binutils/Makefile.am: Add install-html and install-html-recursive targets.
	* binutils/Makefile.in: Regenerate.
	* binutils/configure.in: AC_SUBST datarootdir, docdir and htmldir.
	* binutils/configure: Regenerate.
	* binutils/doc/Makefile.am: Add install-html and install-html-am targets.
	* binutils/doc/Makefile.in: Regenerate.
	* bfd/po/Make-in: Add install-html target.
	* bfd/Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
	htmldir. Add install-html and install-html-recursive targets.
	* bfd/Makefile.in: Regenerate.
	* bfd/configure.in: AC_SUBST for datarootdir, docdir and htmldir.
	* bfd/configure: Regenerate.
	* bfd/doc/Makefile.am: Add install-html and install-html-am targets. 
	Define datarootdir, docdir and htmldir.
	* bfd/doc/Makefile.in: Regenerate.
	* etc/Makefile.in: Add install-html target. Add htmldir,
	docdir and datarootdir.
	* etc/configure.texi: Document install-html target.
	* etc/configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* etc/configure: Regenerate.

2005-04-03  Julian Brown  <julian@codesourcery.com>
	    Nathan Sidwell  <nathan@codesourcery.com>

	* binutils/readelf.c (arm_attr_tag_VFP_arch): Add VFPv3.
    
	* gas/config/tc-arm.c (limits.h): Include.
	(fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
	(fpu_vfp_v3_or_neon_ext): Declare constants.
	(neon_el_type): New enumeration of types for Neon vector elements.
	(neon_type_el): New struct. Define type and size of a vector element.
   	(NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
	instruction.
	(neon_type): Define struct. The type of an instruction.
	(arm_it): Add 'vectype' for the current instruction.
	(isscalar, immisalign, regisimm, isquad): New predicates for operands.
	(vfp_sp_reg_pos): Rename to...
	(vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
	tags.
	(arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
	(Neon D or Q register).
	(reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon
	D register.
	(GE_OPT_PREFIX_BIG): Define constant, for use in...
	(my_get_expression): Allow above constant as argument to accept
	64-bit constants with optional prefix.
	(arm_reg_parse): Add extra argument to return the specific type of
	register in when either a D or Q register (REG_TYPE_NDQ) is requested.
	Can be NULL.
	(parse_scalar): New function. Parse Neon scalar (vector reg and index).
	(parse_reg_list): Update for new arm_reg_parse args.
	(parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
	(parse_neon_el_struct_list): New function. Parse element/structure
	register lists for VLD<n>/VST<n> instructions.
	(s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
	(s_arm_unwind_save_mmxwr): Likewise.
	(s_arm_unwind_save_mmxwcg): Likewise.
	(s_arm_unwind_movsp): Likewise.
	(s_arm_unwind_setfp): Likewise.
	(parse_big_immediate): New function. Parse an immediate, which may
	be 64 bits wide. Put results in inst.operands[i].
	(parse_shift): Update for new arm_reg_parse args.
	(parse_address): Likewise. Add parsing of alignment specifiers.
	(parse_neon_mov): Parse the operands of a VMOV instruction.
	(operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC,
	OP_NRDLST, OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC,
	OP_RNDQ_RNSC, OP_RND_RNSC, OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b,
	OP_I0, OP_I16z, OP_I32z, OP_I64, OP_I64z, OP_oI32b, OP_oRND,
	OP_oRNQ, OP_oRNDQ.
	(parse_operands): Handle new codes above.
	(encode_arm_vfp_sp_reg): Rename to...
	(encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
	selected VFP version only supports D0-D15.
	(do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
	(do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
	(do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
	(do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
	encode_arm_vfp_reg name, and allow 32 D regs.
	(do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn)
	(do_vfp_dp_rd_rn_rm, do_vfp_rm_rd_rn): New functions to encode VFP
	insns allowing 32 D regs.
	(do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
	(do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
	constant-load and conversion insns introduced with VFPv3.
	(neon_tab_entry): New struct.
	(NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
	those which are the targets of pseudo-instructions.
	(neon_opc): Enumerate opcodes, use as indices into...
	(neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
	(NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
	(NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
	(NEON_ENC_DUP): Define meaningful helper macros to look up values in
	neon_enc_tab.
	(neon_shape): Enumerate shapes (permitted register widths, etc.) for
	Neon instructions.
	(neon_type_mask): New. Compact type representation for type
	checking.
	(N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
	permitted type combinations.
	(N_IGNORE_TYPE): New macro.
	(neon_check_shape): New function. Check an instruction shape for
	multiple alternatives. Return the specific shape for the current
	instruction.
	(neon_modify_type_size): New function. Modify a vector type and
	size, depending on the bit mask in argument 1.
	(neon_type_promote): New function. Convert a given "key" type (of an
	operand) into the correct type for a different operand, based on a bit
	mask.
	(type_chk_of_el_type): New function. Convert a type and size into the
	compact representation used for type checking.
	(el_type_of_type_ckh): New function. Reverse of above (only when a
	single bit is set in the bit mask).
	(modify_types_allowed): New function. Alter a mask of allowed types
	based on a bit mask of modifications.
	(neon_check_type): New function. Check the type of the current
	instruction against the variable argument list. The "key" type of the
	instruction is returned.
	(neon_dp_fixup): New function. Fill in and modify instruction bits for
	a Neon data-processing instruction depending on whether we're in ARM
	mode or Thumb-2 mode.
	(neon_logbits): New function.
	(neon_three_same, neon_two_same, do_neon_dyadic_i_su)
	(do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
	(do_neon_qshl_imm, neon_cmode_for_logic_imm)
	(neon_bits_same_in_bytes, neon_squash_bits, neon_is_quarter_float)
	(neon_qfloat_bits, neon_cmode_for_move_imm, neon_write_immbits)
	(neon_invert_size, do_neon_logic, do_neon_bitfield, neon_dyadic)
	(do_neon_dyadic_if_su, do_neon_dyadic_if_su_d, do_neon_dyadic_if_i)
	(do_neon_dyadic_if_i_d, do_neon_addsub_if_i, neon_exchange_operands)
	(neon_compare, do_neon_cmp, do_neon_cmp_inv, do_neon_ceq)
	(neon_scalar_for_mul, neon_mul_mac, do_neon_mac_maybe_scalar)
	(do_neon_tst, do_neon_mul, do_neon_qdmulh, do_neon_fcmp_absolute)
	(do_neon_fcmp_absolute_inv, do_neon_step, do_neon_abs_neg)
	(do_neon_sli, do_neon_sri, do_neon_qshlu_imm, do_neon_qmovn)
	(do_neon_qmovun, do_neon_rshift_sat_narrow)
	(do_neon_rshift_sat_narrow_u, do_neon_movn, do_neon_rshift_narrow)
	(do_neon_shll, neon_cvt_flavour, do_neon_cvt, neon_move_immediate)
	(do_neon_mvn, neon_mixed_length, do_neon_dyadic_long, do_neon_abal)
	(neon_mac_reg_scalar_long, do_neon_mac_maybe_scalar_long)
	(do_neon_dyadic_wide, do_neon_vmull, do_neon_ext, do_neon_rev)
	(do_neon_dup, do_neon_mov, do_neon_rshift_round_imm, do_neon_movl)
	(do_neon_trn, do_neon_zip_uzp, do_neon_sat_abs_neg)
	(do_neon_pair_long, do_neon_recip_est, do_neon_cls, do_neon_clz)
	(do_neon_cnt, do_neon_swp, do_neon_tbl_tbx, do_neon_ldm_stm)
	(do_neon_ldr_str, do_neon_ld_st_interleave, neon_alignment_bit)
	(do_neon_ld_st_lane, do_neon_ld_dup, do_neon_ldx_stx): New
	functions. Neon bit encoding and encoding helpers.
	(parse_neon_type): New function. Parse Neon type specifier.
	(opcode_lookup): Allow parsing of Neon type specifiers.
	(REGNUM2, REGSETH, REGSET2): New macros.
	(reg_names): Add new VFPv3 and Neon registers.
	(NUF, nUF, NCE, nCE): New macros for opcode table.
	(insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
	fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd,
	fmscd, fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd,
	fmdrr, fmrrd. Add Neon instructions vaba, vhadd, vrhadd, vhsub,
	vqadd, vqsub, vrshl, vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn,
	veor, vbsl, vbit, vbif, vabd, vmax, vmin, vcge, vcgt, vclt, vcle,
	vceq, vpmax, vpmin, vmla, vmls, vpadd, vadd, vsub, vtst, vmul,
	vqdmulh, vqrdmulh, vacge, vacgt, vaclt, vacle, vrecps, vrsqrts,
	vabs, vneg, v{r}shr,  v{r}sra, vsli, vsri, vqshrn, vq{r}shr{u}n,
	v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, vabdl, vaddl, vsubl,
	vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, vqdmlal, vqdmlsl,
	vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, vmovl, v{q}movn,
	vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, vrsqrte, vcls,
	vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, vstr,
	vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], fto[us][lh][sd].
	(tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
	(arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
	(arm_option_cpu_value): Add vfp3 and neon.
	(aeabi_set_public_attributes): Support VFPv3 and NEON attributes.
	Fix VFPv1 attribute.

	* gas/testsuite/gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon
	instruction.
	* gas/testsuite/gas/arm/copro.d: Update accordingly.
	* gas/testsuite/gas/arm/neon-cond.s: New test. Conditional Neon opcodes
	in ARM mode.
	* gas/testsuite/gas/arm/neon-cond.d: Expected results of above.
	* gas/testsuite/gas/arm/neon-cov.s: New test. Coverage of Neon
	instructions.
	* gas/testsuite/gas/arm/neon-cov.d: Expected results of above.
	* gas/testsuite/gas/arm/neon-ldst-es.s: New test. Element and structure
	loads and stores.
	* gas/testsuite/gas/arm/neon-ldst-es.d: Expected results of above.
	* gas/testsuite/gas/arm/neon-ldst-rm.s: New test. Single and multiple
	register loads and stores.
	* gas/testsuite/gas/arm/neon-ldst-rm.d: Expected results of above.
	* gas/testsuite/gas/arm/neon-omit.s: New test. Omission of optional
	operands.
	* gas/testsuite/gas/arm/neon-omit.d: Expected results of above.
	* gas/testsuite/gas/arm/vfp1.d: Expect Neon syntax for some VFP
	instructions.
	* gas/testsuite/gas/arm/vfp1_t2.d: Likewise.
	* gas/testsuite/gas/arm/vfp1xD.d: Likewise.
	* gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
	* gas/testsuite/gas/arm/vfp2.d: Likewise.
	* gas/testsuite/gas/arm/vfp2_t2.d: Likewise.
	* gas/testsuite/gas/arm/vfp3-32drs.s: New test. Extended D register
	range for VFP instructions.
	* gas/testsuite/gas/arm/vfp3-32drs.d: Expected results of above.
	* gas/testsuite/gas/arm/vfp3-const-conv.s: New test. VFPv3
	constant-load and conversion instructions.
	* gas/testsuite/gas/arm/vfp3-const-conv.d: Expected results of above.

	* include/opcode/arm.h (FPU_VFP_EXT_V3): Define constant.
	(FPU_NEON_EXT_V1): Likewise.
	(FPU_VFP_HARD): Update.
	(FPU_VFP_V3): Define macro.
	(FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.

	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k,
	convert %<code>[zy] into %[zy]<code>.  Expand meaning of
	%<bitfield>['`?].
	Add unified load/store instruction names.
	(neon_opcode_table): New.
	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	(arm_decode_bitfield): New.
	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	Use arm_decode_bitfield and adjust numeric specifiers.
	Adjust %z & %y.
	(print_insn_neon): New.
	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	(print_insn_thumb32): Likewise.

2005-04-01  Paul Brook  <paul@codesourcery.com>

	* config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.

2006-03-30  Mark Mitchell <mark@codesourcery.com>

	* libiberty/configure.ac: Add cygpath for mingw hosts.
	* libiberty.configure: Rebuilt.
	* libiberty/Makefile.in: Add cygpath.
	* libiberty/cygpath.c: New.

2006-03-30  Jim Blandy	<jimb@codesourcery.com>

	* include/libiberty.h (pex_write_input): New declaration.

	* libiberty/pex-common.c (pex_write_input): New function.
	* libiberty/pexecute.txh (pex_write_input): Document it.
	* libiberty/pex-common.h (struct pex_funcs): New function ptr fdopenw.
	* libiberty/pex-unix.c (pex_unix_fdopenw): New function.
	(funcs): List it as our fdopenw function.
	* libiberty/pex-win32.c (pex_win32_fdopenw): New function.
	(funcs): List it as our fdopenw function.
	* libiberty/pex-djgpp.c (funcs): Leave fdopenw null.
	* libiberty/pex-msdos (funcs): Same.
	* libiberty/functions.texi: Regenerated.

	* libiberty/pex-common.h (struct pex_obj): Doc fixes.

	* libiberty/functions.texi: Regenerate.

2006-03-27  Mark Mitchell  <mark@codesourcery.com>

	* libiberty/pex-win32.c (pex_win32_exec_child): Close stdout/stderr
	in parent.

2006-03-26  Nathan Sidwell  <nathan@codesourcery.com>

	* gas/config/tc-m68k.c (m68k_init_arch): Move checking of
	cfloat/m68881 to correct architecture before using it.

2006-03-21  Paul Brook  <paul@codesourcery.com>

	* gas/config/tc-arm.c (md_apply_fix): Fix typo in offset mask.

2006-03-21  Nathan Sidwell  <nathan@codesourcery.com>

	* gas/config/tc-m68k.c (find_cf_chip): Merge into ...
	(m68k_ip): ... here.  Use for all chips.  Protect against buffer
	overrun and avoid excessive copying.

	* gcc/config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
	m68020_control_regs, m68040_control_regs, m68060_control_regs,
	mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
	mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
	mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
	(m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
	mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl, 
	mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
	mcf5282_ctrl, mcfv4e_ctrl): ... these.
	(mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
	(struct m68k_cpu): Change chip field to control_regs.
	(current_chip): Remove.
	(control_regs): New.
	(m68k_archs, m68k_extensions): Adjust.
	(m68k_cpus): Reorder to be in cpu number order.  Adjust.
	(CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
	(find_cf_chip): Reimplement for new organization of cpu table.
	(select_control_regs): Remove.
	(mri_chip): Adjust.
	(struct save_opts): Save control regs, not chip.
	(s_save, s_restore): Adjust.
	(m68k_lookup_cpu): Give deprecated warning when necessary.
	(m68k_init_arch): Adjust.
	(md_show_usage): Adjust for new cpu table organization.
	* include/opcode/m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008,
	cpu_m68010, cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060,
	cpu_m68851, cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
	cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
	cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.

2006-03-20  Mark Mitchell  <mark@codesourcery.com>

	* libiberty/pex-win32.c (<errno.h>): Include.
	(fix_argv): Remove.
	(argv_to_cmdline): New function.
	(std_suffixes): New variable.
	(no_suffixes): Likewise.
	(find_executable): New function.
	(win32_spawn): Likewise.
	(spawn_script): Use win32_spawn instead of _spawnv[p].
	(pex_win32_exec_child): Replace MSVCRT calls with Win32 API calls.
	(pex_win32_wait): Likewise.

2006-03-21  Richard Sandiford  <richard@codesourcery.com>

	* bfd/cpu-m68k.c (bfd_m68k_compatible): Treat ISA A+ and ISA B code as
	incompatible.  Likewise MAC and EMAC code.
	* bfd/elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Use
	bfd_get_compatible to set the new bfd architecture.  Rely on it
	to detect incompatibilities.
	* gas/config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
	mcfemac instead of mcfmac.
	* ld/testsuite/ld-m68k/merge-error-1a.s,
	* ld/testsuite/ld-m68k/merge-error-1b.s,
	* ld/testsuite/ld-m68k/merge-error-1a.d,
	* ld/testsuite/ld-m68k/merge-error-1b.d,
	* ld/testsuite/ld-m68k/merge-error-1c.d,
	* ld/testsuite/ld-m68k/merge-error-1d.d,
	* ld/testsuite/ld-m68k/merge-error-1e.d,
	* ld/testsuite/ld-m68k/merge-ok-1a.d,
	* ld/testsuite/ld-m68k/merge-ok-1b.d: New tests.
	* ld/testsuite/ld-m68k/m68k.exp: Run them.

2006-03-20  Paul Brook  <paul@codesourcery.com>

	* gas/config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
	* gas/testsuite/gas/arm/thumb32.d: Correct expected output.

2006-03-20  Paul Brook  <paul@codesourcery.com>

	* gas/config/tc-arm.c (parse_operands): Set default error message.

2006-03-20  Paul Brook  <paul@codesourcery.com>

	* gas/config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.

2006-03-20  Paul Brook  <paul@codesourcery.com>

	* gas/config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.

	* gas/testsuite/gas/arm/blx-local.d: New test.
	* gas/testsuite/gas/arm/blx-local.d: New test.

2006-03-20  Paul Brook  <paul@codesourcery.com>

	* gas/config/tc-arm.c (THUMB2_LOAD_BIT): Define.
	(move_or_literal_pool): Handle Thumb-2 instructions.
	(do_t_ldst): Call move_or_literal_pool for =N addressing modes.

	* gas/testsuite/gas/arm/thumb2_pool.d: New test.
	* gas/testsuite/gas/arm/thumb2_pool.s: New test.