| Mike Frysinger | 1d7b4a7 | 2011-06-04 17:44:22 +0000 | [diff] [blame] | 1 | //Original:/testcases/core/c_multi_issue_dsp_ldst_1/c_multi_issue_dsp_ldst_1.dsp |
| 2 | // Spec Reference: dsp32mac and 2 load/store |
| 3 | # mach: bfin |
| 4 | |
| 5 | .include "testutils.inc" |
| 6 | start |
| 7 | |
| 8 | INIT_R_REGS 0; |
| 9 | |
| 10 | |
| 11 | imm32 r0, 0x00000000; |
| 12 | A0 = 0; |
| 13 | A1 = 0; |
| 14 | ASTAT = r0; |
| 15 | |
| 16 | loadsym I0, DATA0; |
| 17 | loadsym I1, DATA1; |
| 18 | |
| 19 | loadsym P1, DATA0; |
| 20 | loadsym P2, DATA1; |
| 21 | |
| 22 | // test the default (signed fraction : left ) |
| 23 | imm32 r0, 0x12345678; |
| 24 | imm32 r1, 0x33456789; |
| 25 | imm32 r2, 0x5556789a; |
| 26 | imm32 r3, 0x75678912; |
| 27 | imm32 r4, 0x86789123; |
| 28 | imm32 r5, 0xa7891234; |
| 29 | imm32 r6, 0xc1234567; |
| 30 | imm32 r7, 0xf1234567; |
| 31 | A1 = R0.L * R1.L, A0 = R0.L * R1.L || R0 = [ I0 ++ ] || R1 = [ I1 ++ ]; |
| 32 | A1 += R2.L * R3.L, A0 += R2.L * R3.H || R2 = [ I0 ++ ] || R3 = [ I1 ++ ]; |
| 33 | A1 += R6.H * R7.H, A0 += R6.H * R7.L || R4 = [ P1 ++ ] || [ I1 ++ ] = R5; |
| 34 | R6 = A0.w; |
| 35 | R7 = A1.w; |
| 36 | CHECKREG r0, 0x000A0000; |
| 37 | CHECKREG r1, 0x00F00100; |
| 38 | CHECKREG r2, 0x000B0001; |
| 39 | CHECKREG r3, 0x00E00101; |
| 40 | CHECKREG r4, 0x000A0000; |
| 41 | CHECKREG r5, 0xA7891234; |
| 42 | CHECKREG r6, 0x92793486; |
| 43 | CHECKREG r7, 0xDD2F9BAA; |
| 44 | |
| 45 | imm32 r0, 0x12245618; |
| 46 | imm32 r1, 0x23256719; |
| 47 | imm32 r2, 0x3426781a; |
| 48 | imm32 r3, 0x45278912; |
| 49 | imm32 r4, 0x56289113; |
| 50 | imm32 r5, 0x67291214; |
| 51 | imm32 r6, 0xa1234517; |
| 52 | imm32 r7, 0xc1234517; |
| 53 | A1 = R0.L * R1.L, A0 = R0.L * R1.L || R4 = [ P1 ++ ] || [ I0 ++ ] = R6; |
| 54 | A1 -= R2.L * R3.L, A0 += R2.L * R3.H || R2 = [ P2 ++ ] || [ I1 ++ ] = R3; |
| 55 | A1 += R4.H * R6.H, A0 -= R4.H * R6.L || [ P2 ++ ] = R5 || R7 = [ I1 ++ ]; |
| 56 | R6 = A0.w; |
| 57 | R7 = A1.w; |
| 58 | CHECKREG r0, 0x12245618; |
| 59 | CHECKREG r1, 0x23256719; |
| 60 | CHECKREG r2, 0x00F00100; |
| 61 | CHECKREG r3, 0x45278912; |
| 62 | CHECKREG r4, 0x000B0001; |
| 63 | CHECKREG r5, 0x67291214; |
| 64 | CHECKREG r6, 0x8634CCA2; |
| 65 | CHECKREG r7, 0xB4E7420A; |
| 66 | |
| 67 | imm32 r0, 0x15245648; |
| 68 | imm32 r1, 0x25256749; |
| 69 | imm32 r2, 0x3526784a; |
| 70 | imm32 r3, 0x45278942; |
| 71 | imm32 r4, 0x55389143; |
| 72 | imm32 r5, 0x65391244; |
| 73 | imm32 r6, 0xa5334547; |
| 74 | imm32 r7, 0xc5334547; |
| 75 | A1 += R0.H * R1.H, A0 += R0.L * R1.L || R2 = [ P1 ++ ] || [ I1 -- ] = R3; |
| 76 | A1 += R2.H * R3.H, A0 += R2.L * R3.H || NOP || [ I0 ++ ] = R2; |
| 77 | A1 = R4.H * R5.L, A0 += R4.H * R5.L || R3 = [ P2 -- ] || R6 = [ I0 -- ]; |
| 78 | R6 = A0.w; |
| 79 | R7 = A1.w; |
| 80 | CHECKREG r0, 0x15245648; |
| 81 | CHECKREG r1, 0x25256749; |
| 82 | CHECKREG r2, 0xA1234517; |
| 83 | CHECKREG r3, 0xA7891234; |
| 84 | CHECKREG r4, 0x55389143; |
| 85 | CHECKREG r5, 0x65391244; |
| 86 | CHECKREG r6, 0xFD508A74; |
| 87 | CHECKREG r7, 0x0C2925C0; |
| 88 | |
| 89 | imm32 r1, 0x02450789; |
| 90 | imm32 r2, 0x0356089a; |
| 91 | imm32 r3, 0x04670912; |
| 92 | imm32 r4, 0x05780123; |
| 93 | imm32 r5, 0x06890234; |
| 94 | imm32 r6, 0x07230567; |
| 95 | imm32 r7, 0x00230567; |
| 96 | R2 = R0 +|+ R7, R4 = R0 -|- R7 (ASR) || R0 = [ I1 ++ ] || [ I0 -- ] = R2; |
| 97 | R1 = R6 +|+ R3, R5 = R6 -|- R3 || R6 = [ P1 ] || [ I0 -- ] = R3; |
| 98 | R5 = R4 +|+ R2, R0 = R4 -|- R2 (CO) || NOP || [ I0 ++ ] = R5; |
| 99 | CHECKREG r0, 0xFA99FFDD; |
| 100 | CHECKREG r1, 0x0B8A0E79; |
| 101 | CHECKREG r2, 0x0AA32DD7; |
| 102 | CHECKREG r3, 0x04670912; |
| 103 | CHECKREG r4, 0x0A802870; |
| 104 | CHECKREG r5, 0x15235647; |
| 105 | CHECKREG r6, 0x0356089A; |
| 106 | CHECKREG r7, 0x00230567; |
| 107 | |
| 108 | pass |
| 109 | |
| 110 | .data |
| 111 | DATA0: |
| 112 | .dd 0x000a0000 |
| 113 | .dd 0x000b0001 |
| 114 | .dd 0x000c0002 |
| 115 | .dd 0x000d0003 |
| 116 | .dd 0x000e0004 |
| 117 | .dd 0x000f0005 |
| 118 | .dd 0x00100006 |
| 119 | .dd 0x00200007 |
| 120 | .dd 0x00300008 |
| 121 | .dd 0x00400009 |
| 122 | .dd 0x0050000a |
| 123 | .dd 0x0060000b |
| 124 | .dd 0x0070000c |
| 125 | .dd 0x0080000d |
| 126 | .dd 0x0090000e |
| 127 | .dd 0x0100000f |
| 128 | .dd 0x02000010 |
| 129 | .dd 0x03000011 |
| 130 | .dd 0x04000012 |
| 131 | .dd 0x05000013 |
| 132 | .dd 0x06000014 |
| 133 | .dd 0x001a0000 |
| 134 | .dd 0x001b0001 |
| 135 | .dd 0x001c0002 |
| 136 | .dd 0x001d0003 |
| 137 | .dd 0x00010004 |
| 138 | .dd 0x00010005 |
| 139 | .dd 0x02100006 |
| 140 | .dd 0x02200007 |
| 141 | .dd 0x02300008 |
| 142 | .dd 0x02200009 |
| 143 | .dd 0x0250000a |
| 144 | .dd 0x0260000b |
| 145 | .dd 0x0270000c |
| 146 | .dd 0x0280000d |
| 147 | .dd 0x0290000e |
| 148 | .dd 0x2100000f |
| 149 | .dd 0x22000010 |
| 150 | .dd 0x22000011 |
| 151 | .dd 0x24000012 |
| 152 | .dd 0x25000013 |
| 153 | .dd 0x26000014 |
| 154 | |
| 155 | DATA1: |
| 156 | .dd 0x00f00100 |
| 157 | .dd 0x00e00101 |
| 158 | .dd 0x00d00102 |
| 159 | .dd 0x00c00103 |
| 160 | .dd 0x00b00104 |
| 161 | .dd 0x00a00105 |
| 162 | .dd 0x00900106 |
| 163 | .dd 0x00800107 |
| 164 | .dd 0x00100108 |
| 165 | .dd 0x00200109 |
| 166 | .dd 0x0030010a |
| 167 | .dd 0x0040010b |
| 168 | .dd 0x0050011c |
| 169 | .dd 0x0060010d |
| 170 | .dd 0x0070010e |
| 171 | .dd 0x0080010f |
| 172 | .dd 0x00900110 |
| 173 | .dd 0x01000111 |
| 174 | .dd 0x02000112 |
| 175 | .dd 0x03000113 |
| 176 | .dd 0x04000114 |
| 177 | .dd 0x05000115 |
| 178 | .dd 0x03f00100 |
| 179 | .dd 0x03e00101 |
| 180 | .dd 0x03d00102 |
| 181 | .dd 0x03c00103 |
| 182 | .dd 0x03b00104 |
| 183 | .dd 0x03a00105 |
| 184 | .dd 0x03900106 |
| 185 | .dd 0x03800107 |
| 186 | .dd 0x03100108 |
| 187 | .dd 0x03200109 |
| 188 | .dd 0x0330010a |
| 189 | .dd 0x0330010b |
| 190 | .dd 0x0350011c |
| 191 | .dd 0x0360010d |
| 192 | .dd 0x0370010e |
| 193 | .dd 0x0380010f |
| 194 | .dd 0x03900110 |
| 195 | .dd 0x31000111 |
| 196 | .dd 0x32000112 |
| 197 | .dd 0x33000113 |
| 198 | .dd 0x34000114 |
