i386: Fix up movhf_mask constraints [PR123607]

As documented in the manuals and enforced by gas,
VMOVSH two operand loads and three operands moves accept both
masking and masking/zeroing, but VMOVSH two operand store accepts
only masking:
EVEX.LLIG.F3.MAP5.W0 10 /r VMOVSH xmm1{k1}{z}, m16
EVEX.LLIG.F3.MAP5.W0 11 /r VMOVSH m16{k1}, xmm1
EVEX.LLIG.F3.MAP5.W0 10 /r VMOVSH xmm1{k1}{z}, xmm2, xmm3
EVEX.LLIG.F3.MAP5.W0 11 /r VMOVSH xmm1{k1}{z}, xmm2, xmm3
But the constraints in movhf_mask define_insn were allowing 0C
for all the alternatives.  The following patch enforces just 0
(i.e. just non-zeroing masking) for the second alternative (i.e.
the store).

2026-01-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/123607
	* config/i386/i386.md (movhf_mask): Change constraint on
	match_operand 2's second alternative from 0C to 0.

	* g++.target/i386/avx512fp16-pr123607.C: New test.

(cherry picked from commit f779d064b968b594ed978a82a9d2cce4dea9a748)