RISC-V: Fix sub-Pmode index in vec_set/vec_extract [PR126873]

When gimple-isel lowers a variable-index element access on a
fixed-length vector into .VEC_SET or .VEC_EXTRACT, the index may be
narrower than Pmode.  The vec_set and vec_extract expanders used
gen_lowpart to convert it to Pmode, which only reinterprets the
register and drops the source-level truncation.  The full 64-bit
value is then used as the slide amount of vslideup/vslidedown and
wrong code is generated.

Fix this by zero-extending a sub-Pmode index with convert_to_mode
instead.

	PR target/126873

gcc/ChangeLog:

	* config/riscv/autovec.md (vec_set<mode>): Zero-extend a
	sub-Pmode index to Pmode.
	(vec_extract<mode><vel>): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/pr126873.c: New test.

Reported-by: XChy <xxs_chy@outlook.com>
Signed-off-by: Jin Ma <jinma@linux.alibaba.com>