hppa: Fix LRA spill failures involving R1_REGS (%r1) [PR127142]

With LRA enabled on PA-RISC, explicit (clobber (reg 1)) RTL on call
patterns caused LRA to treat %r1 as live across call boundaries, while
patterns restricted solely to the singleton R1_REGS class (=a) such as
PIC label loads and HIGH symbolic address loads could fail to find a
spill register when %r1 was contended.

To resolve these spill failures without regressing code quality:
- Remove redundant %r1 clobbers from call and sibcall patterns since %r1
  is already call-used in the ABI.
- Merge the 32-bit and 64-bit PIC label address patterns into a single
  Pmode pattern, fix the %r1 operand reference after addil, and add a
  disparaged general-register ('r') fallback alternative using the frame
  marker scratch slot.
- Add disparaged general-register ('r') fallback alternatives to the
  32-bit and 64-bit PIC HIGH patterns and split the 32-bit non-PIC HIGH
  pattern by TARGET_LONG_LOAD_STORE with an emergency 'r' alternative.
- Add post-reload define_peephole2 patterns to rewrite general-register
  HIGH and PIC label reloads back to %r1 when %r1 is dead, eliminating
  frame marker saves when uncontended.
- Implement TARGET_PREFERRED_RELOAD_CLASS to prefer R1_REGS for HIGH and
  pic_label_operand reloads, route R1_REGS spills through GENERAL_REGS
  in pa_spill_class, and lower GENERAL_REGS/R1_REGS <-> FP_REGS move
  costs to 8 in hppa_register_move_cost so LRA can use FP registers as
  an alternate spill area under high integer register pressure.

2026-11-13  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

	PR target/127142
	* config/pa/pa.cc (pa_preferred_reload_class): New function.
	(TARGET_PREFERRED_RELOAD_CLASS): Define.
	(hppa_register_move_cost): Set cost to 2 for moves between
	R1_REGS and GENERAL_REGS, and 8 for moves between
	GENERAL_REGS/R1_REGS and FP_REGS.
	(pa_secondary_reload): Remove redundant sri->icode assignment.
	(pa_spill_class): Return GENERAL_REGS when spilling R1_REGS.
	* config/pa/pa.md: Merge 32-bit and 64-bit PIC label address
	patterns into a single Pmode define_insn, fix %r1 operand in
	addil sequences, and add a disparaged 'r' alternative.
	Add disparaged 'r' alternatives to 32-bit and 64-bit PIC HIGH
	patterns.  Split 32-bit non-PIC HIGH pattern into
	TARGET_LONG_LOAD_STORE and !TARGET_LONG_LOAD_STORE patterns with
	disparaged 'r' alternatives.  Add define_peephole2 patterns to
	use %r1 for HIGH and PIC label loads when %r1 is dead.
	(call_symref, call_symref_pic, call_symref_pic_post_reload)
	(call_symref_64bit, call_symref_64bit_post_reload, call_reg)
	(call_reg_pic, call_reg_pic_post_reload, call_value_symref)
	(call_value_symref_pic, call_value_symref_pic_post_reload)
	(call_value_symref_64bit, call_value_symref_64bit_post_reload)
	(call_value_reg, call_value_reg_pic, call_value_reg_pic_post_reload)
	(sibcall_internal_symref, sibcall_internal_symref_64bit)
	(sibcall_value_internal_symref, sibcall_value_internal_symref_64bit):
	Remove (clobber (reg 1)) and update corresponding define_splits.