RISC-V: Fix multiple bugs in riscv_macro_fusion_pair_p

Fix several correctness and minor issues in the fusion pair
matching logic:

XINT (prev_set, 1) in RISCV_FUSE_AUIPC_LD incorrectly accesses
the SET node rather than its UNSPEC source operand.  Use
XINT (SET_SRC (prev_set), 1) to match riscv_fuse_auipc_addi.

RISCV_FUSE_CACHE_ALIGNED_STD compared base registers with != instead
of ==, causing it to match stores with different bases rather than
the same base which is required for cache-line alignment analysis.

RISCV_FUSE_B_ALUI sub+smax pattern had a redundant CONST_INT_P
check on the same operand already validated by the CONST0_RTX
comparison.

RISCV_FUSE_LDINDEXED had a duplicate REG_P check on the same
operand.

Also fix a typo ("hte" -> "the") in a comment and correct the
dump output string from "RISCV_FUSE_ALIGNED_STD" to
"RISCV_FUSE_CACHE_ALIGNED_STD" for the cache-aligned case.

Tests are marked XFAIL as no upstream mtune currently enables
AUIPC_LD, CACHE_ALIGNED_STD, B_ALUI, or LDINDEXED.  The
existing fusion-auipc-addi.c test indirectly validates the
XINT fix since AUIPC_ADDI shares the same UNSPEC_AUIPC check
code path.

gcc/ChangeLog:

	* config/riscv/riscv-fusion.cc (riscv_macro_fusion_pair_p):
	Fix XINT to access SET_SRC (prev_set) in AUIPC_LD case.
	Fix base register comparison from != to == in
	CACHE_ALIGNED_STD case.  Remove redundant CONST_INT_P
	check in B_ALUI sub+smax case.  Remove duplicate REG_P
	check in LDINDEXED case.  Fix typo in comment.  Fix dump
	output name for CACHE_ALIGNED_STD.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/fusion-auipc-ld.c: New test.
	* gcc.target/riscv/fusion-b-alui.c: New test.
	* gcc.target/riscv/fusion-cache-aligned-std.c: New test.
	* gcc.target/riscv/fusion-ldindexed.c: New test.