RISC-V: Use correct target in expand_vec_perm [PR121780].

This fixes a glaring mistake in yesterday's change to the expansion of
vec_perm.  We should of course move tmp_target into the real target
and not the other way around.  I wonder why my testing hasn't
caught this...

	PR target/121742
	PR target/121780
	PR target/121781

gcc/ChangeLog:

	* config/riscv/riscv-v.cc (expand_vec_perm): Swap target and
	tmp_target.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/pr121780.c: New test.
	* gcc.target/riscv/rvv/autovec/pr121781.c: New test.

(cherry picked from commit e3d5e9f0c8c6f27bf59d321d5082be7b3bb39f8a)