Some tidy up for RA related hooks.

1. We also need to guard size of TO to be
less than TARGET_SSE2 ? 2 : 4 in ix86_can_change_mode_class.
2. Merge VALID_AVX512FP16_SCALAR_MODE plus BFmode
into VALID_AVX512F_SCALAR_MODE since we've support 16-bit data move
above SSE2, so no need for the condition of AVX512FP16 for those evex
sse registers.
3. Allocate DI/HImode to sse register for SSE2 above just like
SImode since we've supported 16-bit data move between sse and gpr
above SSE2, this will help RA to handle cases like (subreg:HI (reg:V8HI)
0) or else RA will spill it. This enable optimization for


	* config/i386/ (ix86_can_change_mode_class): Also guard
	size of TO.
	(ix86_hard_regno_mode_ok): Remove VALID_AVX512FP16_SCALAR_MODE
	* config/i386/i386.h (VALID_AVX512FP16_SCALAR_MODE): Merged to
	(VALID_AVX512F_SCALAR_MODE): .. this, also add HImode.


	* Remove xfail.
	* Remove xfail.
	* Remove xfail.
5 files changed