[AArch64][PATCH 2/2] Combine AES instructions with xor and zero operands

gcc
2018-06-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/aarch64/aarch64-simd.md
	(*aarch64_crypto_aes<aes_op>v16qi_xor_combine): New.

gcc/testsuite
2018-06-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* gcc/gcc.target/aarch64/aes_xor_combine.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@261836 138bc75d-0d04-0410-961f-82ee72b054a4
4 files changed