afb84a42ad867c117d0112fbb8edd863bdc0dafe - gcc

commit	afb84a42ad867c117d0112fbb8edd863bdc0dafe	[log] [tgz]
author	Kito Cheng <kito.cheng@sifive.com>	Fri Jan 17 19:49:15 2020 +0800
committer	Kito Cheng <kito.cheng@sifive.com>	Thu Jan 30 15:33:07 2020 +0800
tree	5cfcb9ac5e0749747b4a705be3c3569fe29982da
parent	9d9679132e0e9b0108e78bf1bc8fdea6238649a3 [diff]

RISC-V: Disallow regrenme if the TO register never used before for interrupt functions

gcc/ChangeLog

	PR target/93304
	* config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
	* config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
	* config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.

gcc/testsuite/ChangeLog

	PR target/93304
	* gcc.target/riscv/pr93304.c: New test.

gcc/ChangeLog[diff]
gcc/config/riscv/riscv-protos.h[diff]
gcc/config/riscv/riscv.c[diff]
gcc/config/riscv/riscv.h[diff]
gcc/testsuite/ChangeLog[diff]
gcc/testsuite/gcc.target/riscv/pr93304.c[Added - diff]

6 files changed