[AArch64]: Use MOVI for low‑64‑bit integer SIMD constant vectors [PR113926]

Extend AdvSIMD constant materialization to recognize 128‑bit integer vector
constants where the low 64 bits contain a duplicated scalar value and the high
64 bits are zero.
Bootstrapped and tested on aarch64-linux-gnu.

gcc/ChangeLog:
	PR target/113926
	* config/aarch64/aarch64.cc (struct simd_immediate_info): Add width
	field to record AdvSIMD output vector width.
	(simd_immediate_info::simd_immediate_info): Initialize width to zero
	in all constructors.
	(aarch64_simd_valid_imm): Allow 128-bit AdvSIMD MOV immediates with
	zero high 64 bits to be materialized using 64-bit MOVI.
	(aarch64_output_simd_imm): Use recorded immediate width when outputting
	AdvSIMD immediates.

gcc/testsuite/ChangeLog:
	PR target/113926
	* gcc.target/aarch64/pr113926.c: New test.
	* gcc.target/aarch64/pr113926_1.c: New test.

Signed-off-by: Naveen <naveen.siddegowda@oss.qualcomm.com>