i386: Prefer shorter fold-left reduction chains

Fold-left FP reductions are lowered to scalar operations on x86.  In
mixed-width loops the per-statement costs can therefore make a wider
vector mode look better even though it lengthens the serial reduction
chain.

Count the fold-left reduction lanes from reduction groups and chains during
finish_cost and use that as an extra loop-candidate preference.  Do not let
emulated sub-SSE modes win on this preference alone.  Dump the lane count when
present.

gcc/ChangeLog:

	* config/i386/i386.cc (ix86_vector_costs): Add
	better_fold_left_reduc_than_p and m_num_fold_left_reduc_lanes.
	(ix86_vector_costs::ix86_vector_costs): Initialize it.
	(ix86_vector_costs::finish_cost): Count and dump fold-left
	reduction lanes.
	(ix86_vector_costs::better_fold_left_reduc_than_p): New function.
	(ix86_vector_costs::better_main_loop_than_p): Use it.
	(ix86_vector_costs::better_epilogue_loop_than_p): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/fold-left-reduc-cost.c: New test.
	* gcc.target/i386/fold-left-reduc-chain-cost.c: New test.
	* gcc.target/i386/vect-epilogues-6.c: Update expected vector size.
	* gcc.target/i386/vect-epilogues-7.c: Likewise.
	* gcc.dg/vect/costmodel/x86_64/costmodel-vect-epil-1.c: Likewise.