| (define_insn "aarch64_wrffr" | |
| [(set (reg:VNx16BI FFR_REGNUM) | |
| (match_operand:VNx16BI 0 "aarch64_simd_reg_or_minus_one")) | |
| (set (reg:VNx16BI FFRT_REGNUM) | |
| (unspec:VNx16BI [(match_dup 0)] UNSPEC_WRFFR))] | |
| "TARGET_SVE" | |
| {@ [ cons: 0 ] | |
| [ Dm ] setffr | |
| [ Upa ] wrffr\t%0.b | |
| } | |
| ) |