aarch64: Remove constraints on sysp operands The CRn and CRm operands of sysp were unnecessarily constrained to the ranges C8-C9 and C0-C7. This constraint has been removed from the architecture spec, and was never implemented in LLVM, so remove it here as well. Additionally, add some more tests to cover the full range of valid sysp operands, including omitting the pair of optional operands.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 73b549a..618fdb9 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c
@@ -6780,7 +6780,6 @@ int i; char *backtrack_pos = 0; const enum aarch64_opnd *operands = opcode->operands; - const uint64_t flags = opcode->flags; clear_error (); skip_whitespace (str); @@ -7210,22 +7209,7 @@ goto failure; po_imm_nc_or_fail (); - if (flags & F_OPD_NARROW) - { - if ((operands[i] == AARCH64_OPND_CRn) - && (val < 8 || val > 9)) - { - set_fatal_syntax_error (_(N_ ("C8 - C9 expected"))); - goto failure; - } - else if ((operands[i] == AARCH64_OPND_CRm) - && (val > 7)) - { - set_fatal_syntax_error (_(N_ ("C0 - C7 expected"))); - goto failure; - } - } - else if (val > 15) + if (val > 15) { set_fatal_syntax_error (_(N_ ("C0 - C15 expected"))); goto failure;
diff --git a/gas/testsuite/gas/aarch64/illegal-sys128.d b/gas/testsuite/gas/aarch64/illegal-sys128.d deleted file mode 100644 index 891b934..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sys128.d +++ /dev/null
@@ -1,3 +0,0 @@ -#name: Out-of-bounds SYSP operand tests -#source: illegal-sys128.s -#error_output: illegal-sys128.l
diff --git a/gas/testsuite/gas/aarch64/illegal-sys128.l b/gas/testsuite/gas/aarch64/illegal-sys128.l deleted file mode 100644 index b86fbc8..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sys128.l +++ /dev/null
@@ -1,4 +0,0 @@ -.*: Assembler messages: -.*: Error: C8 - C9 expected at operand 2 -- `sysp #0,C7,C0,#0,x0,x1' -.*: Error: C8 - C9 expected at operand 2 -- `sysp #0,C10,C0,#0,x0,x1' -.*: Error: C0 - C7 expected at operand 3 -- `sysp #6,C9,C8,#7,x27,x28'
diff --git a/gas/testsuite/gas/aarch64/illegal-sys128.s b/gas/testsuite/gas/aarch64/illegal-sys128.s deleted file mode 100644 index 42473c9..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sys128.s +++ /dev/null
@@ -1,5 +0,0 @@ - .arch armv8-a+d128 - - sysp #0, C7, C0, #0, x0, x1 - sysp #0, C10, C0, #0, x0, x1 - sysp #6, C9, C8, #7, x27, x28
diff --git a/gas/testsuite/gas/aarch64/sysp.d b/gas/testsuite/gas/aarch64/sysp.d index 80286c1..13eb1a0 100644 --- a/gas/testsuite/gas/aarch64/sysp.d +++ b/gas/testsuite/gas/aarch64/sysp.d
@@ -7,4 +7,11 @@ 0+ <\.text>: [^:]*: d5488000 sysp #0, C8, C0, #0, x0, x1 -[^:]*: d54e97fa sysp #6, C9, C7, #7, x26, x27 \ No newline at end of file +[^:]*: d54e97fa sysp #6, C9, C7, #7, x26, x27 +[^:]*: d5480000 sysp #0, C0, C0, #0, x0, x1 +[^:]*: d54f0000 sysp #7, C0, C0, #0, x0, x1 +[^:]*: d548f000 sysp #0, C15, C0, #0, x0, x1 +[^:]*: d5480f00 sysp #0, C0, C15, #0, x0, x1 +[^:]*: d54800e0 sysp #0, C0, C0, #7, x0, x1 +[^:]*: d548001f sysp #0, C0, C0, #0 +[^:]*: d548001f sysp #0, C0, C0, #0
diff --git a/gas/testsuite/gas/aarch64/sysp.s b/gas/testsuite/gas/aarch64/sysp.s index f50d3ab..bdf6cdd 100644 --- a/gas/testsuite/gas/aarch64/sysp.s +++ b/gas/testsuite/gas/aarch64/sysp.s
@@ -2,3 +2,10 @@ sysp #0, C8, C0, #0, x0, x1 sysp #6, C9, C7, #7, x26, x27 + sysp #0, C0, C0, #0, x0, x1 + sysp #7, C0, C0, #0, x0, x1 + sysp #0, C15, C0, #0, x0, x1 + sysp #0, C0, C15, #0, x0, x1 + sysp #0, C0, C0, #7, x0, x1 + sysp #0, C0, C0, #0, xzr, xzr + sysp #0, C0, C0, #0
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 79cbed4..2fdd3da 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h
@@ -1497,11 +1497,7 @@ to be optional, then we also implicitly specify (N+1)th operand to also be optional. */ #define F_OPD_PAIR_OPT (1ULL << 32) -/* This instruction does not allow the full range of values that the - width of fields in the assembler instruction would theoretically - allow. This impacts the constraints on assembly but yields no - impact on disassembly. */ -#define F_OPD_NARROW (1ULL << 33) + /* For the instruction with size[22:23] field. */ #define F_OPD_SIZE (1ULL << 34) /* RCPC3 instruction has the field of 'size'. */ @@ -1549,7 +1545,7 @@ /* As above, plus PN registers. */ #define F_INVALID_IMM_SYMS_3 (3ULL << 42) -/* Next bit is 44. */ +/* Next bit is 44, and 33 is also unused. */ /* Instruction constraints. */ /* This instruction has a predication constraint on the instruction at PC+4. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 8269dde..0898254 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h
@@ -5152,7 +5152,7 @@ GCS_INSN ("gcssttr", 0xd91f1c00, 0xfffffc00, OP2 (Rt, ADDR_SIMPLE), QL_DST_X, 0), CORE_INSN ("gcsb", 0xd503227f, 0xffffffff, ic_system, 0, OP1 (BARRIER_GCSB), {}, F_ALIAS), CORE_INSN ("sys", 0xd5080000, 0xfff80000, ic_system, 0, OP5 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt), QL_SYS, F_HAS_ALIAS | F_OPD4_OPT | F_DEFAULT (0x1F)), - D128_INSN ("sysp", 0xd5480000, 0xfff80000, OP6 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt, PAIRREG_OR_XZR), QL_SYSP, F_HAS_ALIAS | F_OPD_NARROW | F_OPD4_OPT | F_OPD_PAIR_OPT | F_DEFAULT (0x1f)), + D128_INSN ("sysp", 0xd5480000, 0xfff80000, OP6 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt, PAIRREG_OR_XZR), QL_SYSP, F_HAS_ALIAS | F_OPD4_OPT | F_OPD_PAIR_OPT | F_DEFAULT (0x1f)), CORE_INSN ("at", 0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_AT, Rt), QL_SRC_X, F_ALIAS), CORE_INSN ("dc", 0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_DC, Rt), QL_SRC_X, F_ALIAS), CORE_INSN ("ic", 0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_IC, Rt_SYS), QL_SRC_X, F_ALIAS | F_OPD1_OPT | F_DEFAULT (0x1F)),