gcc/PROBLEMS - gcc - Git at Google

 3. When find_reloads is used to count number of spills needed
 it does not take into account the fact that a reload may
 turn out to be a dummy.

 I'm not sure this really happens any more.  Doesn't it find
 all the dummies on both passes?

 10.     movl a3@,a0
 	movl a3@(16),a1
 	clrb a0@(a1:l)
 is generated and may be worse than
 	movl a3@,a0
 	addl a3@(16),a0
 	clrb a0@
 If ordering of operands is improved, many more
 such cases will be generated from typical array accesses.

 38. Hack expand_mult so that if there is no same-modes multiply
 it will use a widening multiply and then truncate rather than
 calling the library.

 39. Hack expanding of division to notice cases for
 long -> short division.

 40. Represent divide insns as (DIV:SI ...) followed by
 a separate lowpart extract.  Represent remainder insns as DIV:SI
 followed by a separate highpart extract.  Then cse can work on
 the DIV:SI part.  Problem is, this may not be desirable on machines
 where computing the quotient alone does not necessarily give
 a remainder--such as the 68020 for long operands.

 52. Reloading can look at how reload_contents got set up.
 If it was copied from a register, just reload from that register.
 Otherwise, perhaps can change the previous insn to move the
 data via the reload reg, thus avoiding one memory ref.

 63. Potential problem in cc_status.value2, if it ever activates itself
 after a two-address subtraction (which currently cannot happen).
 It is supposed to compare the current value of the destination
 but eliminating it would use the results of the subtraction, equivalent
 to comparing the previous value of the destination.

 65. Should loops that neither start nor end with a break
 be rearranged to end with the last break?

 69. Define the floating point converting arithmetic instructions
 for the 68881.

 74. Combine loop opt with cse opt in one pass.  Do cse on each loop,
 then loop opt on that loop, and go from innermost loops outward.
 Make loop invariants available for cse at end of loop.

 85. pea can force a value to be reloaded into an areg
 which can make it worse than separate adding and pushing.
 This can only happen for adding something within addql range
 and it only loses if the qty becomes dead at that point
 so it can be added to with no copying.

 93. If a pseudo doesn't get a hard reg everywhere,
 can it get one during a loop?

 96. Can do SImode bitfield insns without reloading, but must
 alter the operands in special ways.

 99. final could check loop-entry branches to see if they
 screw up deletion of a test instruction.  If they do,
 can put another test instruction before the branch and
 make it conditional and redirect it.

 106. Aliasing may be impossible if data types of refs differ
 and data type of containing objects also differ.
 (But check this wrt unions.)

 108. Can speed up flow analysis by making a table saying which
 register is set and which registers are used by each instruction that
 only sets one register and only uses two.  This way avoid the tree
 walk for such instructions (most instructions).

 109. It is desirable to avoid converting INDEX to SImode if a
 narrower mode suffices, as HImode does on the 68000.
 How can this be done?

 110. Possible special combination pattern:
 If the two operands to a comparison die there and both come from insns
 that are identical except for replacing one operand with the other,
 throw away those insns.  Ok if insns being discarded are known 1 to 1.
 An andl #1 after a seq is 1 to 1, but how should compiler know that?

 112. Can convert float to unsigned int by subtracting a constant,
 converting to signed int, and changing the sign bit.

 117. Any number of slow zero-extensions in one loop, that have
 their clr insns moved out of the loop, can share one register
 if their original life spans are disjoint.
 But it may be hard to be sure of this since
 the life span data that regscan produces may be hard to interpret
 validly or may be incorrect after cse.

 118. In cse, when a bfext insn refers to a register, if the field
 corresponds to a halfword or a byte and the register is equivalent
 to a memory location, it would be possible to detect this and
 replace it with a simple memory reference.

 121. Insns that store two values cannot be moved out of loops.
 The code in scan_loop doesn't even try to deal with them.

 122. When insn-output.c turns a bit-test into a sign-test,
 it should see whether the cc is already set up with that sign.

 123. When a conditional expression is used as a function arg, it would
 be faster (and in some cases shorter) to push each alternative rather
 than compute in a register and push that.  This would require
 being able to specify "push this" as a target for expand_expr.

 124. On the 386, bad code results from foo (bar ()) when bar
 returns a double, because the pseudo used fails to get preferenced
 into an fp reg because of the distinction between regs 8 and 9.
	3. When find_reloads is used to count number of spills needed
	it does not take into account the fact that a reload may
	turn out to be a dummy.

	I'm not sure this really happens any more. Doesn't it find
	all the dummies on both passes?

	10. movl a3@,a0
	movl a3@(16),a1
	clrb a0@(a1:l)
	is generated and may be worse than
	movl a3@,a0
	addl a3@(16),a0
	clrb a0@
	If ordering of operands is improved, many more
	such cases will be generated from typical array accesses.

	38. Hack expand_mult so that if there is no same-modes multiply
	it will use a widening multiply and then truncate rather than
	calling the library.

	39. Hack expanding of division to notice cases for
	long -> short division.

	40. Represent divide insns as (DIV:SI ...) followed by
	a separate lowpart extract. Represent remainder insns as DIV:SI
	followed by a separate highpart extract. Then cse can work on
	the DIV:SI part. Problem is, this may not be desirable on machines
	where computing the quotient alone does not necessarily give
	a remainder--such as the 68020 for long operands.

	52. Reloading can look at how reload_contents got set up.
	If it was copied from a register, just reload from that register.
	Otherwise, perhaps can change the previous insn to move the
	data via the reload reg, thus avoiding one memory ref.

	63. Potential problem in cc_status.value2, if it ever activates itself
	after a two-address subtraction (which currently cannot happen).
	It is supposed to compare the current value of the destination
	but eliminating it would use the results of the subtraction, equivalent
	to comparing the previous value of the destination.

	65. Should loops that neither start nor end with a break
	be rearranged to end with the last break?

	69. Define the floating point converting arithmetic instructions
	for the 68881.

	74. Combine loop opt with cse opt in one pass. Do cse on each loop,
	then loop opt on that loop, and go from innermost loops outward.
	Make loop invariants available for cse at end of loop.

	85. pea can force a value to be reloaded into an areg
	which can make it worse than separate adding and pushing.
	This can only happen for adding something within addql range
	and it only loses if the qty becomes dead at that point
	so it can be added to with no copying.

	93. If a pseudo doesn't get a hard reg everywhere,
	can it get one during a loop?

	96. Can do SImode bitfield insns without reloading, but must
	alter the operands in special ways.

	99. final could check loop-entry branches to see if they
	screw up deletion of a test instruction. If they do,
	can put another test instruction before the branch and
	make it conditional and redirect it.

	106. Aliasing may be impossible if data types of refs differ
	and data type of containing objects also differ.
	(But check this wrt unions.)

	108. Can speed up flow analysis by making a table saying which
	register is set and which registers are used by each instruction that
	only sets one register and only uses two. This way avoid the tree
	walk for such instructions (most instructions).

	109. It is desirable to avoid converting INDEX to SImode if a
	narrower mode suffices, as HImode does on the 68000.
	How can this be done?

	110. Possible special combination pattern:
	If the two operands to a comparison die there and both come from insns
	that are identical except for replacing one operand with the other,
	throw away those insns. Ok if insns being discarded are known 1 to 1.
	An andl #1 after a seq is 1 to 1, but how should compiler know that?

	112. Can convert float to unsigned int by subtracting a constant,
	converting to signed int, and changing the sign bit.

	117. Any number of slow zero-extensions in one loop, that have
	their clr insns moved out of the loop, can share one register
	if their original life spans are disjoint.
	But it may be hard to be sure of this since
	the life span data that regscan produces may be hard to interpret
	validly or may be incorrect after cse.

	118. In cse, when a bfext insn refers to a register, if the field
	corresponds to a halfword or a byte and the register is equivalent
	to a memory location, it would be possible to detect this and
	replace it with a simple memory reference.

	121. Insns that store two values cannot be moved out of loops.
	The code in scan_loop doesn't even try to deal with them.

	122. When insn-output.c turns a bit-test into a sign-test,
	it should see whether the cc is already set up with that sign.

	123. When a conditional expression is used as a function arg, it would
	be faster (and in some cases shorter) to push each alternative rather
	than compute in a register and push that. This would require
	being able to specify "push this" as a target for expand_expr.

	124. On the 386, bad code results from foo (bar ()) when bar
	returns a double, because the pseudo used fails to get preferenced
	into an fp reg because of the distinction between regs 8 and 9.