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blob: 00a21af58a8d2d1c0a02de6257f1a23292fceb38 [file] [log] [blame]
2021-07-28 Release Manager
* GCC 11.2.0 released.
2021-07-21 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-21 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101535
* gimplify.c (omp_check_private): Properly skip ORT_TARGET_DATA
contexts in which decl isn't privatized and for ORT_TARGET return
false if decl is mapped.
2021-07-20 Jakub Jelinek <jakub@redhat.com>
PR target/101384
* config/rs6000/rs6000.c (vspltis_constant): Accept EASY_VECTOR_MSB
only if step and copies are equal to 1.
2021-07-20 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2021-07-06 Iain Sandoe <iain@sandoe.co.uk>
PR bootstrap/100246
* config/i386/i386.h (struct stringop_algs): Define a CTOR for
this type.
2021-07-20 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2021-07-09 Iain Sandoe <iain@sandoe.co.uk>
PR target/100152
* config/i386/i386-expand.c (ix86_expand_call): If a call is
to a non-local-binding, or local but to a public symbol, then
assume that it might be indirected via the lazy symbol binder.
Mark R10 and R10 as clobbered in that case.
2021-07-20 Uroš Bizjak <ubizjak@gmail.com>
PR target/100182
* config/i386/sync.md (define_peephole2 atomic_storedi_fpu):
Remove.
(define_peephole2 atomic_loaddi_fpu): Ditto.
2021-07-19 Bill Schmidt <wschmidt@linux.ibm.com>
PR target/101129
* config/rs6000/rs6000-p8swap.c (has_part_mult): New.
(rs6000_analyze_swaps): Insns containing a subreg of a mult are
not swappable.
2021-07-18 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-01 Jakub Jelinek <jakub@redhat.com>
PR middle-end/94366
* omp-low.c (lower_rec_input_clauses): Rename is_fp_and_or to
is_truth_op, set it for TRUTH_*IF_EXPR regardless of new_var's type,
use boolean_type_node instead of integer_type_node as NE_EXPR type.
(lower_reduction_clauses): Likewise.
2021-07-18 Tobias Burnus <tobias@codesourcery.com>
Backported from master:
2021-05-04 Tobias Burnus <tobias@codesourcery.com>
* omp-low.c (lower_rec_input_clauses, lower_reduction_clauses): Handle
&& and || with floating-point and complex arguments.
2021-07-18 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-14 Jakub Jelinek <jakub@redhat.com>
PR go/101407
* godump.c (godump_str_hash): New type.
(godump_container::pot_dummy_types): Use string_hash instead of
ptr_hash in the hash_set.
2021-07-18 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-01 Jakub Jelinek <jakub@redhat.com>
PR debug/101266
* dwarf2out.c (loc_list_from_tree_1): Handle COMPOUND_LITERAL_EXPR.
2021-07-18 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-29 Jakub Jelinek <jakub@redhat.com>
PR c++/101210
* match.pd ((intptr_t)x eq/ne CST to x eq/ne (typeof x) CST): Don't
perform the optimization in GENERIC when sanitizing and x has a
reference type.
2021-07-18 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-24 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101172
* stor-layout.c (finish_bitfield_representative): If nextf has
error_mark_node type, set repr type to error_mark_node too.
2021-07-15 H.J. Lu <hjl.tools@gmail.com>
Backported from master:
2021-06-13 H.J. Lu <hjl.tools@gmail.com>
PR target/101023
* config/i386/i386.c (ix86_expand_prologue): Set red_zone_used
to true if red zone is used.
(ix86_output_indirect_jmp): Replace ix86_red_zone_size with
ix86_red_zone_used.
* config/i386/i386.h (machine_function): Add red_zone_used.
(ix86_red_zone_size): Removed.
(ix86_red_zone_used): New.
* config/i386/i386.md (peephole2 patterns): Replace
ix86_red_zone_size with ix86_red_zone_used.
2021-07-15 H.J. Lu <hjl.tools@gmail.com>
Backported from master:
2021-07-14 H.J. Lu <hjl.tools@gmail.com>
PR target/101395
* config/i386/driver-i386.c (host_detect_local_cpu): Check
"arch [32|64]" and "tune [32|64]" for 32-bit and 64-bit codegen.
Enable UINTR only for 64-bit codegen.
* config/i386/i386-options.c
(ix86_option_override_internal::DEF_PTA): Skip PTA_UINTR if not
in 64-bit mode.
* config/i386/i386.h (ARCH_ARG): New.
(CC1_CPU_SPEC): Pass "[arch|tune] 32" for 32-bit codegen and
"[arch|tune] 64" for 64-bit codegen.
2021-07-15 Richard Biener <rguenther@suse.de>
Backported from master:
2021-07-15 Richard Biener <rguenther@suse.de>
PR driver/101383
* gcc.c (process_command): Process -gtoggle like process_options
would after parsing options.
2021-07-14 Andrew MacLeod <amacleod@redhat.com>
Backported from master:
2021-07-02 Andrew MacLeod <amacleod@redhat.com>
PR tree-optimization/101223
* range-op.cc (build_lt): Add -1 for signed values.
(built_gt): Subtract -1 for signed values.
2021-07-14 Andrew MacLeod <amacleod@redhat.com>
PR tree-optimization/101148
PR tree-optimization/101014
* gimple-range-cache.cc (ranger_cache::ranger_cache): Adjust.
(ranger_cache::~ranger_cache): Adjust.
(ranger_cache::block_range): Check if propagation disallowed.
(ranger_cache::propagate_cache): Disallow propagation if new value
can't be stored properly.
* gimple-range-cache.h (ranger_cache::m_propfail): New member.
2021-07-14 Andrew MacLeod <amacleod@redhat.com>
* gimple-range-cache.cc (class ssa_block_ranges): Adjust prototype.
(sbr_vector::set_bb_range): Return true.
(class sbr_sparse_bitmap): Adjust.
(sbr_sparse_bitmap::set_bb_range): Return value.
(block_range_cache::set_bb_range): Return value.
(ranger_cache::propagate_cache): Use return value to print msg.
* gimple-range-cache.h (class block_range_cache): Adjust.
2021-07-14 Andrew MacLeod <amacleod@redhat.com>
* gimple-range-cache.cc (ranger_cache::push_poor_value): Disable
poor value processing.
2021-07-14 Andrew MacLeod <amacleod@redhat.com>
* gimple-range.cc (gimple_ranger::range_of_expr): Treat debug statments
as contextless queries to avoid additional lookups.
2021-07-14 Andrew MacLeod <amacleod@redhat.com>
Backported from master:
2021-06-07 Andrew MacLeod <amacleod@redhat.com>
PR tree-optimization/100299
* gimple-range-cache.cc (class sbr_sparse_bitmap): New.
(sbr_sparse_bitmap::sbr_sparse_bitmap): New.
(sbr_sparse_bitmap::bitmap_set_quad): New.
(sbr_sparse_bitmap::bitmap_get_quad): New.
(sbr_sparse_bitmap::set_bb_range): New.
(sbr_sparse_bitmap::get_bb_range): New.
(sbr_sparse_bitmap::bb_range_p): New.
(block_range_cache::block_range_cache): initialize bitmap obstack.
(block_range_cache::~block_range_cache): Destruct obstack.
(block_range_cache::set_bb_range): Decide when to utilze the
sparse on entry cache.
* gimple-range-cache.h (block_range_cache): Add bitmap obstack.
* params.opt (-param=evrp-sparse-threshold): New.
2021-07-14 Andrew MacLeod <amacleod@redhat.com>
Backported from master:
2021-06-07 Andrew MacLeod <amacleod@redhat.com>
* bitmap.c (bitmap_set_aligned_chunk): New.
(bitmap_get_aligned_chunk): New.
(test_aligned_chunk): New.
(bitmap_c_tests): Call test_aligned_chunk.
* bitmap.h (bitmap_set_aligned_chunk, bitmap_get_aligned_chunk): New.
2021-07-14 Andrew MacLeod <amacleod@redhat.com>
Backported from master:
2021-05-07 Andrew MacLeod <amacleod@redhat.com>
* gimple-range-cache.cc (ssa_block_ranges): Virtualize.
(sbr_vector): Renamed from ssa_block_cache.
(sbr_vector::sbr_vector): Allocate from obstack abd initialize.
(ssa_block_ranges::~ssa_block_ranges): Remove.
(sbr_vector::set_bb_range): Use varying and undefined cached values.
(ssa_block_ranges::set_bb_varying): Remove.
(sbr_vector::get_bb_range): Adjust assert.
(sbr_vector::bb_range_p): Adjust assert.
(~block_range_cache): No freeing loop required.
(block_range_cache::get_block_ranges): Remove.
(block_range_cache::set_bb_range): Inline get_block_ranges.
(block_range_cache::set_bb_varying): Remove.
* gimple-range-cache.h (set_bb_varying): Remove prototype.
* value-range.h (irange_allocator::get_memory): New.
2021-07-14 Michael Meissner <meissner@linux.ibm.com>
PR target/100809
* config/rs6000/rs6000.md (udivti3): New insn.
(divti3): New insn.
(umodti3): New insn.
(modti3): New insn.
2021-07-14 Alexandre Oliva <oliva@adacore.com>
Backported from master:
2021-07-14 Alexandre Oliva <oliva@adacore.com>
* tree-ssa-alias.c (attr_fnspec::verify): Fix index in
non-'t'-sized arg check.
2021-07-14 liuhongt <hongtao.liu@intel.com>
PR target/101185
* config/i386/i386.c (x86_order_regs_for_local_alloc):
Revert r12-1669.
2021-07-14 liuhongt <hongtao.liu@intel.com>
PR target/101142
* config/i386/i386.md: (*anddi_1): Disparage slightly the mask
register alternative.
(*and<mode>_1): Ditto.
(*andqi_1): Ditto.
(*andn<mode>_1): Ditto.
(*<code><mode>_1): Ditto.
(*<code>qi_1): Ditto.
(*one_cmpl<mode>2_1): Ditto.
(*one_cmplsi2_1_zext): Ditto.
(*one_cmplqi2_1): Ditto.
* config/i386/i386.c (x86_order_regs_for_local_alloc): Change
the order of mask registers to be before general registers.
2021-07-14 Richard Biener <rguenther@suse.de>
Backported from master:
2021-07-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/101445
* tree-vect-stmts.c (vectorizable_load): Do the gap adjustment
of the IV in the correct direction for negative stride
accesses.
2021-07-13 Richard Biener <rguenther@suse.de>
Backported from master:
2021-07-05 Richard Biener <rguenther@suse.de>
PR middle-end/101291
* cfgloopmanip.c (loop_version): Set the loop copy of the
versioned loop to the new loop.
2021-07-13 Richard Biener <rguenther@suse.de>
Backported from master:
2021-07-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/101394
* tree-ssa-pre.c (do_pre_regular_insertion): Avoid inserting
copies from abnormals for a full redundancy.
2021-07-13 Richard Biener <rguenther@suse.de>
Backported from master:
2021-07-12 Richard Biener <rguenther@suse.de>
PR middle-end/101423
* gimple.c (gimple_could_trap_p_1): Internal function calls
do not trap.
* tree-eh.c (tree_could_trap_p): Likewise.
2021-07-13 Richard Biener <rguenther@suse.de>
Backported from master:
2021-07-01 Richard Biener <rguenther@suse.de>
PR tree-optimization/100778
* tree-vect-slp.c (vect_schedule_slp_node): Do not place trapping
vectorized ops ahead of their scalar BB.
2021-07-13 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/100778
* tree-vect-slp.c (vect_build_slp_tree_1): Prevent possibly
trapping ops in different BBs.
2021-07-09 Martin Jambor <mjambor@suse.cz>
Backported from master:
2021-07-08 Martin Jambor <mjambor@suse.cz>
PR ipa/101066
* ipa-sra.c (class isra_call_summary): New member
m_before_any_store, initialize it in the constructor.
(isra_call_summary::dump): Dump the new field.
(ipa_sra_call_summaries::duplicate): Copy it.
(process_scan_results): Set it.
(isra_write_edge_summary): Stream it.
(isra_read_edge_summary): Likewise.
(param_splitting_across_edge): Only override
safe_to_import_accesses if m_before_any_store is set.
2021-07-09 Eric Botcazou <ebotcazou@adacore.com>
PR target/101377
* gcc.c (ASM_DEBUG_DWARF_OPTION): Set again to --gdwarf2 in
the case where HAVE_AS_WORKING_DWARF_N_FLAG is not defined
and HAVE_LD_BROKEN_PE_DWARF5 is defined.
2021-07-07 Peter Bergner <bergner@linux.ibm.com>
Backported from master:
2021-07-07 Peter Bergner <bergner@linux.ibm.com>
* config/rs6000/rs6000-call.c (mma_init_builtins): Use VSX_BUILTIN_LXVP
and VSX_BUILTIN_STXVP.
2021-07-07 Peter Bergner <bergner@linux.ibm.com>
Backported from master:
2021-07-02 Peter Bergner <bergner@linux.ibm.com>
* config/rs6000/rs6000-builtin.def (BU_MMA_PAIR_LD, BU_MMA_PAIR_ST):
New macros.
(__builtin_vsx_lxvp, __builtin_vsx_stxvp): New built-ins.
* config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Expand
lxvp and stxvp built-ins.
(mma_init_builtins): Handle lxvp and stxvp built-ins.
(builtin_function_type): Likewise.
* doc/extend.texi (__builtin_vsx_lxvp, __builtin_mma_stxvp): Document.
2021-07-07 Michael Meissner <meissner@linux.ibm.com>
2021-07-01 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000.c (rs6000_maybe_emit_fp_cmove): Add IEEE
128-bit floating point conditional move support.
(have_compare_and_set_mask): Add IEEE 128-bit floating point
types.
* config/rs6000/rs6000.md (mov<mode>cc, IEEE128 iterator): New insn.
(mov<mode>cc_p10, IEEE128 iterator): New insn.
(mov<mode>cc_invert_p10, IEEE128 iterator): New insn.
(fpmask<mode>, IEEE128 iterator): New insn.
(xxsel<mode>, IEEE128 iterator): New insn.
Backported from master:
2021-07-07 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/101229
* gimple-walk.c (gimple_walk_op): Handle PHIs.
2021-07-07 Richard Biener <rguenther@suse.de>
PR tree-optimization/101173
PR tree-optimization/101280
* gimple-loop-interchange.cc
(tree_loop_interchange::valid_data_dependences): Properly
guard all dependence checks with DDR_REVERSED_P or its
inverse.
2021-07-07 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-22 Richard Biener <rguenther@suse.de>
PR middle-end/101156
* gimplify.c (gimplify_expr): Remove premature incorrect
optimization.
2021-07-07 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-08 Richard Biener <rguenther@suse.de>
PR tree-optimization/100923
* tree-ssa-sccvn.c (valueize_refs_1): Take a pointer to
the operand vector to be valueized.
(valueize_refs): Likewise.
(valueize_shared_reference_ops_from_ref): Adjust.
(valueize_shared_reference_ops_from_call): Likewise.
(vn_reference_lookup_3): Likewise.
(vn_reference_lookup_pieces): Likewise. Re-valueize
with honoring availability when we are about to create
the ao_ref and valueized before.
(vn_reference_lookup): Likewise.
(vn_reference_insert_pieces): Adjust.
2021-07-07 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-16 Richard Biener <rguenther@suse.de>
PR tree-optimization/101088
* tree-ssa-loop-im.c (sm_seq_valid_bb): Only look for
supported refs on edges. Do not assert same ref but
different kind stores are unsuported but mark them so.
(hoist_memory_references): Only look for supported refs
on exits.
2021-07-07 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/101025
* tree-ssa-loop-im.c (sm_seq_valid_bb): Make sure to process
all refs that require dependence checking.
2021-07-06 Clément Chigot <clement.chigot@atos.net>
Backported from master:
2021-06-10 Clement Chigot <clement.chigot@atos.net>
* config/rs6000/aix71.h (ASM_CPU_SPEC): Add Power10 directive.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
2021-07-06 David Edelsohn <dje.gcc@gmail.com>
Backported from master:
2021-05-20 Clement Chigot <clement.chigot@atos.net>
David Edelsohn <dje.gcc@gmail.com>
* collect2.c (scan_prog_file): Issue non-fatal warning for
non-COFF files.
2021-07-02 David Malcolm <dmalcolm@redhat.com>
* diagnostic-show-locus.c (diagnostic_show_locus): Don't reject
printing the same location twice if there are fix-it hints,
multiple locations, or a label.
2021-07-02 Eric Botcazou <ebotcazou@adacore.com>
* config/i386/i386.c (asm_preferred_eh_data_format): Always use the
PIC encodings for PE-COFF targets.
2021-06-30 Pat Haugen <pthaugen@linux.ibm.com>
* config/rs6000/power10.md (power10-fused-load, power10-fused-store,
power10-fused_alu, power10-fused-vec, power10-fused-branch): New.
2021-06-25 Richard Biener <rguenther@suse.de>
* tree-vect-slp.c (vect_optimize_slp): Do not propagate
across operations that have different semantics on different
lanes.
2021-06-25 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/101158
* tree-vect-slp.c (vect_build_slp_tree_1): Move same operand
checking after checking for matching operation.
2021-06-25 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/101151
* tree-ssa-sink.c (statement_sink_location): Expand irreducible
region check.
2021-06-25 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-24 Richard Biener <rguenther@suse.de>
PR tree-optimization/101105
* tree-vect-data-refs.c (vect_prune_runtime_alias_test_list):
Only ignore steps when they are equal or scalar order is preserved.
2021-06-25 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-19 Richard Biener <rguenther@suse.de>
PR middle-end/100672
* fold-const.c (fold_negate_expr_1): Use element_precision.
(negate_expr_p): Likewise.
2021-06-24 Eric Botcazou <ebotcazou@adacore.com>
* dwarf2out.c (dwarf2out_assembly_start): Emit .file 0 marker here..
(dwarf2out_finish): ...instead of here.
2021-06-24 Eric Botcazou <ebotcazou@adacore.com>
* configure.ac (--gdwarf-5 option): Use objdump instead of readelf.
(working --gdwarf-4/--gdwarf-5 for all sources): Likewise.
(--gdwarf-4 not refusing generated .debug_line): Adjust for Windows.
* configure: Regenerate.
2021-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
Backported from master:
2021-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
* config/rs6000/rs6000-cpus.def: Take OPTION_MASK_PCREL_OPT out
of OTHER_POWER10_MASKS so it will not be enabled by default.
2021-06-23 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000.c (rs6000_emit_minmax): Add support for ISA
3.1 IEEE 128-bit floating point xsmaxcqp/xsmincqp instructions.
* config/rs6000/rs6000.md (s<minmax><mode>3, IEEE128 iterator):
New insns.
2021-06-23 Uros Bizjak <ubizjak@gmail.com>
Backported from master:
2021-06-23 Uroš Bizjak <ubizjak@gmail.com>
PR target/101175
* config/i386/i386.md (bsr_rex64): Add zero-flag setting RTX.
(bsr): Ditto.
(*bsrhi): Remove.
(clz<mode>2): Update RTX pattern for additions.
2021-06-23 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-23 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101167
* omp-low.c (lower_omp_regimplify_p): Regimplify also PARM_DECLs
and RESULT_DECLs that have DECL_HAS_VALUE_EXPR_P set.
2021-06-23 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-21 Jakub Jelinek <jakub@redhat.com>
PR inline-asm/100785
* cfgexpand.c (expand_asm_stmt): If errors are emitted,
remove all inputs, outputs and clobbers from the asm and
set template to "".
2021-06-22 liuhongt <hongtao.liu@intel.com>
PR target/100310
* config/i386/i386-expand.c
(ix86_expand_special_args_builtin): Keep constm1_operand only
if it satisfies insn's operand predicate.
2021-06-21 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.h (vec_signextll, vec_signexti, vec_signextq):
Add define for new builtins.
* config/rs6000/altivec.md(altivec_vreveti2): Add define_expand.
* config/rs6000/rs6000-builtin.def (VSIGNEXTI, VSIGNEXTLL): Add
overloaded builtin definitions.
(VSIGNEXTSB2W, VSIGNEXTSH2W, VSIGNEXTSB2D, VSIGNEXTSH2D,VSIGNEXTSW2D,
VSIGNEXTSD2Q): Add builtin expansions.
(SIGNEXT): Add P10 overload definition.
* config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_VSIGNEXTI,
P9V_BUILTIN_VEC_VSIGNEXTLL, P10_BUILTIN_VEC_SIGNEXT): Add
overloaded argument definitions.
* config/rs6000/vsx.md (vsx_sign_extend_v2di_v1ti): Add define_insn.
(vsignextend_v2di_v1ti, vsignextend_qi_<mode>, vsignextend_hi_<mode>,
vsignextend_si_v2di)[VIlong]: Add define_expand.
Make define_insn vsx_sign_extend_si_v2di visible.
* doc/extend.texi: Add documentation for the vec_signexti,
vec_signextll builtins and vec_signextq.
2021-06-21 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000.c (__fixkfti, __fixunskfti, __floattikf,
__floatuntikf): Names changed to __fixkfti_sw, __fixunskfti_sw,
__floattikf_sw, __floatuntikf_sw respectively.
* config/rs6000/rs6000.md (floatti<mode>2, floatunsti<mode>2,
fix_trunc<mode>ti2, fixuns_trunc<mode>ti2): Add
define_insn for mode IEEE 128.
2021-06-21 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.md (altivec_vslq, altivec_vsrq):
Rename to altivec_vslq_<mode>, altivec_vsrq_<mode>, mode VEC_TI.
* config/rs6000/vector.md (VEC_TI): Was named VSX_TI in vsx.md.
(vashlv1ti3): Change to vashl<mode>3, mode VEC_TI.
(vlshrv1ti3): Change to vlshr<mode>3, mode VEC_TI.
* config/rs6000/vsx.md (VSX_TI): Remove define_mode_iterator. Update
uses of VSX_TI to VEC_TI.
2021-06-21 Carl Love <cel@us.ibm.com>
* config/rs6000/dfp.md (floattitd2, fixtdti2): New define_insns.
2021-06-21 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.h (vec_dive, vec_mod): Add define for new
builtins.
* config/rs6000/altivec.md (UNSPEC_VMULEUD, UNSPEC_VMULESD,
UNSPEC_VMULOUD, UNSPEC_VMULOSD): New unspecs.
(altivec_eqv1ti, altivec_gtv1ti, altivec_gtuv1ti, altivec_vmuleud,
altivec_vmuloud, altivec_vmulesd, altivec_vmulosd, altivec_vrlq,
altivec_vrlqmi, altivec_vrlqmi_inst, altivec_vrlqnm,
altivec_vrlqnm_inst, altivec_vslq, altivec_vsrq, altivec_vsraq,
altivec_vcmpequt_p, altivec_vcmpgtst_p, altivec_vcmpgtut_p): New
define_insn.
(vec_widen_umult_even_v2di, vec_widen_smult_even_v2di,
vec_widen_umult_odd_v2di, vec_widen_smult_odd_v2di, altivec_vrlqmi,
altivec_vrlqnm): New define_expands.
* config/rs6000/rs6000-builtin.def (VCMPEQUT_P, VCMPGTST_P,
VCMPGTUT_P): Add macro expansions.
(BU_P10V_AV_P): Add builtin predicate definition.
(VCMPGTUT, VCMPGTST, VCMPEQUT, CMPNET, CMPGE_1TI,
CMPGE_U1TI, CMPLE_1TI, CMPLE_U1TI, VNOR_V1TI_UNS, VNOR_V1TI, VCMPNET_P,
VCMPAET_P, VMULEUD, VMULESD, VMULOUD, VMULOSD, VRLQ,
VSLQ, VSRQ, VSRAQ, VRLQNM, DIV_V1TI, UDIV_V1TI, DIVES_V1TI, DIVEU_V1TI,
MODS_V1TI, MODU_V1TI, VRLQMI): New macro expansions.
(VRLQ, VSLQ, VSRQ, VSRAQ, DIVE, MOD): New overload expansions.
* config/rs6000/rs6000-call.c (P10_BUILTIN_VCMPEQUT,
P10V_BUILTIN_CMPGE_1TI, P10V_BUILTIN_CMPGE_U1TI,
P10V_BUILTIN_VCMPGTUT, P10V_BUILTIN_VCMPGTST,
P10V_BUILTIN_CMPLE_1TI, P10V_BUILTIN_VCMPLE_U1TI,
P10V_BUILTIN_DIV_V1TI, P10V_BUILTIN_UDIV_V1TI,
P10V_BUILTIN_VMULESD, P10V_BUILTIN_VMULEUD,
P10V_BUILTIN_VMULOSD, P10V_BUILTIN_VMULOUD,
P10V_BUILTIN_VNOR_V1TI, P10V_BUILTIN_VNOR_V1TI_UNS,
P10V_BUILTIN_VRLQ, P10V_BUILTIN_VRLQMI,
P10V_BUILTIN_VRLQNM, P10V_BUILTIN_VSLQ,
P10V_BUILTIN_VSRQ, P10V_BUILTIN_VSRAQ,
P10V_BUILTIN_VCMPGTUT_P, P10V_BUILTIN_VCMPGTST_P,
P10V_BUILTIN_VCMPEQUT_P, P10V_BUILTIN_VCMPGTUT_P,
P10V_BUILTIN_VCMPGTST_P, P10V_BUILTIN_CMPNET,
P10V_BUILTIN_VCMPNET_P, P10V_BUILTIN_VCMPAET_P,
P10V_BUILTIN_DIVES_V1TI, P10V_BUILTIN_MODS_V1TI,
P10V_BUILTIN_MODU_V1TI):
New overloaded definitions.
(rs6000_gimple_fold_builtin) [P10V_BUILTIN_VCMPEQUT,
P10V_BUILTIN_CMPNET, P10V_BUILTIN_CMPGE_1TI,
P10V_BUILTIN_CMPGE_U1TI, P10V_BUILTIN_VCMPGTUT,
P10V_BUILTIN_VCMPGTST, P10V_BUILTIN_CMPLE_1TI,
P10V_BUILTIN_CMPLE_U1TI]: New case statements.
(rs6000_init_builtins) [bool_V1TI_type_node, int_ftype_int_v1ti_v1ti]:
New assignments.
(altivec_init_builtins): New E_V1TImode case statement.
(builtin_function_type)[P10_BUILTIN_128BIT_VMULEUD,
P10_BUILTIN_128BIT_VMULOUD, P10_BUILTIN_128BIT_DIVEU_V1TI,
P10_BUILTIN_128BIT_MODU_V1TI, P10_BUILTIN_CMPGE_U1TI,
P10_BUILTIN_VCMPGTUT, P10_BUILTIN_VCMPEQUT]: New case statements.
* config/rs6000/rs6000.c (rs6000_handle_altivec_attribute) [E_TImode,
E_V1TImode]: New case statements.
* config/rs6000/rs6000.h (rs6000_builtin_type_index): New enum
value RS6000_BTI_bool_V1TI.
* config/rs6000/vector.md (vector_gtv1ti,vector_nltv1ti,
vector_gtuv1ti, vector_nltuv1ti, vector_ngtv1ti, vector_ngtuv1ti,
vector_eq_v1ti_p, vector_ne_v1ti_p, vector_ae_v1ti_p,
vector_gt_v1ti_p, vector_gtu_v1ti_p, vrotlv1ti3, vashlv1ti3,
vlshrv1ti3, vashrv1ti3): New define_expands.
* config/rs6000/vsx.md (UNSPEC_VSX_DIVSQ, UNSPEC_VSX_DIVUQ,
UNSPEC_VSX_DIVESQ, UNSPEC_VSX_DIVEUQ, UNSPEC_VSX_MODSQ,
UNSPEC_VSX_MODUQ): New unspecs.
(mulv2di3, vsx_div_v1ti, vsx_udiv_v1ti, vsx_dives_v1ti,
vsx_diveu_v1ti, vsx_mods_v1ti, vsx_modu_v1ti, xxswapd_v1ti): New
define_insns.
(vcmpnet): New define_expand.
* doc/extend.texi: Add documentation for the new builtins vec_rl,
vec_rlmi, vec_rlnm, vec_sl, vec_sr, vec_sra, vec_mule, vec_mulo,
vec_div, vec_dive, vec_mod, vec_cmpeq, vec_cmpne, vec_cmpgt, vec_cmplt,
vec_cmpge, vec_cmple, vec_all_eq, vec_all_ne, vec_all_gt, vec_all_lt,
vec_all_ge, vec_all_le, vec_any_eq, vec_any_ne, vec_any_gt, vec_any_lt,
vec_any_ge, vec_any_le.
2021-06-21 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.md (altivec_vrl<VI_char>mi): Fix
bug in argument generation.
2021-06-18 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Backported from master:
2021-06-18 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
PR target/100856
* common/config/arm/arm-common.c (arm_canon_arch_option_1): New function
derived from arm_canon_arch.
(arm_canon_arch_option): Call it.
(arm_canon_arch_multilib_option): New function.
* config/arm/arm-cpus.in (IGNORE_FOR_MULTILIB): New fgroup.
* config/arm/arm.h (arm_canon_arch_multilib_option): New prototype.
(CANON_ARCH_MULTILIB_SPEC_FUNCTION): New macro.
(MULTILIB_ARCH_CANONICAL_SPECS): New macro.
(DRIVER_SELF_SPECS): Add MULTILIB_ARCH_CANONICAL_SPECS.
* config/arm/arm.opt (mlibarch): New option.
* config/arm/t-rmprofile (MULTILIB_MATCHES): For armv8*-m, replace use
of march on RHS with mlibarch.
2021-06-18 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Backported from master:
2021-06-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
PR target/101016
* config/arm/arm_mve.h (__arm_vld1q): Change __ARM_mve_coerce(p0,
int8_t const *) to __ARM_mve_coerce1(p0, int8_t *) in the argument for
the polymorphic variants matching code.
(__arm_vld1q_z): Likewise.
(__arm_vld2q): Likewise.
(__arm_vld4q): Likewise.
(__arm_vldrbq_gather_offset): Likewise.
(__arm_vldrbq_gather_offset_z): Likewise.
2021-06-18 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101062
* stor-layout.c (finish_bitfield_layout): Don't add bitfield
representatives in QUAL_UNION_TYPE.
2021-06-18 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-16 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101062
* stor-layout.c (finish_bitfield_representative): For fields in unions
assume nextf is always NULL.
(finish_bitfield_layout): Compute bit field representatives also in
unions, but handle it as if each bitfield was the only field in the
aggregate.
2021-06-17 Peter Bergner <bergner@linux.ibm.com>
Backported from master:
2021-06-14 Peter Bergner <bergner@linux.ibm.com>
PR target/100777
* config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Use
create_tmp_reg_or_ssa_name().
2021-06-17 Peter Bergner <bergner@linux.ibm.com>
Backported from master:
2021-06-10 Peter Bergner <bergner@linux.ibm.com>
* config/rs6000/rs6000-builtin.def (build_pair): New built-in.
(build_acc): Likewise.
* config/rs6000/rs6000-call.c (mma_expand_builtin): Swap assemble
source operands in little-endian mode.
(rs6000_gimple_fold_mma_builtin): Handle VSX_BUILTIN_BUILD_PAIR.
(mma_init_builtins): Likewise.
* config/rs6000/rs6000.c (rs6000_split_multireg_move): Handle endianness
ordering for the MMA assemble and build source operands.
* doc/extend.texi (__builtin_vsx_build_acc, __builtin_mma_build_pair):
Document.
(__builtin_mma_assemble_acc, __builtin_mma_assemble_pair): Remove
documentation.
2021-06-17 Peter Bergner <bergner@linux.ibm.com>
Backported from master:
2021-05-31 Peter Bergner <bergner@linux.ibm.com>
PR target/99842
* config/rs6000/predicates.md(mma_assemble_input_operand): Allow
indexed form addresses.
2021-06-17 Martin Sebor <msebor@redhat.com>
PR middle-end/100876
* builtins.c: (gimple_call_return_array): Account for size_t
mangling as either unsigned int or unsigned long
2021-06-17 Martin Sebor <msebor@redhat.com>
PR c++/100876
* builtins.c (gimple_call_return_array): Check for attribute fn spec.
Handle calls to placement new.
(ndecl_dealloc_argno): Avoid placement delete.
2021-06-17 Martin Sebor <msebor@redhat.com>
PR middle-end/100732
* gimple-fold.c (gimple_fold_builtin_sprintf): Avoid folding calls
with either source or destination argument of invalid type.
* tree-ssa-uninit.c (maybe_warn_pass_by_reference): Avoid checking
calls with arguments of invalid type.
2021-06-17 Martin Sebor <msebor@redhat.com>
PR middle-end/100684
* tree-ssa-ccp.c (pass_post_ipa_warn::execute): Handle C++ lambda.
2021-06-17 Martin Sebor <msebor@redhat.com>
PR middle-end/100574
* builtins.c (access_ref::get_ref): Improve detection of PHIs with
all null arguments.
2021-06-17 Martin Sebor <msebor@redhat.com>
PR middle-end/100307
* builtins.c (compute_objsize_r): Clear base0 for pointers.
2021-06-17 Martin Sebor <msebor@redhat.com>
PR middle-end/100250
* attribs.c (attr_access::array_as_string): Avoid dereferencing
a pointer when it's null.
2021-06-17 Aaron Sawdey <acsawdey@linux.ibm.com>
* config/rs6000/genfusion.pl (gen_logical_addsubf): Refactor to
add generation of logical-add and add-logical fusion pairs. Add
earlyclobber to alts 0/1.
(gen_addadd): Add earlyclobber to alts 0/1.
* config/rs6000/rs6000-cpus.def: Add new fusion to ISA 3.1 mask
and powerpc mask.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Turn on
logical-add and add-logical fusion by default.
* config/rs6000/rs6000.opt: Add -mpower10-fusion-logical-add and
-mpower10-fusion-add-logical options.
* config/rs6000/fusion.md: Regenerate file.
2021-06-17 Marius Hillenbrand <mhillen@linux.ibm.com>
Backported from master:
2021-06-17 Marius Hillenbrand <mhillen@linux.ibm.com>
PR target/100871
* config/s390/vecintrin.h (vec_doublee): Fix to use
__builtin_s390_vflls.
(vec_floate): Fix to use __builtin_s390_vflrd.
2021-06-17 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-15 Jakub Jelinek <jakub@redhat.com>
PR target/101046
* expr.c (expand_expr_real_2) <case VEC_PACK_FIX_TRUNC_EXPR,
case VEC_PACK_TRUNC_EXPR>: Clear subtarget when changing mode.
2021-06-17 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-11 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/101008
* simplify-rtx.c (relational_result): New function.
(simplify_logical_relational_operation,
simplify_relational_operation): Use it.
2021-06-17 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-10 Jakub Jelinek <jakub@redhat.com>
PR debug/100852
* ifcvt.c (noce_get_alt_condition, noce_try_abs): Use
prev_nonnote_nondebug_insn instead of prev_nonnote_insn.
2021-06-17 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-07 Jakub Jelinek <jakub@redhat.com>
PR target/100887
* fold-const.c (fold_read_from_vector): Return NULL if trying to
read from a CONSTRUCTOR with vector type elements.
2021-06-17 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-07 Jakub Jelinek <jakub@redhat.com>
PR middle-end/100898
* tree-inline.c (copy_bb): Only use gimple_call_arg_ptr if memcpy
should copy any arguments. Don't call gimple_call_num_args
on id->call_stmt or call_stmt more than once.
2021-06-17 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-04 Jakub Jelinek <jakub@redhat.com>
PR target/100887
* config/i386/i386-expand.c (ix86_expand_vector_init): Handle
concatenation from half-sized modes with TImode elements.
2021-06-16 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-11 Richard Biener <rguenther@suse.de>
PR middle-end/101009
* tree-data-ref.c (build_classic_dist_vector_1): Make sure
to set *init_b to true when we encounter a constant equal
index pair.
(compute_affine_dependence): Also dump the actual DR_REF.
2021-06-16 Richard Biener <rguenther@suse.de>
PR tree-optimization/100981
* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
gimple_get_lhs to also handle calls.
* tree-vect-slp-patterns.c (complex_pattern::build): Transfer
reduction info.
2021-06-16 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/100934
* tree-ssa-dom.c (pass_dominator::execute): Properly
mark irreducible regions.
2021-06-16 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-28 Richard Biener <rguenther@suse.de>
PR ipa/100791
* tree-inline.c (copy_bb): When processing __builtin_va_arg_pack
copy fntype from original call.
2021-06-14 Aaron Sawdey <acsawdey@linux.ibm.com>
* config/rs6000/genfusion.pl (gen_addadd): New function.
* config/rs6000/fusion.md: Regenerate file.
* config/rs6000/rs6000-cpus.def: Add
OPTION_MASK_P10_FUSION_2ADD to masks.
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Handle default value of OPTION_MASK_P10_FUSION_2ADD.
* config/rs6000/rs6000.opt: Add -mpower10-fusion-2add.
2021-06-11 Aaron Sawdey <acsawdey@linux.ibm.com>
* config/rs6000/rs6000.md (define_attr "type"): Add types for fusion.
* config/rs6000/genfusion.pl (gen_ld_cmpi_p10): Use new fusion types.
(gen_2logical): Use new fusion types.
* config/rs6000/fusion.md: Regenerate.
2021-06-09 Claudiu Zissulescu <claziss@synopsys.com>
Backported from master:
2021-06-09 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (loop_end): Change it to
define_insn_and_split.
2021-06-09 Claudiu Zissulescu <claziss@synopsys.com>
Backported from master:
2021-06-09 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (maddhisi4): Use VMAC2H instruction.
(machi): New pattern.
(umaddhisi4): Use VMAC2HU instruction.
(umachi): New pattern.
2021-06-09 Claudiu Zissulescu <claziss@synopsys.com>
Backported from master:
2021-06-09 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (arc_split_move_p): New prototype.
* config/arc/arc.c (arc_split_move_p): New function.
(arc_split_move): Clean up.
* config/arc/arc.md (movdi_insn): Clean up, use arc_split_move_p.
(movdf_insn): Likewise.
* config/arc/simdext.md (mov<VWH>_insn): Likewise.
2021-06-08 Pat Haugen <pthaugen@linux.ibm.com>
* config/rs6000/rs6000-logue.c (rs6000_emit_prologue): Use
gen_frame_store.
2021-06-07 liuhongt <hongtao.liu@intel.com>
PR target/100885
* config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): Refine
constraints.
(<insn>v4siv4di2): Delete constraints for define_expand.
2021-06-03 Eric Botcazou <ebotcazou@adacore.com>
PR ipa/99122
* tree-inline.c (inline_forbidden_p): Remove test on return type.
2021-06-03 Eric Botcazou <ebotcazou@adacore.com>
* range-op.cc (get_bool_state): Adjust head comment.
(operator_not_equal::op1_range): Fix comment.
(operator_bitwise_xor::op1_range): Remove call to gcc_unreachable.
2021-06-03 Alex Coplan <alex.coplan@arm.com>
Backported from master:
2021-05-19 Alex Coplan <alex.coplan@arm.com>
PR target/100333
* config/arm/arm.md (nonsecure_call_internal): Always ensure
callee's address is in a register.
2021-06-03 Claudiu Zissulescu <claziss@synopsys.com>
Backported from master:
2021-06-02 Vineet Gupta <vgupta@synopsys.com>
* config/arc/arc.h (TARGET_CPU_DEFAULT): Change to hs38_linux.
2021-06-02 Uroš Bizjak <ubizjak@gmail.com>
* config/i386/sse.md (abs<MMXMODEI:mode>2):
Change define_insn to define_expand.
2021-06-02 Uros Bizjak <ubizjak@gmail.com>
Backported from master:
2021-05-18 Uroš Bizjak <ubizjak@gmail.com>
* config/i386/sse.md (<any_extend:insn>v4qiv4di2):
Fix a mode mismatch with operand 1.
2021-06-01 Jason Merrill <jason@redhat.com>
PR c++/91859
* tree.h (CALL_FROM_NEW_OR_DELETE_P): Adjust comment.
2021-05-31 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/100576
* builtins.c (check_read_access): Convert bound to size_type_node if
non-NULL.
2021-05-31 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-18 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/100590
* regcprop.c (copyprop_hardreg_forward_1): Only DCE dead sets if
they are NONJUMP_INSN_P.
2021-05-31 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-18 Jakub Jelinek <jakub@redhat.com>
PR c++/100580
* function.c (push_dummy_function): Set DECL_ARTIFICIAL and
DECL_ASSEMBLER_NAME on the fn_decl.
2021-05-31 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-15 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/100342
* regcprop.c (copy_value): When copying a source reg in a wider
mode than it has recorded for the value, adjust recorded destination
mode too or punt if !REG_CAN_CHANGE_MODE_P.
2021-05-28 David Edelsohn <dje.gcc@gmail.com>
PR target/94177
* calls.c (precompute_register_parameters): Additionally test
targetm.precompute_tls_p to pre-compute argument.
* config/rs6000/aix.h (TARGET_PRECOMPUTE_TLS_P): Define.
* config/rs6000/rs6000.c (rs6000_aix_precompute_tls_p): New.
* target.def (precompute_tls_p): New.
* doc/tm.texi.in (TARGET_PRECOMPUTE_TLS_P): Add hook documentation.
* doc/tm.texi: Regenerated.
(cherry-picked from commit a21b399708175f6fc0ac723a0cebc127da421c60)
2021-05-27 Richard Earnshaw <rearnsha@arm.com>
Backported from master:
2021-05-27 Richard Earnshaw <rearnsha@arm.com>
PR target/100767
* config/arm/arm.c (arm_configure_build_target): Remove parameter
opts_set, directly check opts parameters for being non-null.
(arm_option_restore): Update call to arm_configure_build_target.
(arm_option_override): Likewise.
(arm_can_inline_p): Likewise.
(arm_valid_target_attribute_tree): Likewise.
* config/arm/arm-c.c (arm_pragma_target_parse): Likewise.
* config/arm/arm-protos.h (arm_configure_build_target): Adjust
prototype.
2021-05-27 Alex Coplan <alex.coplan@arm.com>
Backported from master:
2021-05-11 Alex Coplan <alex.coplan@arm.com>
PR target/99725
* config/arm/arm.c (cmse_nonsecure_call_inline_register_clear):
Avoid emitting CFA adjusts on the sp if we have the fp.
2021-05-25 Uros Bizjak <ubizjak@gmail.com>
Backported from master:
2021-05-18 Uroš Bizjak <ubizjak@gmail.com>
PR target/100626
* config/i386/i386-expand.c (split_double_mode): Return
temporary register when simplify_gen_subreg fails with
the high half od the paradoxical subreg.
2021-05-25 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/100519
* tree-ssa-reassoc.c (can_associate_p): Split into...
(can_associate_op_p): ... this
(can_associate_type_p): ... and this.
(is_reassociable_op): Call can_associate_op_p.
(break_up_subtract_bb): Call the appropriate predicates.
(reassociate_bb): Likewise.
2021-05-25 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-11 Richard Biener <rguenther@suse.de>
PR ipa/100513
* ipa-param-manipulation.c
(ipa_param_body_adjustments::modify_call_stmt): Avoid
altering SSA_NAME_DEF_STMT by adjusting the calls LHS
via gimple_call_lhs_ptr.
2021-05-25 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-11 Richard Biener <rguenther@suse.de>
PR middle-end/100509
* gimple-fold.c (fold_gimple_assign): Only call
get_symbol_constant_value on register type symbols.
2021-05-25 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/100492
* tree-loop-distribution.c (find_seed_stmts_for_distribution):
Find nothing when the loop contains an irreducible region.
2021-05-24 Alex Coplan <alex.coplan@arm.com>
Backported from master:
2021-05-10 Alex Coplan <alex.coplan@arm.com>
PR target/99960
* config/arm/mve.md (*mve_mov<mode>): Simplify output code. Use
vldrw.u32 and vstrw.32 for V2D[IF]mode loads and stores.
2021-05-20 Andreas Krebbel <krebbel@linux.ibm.com>
Backported from master:
2021-05-18 Andreas Krebbel <krebbel@linux.ibm.com>
PR c++/100281
* tree.c (build_reference_type_for_mode)
(build_pointer_type_for_mode): Pick pointer mode if MODE argument
is VOIDmode.
(build_reference_type, build_pointer_type): Invoke
build_*_type_for_mode with VOIDmode.
2021-05-19 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__ROP_PROTECT__ if -mrop-protect is selected.
2021-05-19 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000-internal.h (rs6000_stack): Add
rop_hash_save_offset and rop_hash_size.
* config/rs6000/rs6000-logue.c (rs6000_stack_info): Compute
rop_hash_size and rop_hash_save_offset.
(debug_stack_info): Dump rop_hash_save_offset and rop_hash_size.
(rs6000_emit_prologue): Emit hashst[p] in prologue.
(rs6000_emit_epilogue): Emit hashchk[p] in epilogue.
* config/rs6000/rs6000.md (unspec): Add UNSPEC_HASHST and
UNSPEC_HASHCHK.
(hashst): New define_insn.
(hashchk): Likewise.
2021-05-19 Bill Schmidt <wschmidt@linux.ibm.com>
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Disable shrink wrap when inserting ROP-protect instructions.
* config/rs6000/rs6000.opt (mrop-protect): New option.
(mprivileged): Likewise.
* doc/invoke.texi: Document mrop-protect and mprivileged.
2021-05-19 Jonathan Wakely <jwakely@redhat.com>
Backported from master:
2021-05-19 Jonathan Wakely <jwakely@redhat.com>
* doc/cpp.texi (Common Predefined Macros): Update documentation
for the __GXX_EXPERIMENTAL_CXX0X__ macro.
2021-05-17 Alex Coplan <alex.coplan@arm.com>
Backported from master:
2021-04-27 Alex Coplan <alex.coplan@arm.com>
PR target/99977
* config/arm/arm.c (arm_split_compare_and_swap): Fix up codegen
with negative immediates: ensure we expand cbranchsi4_scratch
correctly and ensure we satisfy its constraints.
* config/arm/sync.md
(@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Don't
attempt to tie two output operands together with constraints;
collapse two alternatives.
(@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise.
* config/arm/thumb1.md (cbranchsi4_neg_late): New.
2021-05-17 Marius Hillenbrand <mhillen@linux.ibm.com>
Backported from master:
2021-05-17 Marius Hillenbrand <mhillen@linux.ibm.com>
PR bootstrap/100552
* configure.ac: Replace pattern substitution with call to sed.
* configure: Regenerate.
2021-05-13 Tobias Burnus <tobias@codesourcery.com>
Backported from master:
2021-05-12 Tobias Burnus <tobias@codesourcery.com>
* omp-low.c (finish_taskreg_scan): Use the proper detach decl.
2021-05-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Backported from master:
2021-05-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Joe Ramsay <joe.ramsay@arm.com>
PR target/100419
* config/arm/arm_mve.h (__arm_vstrwq_scatter_offset): Fix wrong arguments.
(__arm_vcmpneq): Remove duplicate definition.
(__arm_vstrwq_scatter_offset_p): Likewise.
(__arm_vmaxq_x): Likewise.
(__arm_vmlsdavaq): Likewise.
(__arm_vmlsdavaxq): Likewise.
(__arm_vmlsdavq_p): Likewise.
(__arm_vmlsdavxq_p): Likewise.
(__arm_vrmlaldavhaq): Likewise.
(__arm_vstrbq_p): Likewise.
(__arm_vstrbq_scatter_offset): Likewise.
(__arm_vstrbq_scatter_offset_p): Likewise.
(__arm_vstrdq_scatter_offset): Likewise.
(__arm_vstrdq_scatter_offset_p): Likewise.
(__arm_vstrdq_scatter_shifted_offset): Likewise.
(__arm_vstrdq_scatter_shifted_offset_p): Likewise.
2021-05-13 Richard Earnshaw <rearnsha@arm.com>
PR target/100563
* config/arm/arm.c (arm_canonicalize_comparison): Correctly
canonicalize DImode inequality comparisons against the
maximum integral value.
2021-05-12 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/100566
* tree-ssa-sccvn.c (dominated_by_p_w_unex): Properly handle
allow_back for all edge queries.
2021-05-12 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-12 Jakub Jelinek <jakub@redhat.com>
PR middle-end/100508
* cfgexpand.c (expand_debug_expr): For DEBUG_EXPR_DECL with vector
type, don't reuse DECL_RTL if it has different mode, instead force
creation of a new DEBUG_EXPR.
2021-05-12 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-11 Jakub Jelinek <jakub@redhat.com>
PR middle-end/100471
* omp-low.c (lower_omp_task_reductions): For OMP_TASKLOOP, if data
is 0, bypass the reduction loop including
GOMP_taskgroup_reduction_unregister call.
2021-05-12 Geng Qi <gengqi@linux.alibaba.com>
Backported from master:
2021-04-30 Geng Qi <gengqi@linux.alibaba.com>
* config/riscv/riscv.opt (march=,mabi=): Negative itself.
2021-05-11 Alex Coplan <alex.coplan@arm.com>
PR target/99988
* config/aarch64/aarch64-bti-insert.c (aarch64_bti_j_insn_p): New.
(rest_of_insert_bti): Avoid inserting duplicate bti j insns for
jump table targets.
2021-05-06 Marius Hillenbrand <mhillen@linux.ibm.com>
Backported from master:
2021-05-06 Marius Hillenbrand <mhillen@linux.ibm.com>
* config/s390/s390-builtins.def (O_M5, O1_M5, ...): Remove unused macros.
(s390_vec_permi_s64, s390_vec_permi_b64, s390_vec_permi_u64)
(s390_vec_permi_dbl, s390_vpdi): Use the O3_U2 type for the immediate
operand.
* config/s390/s390.c (s390_const_operand_ok): Remove unused
values.
2021-05-06 Roman Zhuykov <zhroma@ispras.ru>
Backported from master:
2021-04-30 Roman Zhuykov <zhroma@ispras.ru>
PR rtl-optimization/100225
PR rtl-optimization/84878
* modulo-sched.c (sms_schedule): Use note_stores to skip loops
where we have an instruction which touches (writes) any hard
register from df->regular_block_artificial_uses set.
Allow not-single-set instruction only right before basic block
tail.
2021-05-06 Ilya Leoshkevich <iii@linux.ibm.com>
PR target/100217
* config/s390/s390.c (s390_hard_fp_reg_p): New function.
(s390_md_asm_adjust): Handle hard registers.
2021-05-05 Eric Botcazou <ebotcazou@adacore.com>
PR target/100402
* config/i386/i386.c (ix86_compute_frame_layout): For a SEH target,
always return the establisher frame for __builtin_frame_address (0).
2021-05-05 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
Backported from master:
2021-05-05 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
PR rtl-optimization/100263
* postreload.c (move2add_valid_value_p): Ensure register can
change mode.
2021-05-05 Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/100411
* cfgcleanup.c (try_crossjump_to_edge): Also skip end of prologue
and beginning of function markers.
2021-05-05 Richard Biener <rguenther@suse.de>
Backported from master:
2021-04-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/100253
* tree-vect-stmts.c (vectorizable_load): Do not assume
element alignment when DR_MISALIGNMENT is -1.
(vectorizable_store): Likewise.
2021-05-05 Richard Biener <rguenther@suse.de>
Backported from master:
2021-04-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/100278
* tree-ssa-pre.c (compute_avail): Give up when we cannot
adjust TBAA beacuse of mismatching bases.
2021-05-05 Richard Biener <rguenther@suse.de>
Backported from master:
2021-04-29 Richard Biener <rguenther@suse.de>
PR ipa/100308
* ipa-prop.c (ipcp_modif_dom_walker::before_dom_children):
Track blocks to cleanup EH in new m_need_eh_cleanup.
(ipcp_modif_dom_walker::cleanup_eh): New.
(ipcp_transform_function): Release dominator info before
doing EH cleanup.
2021-05-05 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-04 Richard Biener <rguenther@suse.de>
PR tree-optimization/100414
* tree-ssa-phiopt.c (get_non_trapping): Do not compute dominance
info here.
(tree_ssa_phiopt_worker): But unconditionally here.
2021-05-05 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-04 Richard Biener <rguenther@suse.de>
PR tree-optimization/100329
* tree-ssa-reassoc.c (can_reassociate_p): Do not reassociate
asm goto defs.
(insert_stmt_after): Assert we're not running into asm goto.
2021-05-04 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-02 Jakub Jelinek <jakub@redhat.com>
PR target/100375
* config/nvptx/nvptx.c (nvptx_sese_pseudo): Use nullptr instead of 0
as first argument of pseudo_node_t constructors.
2021-05-01 Maciej W. Rozycki <macro@orcam.me.uk>
Backported from master:
2021-04-27 Maciej W. Rozycki <macro@orcam.me.uk>
* config/vax/vax.c (print_operand_address, vax_address_cost_1)
(index_term_p): Handle ASHIFT too.
2021-04-30 David Edelsohn <dje.gcc@gmail.com>
Backported from master:
2021-04-27 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/aix.h (SUBTARGET_DRIVER_SELF_SPECS): New.
* config/rs6000/aix64.opt (m64): New.
(m32): New.
2021-04-30 Alex Coplan <alex.coplan@arm.com>
Backported from master:
2021-04-23 Alex Coplan <alex.coplan@arm.com>
PR rtl-optimization/100230
* early-remat.c (early_remat::sort_candidates): Use delete[]
instead of delete for array allocated with new[].
2021-04-29 Richard Earnshaw <rearnsha@arm.com>
Backported from master:
2021-04-28 Richard Earnshaw <rearnsha@arm.com>
PR target/100311
* config/arm/arm.c (arm_hard_regno_mode_ok): Only allow VPR to be
used in HImode.
2021-04-29 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-29 Jakub Jelinek <jakub@redhat.com>
PR target/100302
* config/aarch64/aarch64.c (aarch64_add_offset_1_temporaries): Use
absu_hwi instead of abs_hwi.
2021-04-29 Tom de Vries <tdevries@suse.de>
Backported from master:
2021-04-29 Tom de Vries <tdevries@suse.de>
PR target/100232
* internal-fn.c (expand_GOMP_SIMT_ENTER_ALLOC)
(expand_GOMP_SIMT_LAST_LANE, expand_GOMP_SIMT_ORDERED_PRED)
(expand_GOMP_SIMT_VOTE_ANY, expand_GOMP_SIMT_XCHG_BFLY)
(expand_GOMP_SIMT_XCHG_IDX): Ensure target is assigned to.
2021-04-29 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2021-04-28 Richard Sandiford <richard.sandiford@arm.com>
PR target/100305
* config/aarch64/constraints.md (Utq): Require the address to
be valid for both the element mode and for V2DImode.
2021-04-29 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2021-04-27 Richard Sandiford <richard.sandiford@arm.com>
PR target/100270
* config/aarch64/aarch64.c (aarch64_comp_type_attributes): Handle
SVE attributes.
2021-04-28 YiFei Zhu <zhuyifei1999@gmail.com>
Backported from master:
2021-04-23 YiFei Zhu <zhuyifei1999@gmail.com>
* config/bpf/bpf.h (ASM_OUTPUT_ALIGNED_BSS): Use .type and .lcomm.
2021-04-28 YiFei Zhu <zhuyifei1999@gmail.com>
Backported from master:
2021-04-23 YiFei Zhu <zhuyifei1999@gmail.com>
* config/bpf/bpf.h (FUNCTION_BOUNDARY): Set to 64.
2021-04-28 Richard Earnshaw <rearnsha@arm.com>
Backported from master:
2021-04-27 Richard Earnshaw <rearnsha@arm.com>
PR target/100236
* config/arm/arm.c (THUMB2_WORK_REGS): Check PIC_OFFSET_TABLE_REGNUM
is valid before including it in the mask.
2021-04-28 Uroš Bizjak <ubizjak@gmail.com>
PR target/100182
* config/i386/sync.md (FILD_ATOMIC/FIST_ATOMIC FP load peephole2):
Copy operand 3 to operand 4. Use sse_reg_operand
as operand 3 predicate.
(FILD_ATOMIC/FIST_ATOMIC FP load peephole2 with mem blockage): Ditto.
(LDX_ATOMIC/STX_ATOMIC FP load peephole2): Ditto.
(LDX_ATOMIC/LDX_ATOMIC FP load peephole2 with mem blockage): Ditto.
(FILD_ATOMIC/FIST_ATOMIC FP store peephole2):
Copy operand 1 to operand 0.
(FILD_ATOMIC/FIST_ATOMIC FP store peephole2 with mem blockage): Ditto.
(LDX_ATOMIC/STX_ATOMIC FP store peephole2): Ditto.
(LDX_ATOMIC/LDX_ATOMIC FP store peephole2 with mem blockage): Ditto.
2021-04-28 Cui,Lili <lili.cui@intel.com>
* common/config/i386/i386-common.c (processor_names):
Sync processor_names with processor_type.
* config/i386/i386-options.c (processor_cost_table):
Sync processor_cost_table with processor_type.
2021-04-27 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-27 Jakub Jelinek <jakub@redhat.com>
PR target/100200
* config/aarch64/aarch64.c (aarch64_print_operand): Cast -UINTVAL
back to HOST_WIDE_INT.
2021-04-27 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-27 Jakub Jelinek <jakub@redhat.com>
PR target/100200
* config/aarch64/predicates.md (aarch64_sub_immediate,
aarch64_plus_immediate): Use -UINTVAL instead of -INTVAL.
* config/aarch64/aarch64.md (casesi, rotl<mode>3): Likewise.
* config/aarch64/aarch64.c (aarch64_print_operand,
aarch64_split_atomic_op, aarch64_expand_subvti): Likewise.
2021-04-27 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-27 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/100239
* tree-vect-generic.c (lower_vec_perm): Don't accept constant
permutations with all indices from the first zero element as vec_shl.
2021-04-27 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-27 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/100254
* cfgcleanup.c (outgoing_edges_match): Check REG_EH_REGION on
last1 and last2 insns rather than BB_END (bb1) and BB_END (bb2) insns.
2021-04-27 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-26 Jakub Jelinek <jakub@redhat.com>
PR debug/100255
* vmsdbgout.c (ASM_OUTPUT_DEBUG_STRING, vmsdbgout_begin_block,
vmsdbgout_end_block, lookup_filename, vmsdbgout_source_line): Remove
register keywords.
2021-04-27 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-21 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/100148
* cprop.c (constprop_register): Use next_nondebug_insn instead of
NEXT_INSN.
2021-04-27 Release Manager
* GCC 11.1.0 released.
2021-04-20 Segher Boessenkool <segher@kernel.crashing.org>
Backported from master:
2021-04-20 Segher Boessenkool <segher@kernel.crashing.org>
PR target/100108
* config/rs6000/rs6000.c (rs6000_machine_from_flags): Do not consider
OPTION_MASK_ISEL.
2021-04-20 Martin Liska <mliska@suse.cz>
* lto-streamer.h (LTO_major_version): Bump to 11.
2021-04-20 Martin Liska <mliska@suse.cz>
Backported from master:
2021-04-20 Martin Liska <mliska@suse.cz>
* doc/invoke.texi: Fix typo.
* params.opt: Likewise.
2021-04-20 Martin Liska <mliska@suse.cz>
Backported from master:
2021-04-20 Martin Liska <mliska@suse.cz>
* doc/invoke.texi: Document new param.
2021-04-19 Andrew MacLeod <amacleod@redhat.com>
PR tree-optimization/100081
* gimple-range-cache.h (ranger_cache): Inherit from gori_compute
rather than gori_compute_cache.
* gimple-range-gori.cc (is_gimple_logical_p): Move to top of file.
(range_def_chain::m_logical_depth): New member.
(range_def_chain::range_def_chain): Initialize m_logical_depth.
(range_def_chain::get_def_chain): Don't build defchains through more
than LOGICAL_LIMIT logical expressions.
* params.opt (param_ranger_logical_depth): New.
2021-04-19 Richard Earnshaw <rearnsha@arm.com>
PR target/100067
* config/arm/arm.c (arm_configure_build_target): Do not strip
extended FPU/SIMD feature bits from the target ISA when -mfpu
is specified (partial revert of r11-8168).
2021-04-19 Thomas Schwinge <thomas@codesourcery.com>
* params.opt (-param=openacc-kernels=): Add.
* omp-oacc-kernels-decompose.cc
(pass_omp_oacc_kernels_decompose::gate): Use it.
* doc/invoke.texi (-fopenacc-kernels=@var{mode}): Move...
(--param): ... here, 'openacc-kernels'.
2021-04-19 Martin Liska <mliska@suse.cz>
PR c/100143
* gengtype.c (finish_root_table): Align function arguments
in between declaration and definition.
2021-04-19 Eric Botcazou <ebotcazou@adacore.com>
* config/i386/winnt.c (i386_pe_seh_cold_init): Properly deal with
frames larger than the SEH maximum frame size.
2021-04-18 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/99927
* combine.c (distribute_notes) [REG_UNUSED]: If the register already
is dead, just drop it.
2021-04-17 Iain Buclaw <ibuclaw@gdcproject.org>
PR d/99914
* config/i386/winnt-d.c (TARGET_D_TEMPLATES_ALWAYS_COMDAT): Define.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (D language and ABI): Add @hook for
TARGET_D_TEMPLATES_ALWAYS_COMDAT.
2021-04-17 Iain Buclaw <ibuclaw@gdcproject.org>
* config/darwin-d.c (darwin_d_handle_target_object_format): New
function.
(darwin_d_register_target_info): New function.
(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
* config/dragonfly-d.c (dragonfly_d_handle_target_object_format): New
function.
(dragonfly_d_register_target_info): New function.
(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
* config/freebsd-d.c (freebsd_d_handle_target_object_format): New
function.
(freebsd_d_register_target_info): New function.
(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
* config/glibc-d.c (glibc_d_handle_target_object_format): New
function.
(glibc_d_register_target_info): New function.
(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
* config/i386/i386-d.c (ix86_d_handle_target_object_format): New
function.
(ix86_d_register_target_info): Add ix86_d_handle_target_object_format
as handler for objectFormat key.
* config/i386/winnt-d.c (winnt_d_handle_target_object_format): New
function.
(winnt_d_register_target_info): New function.
(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
* config/netbsd-d.c (netbsd_d_handle_target_object_format): New
function.
(netbsd_d_register_target_info): New function.
(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
* config/openbsd-d.c (openbsd_d_handle_target_object_format): New
function.
(openbsd_d_register_target_info): New function.
(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
* config/pa/pa-d.c (pa_d_handle_target_object_format): New function.
(pa_d_register_target_info): Add pa_d_handle_target_object_format as
handler for objectFormat key.
* config/rs6000/rs6000-d.c (rs6000_d_handle_target_object_format): New
function.
(rs6000_d_register_target_info): Add
rs6000_d_handle_target_object_format as handler for objectFormat key.
* config/sol2-d.c (solaris_d_handle_target_object_format): New
function.
(solaris_d_register_target_info): New function.
(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
2021-04-16 Jakub Jelinek <jakub@redhat.com>
PR target/91710
* config/aarch64/aarch64.c (aarch64_function_arg_alignment): Change
abi_break argument from bool * to unsigned *, store there the pre-GCC 9
alignment.
(aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Adjust callers.
(aarch64_function_arg_regno_p): Likewise. Only emit -Wpsabi note if
the old and new alignment after applying MIN/MAX to it is different.
2021-04-16 Tamar Christina <tamar.christina@arm.com>
PR target/100048
* config/aarch64/aarch64-sve.md (@aarch64_sve_trn1_conv<mode>): New.
* config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_trn): Use new
TRN optab.
* config/aarch64/iterators.md (UNSPEC_TRN1_CONV): New.
2021-04-16 Bill Schmidt <wschmidt@linux.ibm.com>
* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Revise
this section and its subsections.
2021-04-16 Jakub Jelinek <jakub@redhat.com>
PR target/100075
* config/aarch64/aarch64.md (*neg_asr_si2_extr, *extrsi5_insn_di): New
define_insn patterns.
2021-04-16 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/98689
* reg-notes.def (UNTYPED_CALL): New note.
* combine.c (distribute_notes): Handle it.
* emit-rtl.c (try_split): Likewise.
* rtlanal.c (rtx_properties::try_to_add_insn): Likewise. Assume
that calls with the note implicitly set all return value registers.
* builtins.c (expand_builtin_apply): Add a REG_UNTYPED_CALL
to untyped_calls.
2021-04-16 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/99596
* rtlanal.c (rtx_properties::try_to_add_insn): Don't add global
register accesses for const calls. Assume that pure functions
can only read from global registers. Ignore cases in which
the stack pointer has been marked global.
2021-04-16 Jakub Jelinek <jakub@redhat.com>
PR target/99767
* tree-vect-loop.c (vect_transform_loop): Don't remove just
dead scalar .MASK_LOAD calls, but also dead .COND_* calls - replace
them by their last argument.
2021-04-15 Martin Liska <mliska@suse.cz>
* doc/invoke.texi: Other params don't use it, remove it.
2021-04-15 Richard Biener <rguenther@suse.de>
* gimple-builder.h: Add deprecation note.
2021-04-15 Richard Sandiford <richard.sandiford@arm.com>
PR c++/98852
* attribs.h (restrict_type_identity_attributes_to): Declare.
* attribs.c (restrict_type_identity_attributes_to): New function.
2021-04-15 Richard Sandiford <richard.sandiford@arm.com>
PR c/98852
* attribs.h (affects_type_identity_attributes): Declare.
* attribs.c (remove_attributes_matching): New function.
(affects_type_identity_attributes): Likewise.
2021-04-15 Jakub Jelinek <jakub@redhat.com>
PR target/100056
* config/aarch64/aarch64.md (*<LOGICAL:optab>_<SHIFT:optab><mode>3):
Add combine splitters for *<LOGICAL:optab>_ashl<mode>3 with
ZERO_EXTEND, SIGN_EXTEND or AND.
2021-04-14 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/99929
* rtl.h (same_vector_encodings_p): New function.
* cse.c (exp_equiv_p): Check that CONST_VECTORs have the same encoding.
* cselib.c (rtx_equal_for_cselib_1): Likewise.
* jump.c (rtx_renumbered_equal_p): Likewise.
* lra-constraints.c (operands_match_p): Likewise.
* reload.c (operands_match_p): Likewise.
* rtl.c (rtx_equal_p_cb, rtx_equal_p): Likewise.
2021-04-14 Richard Sandiford <richard.sandiford@arm.com>
* print-rtl.c (rtx_writer::print_rtx_operand_codes_E_and_V): Print
more information about variable-length CONST_VECTORs.
2021-04-14 Vladimir N. Makarov <vmakarov@redhat.com>
PR rtl-optimization/100066
* lra-constraints.c (split_reg): Check paradoxical_subreg_p for
ordered modes when choosing splitting mode for hard reg.
2021-04-14 Richard Sandiford <richard.sandiford@arm.com>
PR target/99246
* config/aarch64/aarch64.c (aarch64_expand_sve_const_vector_sel):
New function.
(aarch64_expand_sve_const_vector): Use it for nelts_per_pattern==2.
2021-04-14 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390-builtins.def (O_M5, O_M12, ...): Add new macros
for mask operand types.
(s390_vec_permi_s64, s390_vec_permi_b64, s390_vec_permi_u64)
(s390_vec_permi_dbl, s390_vpdi): Use the M5 type for the immediate
operand.
(s390_vec_msum_u128, s390_vmslg): Use the M12 type for the
immediate operand.
* config/s390/s390.c (s390_const_operand_ok): Check the new
operand types and generate a list of valid values.
2021-04-14 Iain Buclaw <ibuclaw@gdcproject.org>
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (D language and ABI): Add @hook for
TARGET_D_REGISTER_OS_TARGET_INFO.
2021-04-14 Iain Buclaw <ibuclaw@gdcproject.org>
* config/aarch64/aarch64-d.c (aarch64_d_handle_target_float_abi): New
function.
(aarch64_d_register_target_info): New function.
* config/aarch64/aarch64-protos.h (aarch64_d_register_target_info):
Declare.
* config/aarch64/aarch64.h (TARGET_D_REGISTER_CPU_TARGET_INFO):
Define.
* config/arm/arm-d.c (arm_d_handle_target_float_abi): New function.
(arm_d_register_target_info): New function.
* config/arm/arm-protos.h (arm_d_register_target_info): Declare.
* config/arm/arm.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/i386/i386-d.c (ix86_d_handle_target_float_abi): New function.
(ix86_d_register_target_info): New function.
* config/i386/i386-protos.h (ix86_d_register_target_info): Declare.
* config/i386/i386.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/mips/mips-d.c (mips_d_handle_target_float_abi): New function.
(mips_d_register_target_info): New function.
* config/mips/mips-protos.h (mips_d_register_target_info): Declare.
* config/mips/mips.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/pa/pa-d.c (pa_d_handle_target_float_abi): New function.
(pa_d_register_target_info): New function.
* config/pa/pa-protos.h (pa_d_register_target_info): Declare.
* config/pa/pa.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/riscv/riscv-d.c (riscv_d_handle_target_float_abi): New
function.
(riscv_d_register_target_info): New function.
* config/riscv/riscv-protos.h (riscv_d_register_target_info): Declare.
* config/riscv/riscv.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/rs6000/rs6000-d.c (rs6000_d_handle_target_float_abi): New
function.
(rs6000_d_register_target_info): New function.
* config/rs6000/rs6000-protos.h (rs6000_d_register_target_info):
Declare.
* config/rs6000/rs6000.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/s390/s390-d.c (s390_d_handle_target_float_abi): New function.
(s390_d_register_target_info): New function.
* config/s390/s390-protos.h (s390_d_register_target_info): Declare.
* config/s390/s390.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* config/sparc/sparc-d.c (sparc_d_handle_target_float_abi): New
function.
(sparc_d_register_target_info): New function.
* config/sparc/sparc-protos.h (sparc_d_register_target_info): Declare.
* config/sparc/sparc.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (D language and ABI): Add @hook for
TARGET_D_REGISTER_CPU_TARGET_INFO.
2021-04-14 Iain Buclaw <ibuclaw@gdcproject.org>
* config/i386/i386-d.c (ix86_d_has_stdcall_convention): New function.
* config/i386/i386-protos.h (ix86_d_has_stdcall_convention): Declare.
* config/i386/i386.h (TARGET_D_HAS_STDCALL_CONVENTION): Define.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (D language and ABI): Add @hook for
TARGET_D_HAS_STDCALL_CONVENTION.
2021-04-14 Richard Biener <rguenther@suse.de>
* tree-cfg.c (verify_gimple_assign_ternary): Verify that
VEC_COND_EXPRs have a gimple_val condition.
* tree-ssa-propagate.c (valid_gimple_rhs_p): VEC_COND_EXPR
can no longer have a GENERIC condition.
2021-04-14 Richard Earnshaw <rearnsha@arm.com>
PR target/100067
* config/arm/arm.c (arm_configure_build_target): Strip isa_all_fpbits
from the isa_delta when -mfpu has been used.
(arm_options_perform_arch_sanity_checks): It's the architecture that
lacks an FPU not the processor.
2021-04-13 Richard Biener <rguenther@suse.de>
PR tree-optimization/100053
* tree-ssa-sccvn.c (vn_nary_op_get_predicated_value): Do
not use optimistic dominance queries for backedges to validate
predicated values.
(dominated_by_p_w_unex): Add parameter to ignore executable
state on backedges.
(rpo_elim::eliminate_avail): Adjust.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR target/100028
* config/aarch64/aarch64.md (*aarch64_bfxil<mode>_extr,
*aarch64_bfxilsi_extrdi): New define_insn patterns.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR target/99648
* simplify-rtx.c (simplify_immed_subreg): For MODE_COMPOSITE_P
outermode, return NULL if the result doesn't encode back to the
original byte sequence.
(simplify_gen_subreg): Don't create SUBREGs from constants to
MODE_COMPOSITE_P outermode.
2021-04-12 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/99905
* combine.c (expand_compound_operation): If pos + len > modewidth,
perform the right shift by pos in inner_mode and then convert to mode,
instead of trying to simplify a shift of rtx with inner_mode by pos
as if it was a shift in mode.
2021-04-12 Jakub Jelinek <jakub@redhat.com>
PR debug/99830
* combine.c (simplify_and_const_int_1): Don't optimize varop
away if it has side-effects.
2021-04-12 Martin Liska <mliska@suse.cz>
* doc/extend.texi: Escape @smallexample content.
2021-04-12 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
* config/s390/s390.md ("*movdi_31", "*movdi_64"): Add
alternative in order to load a DFP zero.
2021-04-12 Martin Liska <mliska@suse.cz>
* doc/extend.texi: Be more precise in documentation
of symver attribute.
2021-04-12 Martin Liska <mliska@suse.cz>
PR sanitizer/99877
* gimplify.c (gimplify_expr): Right now, we unpoison all
variables before a goto <dest>. We should not do it if we are
in a omp context.
2021-04-12 Cui,Lili <lili.cui@intel.com>
* common/config/i386/cpuinfo.h (get_intel_cpu): Handle
rocketlake.
* common/config/i386/i386-common.c (processor_names): Add
rocketlake.
(processor_alias_table): Add rocketlake.
* common/config/i386/i386-cpuinfo.h (processor_subtypes): Add
INTEL_COREI7_ROCKETLAKE.
* config.gcc: Add -march=rocketlake.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
rocketlake.
* config/i386/i386-options.c (m_ROCKETLAKE) : Define.
(processor_cost_table): Add rocketlake cost.
* config/i386/i386.h (ix86_size_cost) : Define
TARGET_ROCKETLAKE.
(processor_type) : Add PROCESSOR_ROCKETLAKE.
(PTA_ROCKETLAKE): Ditto.
* doc/extend.texi: Add rocketlake.
* doc/invoke.texi: Add rocketlake.
2021-04-12 Cui,Lili <lili.cui@intel.com>
* config/i386/i386.h (PTA_ALDERLAKE): Change alderlake ISA list.
* config/i386/i386-options.c (m_CORE_AVX2): Add m_ALDERLAKE.
* common/config/i386/cpuinfo.h (get_intel_cpu): Add AlderLake model.
* doc/invoke.texi: Change alderlake ISA list.
2021-04-11 Hafiz Abid Qadeer <abidh@codesourcery.com>
PR middle-end/98088
* omp-expand.c (expand_oacc_collapse_init): Update condition in
a gcc_assert.
2021-04-10 H.J. Lu <hjl.tools@gmail.com>
PR target/99744
* config/i386/serializeintrin.h (_serialize): Defined as macro.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR lto/99849
* expr.c (expand_expr_addr_expr_1): Test is_global_var rather than
just TREE_STATIC on COMPOUND_LITERAL_EXPR_DECLs.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR middle-end/99989
* gimple-ssa-warn-alloca.c
(alloca_type_and_limit::alloca_type_and_limit): Initialize limit to
0 with integer precision unconditionally.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/98601
* rtlanal.c (rtx_addr_can_trap_p_1): Allow in assert unknown size
not just for BLKmode, but also for VOIDmode. For STRICT_ALIGNMENT
unaligned_mems handle VOIDmode like BLKmode.
2021-04-10 Jan Hubicka <hubicka@ucw.cz>
PR lto/99857
* tree.c (free_lang_data_in_decl): Do not release body of
declare_variant_alt.
2021-04-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.c (aarch64_option_restore): If the
architecture was specified explicitly and the tuning wasn't,
tune for the architecture rather than the configured default CPU.
2021-04-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.md (tlsdesc_small_sve_<mode>): Use X30
as the temporary register.
2021-04-09 Martin Liska <mliska@suse.cz>
* doc/extend.texi: Move non-target attributes on the top level.
2021-04-09 Martin Liska <mliska@suse.cz>
* doc/invoke.texi: Document minimum and maximum value of the
argument for both supported compression algorithms.
2021-04-08 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/rs6000.c (rs6000_xcoff_select_section): Select
TLS BSS before TLS data.
* config/rs6000/xcoff.h (ASM_OUTPUT_TLS_COMMON): Use .comm.
2021-04-08 Richard Sandiford <richard.sandiford@arm.com>
* doc/sourcebuild.texi (stdint_types_mbig_endian): Document.
2021-04-08 Richard Sandiford <richard.sandiford@arm.com>
* match.pd: Extend vec_cond folds to handle shifts.
2021-04-08 Maciej W. Rozycki <macro@orcam.me.uk>
* config/vax/vax.md: Fix comment for `*bit<mode>' pattern's
peephole.
2021-04-08 Alex Coplan <alex.coplan@arm.com>
PR target/99647
* config/arm/iterators.md (MVE_vecs): New.
(V_elem): Also handle V2DF.
* config/arm/mve.md (*mve_mov<mode>): Rename to ...
(*mve_vdup<mode>): ... this. Remove second alternative since
vec_duplicate of const_int is not canonical RTL, and we don't
want to match symbol_refs.
(*mve_vec_duplicate<mode>): Delete (pattern is redundant).
2021-04-08 Xionghu Luo <luoxhu@linux.ibm.com>
* fold-const.c (fold_single_bit_test): Fix typo.
* print-rtl.c (print_rtx_insn_vec): Call print_rtl_single
instead.
2021-04-07 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/97513
* tree-vect-slp.c (vect_add_slp_permutation): New function,
split out from...
(vectorizable_slp_permutation): ...here. Detect cases in which
all VEC_PERM_EXPRs are guaranteed to have the same stepped
permute vector and only generate one permute vector for that case.
Extend that case to handle variable-length vectors.
2021-04-07 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/99873
* tree-vect-slp.c (vect_slp_prefer_store_lanes_p): New function.
(vect_build_slp_instance): Don't split store groups that could
use IFN_STORE_LANES.
2021-04-07 Jakub Jelinek <jakub@redhat.com>
PR target/99872
* varasm.c (output_constant_pool_contents): Don't strip name encoding
from XSTR (desc->sym, 0) or from label before passing those to
ASM_OUTPUT_DEF.
2021-04-07 Richard Biener <rguenther@suse.de>
PR tree-optimization/99954
* tree-loop-distribution.c: Include tree-affine.h.
(generate_memcpy_builtin): Try using tree-affine to prove
non-overlap.
(loop_distribution::classify_builtin_ldst): Always classify
as PKIND_MEMMOVE.
2021-04-07 Richard Biener <rguenther@suse.de>
PR tree-optimization/99947
* tree-vect-loop.c (vectorizable_induction): Pre-allocate
steps vector to avoid pushing elements from the reallocated
vector.
2021-04-07 Richard Biener <rguenther@suse.de>
* tree-ssa-sccvn.h (print_vn_reference_ops): Declare.
* tree-ssa-pre.c (print_pre_expr): Factor out VN reference operand
printing...
* tree-ssa-sccvn.c (print_vn_reference_ops): ... into this new
function.
(debug_vn_reference_ops): New.
2021-04-07 Bin Cheng <bin.cheng@linux.alibaba.com>
PR tree-optimization/98736
* tree-loop-distribution.c
* (loop_distribution::bb_top_order_init):
Compute RPO with programing order preserved by calling function
rev_post_order_and_mark_dfs_back_seme.
2021-04-06 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99781
* lra-constraints.c (split_reg): Don't check paradoxical_subreg_p.
* lra-lives.c (clear_sparseset_regnos, regnos_in_sparseset_p): New
functions.
(process_bb_lives): Don't update biggest mode of hard reg for
implicit in multi-register group. Use the new functions for
updating dead_set and unused_set by register notes.
2021-04-06 Xianmiao Qu <xianmiao_qu@c-sky.com>
* config/csky/csky_pipeline_ck802.md : Use insn reservation name
instead of *.
2021-04-06 H.J. Lu <hjl.tools@gmail.com>
* config/i386/x86-tune-costs.h (skylake_memcpy): Updated.
(skylake_memset): Likewise.
(skylake_cost): Change CLEAR_RATIO to 17.
* config/i386/x86-tune.def (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB):
Replace m_CANNONLAKE, m_ICELAKE_CLIENT, m_ICELAKE_SERVER,
m_TIGERLAKE and m_SAPPHIRERAPIDS with m_SKYLAKE and m_CORE_AVX512.
2021-04-06 Richard Biener <rguenther@suse.de>
PR tree-optimization/99880
* tree-vect-loop.c (maybe_set_vectorized_backedge_value): Only
set vectorized defs of relevant PHIs.
2021-04-06 Richard Biener <rguenther@suse.de>
PR tree-optimization/99924
* tree-vect-slp.c (vect_bb_partition_graph_r): Do not mark
nodes w/o scalar stmts as visited.
2021-04-06 Alex Coplan <alex.coplan@arm.com>
PR target/99748
* config/arm/arm.c (arm_libcall_uses_aapcs_base): Also use base
PCS for [su]fix_optab.
2021-04-03 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.c (machopic_legitimize_pic_address): Check
that the current pic register is one of the hard reg set
before setting liveness.
2021-04-03 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.c (machopic_legitimize_pic_address): Fix
whitespace, remove unused code.
2021-04-03 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/99882
* gimple-ssa-store-merging.c (bswap_view_convert): Handle val with
pointer type.
2021-04-03 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/99863
* dse.c (replace_read): Drop regs_live argument. Instead of
regs_live, use store_insn->fixed_regs_live if non-NULL,
otherwise punt if insns sequence clobbers or sets any hard
registers.
2021-04-03 Jakub Jelinek <jakub@redhat.com>
PR testsuite/98125
* targhooks.h (default_print_patchable_function_entry_1): Declare.
* targhooks.c (default_print_patchable_function_entry_1): New function,
copied from default_print_patchable_function_entry with an added flags
argument.
(default_print_patchable_function_entry): Rewritten into a small
wrapper around default_print_patchable_function_entry_1.
* config/rs6000/rs6000.c (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY):
Redefine.
(rs6000_print_patchable_function_entry): New function.
2021-04-02 Eric Botcazou <ebotcazou@adacore.com>
* doc/invoke.texi (fdelete-dead-exceptions): Minor tweak.
2021-04-01 Jason Merrill <jason@redhat.com>
PR c++/98481
* common.opt: Document v15 and v16.
2021-04-01 Richard Biener <rguenther@suse.de>
PR tree-optimization/99863
* gimplify.c (gimplify_init_constructor): Recompute vector
constructor flags.
2021-04-01 Jakub Jelinek <jakub@redhat.com>
* doc/extend.texi (symver attribute): Fix up syntax errors
in the examples.
2021-04-01 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/96573
* gimple-ssa-store-merging.c (init_symbolic_number): Handle
also pointer types.
2021-04-01 Richard Biener <rguenther@suse.de>
PR tree-optimization/99856
* tree-vect-patterns.c (vect_recog_over_widening_pattern): Promote
precision to vector element precision.
2021-04-01 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/97009
* tree-sra.c (access_or_its_child_written): New function.
(propagate_subaccesses_from_rhs): Use it instead of a simple grp_write
test.
2021-03-31 Jan Hubicka <hubicka@ucw.cz>
PR ipa/98265
* cif-code.def (USES_COMDAT_LOCAL): Make CIF_FINAL_NORMAL.
2021-03-31 Pat Haugen <pthaugen@linux.ibm.com>
PR target/99133
* config/rs6000/altivec.md (xxspltiw_v4si, xxspltiw_v4sf_inst,
xxspltidp_v2df_inst, xxsplti32dx_v4si_inst, xxsplti32dx_v4sf_inst,
xxblend_<mode>, xxpermx_inst, xxeval): Mark prefixed.
* config/rs6000/mma.md (mma_<vvi4i4i8>, mma_<avvi4i4i8>,
mma_<vvi4i4i2>, mma_<avvi4i4i2>, mma_<vvi4i4>, mma_<avvi4i4>,
mma_<pvi4i2>, mma_<apvi4i2>, mma_<vvi4i4i4>, mma_<avvi4i4i4>):
Likewise.
* config/rs6000/rs6000.c (rs6000_final_prescan_insn): Adjust test.
* config/rs6000/rs6000.md (define_attr "maybe_prefixed"): New.
(define_attr "prefixed"): Update initializer.
2021-03-31 Jakub Jelinek <jakub@redhat.com>
PR debug/99490
* dwarf2out.c (debug_ranges_dwo_section): New variable.
(DW_RANGES_IDX_SKELETON): Define.
(struct dw_ranges): Add begin_entry and end_entry members.
(DEBUG_DWO_RNGLISTS_SECTION): Define.
(add_ranges_num): Adjust r initializer for addition of *_entry
members.
(add_ranges_by_labels): For -gsplit-dwarf and force_direct,
set idx to DW_RANGES_IDX_SKELETON.
(use_distinct_base_address_for_range): New function.
(index_rnglists): Don't set r->idx if it is equal to
DW_RANGES_IDX_SKELETON. Initialize r->begin_entry and
r->end_entry for -gsplit-dwarf if those will be needed by
output_rnglists.
(output_rnglists): Add DWO argument. If true, switch to
debug_ranges_dwo_section rather than debug_ranges_section.
Adjust l1/l2 label indexes. Only output the offset table when
dwo is true and don't include in there the skeleton range
entry if present. For -gsplit-dwarf, skip ranges that belong
to the other rnglists section. Change return type from void
to bool and return true if there are any range entries for
the other section. For dwarf_split_debug_info use
DW_RLE_startx_endx, DW_RLE_startx_length and DW_RLE_base_addressx
entries instead of DW_RLE_start_end, DW_RLE_start_length and
DW_RLE_base_address. Use use_distinct_base_address_for_range.
(init_sections_and_labels): Initialize debug_ranges_dwo_section
if -gsplit-dwarf and DWARF >= 5. Adjust ranges_section_label
and range_base_label indexes.
(dwarf2out_finish): Call index_rnglists earlier before finalizing
.debug_addr. Never emit DW_AT_rnglists_base attribute. For
-gsplit-dwarf and DWARF >= 5 call output_rnglists up to twice
with different dwo arguments.
(dwarf2out_c_finalize): Clear debug_ranges_dwo_section.
2021-03-31 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/98268
* gimple-fold.c (maybe_canonicalize_mem_ref_addr): Call
recompute_tree_invariant_for_addr_expr after successfully
folding a TARGET_MEM_REF that occurs inside an ADDR_EXPR.
2021-03-31 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/99726
* tree-data-ref.c (create_intersect_range_checks_index): Bail
out if there is more than one access function SCEV for the loop
being versioned.
2021-03-31 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/97141
PR rtl-optimization/98726
* emit-rtl.c (valid_for_const_vector_p): Return true for
CONST_POLY_INT_P.
* rtx-vector-builder.h (rtx_vector_builder::step): Return a
poly_wide_int instead of a wide_int.
(rtx_vector_builder::apply_set): Take a poly_wide_int instead
of a wide_int.
* rtx-vector-builder.c (rtx_vector_builder::apply_set): Likewise.
* config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Return
false for CONST_VECTORs that cannot be forced to memory.
* config/aarch64/aarch64-simd.md (mov<mode>): If a CONST_VECTOR
is too complex to force to memory, build it up from individual
elements instead.
2021-03-31 Jan Hubicka <jh@suse.cz>
PR lto/99447
* cgraph.c (cgraph_node::release_body): Fix overactive check.
2021-03-31 Christophe Lyon <christophe.lyon@linaro.org>
PR target/99786
* config/arm/vec-common.md (mul<mode>3): Disable on iwMMXT, expect
for V4HI and V2SI.
2021-03-31 H.J. Lu <hjl.tools@gmail.com>
* config/i386/i386-expand.c (expand_set_or_cpymem_via_rep):
For TARGET_PREFER_KNOWN_REP_MOVSB_STOSB, don't convert QImode
to SImode.
(decide_alg): For TARGET_PREFER_KNOWN_REP_MOVSB_STOSB, use
"rep movsb/stosb" only for known sizes.
* config/i386/i386-options.c (processor_cost_table): Use Ice
Lake cost for Cannon Lake, Ice Lake, Tiger Lake, Sapphire
Rapids and Alder Lake.
* config/i386/i386.h (TARGET_PREFER_KNOWN_REP_MOVSB_STOSB): New.
* config/i386/x86-tune-costs.h (icelake_memcpy): New.
(icelake_memset): Likewise.
(icelake_cost): Likewise.
* config/i386/x86-tune.def (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB):
New.
2021-03-31 Richard Sandiford <richard.sandiford@arm.com>
PR target/98119
* config/aarch64/aarch64.c
(aarch64_vectorize_preferred_vector_alignment): Query the size
of the provided SVE vector; do not assume that all SVE vectors
have the same size.
2021-03-31 Jan Hubicka <jh@suse.cz>
PR lto/99447
* cgraph.c (cgraph_node::release_body): Remove all callers and
references.
* cgraphclones.c (cgraph_node::materialize_clone): Do not do it here.
* cgraphunit.c (cgraph_node::expand): And here.
2021-03-31 Martin Liska <mliska@suse.cz>
* ipa-modref.c (analyze_ssa_name_flags): Fix coding style
and one negated condition.
2021-03-31 Jakub Jelinek <jakub@redhat.com>
Richard Sandiford <richard.sandiford@arm.com>
PR target/99813
* config/aarch64/aarch64.md (*add<mode>3_poly_1): Swap Uai and Uav
constraints on operands[2] and similarly 0 and rk constraints
on operands[1] corresponding to that.
2021-03-31 Jakub Jelinek <jakub@redhat.com>
PR bootstrap/98860
* configure.ac (HAVE_LD_BROKEN_PE_DWARF5): New AC_DEFINE if PECOFF
linker doesn't support DWARF sections new in DWARF5.
* config/i386/i386-options.c (ix86_option_override_internal): Default
to dwarf_version 4 if HAVE_LD_BROKEN_PE_DWARF5 for TARGET_PECOFF
targets.
* config.in: Regenerated.
* configure: Regenerated.
2021-03-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/99820
* config/aarch64/aarch64.c (aarch64_analyze_loop_vinfo): Check for
available issue_info before using it.
2021-03-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/99822
* config/aarch64/aarch64.md (sub<mode>3_compare1_imm): Do not allow zero
in operand 1.
2021-03-30 Xionghu Luo <luoxhu@linux.ibm.com>
PR target/99718
* config/rs6000/altivec.md (altivec_lvsl_reg): Change to ...
(altivec_lvsl_reg_<mode>): ... this.
(altivec_lvsr_reg): Change to ...
(altivec_lvsr_reg_<mode>): ... this.
* config/rs6000/predicates.md (vec_set_index_operand): New.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Enable 32bit variable vec_insert for all TARGET_VSX.
* config/rs6000/rs6000.c (rs6000_expand_vector_set_var_p9):
Enable 32bit variable vec_insert for p9 and above.
(rs6000_expand_vector_set_var_p8): Rename to ...
(rs6000_expand_vector_set_var_p7): ... this.
(rs6000_expand_vector_set): Use TARGET_VSX and adjust assert
position.
* config/rs6000/vector.md (vec_set<mode>): Use vec_set_index_operand.
* config/rs6000/vsx.md (xl_len_r): Use gen_altivec_lvsl_reg_di and
gen_altivec_lvsr_reg_di.
2021-03-30 H.J. Lu <hjl.tools@gmail.com>
PR target/99744
* config/i386/ia32intrin.h (__rdtsc): Defined as macro.
(__rdtscp): Likewise.
2021-03-30 Tamar Christina <tamar.christina@arm.com>
PR tree-optimization/99825
* tree-vect-slp-patterns.c (vect_check_evenodd_blend):
Reject non-mult 2 lanes.
2021-03-30 Richard Earnshaw <rearnsha@arm.com>
PR target/99773
* config/arm/arm.c (arm_file_start): Fix emission of
Tag_ABI_VFP_args attribute.
2021-03-30 Richard Biener <rguenther@suse.de>
PR tree-optimization/99824
* stor-layout.c (set_min_and_max_values_for_integral_type):
Assert the precision is within the bounds of
WIDE_INT_MAX_PRECISION.
* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Use
the outermost component ref only to lower the access size
and initialize that from the access type.
2021-03-30 Richard Sandiford <richard.sandiford@arm.com>
PR target/98136
* config/aarch64/aarch64.md (mov<mode>): Pass multi-instruction
CONST_INTs to aarch64_expand_mov_immediate when called after RA.
2021-03-30 Mihailo Stojanovic <mihailo.stojanovic@typhoon-hil.com>
* config/aarch64/aarch64.md
(<optab>_trunc<fcvt_target><GPI:mode>2): Set the "arch"
attribute to disambiguate between SIMD and FP variants of the
instruction.
2021-03-29 Jan Hubicka <hubicka@ucw.cz>
* ipa-modref.c (merge_call_lhs_flags): Correct handling of deref.
(analyze_ssa_name_flags): Fix typo in comment.
2021-03-29 Alex Coplan <alex.coplan@arm.com>
PR target/99216
* config/aarch64/aarch64-sve-builtins.cc
(function_builder::add_function): Add placeholder_p argument, use
placeholder decls if this is set.
(function_builder::add_unique_function): Instead of conditionally adding
direct overloads, unconditionally add either a direct overload or a
placeholder.
(function_builder::add_overloaded_function): Set placeholder_p if we're
using C++ overloads. Use the obstack for string storage instead
of relying on the tree nodes.
(function_builder::add_overloaded_functions): Don't return early for
m_direct_overloads: we need to add placeholders.
* config/aarch64/aarch64-sve-builtins.h
(function_builder::add_function): Add placeholder_p argument.
2021-03-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/99807
* tree-vect-slp.c (vect_slp_analyze_node_operations_1): Move
assert below VEC_PERM handling.
2021-03-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/99037
* config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Use
aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern
matching const_int 0.
(move_lo_quad_internal_be_<mode>): Likewise.
(move_lo_quad_<mode>): Update for the above.
* config/aarch64/iterators.md (VQ_2E): Delete.
2021-03-29 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/99777
* fold-const.c (extract_muldiv_1): For conversions, punt on casts from
types other than scalar integral types.
2021-03-28 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/rs6000.c (rs6000_output_dwarf_dtprel): Do not add
XCOFF TLS reloc decorations.
2021-03-28 Gerald Pfeifer <gerald@pfeifer.com>
* doc/analyzer.texi (Analyzer Internals): Update link to
"A Memory Model for Static Analysis of C Programs".
2021-03-26 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/aix.h (ADJUST_FIELD_ALIGN): Call function.
* config/rs6000/rs6000-protos.h (rs6000_special_adjust_field_align):
Declare.
* config/rs6000/rs6000.c (rs6000_special_adjust_field_align): New.
(rs6000_special_round_type_align): Recursively check innermost first
field.
2021-03-26 Jakub Jelinek <jakub@redhat.com>
PR debug/99334
* dwarf2out.h (struct dw_fde_node): Add rule18 member.
* dwarf2cfi.c (dwarf2out_frame_debug_expr): When handling (set hfp sp)
assignment with drap_reg active, queue reg save for hfp with offset 0
and flush queued reg saves. When handling a push with rule18,
defer queueing reg save for hfp and just assert the offset is 0.
(scan_trace): Assert that fde->rule18 is false.
2021-03-26 Vladimir Makarov <vmakarov@redhat.com>
PR target/99766
* ira-costs.c (record_reg_classes): Put case with
CT_RELAXED_MEMORY adjacent to one with CT_MEMORY.
* ira.c (ira_setup_alts): Ditto.
* lra-constraints.c (process_alt_operands): Ditto.
* recog.c (asm_operand_ok): Ditto.
* reload.c (find_reloads): Ditto.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-protos.h
(cpu_addrcost_table::post_modify_ld3_st3): New member variable.
(cpu_addrcost_table::post_modify_ld4_st4): Likewise.
* config/aarch64/aarch64.c (generic_addrcost_table): Update
accordingly, using the same costs as for post_modify.
(exynosm1_addrcost_table, xgene1_addrcost_table): Likewise.
(thunderx2t99_addrcost_table, thunderx3t110_addrcost_table):
(tsv110_addrcost_table, qdf24xx_addrcost_table): Likewise.
(a64fx_addrcost_table): Likewise.
(neoversev1_addrcost_table): New.
(neoversev1_tunings): Use neoversev1_addrcost_table.
(aarch64_address_cost): Use the new post_modify costs for CImode
and XImode.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.opt
(-param=aarch64-loop-vect-issue-rate-niters=): New parameter.
* doc/invoke.texi: Document it.
* config/aarch64/aarch64-protos.h (aarch64_base_vec_issue_info)
(aarch64_scalar_vec_issue_info, aarch64_simd_vec_issue_info)
(aarch64_advsimd_vec_issue_info, aarch64_sve_vec_issue_info)
(aarch64_vec_issue_info): New structures.
(cpu_vector_cost): Write comments above the variables rather
than to the side.
(cpu_vector_cost::issue_info): New member variable.
* config/aarch64/aarch64.c: Include gimple-pretty-print.h
and tree-ssa-loop-niter.h.
(generic_vector_cost, a64fx_vector_cost, qdf24xx_vector_cost)
(thunderx_vector_cost, tsv110_vector_cost, cortexa57_vector_cost)
(exynosm1_vector_cost, xgene1_vector_cost, thunderx2t99_vector_cost)
(thunderx3t110_vector_cost): Initialize issue_info to null.
(neoversev1_scalar_issue_info, neoversev1_advsimd_issue_info)
(neoversev1_sve_issue_info, neoversev1_vec_issue_info): New structures.
(neoversev1_vector_cost): Use them.
(aarch64_vec_op_count, aarch64_sve_op_count): New structures.
(aarch64_vector_costs::saw_sve_only_op): New member variable.
(aarch64_vector_costs::num_vector_iterations): Likewise.
(aarch64_vector_costs::scalar_ops): Likewise.
(aarch64_vector_costs::advsimd_ops): Likewise.
(aarch64_vector_costs::sve_ops): Likewise.
(aarch64_vector_costs::seen_loads): Likewise.
(aarch64_simd_vec_costs_for_flags): New function.
(aarch64_analyze_loop_vinfo): Initialize num_vector_iterations.
Count the number of predicate operations required by SVE WHILE
instructions.
(aarch64_comparison_type, aarch64_multiply_add_p): New functions.
(aarch64_sve_only_stmt_p, aarch64_in_loop_reduction_latency): Likewise.
(aarch64_count_ops): Likewise.
(aarch64_add_stmt_cost): Record whether see an SVE operation
that cannot currently be implementing using Advanced SIMD.
Record issue information about the scalar, Advanced SIMD
and (where relevant) SVE versions of a loop.
(aarch64_vec_op_count::dump): New function.
(aarch64_sve_op_count::dump): Likewise.
(aarch64_estimate_min_cycles_per_iter): Likewise.
(aarch64_adjust_body_cost): If issue information is available,
try to compare the issue rates of the various loop implementations
and increase or decrease the vector body cost accordingly.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.c (aarch64_detect_vector_stmt_subtype):
Assume a zero cost for induction phis.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.c (aarch64_embedded_comparison_type): New
function.
(aarch64_adjust_stmt_cost): Add the costs of embedded scalar and
vector comparisons.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.c (aarch64_detect_scalar_stmt_subtype):
New function.
(aarch64_add_stmt_cost): Call it.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-tuning-flags.def (matched_vector_throughput):
New tuning parameter.
* config/aarch64/aarch64.c (neoversev1_tunings): Use it.
(aarch64_estimated_sve_vq): New function.
(aarch64_vector_costs::analyzed_vinfo): New member variable.
(aarch64_vector_costs::is_loop): Likewise.
(aarch64_vector_costs::unrolled_advsimd_niters): Likewise.
(aarch64_vector_costs::unrolled_advsimd_stmts): Likewise.
(aarch64_record_potential_advsimd_unrolling): New function.
(aarch64_analyze_loop_vinfo, aarch64_analyze_bb_vinfo): Likewise.
(aarch64_add_stmt_cost): Call aarch64_analyze_loop_vinfo or
aarch64_analyze_bb_vinfo on the first use of a costs structure.
Detect whether we're vectorizing a loop for SVE that might be
completely unrolled if it used Advanced SIMD instead.
(aarch64_adjust_body_cost_for_latency): New function.
(aarch64_finish_cost): Call it.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.c (aarch64_vector_costs): New structure.
(aarch64_init_cost): New function.
(aarch64_add_stmt_cost): Use aarch64_vector_costs instead of
the default unsigned[3].
(aarch64_finish_cost, aarch64_destroy_cost_data): New functions.
(TARGET_VECTORIZE_INIT_COST): Override.
(TARGET_VECTORIZE_FINISH_COST): Likewise.
(TARGET_VECTORIZE_DESTROY_COST_DATA): Likewise.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.c (neoversev1_advsimd_vector_cost)
(neoversev1_sve_vector_cost): New cost structures.
(neoversev1_vector_cost): Likewise.
(neoversev1_tunings): Use them. Enable use_new_vector_costs.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-protos.h
(sve_vec_cost::scatter_store_elt_cost): New member variable.
* config/aarch64/aarch64.c (generic_sve_vector_cost): Update
accordingly, taking the cost from the cost of a scalar_store.
(a64fx_sve_vector_cost): Likewise.
(aarch64_detect_vector_stmt_subtype): Detect scatter stores.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-protos.h
(simd_vec_cost::store_elt_extra_cost): New member variable.
* config/aarch64/aarch64.c (generic_advsimd_vector_cost): Update
accordingly, using the vec_to_scalar cost for the new field.
(generic_sve_vector_cost, a64fx_advsimd_vector_cost): Likewise.
(a64fx_sve_vector_cost, qdf24xx_advsimd_vector_cost): Likewise.
(thunderx_advsimd_vector_cost, tsv110_advsimd_vector_cost): Likewise.
(cortexa57_advsimd_vector_cost, exynosm1_advsimd_vector_cost)
(xgene1_advsimd_vector_cost, thunderx2t99_advsimd_vector_cost)
(thunderx3t110_advsimd_vector_cost): Likewise.
(aarch64_detect_vector_stmt_subtype): Detect single-element stores.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-protos.h (simd_vec_cost::ld2_st2_permute_cost)
(simd_vec_cost::ld3_st3_permute_cost): New member variables.
(simd_vec_cost::ld4_st4_permute_cost): Likewise.
* config/aarch64/aarch64.c (generic_advsimd_vector_cost): Update
accordingly, using zero for the new costs.
(generic_sve_vector_cost, a64fx_advsimd_vector_cost): Likewise.
(a64fx_sve_vector_cost, qdf24xx_advsimd_vector_cost): Likewise.
(thunderx_advsimd_vector_cost, tsv110_advsimd_vector_cost): Likewise.
(cortexa57_advsimd_vector_cost, exynosm1_advsimd_vector_cost)
(xgene1_advsimd_vector_cost, thunderx2t99_advsimd_vector_cost)
(thunderx3t110_advsimd_vector_cost): Likewise.
(aarch64_ld234_st234_vectors): New function.
(aarch64_adjust_stmt_cost): Likewise.
(aarch64_add_stmt_cost): Call aarch64_adjust_stmt_cost if using
the new vector costs.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-protos.h (sve_vec_cost): Turn into a
derived class of simd_vec_cost. Add information about CLAST[AB]
and FADDA instructions.
* config/aarch64/aarch64.c (generic_sve_vector_cost): Update
accordingly, using the vec_to_scalar costs for the new fields.
(a64fx_sve_vector_cost): Likewise.
(aarch64_reduc_type): New function.
(aarch64_sve_in_loop_reduction_latency): Likewise.
(aarch64_detect_vector_stmt_subtype): Take a vinfo parameter.
Use aarch64_sve_in_loop_reduction_latency to handle SVE reductions
that occur in the loop body.
(aarch64_add_stmt_cost): Update call accordingly.
2021-03-26 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-tuning-flags.def (use_new_vector_costs):
New tuning flag.
* config/aarch64/aarch64-protos.h (simd_vec_cost): Put comments
above the fields rather than to the right.
(simd_vec_cost::reduc_i8_cost): New member variable.
(simd_vec_cost::reduc_i16_cost): Likewise.
(simd_vec_cost::reduc_i32_cost): Likewise.
(simd_vec_cost::reduc_i64_cost): Likewise.
(simd_vec_cost::reduc_f16_cost): Likewise.
(simd_vec_cost::reduc_f32_cost): Likewise.
(simd_vec_cost::reduc_f64_cost): Likewise.
* config/aarch64/aarch64.c (generic_advsimd_vector_cost): Update
accordingly, using the vec_to_scalar_cost for the new fields.
(generic_sve_vector_cost, a64fx_advsimd_vector_cost): Likewise.
(a64fx_sve_vector_cost, qdf24xx_advsimd_vector_cost): Likewise.
(thunderx_advsimd_vector_cost, tsv110_advsimd_vector_cost): Likewise.
(cortexa57_advsimd_vector_cost, exynosm1_advsimd_vector_cost)
(xgene1_advsimd_vector_cost, thunderx2t99_advsimd_vector_cost)
(thunderx3t110_advsimd_vector_cost): Likewise.
(aarch64_use_new_vector_costs_p): New function.
(aarch64_simd_vec_costs): New function, split out from...
(aarch64_builtin_vectorization_cost): ...here.
(aarch64_is_reduction): New function.
(aarch64_detect_vector_stmt_subtype): Likewise.
(aarch64_add_stmt_cost): Call aarch64_detect_vector_stmt_subtype if
using the new vector costs.
2021-03-26 Iain Buclaw <ibuclaw@gdcproject.org>
PR ipa/99466
* tree-emutls.c (get_emutls_init_templ_addr): Mark initializer of weak
TLS declarations as public.
2021-03-26 Iain Buclaw <ibuclaw@gdcproject.org>
* config/aarch64/aarch64-d.c (IN_TARGET_CODE): Define.
* config/arm/arm-d.c (IN_TARGET_CODE): Likewise.
* config/i386/i386-d.c (IN_TARGET_CODE): Likewise.
* config/mips/mips-d.c (IN_TARGET_CODE): Likewise.
* config/pa/pa-d.c (IN_TARGET_CODE): Likewise.
* config/riscv/riscv-d.c (IN_TARGET_CODE): Likewise.
* config/rs6000/rs6000-d.c (IN_TARGET_CODE): Likewise.
* config/s390/s390-d.c (IN_TARGET_CODE): Likewise.
* config/sparc/sparc-d.c (IN_TARGET_CODE): Likewise.
2021-03-26 Iain Buclaw <ibuclaw@gdcproject.org>
PR d/91595
* config.gcc (*-*-cygwin*): Add winnt-d.o
(*-*-mingw*): Likewise.
* config/i386/cygwin.h (EXTRA_TARGET_D_OS_VERSIONS): New macro.
* config/i386/mingw32.h (EXTRA_TARGET_D_OS_VERSIONS): Likewise.
* config/i386/t-cygming: Add winnt-d.o.
* config/i386/winnt-d.c: New file.
2021-03-26 Iain Buclaw <ibuclaw@gdcproject.org>
* config/freebsd-d.c: Include memmodel.h.
2021-03-26 Iain Buclaw <ibuclaw@gdcproject.org>
PR d/99691
* config.gcc (*-*-openbsd*): Add openbsd-d.o.
* config/t-openbsd: Add openbsd-d.o.
* config/openbsd-d.c: New file.
2021-03-25 Stam Markianos-Wright <stam.markianos-wright@arm.com>
PR tree-optimization/96974
* tree-vect-stmts.c (vect_get_vector_types_for_stmt): Replace assert
with graceful exit.
2021-03-25 H.J. Lu <hjl.tools@gmail.com>
Revert:
2021-03-25 H.J. Lu <hjl.tools@gmail.com>
PR target/98209
PR target/99744
* config/i386/i386.c (ix86_can_inline_p): Don't check ISA for
always_inline in system headers.
2021-03-25 Kewen Lin <linkw@linux.ibm.com>
* tree-vect-loop.c (vect_model_reduction_cost): Init inside_cost.
2021-03-25 Jakub Jelinek <jakub@redhat.com>
PR c++/99565
* tree-core.h (enum operand_equal_flag): Add OEP_ADDRESS_OF_SAME_FIELD.
* fold-const.c (operand_compare::operand_equal_p): Don't compare
field offsets if OEP_ADDRESS_OF_SAME_FIELD.
2021-03-25 H.J. Lu <hjl.tools@gmail.com>
PR target/98209
PR target/99744
* config/i386/i386.c (ix86_can_inline_p): Don't check ISA for
always_inline in system headers.
2021-03-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/99746
* tree-vect-slp-patterns.c (complex_pattern::build): Do not mark
the scalar stmt as patterned. Instead set up required things
manually.
2021-03-25 Xionghu Luo <luoxhu@linux.ibm.com>
* config/rs6000/rs6000.c (power8_costs): Change l2 cache
from 256 to 512.
2021-03-24 Martin Liska <mliska@suse.cz>
PR target/99753
* common/config/i386/i386-common.c (ARRAY_SIZE): Fix off-by-one
error.
* config/i386/i386-options.c (ix86_option_override_internal):
Add run-time assert.
2021-03-24 Martin Jambor <mjambor@suse.cz>
PR ipa/99122
* ipa-cp.c (initialize_node_lattices): Mark as bottom all
parameters with unknown type.
(ipacp_value_safe_for_type): New function.
(propagate_vals_across_arith_jfunc): Verify that the constant type
can be used for a type of the formal parameter.
(propagate_vals_across_ancestor): Likewise.
(propagate_scalar_across_jump_function): Likewise. Pass the type
also to propagate_vals_across_ancestor.
2021-03-24 Christophe Lyon <christophe.lyon@linaro.org>
PR target/99727
* config/arm/mve.md (movmisalign<mode>_mve_store): Use Ux
constraint.
(movmisalign<mode>_mve_load): Likewise.
2021-03-24 Jakub Jelinek <jakub@redhat.com>
PR target/99724
* config/arm/vec-common.md (one_cmpl<mode>2, neg<mode>2,
movmisalign<mode>): Disable expanders for TARGET_REALLY_IWMMXT.
2021-03-24 Alexandre Oliva <oliva@adacore.com>
* doc/sourcebuild.texi (sysconf): New effective target.
2021-03-24 Alexandre Oliva <oliva@adacore.com>
* config/i386/predicates.md (reg_or_const_vec_operand): New.
* config/i386/sse.md (ssse3_pshufbv8qi3): Add an expander for
the now *-prefixed insn_and_split, turn the splitter const vec
into an input for the insn, making it an ignored immediate for
non-split cases, and loaded into the scratch register
otherwise.
2021-03-23 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99581
* config/aarch64/constraints.md (Utq, UOb, UOh, UOw, UOd, UOty):
Use define_relaxed_memory_constraint for them.
2021-03-23 Iain Sandoe <iain@sandoe.co.uk>
PR target/99733
* config/host-darwin.c (darwin_gt_pch_use_address): Add a
colon to the diagnostic message.
2021-03-23 Ilya Leoshkevich <iii@linux.ibm.com>
* fwprop.c (fwprop_propagation::fwprop_propagation): Look at
set_info's uses.
(try_fwprop_subst_note): Use set_info instead of insn_info.
(try_fwprop_subst_pattern): Likewise.
(try_fwprop_subst_notes): Likewise.
(try_fwprop_subst): Likewise.
(forward_propagate_subreg): Likewise.
(forward_propagate_and_simplify): Likewise.
(forward_propagate_into): Likewise.
* rtl-ssa/accesses.h (set_info::single_nondebug_use) New
method.
(set_info::single_nondebug_insn_use): Likewise.
(set_info::single_phi_use): Likewise.
* rtl-ssa/member-fns.inl (set_info::single_nondebug_use) New
method.
(set_info::single_nondebug_insn_use): Likewise.
(set_info::single_phi_use): Likewise.
2021-03-23 Christophe Lyon <christophe.lyon@linaro.org>
* doc/sourcebuild.texi (arm_dsp_ok, arm_dsp): Document.
2021-03-23 Jakub Jelinek <jakub@redhat.com>
PR target/99540
* config/aarch64/aarch64.c (aarch64_add_offset): Tell
expand_mult to perform an unsigned rather than a signed
multiplication.
2021-03-23 H.J. Lu <hjl.tools@gmail.com>
PR target/99704
* config/i386/cpuid.h (__cpuid): Add __volatile__.
(__cpuid_count): Likewise.
2021-03-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/99721
* tree-vect-slp.c (vect_slp_analyze_node_operations):
Make sure we can schedule the node.
2021-03-23 Marcus Comstedt <marcus@mc.pp.se>
* config/riscv/riscv.c (riscv_subword): Take endianness into
account when calculating the byte offset.
2021-03-23 Marcus Comstedt <marcus@mc.pp.se>
* config/riscv/predicates.md (subreg_lowpart_operator): New predicate
* config/riscv/riscv.md (*addsi3_extended2, *subsi3_extended2)
(*negsi2_extended2, *mulsi3_extended2, *<optab>si3_mask)
(*<optab>si3_mask_1, *<optab>di3_mask, *<optab>di3_mask_1)
(*<optab>si3_extend_mask, *<optab>si3_extend_mask_1): Use
new predicate "subreg_lowpart_operator"
2021-03-23 Marcus Comstedt <marcus@mc.pp.se>
* config/riscv/riscv.c (riscv_swap_instruction): New function
to byteswap an SImode rtx containing an instruction.
(riscv_trampoline_init): Byteswap the generated instructions
when needed.
2021-03-23 Marcus Comstedt <marcus@mc.pp.se>
* common/config/riscv/riscv-common.c
(TARGET_DEFAULT_TARGET_FLAGS): Set default endianness.
* config.gcc (riscv32be-*, riscv64be-*): Set
TARGET_BIG_ENDIAN_DEFAULT to 1.
* config/riscv/elf.h (LINK_SPEC): Change -melf* value
depending on default endianness.
* config/riscv/freebsd.h (LINK_SPEC): Likewise.
* config/riscv/linux.h (LINK_SPEC): Likewise.
* config/riscv/riscv.c (TARGET_DEFAULT_TARGET_FLAGS): Set
default endianness.
* config/riscv/riscv.h (DEFAULT_ENDIAN_SPEC): New macro.
2021-03-23 Marcus Comstedt <marcus@mc.pp.se>
* config/riscv/elf.h (LINK_SPEC): Pass linker endianness flag.
* config/riscv/freebsd.h (LINK_SPEC): Likewise.
* config/riscv/linux.h (LINK_SPEC): Likewise.
* config/riscv/riscv.h (ASM_SPEC): Pass -mbig-endian and
-mlittle-endian.
(BYTES_BIG_ENDIAN): Handle big endian.
(WORDS_BIG_ENDIAN): Define to BYTES_BIG_ENDIAN.
* config/riscv/riscv.opt (-mbig-endian, -mlittle-endian): New
options.
* doc/invoke.texi (-mbig-endian, -mlittle-endian): Document.
2021-03-23 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
* regcprop.c (find_oldest_value_reg): Ask target whether
different mode is fine for replacement register.
2021-03-23 Aldy Hernandez <aldyh@redhat.com>
PR tree-optimization/99296
* value-range.cc (irange::irange_set_1bit_anti_range): New.
(irange::irange_set_anti_range): Call irange_set_1bit_anti_range
* value-range.h (irange::irange_set_1bit_anti_range): New.
2021-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99581
* config/aarch64/constraints.md (UtQ): Use
define_relaxed_memory_constraint for it.
* doc/md.texi (define_relaxed_memory_constraint): Describe it.
* genoutput.c (main): Process DEFINE_RELAXED_MEMORY_CONSTRAINT.
* genpreds.c (constraint_data): Add bitfield is_relaxed_memory.
(have_relaxed_memory_constraints): New static var.
(relaxed_memory_start, relaxed_memory_end): Ditto.
(add_constraint): Add arg is_relaxed_memory. Check name for
relaxed memory. Set up is_relaxed_memory in constraint_data and
have_relaxed_memory_constraints. Adjust calls.
(choose_enum_order): Process relaxed memory.
(write_tm_preds_h): Ditto.
(main): Process DEFINE_RELAXED_MEMORY_CONSTRAINT.
* gensupport.c (process_rtx): Process DEFINE_RELAXED_MEMORY_CONSTRAINT.
* ira-costs.c (record_reg_classes): Process CT_RELAXED_MEMORY.
* ira-lives.c (single_reg_class): Use
insn_extra_relaxed_memory_constraint.
* ira.c (ira_setup_alts): CT_RELAXED_MEMORY.
* lra-constraints.c (valid_address_p): Use
insn_extra_relaxed_memory_constraint instead of other memory
constraints.
(process_alt_operands): Process CT_RELAXED_MEMORY.
(curr_insn_transform): Use insn_extra_relaxed_memory_constraint.
* recog.c (asm_operand_ok, preprocess_constraints): Process
CT_RELAXED_MEMORY.
* reload.c (find_reloads): Ditto.
* rtl.def (DEFINE_RELAXED_MEMORY_CONSTRAINT): New.
* stmt.c (parse_input_constraint): Use
insn_extra_relaxed_memory_constraint.
2021-03-22 Segher Boessenkool <segher@kernel.crashing.org>
PR target/97926
* ubsan.c (ubsan_instrument_float_cast): Don't test for unordered if
there are no NaNs.
2021-03-22 Alex Coplan <alex.coplan@arm.com>
PR target/97252
* config/arm/arm-protos.h (neon_make_constant): Add generate
argument to guard emitting insns, default to true.
* config/arm/arm.c (arm_legitimate_constant_p_1): Reject
CONST_VECTORs which neon_make_constant can't handle.
(neon_vdup_constant): Add generate argument, avoid emitting
insns if it's not set.
(neon_make_constant): Plumb new generate argument through.
* config/arm/constraints.md (Ui): New. Use it...
* config/arm/mve.md (*mve_mov<mode>): ... here.
* config/arm/vec-common.md (movv8hf): Use neon_make_constant to
synthesize constants.
2021-03-22 Richard Biener <rguenther@suse.de>
* debug.h: Add deprecation warning.
2021-03-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/99694
* tree-ssa-sccvn.c (visit_phi): Ignore edges with the
PHI result.
2021-03-22 Kito Cheng <kito.cheng@sifive.com>
PR target/99702
* config/riscv/riscv.c (riscv_expand_block_move): Get RTL value
after type checking.
2021-03-22 Jakub Jelinek <jakub@redhat.com>
PR debug/99562
PR debug/66728
* dwarf2out.c (get_full_len): Use get_precision rather than
min_precision.
(add_const_value_attribute): Make sure add_AT_wide argument has
precision prec rather than some very wide one.
2021-03-22 Kewen Lin <linkw@linux.ibm.com>
* config/rs6000/rs6000.md (*rotldi3_insert_sf,
*mov<SFDF:mode><SFDF2:mode>cc_p9, floatsi<mode>2_lfiwax,
floatsi<mode>2_lfiwax_mem, floatunssi<mode>2_lfiwzx,
floatunssi<mode>2_lfiwzx_mem, *floatsidf2_internal,
*floatunssidf2_internal, fix_trunc<mode>si2_stfiwx,
fix_trunc<mode>si2_internal, fixuns_trunc<mode>si2_stfiwx,
*round32<mode>2_fprs, *roundu32<mode>2_fprs,
*fix_trunc<mode>si2_internal): Fix empty split condition.
* config/rs6000/vsx.md (*vsx_le_undo_permute_<mode>,
vsx_reduc_<VEC_reduc_name>_v2df, vsx_reduc_<VEC_reduc_name>_v4sf,
*vsx_reduc_<VEC_reduc_name>_v2df_scalar,
*vsx_reduc_<VEC_reduc_name>_v4sf_scalar): Likewise.
2021-03-22 Xionghu Luo <luoxhu@linux.ibm.com>
PR target/98914
* config/rs6000/rs6000.c (rs6000_expand_vector_set_var_p9):
Convert idx to DImode.
(rs6000_expand_vector_set_var_p8): Likewise.
2021-03-21 Jakub Jelinek <jakub@redhat.com>
PR debug/99388
* dwarf2out.c (insert_float): Change return type from void to
unsigned, handle GET_MODE_SIZE (mode) == 2 and return element size.
(mem_loc_descriptor, loc_descriptor, add_const_value_attribute):
Adjust callers.
2021-03-20 H.J. Lu <hjl.tools@gmail.com>
PR target/99679
* config/i386/i386.c (construct_container): Check cfun != NULL
before accessing silent_p.
2021-03-20 Ahamed Husni <ahamedhusni73@gmail.com>
* asan.c: Fix typos in comments.
2021-03-20 Vladimir N. Makarov <vmakarov@redhat.com>
PR rtl-optimization/99680
* lra-constraints.c (skip_contraint_modifiers): Rename to skip_constraint_modifiers.
(process_address_1): Check empty constraint before using
CONSTRAINT_LEN.
2021-03-19 Pat Haugen <pthaugen@linux.ibm.com>
* config/rs6000/rs6000.c (power10_cost): New.
(rs6000_option_override_internal): Set Power10 costs.
(rs6000_issue_rate): Set Power10 issue rate.
* config/rs6000/power10.md: Rewrite for Power10.
2021-03-19 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99663
* lra-constraints.c (process_address_1): Don't use unknown
constraint for address constraint.
2021-03-19 Iain Sandoe <iain@sandoe.co.uk>
PR target/99661
* config.gcc (powerpc-*-darwin8): Delete the reference to
the now removed darwin8.h.
2021-03-19 Olivier Hainque <hainque@adacore.com>
PR target/99660
* config/vxworksae.h (VX_CPU_PREFIX): Define.
2021-03-19 John David Anglin <danglin@gcc.gnu.org>
* config/pa/pa.c (import_milli): Use memcpy instead of strncpy.
2021-03-19 Tamar Christina <tamar.christina@arm.com>
PR tree-optimization/99656
* tree-vect-slp-patterns.c (linear_loads_p,
complex_add_pattern::matches, is_eq_or_top,
vect_validate_multiplication, complex_mul_pattern::matches,
complex_fms_pattern::matches): Remove complex_perm_kinds_t.
* tree-vectorizer.h: (complex_load_perm_t): Removed.
(slp_tree_to_load_perm_map_t): Use complex_perm_kinds_t instead of
complex_load_perm_t.
2021-03-19 H.J. Lu <hjl.tools@gmail.com>
PR target/99652
* config/i386/i386-options.c (ix86_init_machine_status): Set
silent_p to true.
* config/i386/i386.c (init_cumulative_args): Set silent_p to
false.
(construct_container): Return early for return and argument
errors if silent_p is true.
* config/i386/i386.h (machine_function): Add silent_p.
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR target/99593
* config/arm/constraints.md (Ds): New constraint.
* config/arm/vec-common.md (mve_vshlq_<supf><mode>): Use w,Ds
constraint instead of w,Dm.
2021-03-19 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn.c (gcn_parse_amdgpu_hsa_kernel_attribute): Fix quotes
in error message.
2021-03-19 Eric Botcazou <ebotcazou@adacore.com>
PR middle-end/99641
* fold-const.c (native_encode_initializer) <CONSTRUCTOR>: For an
array type, do the computation of the current position in sizetype.
2021-03-18 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99422
* lra-constraints.c (process_address_1): Use lookup_constraint
only for a single constraint.
2021-03-18 Martin Sebor <msebor@redhat.com>
PR middle-end/99502
* gimple-array-bounds.cc (inbounds_vbase_memaccess_p): Rename...
(inbounds_memaccess_p): ...to this. Check the ending offset of
the accessed member.
2021-03-18 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn.c (gcn_parse_amdgpu_hsa_kernel_attribute): Add %< and
%> quote markers to error messages.
(gcn_goacc_validate_dims): Likewise.
(gcn_conditional_register_usage): Remove exclaimation mark from error
message.
(gcn_vectorize_vec_perm_const): Ensure perm is fully uninitialized.
2021-03-18 Jan Hubicka <hubicka@ucw.cz>
* config/i386/x86-tune-costs.h (struct processor_costs): Fix costs of
integer divides1.
2021-03-18 Sinan Lin <sinan@isrc.iscas.ac.cn>
Kito Cheng <kito.cheng@sifive.com>
* config/riscv/riscv.c (riscv_block_move_straight): Change type
to unsigned HOST_WIDE_INT for parameter and local variable with
HOST_WIDE_INT type.
(riscv_adjust_block_mem): Ditto.
(riscv_block_move_loop): Ditto.
(riscv_expand_block_move): Ditto.
2021-03-18 Nick Clifton <nickc@redhat.com>
* config/v850/v850.c (construct_restore_jr): Increase static
buffer size.
(construct_save_jarl): Likewise.
* config/v850/v850.h (DWARF2_DEBUGGING_INFO): Define.
2021-03-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_adjust_generic_arch_tuning): Define.
(aarch64_override_options_internal): Use it.
(generic_tunings): Add AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS to
tune_flags.
2021-03-17 Sandra Loosemore <sandra@codesourcery.com>
* config/nios2/nios2.c (nios2_custom_check_insns): Clean up
error message format issues.
(nios2_option_override): Likewise.
(nios2_expand_fpu_builtin): Likewise.
(nios2_init_custom_builtins): Adjust to avoid bogus strncpy
truncation warning.
(nios2_expand_custom_builtin): More error message format fixes.
(nios2_expand_rdwrctl_builtin): Likewise.
(nios2_expand_rdprs_builtin): Likewise.
(nios2_expand_eni_builtin): Likewise.
(nios2_expand_builtin): Likewise.
(nios2_register_custom_code): Likewise.
(nios2_valid_target_attribute_rec): Likewise.
(nios2_add_insn_asm): Fix uninitialized variable warning.
2021-03-17 Jan Hubicka <jh@suse.cz>
* config/i386/x86-tune-costs.h (struct processor_costs): Update costs
of gather to match reality.
* config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Enable for znver3.
2021-03-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-builtins.c (aarch64_expand_rng_builtin): Use EQ
to compare against CC_REG rather than NE.
2021-03-17 H.J. Lu <hjl.tools@gmail.com>
PR target/99504
* config/i386/i386.c (ix86_force_load_from_GOT_p): Support
inline assembly statements.
(ix86_print_operand): Update 'P' handling for -fno-plt.
2021-03-17 Tamar Christina <tamar.christina@arm.com>
PR target/99542
* config/aarch64/aarch64.c
(aarch64_simd_clone_compute_vecsize_and_simdlen): Remove unused var.
2021-03-16 Segher Boessenkool <segher@kernel.crashing.org>
PR target/98092
* config/rs6000/predicates.md (branch_comparison_operator): Allow
ordered and unordered for CCFPmode, if flag_finite_math_only.
2021-03-16 Jakub Jelinek <jakub@redhat.com>
PR target/99600
* config/i386/i386-expand.c (ix86_split_lea_for_addr): Emit a MULT
rather than ASHIFT.
* config/i386/i386.md (mult by 1248 into ashift): New splitter.
2021-03-16 Martin Liska <mliska@suse.cz>
PR target/99592
* optc-save-gen.awk: Add flag_ipa_ra to exceptions for
cl_optimization_compare function.
2021-03-16 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/s390.c (f_constraint_p): Treat "fv" constraints
as "v".
2021-03-16 Jakub Jelinek <jakub@redhat.com>
PR target/99563
* config/i386/i386.h (struct machine_function): Add
has_explicit_vzeroupper bitfield.
* config/i386/i386-expand.c (ix86_expand_builtin): Set
cfun->machine->has_explicit_vzeroupper when expanding
IX86_BUILTIN_VZEROUPPER.
* config/i386/i386-features.c (rest_of_handle_insert_vzeroupper):
Do the mode switching only when TARGET_VZEROUPPER, expensive
optimizations turned on and not optimizing for size.
(pass_insert_vzeroupper::gate): Enable even when
cfun->machine->has_explicit_vzeroupper is set.
2021-03-16 Jakub Jelinek <jakub@redhat.com>
PR target/99542
* config/aarch64/aarch64.c
(aarch64_simd_clone_compute_vecsize_and_simdlen): If not a function
definition, walk TYPE_ARG_TYPES list if non-NULL for argument types
instead of DECL_ARGUMENTS. Ignore types for uniform arguments.
2021-03-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/98834
* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle missing
subsetting by truncating the access size.
2021-03-15 Jan Hubicka <hubicka@ucw.cz>
* config/i386/i386-options.c (processor_cost_table): Add znver3_cost.
* config/i386/x86-tune-costs.h (znver3_cost): New gobal variable; copy
of znver2_cost.
2021-03-15 Martin Liska <mliska@suse.cz>
* spellcheck.c: Add missing comma in initialization.
2021-03-14 Uroš Bizjak <ubizjak@gmail.com>
* config/i386/sse.md (*vec_extract<mode>): Merge alternative 0 with
alternative 2 and alternative 1 with alternative 3 using
YW register constraint.
(*vec_extract<PEXTR_MODE12:mode>_zext): Merge alternatives
using YW register constraint.
(*vec_extractv16qi_zext): Ditto.
(*vec_extractv4si): Merge alternatives 4 and 5
using Yw register constraint.
(*ssse3_palignr<mode>_perm): Use Yw instead of v for alternative 3.
2021-03-13 Martin Sebor <msebor@redhat.com>
PR tree-optimization/99489
* builtins.c (gimple_call_alloc_size): Fail gracefully when argument
is not a call statement.
2021-03-13 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/99544
* match.pd (X + (X << C) -> X * (1 + (1 << C))): Don't simplify
if for vector types multiplication can't be done in type's mode.
2021-03-12 Eric Botcazou <ebotcazou@adacore.com>
PR target/99422
* config/sparc/constraints.md (w): Rename to...
(W): ... this and ditch previous implementation.
* config/sparc/sparc.md (*movdi_insn_sp64): Replace W with m.
(*movdf_insn_sp64): Likewise.
(*mov<VM64:mode>_insn_sp64): Likewise.
* config/sparc/sync.md (*atomic_compare_and_swap<mode>_1): Replace
w with W.
(atomic_compare_and_swap_leon3_1): Likewise.
(*atomic_compare_and_swapdi_v8plus): Likewise.
* config/sparc/sparc.c (memory_ok_for_ldd): Remove useless test on
architecture and add missing address validity check during LRA.
2021-03-12 Tobias Burnus <tobias@codesourcery.com>
PR fortran/98858
* gimplify.c (omp_add_variable): Handle NULL_TREE as size
occuring for assumed-size arrays in use_device_{ptr,addr}.
2021-03-12 Jakub Jelinek <jakub@redhat.com>
PR target/99321
* config/i386/constraints.md (YW): New internal constraint.
* config/i386/sse.md (v_Yw): Add V4TI, V2TI, V1TI and TI cases.
(*<sse2_avx2>_<insn><mode>3<mask_name>,
*<sse2_avx2>_uavg<mode>3<mask_name>, *abs<mode>2,
*<s>mul<mode>3_highpart<mask_name>): Use <v_Yw> instead of v in
constraints.
(<sse2_avx2>_psadbw): Use YW instead of v in constraints.
(*avx2_pmaddwd, *sse2_pmaddwd, *<code>v8hi3, *<code>v16qi3,
avx2_pmaddubsw256, ssse3_pmaddubsw128): Merge last two alternatives
into one, use Yw instead of former x,v.
(ashr<mode>3, <insn><mode>3): Use <v_Yw> instead of x in constraints of
the last alternative.
(<sse2_avx2>_packsswb<mask_name>, <sse2_avx2>_packssdw<mask_name>,
<sse2_avx2>_packuswb<mask_name>, <sse4_1_avx2>_packusdw<mask_name>,
*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>, <ssse3_avx2>_palignr<mode>,
<ssse3_avx2>_pshufb<mode>3<mask_name>): Merge last two alternatives
into one, use <v_Yw> instead of former x,v.
(avx2_interleave_highv32qi<mask_name>,
vec_interleave_highv16qi<mask_name>): Use Yw instead of v in
constraints. Add && <mask_avx512bw_condition> to condition.
(avx2_interleave_lowv32qi<mask_name>,
vec_interleave_lowv16qi<mask_name>,
avx2_interleave_highv16hi<mask_name>,
vec_interleave_highv8hi<mask_name>,
avx2_interleave_lowv16hi<mask_name>, vec_interleave_lowv8hi<mask_name>,
avx2_pshuflw_1<mask_name>, sse2_pshuflw_1<mask_name>,
avx2_pshufhw_1<mask_name>, sse2_pshufhw_1<mask_name>,
avx2_<code>v16qiv16hi2<mask_name>, sse4_1_<code>v8qiv8hi2<mask_name>,
*sse4_1_<code>v8qiv8hi2<mask_name>_1, <sse2_avx2>_<insn><mode>3): Use
Yw instead of v in constraints.
* config/i386/mmx.md (Yv_Yw): New define_mode_attr.
(*mmx_<insn><mode>3, mmx_ashr<mode>3, mmx_<insn><mode>3): Use <Yv_Yw>
instead of Yv in constraints.
(*mmx_<insn><mode>3, *mmx_mulv4hi3, *mmx_smulv4hi3_highpart,
*mmx_umulv4hi3_highpart, *mmx_pmaddwd, *mmx_<code>v4hi3,
*mmx_<code>v8qi3, mmx_pack<s_trunsuffix>swb, mmx_packssdw,
mmx_punpckhbw, mmx_punpcklbw, mmx_punpckhwd, mmx_punpcklwd,
*mmx_uavgv8qi3, *mmx_uavgv4hi3, mmx_psadbw): Use Yw instead of Yv in
constraints.
(*mmx_pinsrw, *mmx_pinsrb, *mmx_pextrw, *mmx_pextrw_zext, *mmx_pextrb,
*mmx_pextrb_zext): Use YW instead of Yv in constraints.
(*mmx_eq<mode>3, mmx_gt<mode>3): Use x instead of Yv in constraints.
(mmx_andnot<mode>3, *mmx_<code><mode>3): Split last alternative into
two, one with just x, another isa avx512vl with v.
2021-03-12 Martin Liska <mliska@suse.cz>
* doc/invoke.texi: Add missing param documentation.
2021-03-11 David Malcolm <dmalcolm@redhat.com>
PR analyzer/96374
* Makefile.in (ANALYZER_OBJS): Add analyzer/feasible-graph.o and
analyzer/trimmed-graph.o.
* doc/analyzer.texi (Analyzer Paths): Rewrite description of
feasibility checking to reflect new implementation.
* doc/invoke.texi (-fdump-analyzer-feasibility): Document new
option.
* shortest-paths.h (shortest_paths::get_shortest_distance): New.
2021-03-11 David Malcolm <dmalcolm@redhat.com>
* digraph.cc (selftest::test_shortest_paths): Update
shortest_paths init for new param. Add test of
SPS_TO_GIVEN_TARGET.
* shortest-paths.h (enum shortest_path_sense): New.
(shortest_paths::shortest_paths): Add "sense" param.
Update for renamings. Generalize to use "sense" param.
(shortest_paths::get_shortest_path): Rename param.
(shortest_paths::m_sense): New field.
(shortest_paths::m_prev): Rename...
(shortest_paths::m_best_edge): ...to this.
(shortest_paths::get_shortest_path): Update for renamings.
Conditionalize flipping of path on sense of traversal.
2021-03-11 David Malcolm <dmalcolm@redhat.com>
* digraph.cc (selftest::test_shortest_paths): Add test coverage
for paths from B and C.
* shortest-paths.h (shortest_paths::shortest_paths): Handle
unreachable nodes, rather than asserting.
2021-03-11 David Edelsohn <dje.gcc@gmail.com>
PR target/99094
* config/rs6000/rs6000.c (rs6000_xcoff_file_start): Don't create
xcoff_tbss_section_name.
* config/rs6000/xcoff.h (ASM_OUTPUT_TLS_COMMON): Use .lcomm.
* xcoffout.c (xcoff_tbss_section_name): Delete.
* xcoffout.h (xcoff_tbss_section_name): Delete.
2021-03-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/99523
* tree-cfg.c (dump_function_to_file): Dump SSA names
w/o identifier to the decls section as well, not only those
without a VAR_DECL.
2021-03-11 Jakub Jelinek <jakub@redhat.com>
PR ipa/99517
* ipa-icf-gimple.c (func_checker::compare_gimple_call): For internal
function calls with lhs fail if the lhs don't have compatible types.
2021-03-11 Hans-Peter Nilsson <hp@axis.com>
* config/cris/cris.h (HARD_FRAME_POINTER_REGNUM): Define.
Change FRAME_POINTER_REGNUM to correspond to a new faked
register faked_fp, part of GENNONACR_REGS like faked_ap.
(CRIS_FAKED_REGS_CONTENTS): New helper macro.
(FIRST_PSEUDO_REGISTER, FIXED_REGISTERS, CALL_USED_REGISTERS):
(REG_ALLOC_ORDER, REG_CLASS_CONTENTS, REGNO_OK_FOR_BASE_P)
(ELIMINABLE_REGS, REGISTER_NAMES): Adjust accordingly.
* config/cris/cris.md (CRIS_FP_REGNUM): Renumber to new faked
register.
(CRIS_REAL_FP_REGNUM): New constant.
* config/cris/cris.c (cris_reg_saved_in_regsave_area): Check
for HARD_FRAME_POINTER_REGNUM instead of FRAME_POINTER_REGNUM.
(cris_initial_elimination_offset): Handle elimination changes
to HARD_FRAME_POINTER_REGNUM instead of FRAME_POINTER_REGNUM
and add one from FRAME_POINTER_REGNUM to
HARD_FRAME_POINTER_REGNUM.
(cris_expand_prologue, cris_expand_epilogue): Emit code for
hard_frame_pointer_rtx instead of frame_pointer_rtx.
2021-03-10 David Edelsohn <dje.gcc@gmail.com>
PR target/99492
* config/rs6000/aix.h (ADJUST_FIELD_ALIGN): Add check for DCmode.
* config/rs6000/rs6000.c (rs6000_special_round_type_align): Same.
2021-03-10 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99422
* lra-constraints.c (process_address_1): Don't check unknown
constraint, use X for empty constraint.
2021-03-10 Alex Coplan <alex.coplan@arm.com>
* config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
Fix typo in comment describing "is_ha" argument.
2021-03-10 John David Anglin <danglin@gcc.gnu.org>
* doc/sourcebuild.texi: Document LRA target selector.
2021-03-10 David Malcolm <dmalcolm@redhat.com>
* doc/ux.texi: Add subsection contrasting interactive versus
batch usage of GCC.
2021-03-10 Joel Hutton <joel.hutton@arm.com>
PR target/99102
* tree-vect-stmts.c (vectorizable_store): Fix scatter store mask
check condition.
(vectorizable_load): Fix gather load mask check condition.
2021-03-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/99510
* tree.c (check_aligned_type): Check that the candidate
has TYPE_USER_ALIGN set instead of matching with the
original type.
2021-03-10 Eric Botcazou <ebotcazou@adacore.com>
* config/sparc/sparc.c (sparc_regmode_natural_size): Return 4 for
float and vector integer modes only if the mode is not larger.
2021-03-10 Hans-Peter Nilsson <hp@axis.com>
* config/cris/cris.h (DWARF_FRAME_REGISTERS): Define.
2021-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
* ira.c (ira_setup_alts, ira_get_dup_out_num): Process digital
constraints > 9.
* ira-lives.c (single_reg_class): Ditto.
2021-03-09 Sebastian Huber <sebastian.huber@embedded-brains.de>
* config.gcc (aarch64-*-rtems*): Include general rtems.h after
the architecture-specific rtems.h.
(aarch64-*-rtems*): Likewise.
(arm*-*-rtems*): Likewise.
(epiphany-*-rtems*): Likewise.
(riscv*-*-rtems*): Likewise.
2021-03-09 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/99305
* tree-ssa-phiopt.c (conditional_replacement): Test integer_pow2p
before integer_all_onesp instead of vice versa.
2021-03-09 Richard Earnshaw <rearnsha@arm.com>
* common/config/arm/arm-common.c (arm_config_default): Change type
of 'i' to unsigned.
2021-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99454
* lra-constraints.c (process_address_1): Process constraint 'g'
separately and digital constraints containing more one digit.
2021-03-09 Nick Clifton <nickc@redhat.com>
* config/rx/rx.h (DBX_DEBUGGING_INFO): Define.
(DWARF"_DEBUGGING_INFO): Define.
2021-03-09 Eric Botcazou <ebotcazou@adacore.com>
PR c++/90448
* calls.c (initialize_argument_information): When the argument
is passed by reference, do not make a copy in a thunk only if
the argument is already in memory. Remove redundant test for
the case of callee copy.
2021-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99454
* lra-constraints.c (process_address_1): Process 0..9 constraints
in process_address_1.
2021-03-09 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.c (struct s390_processor processor_table):
Binutils name string must not be empty.
2021-03-09 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_attr_type): Remove function.
2021-03-09 Martin Liska <mliska@suse.cz>
PR target/99464
* config/i386/i386-options.c (ix86_option_override_internal):
Set isa_flags for OPTS argument and not for the global
global_options.
2021-03-09 Aaron Sawdey <acsawdey@linux.ibm.com>
* config/rs6000/predicates.md (ds_form_mem_operand): Check
in correct code.
2021-03-09 Aaron Sawdey <acsawdey@linux.ibm.com>
PR target/99070
* config/rs6000/predicates.md (ds_form_mem_operand) New
predicate.
* config/rs6000/genfusion.pl (gen_ld_cmpi_p10) Use
ds_form_mem_operand in ld/lwa patterns.
* config/rs6000/fusion.md: Regenerate file.
2021-03-08 Martin Sebor <msebor@redhat.com>
PR middle-end/98266
* gimple-array-bounds.cc (inbounds_vbase_memaccess_p): New function.
(array_bounds_checker::check_array_bounds): Call it.
2021-03-08 Martin Sebor <msebor@redhat.com>
PR middle-end/97631
* tree-ssa-strlen.c (maybe_warn_overflow): Test rawmem.
(handle_builtin_stxncpy_strncat): Rename locals. Determine
destination size from allocation calls. Issue a more appropriate
kind of warning.
(handle_builtin_memcpy): Pass true as rawmem to maybe_warn_overflow.
(handle_builtin_memset): Same.
2021-03-08 Peter Bergner <bergner@linux.ibm.com>
PR target/98959
* config/rs6000/rs6000.c (rs6000_emit_le_vsx_permute): Add an assert
to ensure we do not have an Altivec style address.
* config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): Disable if passed
an Altivec style address.
(*vsx_le_perm_store_<mode>): Likewise.
(splitters after *vsx_le_perm_store_<mode>): Likewise.
(vsx_load_<mode>): Disable special expander if passed an Altivec
style address.
(vsx_store_<mode>): Likewise.
2021-03-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/99437
* config/aarch64/predicates.md (aarch64_simd_shift_imm_vec_qi): Define.
(aarch64_simd_shift_imm_vec_hi): Likewise.
(aarch64_simd_shift_imm_vec_si): Likewise.
(aarch64_simd_shift_imm_vec_di): Likewise.
* config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Use
predicate from above.
(aarch64_shrn<mode>_insn_be): Likewise.
(aarch64_rshrn<mode>_insn_le): Likewise.
(aarch64_rshrn<mode>_insn_be): Likewise.
(aarch64_shrn2<mode>_insn_le): Likewise.
(aarch64_shrn2<mode>_insn_be): Likewise.
(aarch64_rshrn2<mode>_insn_le): Likewise.
(aarch64_rshrn2<mode>_insn_be): Likewise.
2021-03-08 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99422
* lra-constraints.c (skip_contraint_modifiers): New function.
(process_address_1): Use it before lookup_constraint call.
2021-03-08 Martin Liska <mliska@suse.cz>
PR target/99463
* config/i386/i386-options.c (ix86_option_override_internal):
Enable UINTR and HRESET for -march that supports it.
2021-03-08 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/s390.c (f_constraint_p): New function.
(s390_md_asm_adjust): Implement TARGET_MD_ASM_ADJUST.
(TARGET_MD_ASM_ADJUST): Likewise.
2021-03-08 Tobias Burnus <tobias@codesourcery.com>
PR fortran/97927
* tree-nested.c (convert_local_reference_stmt): Avoid calling
lookup_field_for_decl for Fortran module (= namespace context).
2021-03-08 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390.c (s390_expand_vec_compare): Implement <0
comparison with arithmetic right shift.
(s390_expand_vcond): No need for a force_reg anymore.
s390_vec_compare will do it.
* config/s390/vector.md ("vec_cmp<mode><tointvec>"): Accept also
immediate operands.
2021-03-07 Jakub Jelinek <jakub@redhat.com>
PR target/99321
* config/i386/constraints.md (Yw): Use SSE_REGS if TARGET_SSE
but TARGET_AVX512BW or TARGET_AVX512VL is not set. Adjust description
and comment.
* config/i386/sse.md (v_Yw): New define_mode_attr.
(*<insn><mode>3, *mul<mode>3<mask_name>, *avx2_<code><mode>3,
*sse4_1_<code><mode>3<mask_name>): Use <v_Yw> instead of v
in constraints.
* config/i386/mmx.md (mmx_pshufw_1, *vec_dupv4hi): Use Yw instead of
xYw in constraints.
2021-03-06 Julian Brown <julian@codesourcery.com>
* tree-pretty-print.c (dump_generic_node): Emit non-generic
address space info for aggregates.
2021-03-06 Hans-Peter Nilsson <hp@axis.com>
* config/cris/cris.h (MAX_FIXED_MODE_SIZE): Don't define.
2021-03-05 Jakub Jelinek <jakub@redhat.com>
PR middle-end/99322
* tree-cfg.c (bb_to_omp_idx): New variable.
(execute_build_cfg): Release the bb_to_omp_idx vector after
cleanup_tree_cfg returns.
(handle_abnormal_edges): Remove bb_to_omp_idx argument, adjust
for bb_to_omp_idx being a vec<int> instead of pointer to array
of ints.
(make_edges): Remove bb_to_omp_idx local variable, don't pass
it to handle_abnormal_edges, adjust for bb_to_omp_idx being a
vec<int> instead of pointer to array of ints and don't free/release
it at the end.
(remove_bb): When removing a bb and placing forced label somewhere
else, ensure it is put into the same OpenMP region during cfg
pass if possible or to entry successor as fallback. Unregister
bb from bb_to_omp_idx.
2021-03-05 Vladimir N. Makarov <vmakarov@redhat.com>
PR target/99378
* lra-constraints.c (process_address_1): Skip decomposing address
for asm insn operand with unknown constraint.
2021-03-05 Martin Jambor <mjambor@suse.cz>
PR ipa/98078
* cgraph.c (cgraph_edge::set_call_stmt): Do not update all
corresponding speculative edges if we are about to resolve
sepculation. Make edge direct (and so resolve speculations) before
removing it from call_site_hash.
(cgraph_edge::make_direct): Relax the initial assert to allow calling
the function on speculative direct edges.
2021-03-05 Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/99376
* rtlanal.c (nonzero_bits1) <arithmetic operators>: If the number
of low-order zero bits is too large, set the result to 0 directly.
2021-03-04 Jakub Jelinek <jakub@redhat.com>
PR middle-end/93235
* expmed.c (store_bit_field_using_insv): Return false of xop0 is a
SUBREG and a SUBREG to op_mode can't be created.
2021-03-04 Alex Coplan <alex.coplan@arm.com>
PR target/99381
* config/aarch64/aarch64-sve-builtins.cc
(function_resolver::require_vector_type): Handle error_mark_node.
2021-03-04 Ilya Leoshkevich <iii@linux.ibm.com>
* cfgexpand.c (expand_asm_loc): Pass new parameter.
(expand_asm_stmt): Likewise.
* config/arm/aarch-common-protos.h (arm_md_asm_adjust): Add new
parameter.
* config/arm/aarch-common.c (arm_md_asm_adjust): Likewise.
* config/arm/arm.c (thumb1_md_asm_adjust): Likewise.
* config/cris/cris.c (cris_md_asm_adjust): Likewise.
* config/i386/i386.c (ix86_md_asm_adjust): Likewise.
* config/mn10300/mn10300.c (mn10300_md_asm_adjust): Likewise.
* config/nds32/nds32.c (nds32_md_asm_adjust): Likewise.
* config/pdp11/pdp11.c (pdp11_md_asm_adjust): Likewise.
* config/rs6000/rs6000.c (rs6000_md_asm_adjust): Likewise.
* config/vax/vax.c (vax_md_asm_adjust): Likewise.
* config/visium/visium.c (visium_md_asm_adjust): Likewise.
* doc/tm.texi (md_asm_adjust): Likewise.
* target.def (md_asm_adjust): Likewise.
2021-03-04 Richard Biener <rguenther@suse.de>
PR middle-end/97855
* tree-pretty-print.c: Poison pp_printf.
(dump_decl_name): Avoid use of pp_printf.
(dump_block_node): Likewise.
(dump_generic_node): Likewise.
2021-03-04 Martin Sebor <msebor@redhat.com>
PR middle-end/96963
PR middle-end/94655
* builtins.c (handle_array_ref): New helper.
(handle_mem_ref): New helper.
(compute_objsize_r): Factor out ARRAY_REF and MEM_REF handling
into new helper functions. Correct a workaround for vectorized
assignments.
2021-03-03 Pat Haugen <pthaugen@linux.ibm.com>
* config/rs6000/dfp.md (extendddtd2, trunctddd2, *cmp<mode>_internal1,
floatditd2, ftrunc<mode>2, fix<mode>di2, dfp_ddedpd_<mode>,
dfp_denbcd_<mode>, dfp_dxex_<mode>, dfp_diex_<mode>,
*dfp_sgnfcnc_<mode>, dfp_dscli_<mode>, dfp_dscri_<mode>): Update size
attribute for Power10.
* config/rs6000/mma.md (*movoo): Likewise.
* config/rs6000/rs6000.md (define_attr "size"): Add 256.
(define_mode_attr bits): Add DD/TD modes.
* config/rs6000/sync.md (load_quadpti, store_quadpti, load_lockedpti,
store_conditionalpti): Update size attribute for Power10.
2021-03-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR bootstrap/92002
* config/sparc/t-sparc (tree-ssanames.o-warn): Don't error for
-Wuninitialized, -Wmaybe-uninitialized.
(wide-int.o-warn): Likewise.
2021-03-03 Richard Earnshaw <rearnsha@arm.com>
* common/config/arm/arm-common.c: Include configargs.h.
(arm_config_default): New function.
(arm_target_mode): Renamed from arm_target_thumb_only. Handle
processors that do not support Thumb. Take into account the
--with-mode configuration setting for selecting the default.
* config/arm/arm.h (OPTION_DEFAULT_SPECS): Remove entry for 'mode'.
(TARGET_MODE_SPEC_FUNCTIONS): Update for function name change.
2021-03-03 Martin Liska <mliska@suse.cz>
PR gcov-profile/97461
* gcov-io.h (GCOV_PREALLOCATED_KVP): Remove.
2021-03-03 Eric Botcazou <ebotcazou@adacore.com>
PR target/99234
* config/i386/i386.c (ix86_compute_frame_layout): For a SEH target,
point back the hard frame pointer to its default location when the
frame is larger than SEH_MAX_FRAME_SIZE.
2021-03-03 Jakub Jelinek <jakub@redhat.com>
PR target/99321
* config/i386/predicates.md (logic_operator): New define_predicate.
* config/i386/i386.md (mov + mem using comm arith peephole2):
Punt if operands[1] is EXT_REX_SSE_REGNO_P, AVX512BW is not enabled
and the inner mode is [QH]Imode.
2021-03-03 Jakub Jelinek <jakub@redhat.com>
PR debug/99090
* dwarf2out.c (dw_loc_list_struct): Add end_entry member.
(new_loc_list): Clear end_entry.
(output_loc_list): Only use DW_LLE_startx_length for -gsplit-dwarf
if HAVE_AS_LEB128, otherwise use DW_LLE_startx_endx. Fix comment
typo.
(index_location_lists): For dwarf_version >= 5 without HAVE_AS_LEB128,
initialize also end_entry.
2021-03-03 Jakub Jelinek <jakub@redhat.com>
PR target/99085
* cfgrtl.c (fixup_partitions): When changing some bbs from hot to cold
partitions, if in non-layout mode after reorder_blocks also move
affected blocks to ensure a single partition transition.
2021-03-03 Jason Merrill <jason@redhat.com>
PR c++/96078
* cgraphunit.c (process_function_and_variable_attributes): Don't
warn about flatten on an alias if the target also has it.
* cgraph.h (symtab_node::get_alias_target_tree): New.
2021-03-02 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/rs6000.md (tls_get_tpointer_internal): Prepend
period to symbol name.
(tls_get_addr_internal<mode>): Same.
2021-03-02 David Malcolm <dmalcolm@redhat.com>
PR c/99323
* diagnostic-show-locus.c
(selftest::test_one_liner_many_fixits_2): Fix accidental usage of
column 0.
2021-03-02 Martin Sebor <msebor@redhat.com>
PR middle-end/99276
* builtins.c (warn_for_access): Remove stray warning text.
2021-03-02 Martin Sebor <msebor@redhat.com>
PR middle-end/99295
* doc/extend.texi (attribute malloc): Reword and clarify nonaliasing
property.
2021-03-02 Jakub Jelinek <jakub@redhat.com>
PR debug/99319
* dwarf2out.c (output_macinfo_op): Use DW_MACRO_*_str* even with
-gdwarf-5 -gstrict-dwarf. For -gsplit-dwarf -gdwarf-5 use
DW_MACRO_*_strx instead of DW_MACRO_*_strp. Handle
DW_MACRO_define_strx and DW_MACRO_undef_strx.
(save_macinfo_strings): Use DW_MACRO_*_str* even with
-gdwarf-5 -gstrict-dwarf. Handle DW_MACRO_define_strx and
DW_MACRO_undef_strx.
2021-03-02 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390-builtin-types.def (BT_FN_V4SF_V8HI_UINT): New
builtin signature.
(BT_FN_V8HI_V8HI_UINT): Likewise.
(BT_FN_V8HI_V4SF_V4SF_UINT): Likewise.
* config/s390/s390-builtins.def (B_NNPA): New macro definition.
(s390_vclfnhs, s390_vclfnls, s390_vcrnfs, s390_vcfn, s390_vcnf):
New builtin definitions.
* config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Bump
vector extension version.
* config/s390/s390.c (s390_expand_builtin): Check if builtins are
available with current -march level.
* config/s390/s390.md (UNSPEC_NNPA_VCLFNHS_V8HI)
(UNSPEC_NNPA_VCLFNLS_V8HI, UNSPEC_NNPA_VCRNFS_V8HI)
(UNSPEC_NNPA_VCFN_V8HI, UNSPEC_NNPA_VCNF_V8HI): New constants.
* config/s390/vecintrin.h (vec_extend_to_fp32_hi): New macro.
(vec_extend_to_fp32_lo): Likewise.
(vec_round_from_fp32): Likewise.
(vec_convert_to_fp16): Likewise.
(vec_convert_from_fp16): Likewise.
* config/s390/vx-builtins.md (vclfnhs_v8hi): New insn pattern.
(vclfnls_v8hi): Likewise.
(vcrnfs_v8hi): Likewise.
(vcfn_v8hi): Likewise.
(vcnf_v8hi): Likewise.
2021-03-02 Andreas Krebbel <krebbel@linux.ibm.com>
* common/config/s390/s390-common.c (processor_flags_table): New entry.
* config.gcc: Enable arch14 for --with-arch and --with-tune.
* config/s390/driver-native.c (s390_host_detect_local_cpu): Pick
arch14 for unknown CPU models.
* config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH14.
* config/s390/s390.c (s390_issue_rate): Add case for PROCESSOR_ARCH14.
(s390_get_sched_attrmask): Likewise.
(s390_get_unit_mask): Likewise.
* config/s390/s390.h (enum processor_flags): Add PF_NNPA and PF_ARCH14.
(TARGET_CPU_ARCH14, TARGET_CPU_ARCH14_P, TARGET_CPU_NNPA)
(TARGET_CPU_NNPA_P, TARGET_ARCH14, TARGET_ARCH14_P, TARGET_NNPA)
(TARGET_NNPA_P): New macro definitions.
* config/s390/s390.md ("cpu_facility", "enabled"): Add arch14 and nnpa.
* config/s390/s390.opt: Add PROCESSOR_ARCH14.
2021-03-02 Jakub Jelinek <jakub@redhat.com>
PR middle-end/95757
* tree-vrp.c (register_edge_assert_for): Remove superfluous ()s around
condition. Call register_edge_assert_for_1 for == 0, != 0, == 1 and
!= 1 comparisons if name is lhs of a comparison.
2021-03-01 Iain Sandoe <iain@sandoe.co.uk>
PR target/44107
PR target/48097
* config/darwin-protos.h (darwin_should_restore_cfa_state): New.
* config/darwin.c (darwin_should_restore_cfa_state): New.
* config/darwin.h (TARGET_ASM_SHOULD_RESTORE_CFA_STATE): New.
* doc/tm.texi: Regenerated.
* doc/tm.texi.in: Document TARGET_ASM_SHOULD_RESTORE_CFA_STATE.
* dwarf2cfi.c (connect_traces): If the target requests, restore
the CFA expression after a DW_CFA_restore.
* target.def (TARGET_ASM_SHOULD_RESTORE_CFA_STATE): New hook.
2021-03-01 Martin Liska <mliska@suse.cz>
PR target/99313
* optc-save-gen.awk: Add 4 more exceptions.
2021-03-01 Nathan Sidwell <nathan@acm.org>
PR c++/99294
* tree.h (TYPE_ALIGN_RAW): New accessor.
(TYPE_ALIGN): Use it.
2021-03-01 Jan Hubicka <jh@suse.cz>
PR ipa/98338
* ipa-fnsummary.c (compute_fn_summary): Fix sanity check.
2021-03-01 Eric Botcazou <ebotcazou@adacore.com>
PR target/99234
* config/i386/i386.c (ix86_compute_frame_layout): For a SEH target,
point the hard frame pointer to the SSE register save area instead
of the general register save area. Perform only minimal adjustment
for small frames if it is initially not correctly aligned.
(ix86_expand_prologue): Remove early saves for a SEH target.
* config/i386/winnt.c (struct seh_frame_state): Document constraint.
2021-02-28 Jakub Jelinek <jakub@redhat.com>
PR c/99304
* ipa.c (symbol_table::remove_unreachable_nodes): Fix a comment
typo - referneced -> referenced.
* tree.c (component_ref_size): Fix comment typo -
refernce -> reference.
* tree-ssa-alias.c (access_path_may_continue_p): Fix comment typo -
traling -> trailing.
(aliasing_component_refs_p): Fix comment typos -
refernce -> reference and refernece -> reference and
traling -> trailing.
(nonoverlapping_refs_since_match_p): Fix comment typo -
referneces -> references.
* doc/invoke.texi (--param modref-max-bases): Fix a typo -
referneces -> references.
2021-02-27 Iain Sandoe <iain@sandoe.co.uk>
* config/host-darwin.c (darwin_gt_pch_use_address): Modify
diagnostic message to avoid use of a contraction and format
warning.
2021-02-27 Jakub Jelinek <jakub@redhat.com>
PR other/99288
* gcse.c (gcse_or_cprop_is_too_expensive): Use %wu instead of
HOST_WIDE_INT_PRINT_UNSIGNED in warning format string.
* ipa-devirt.c (ipa_odr_read_section): Use %wd instead of
HOST_WIDE_INT_PRINT_DEC in inform format string. Fix comment
typos.
2021-02-26 Richard Biener <rguenther@suse.de>
PR middle-end/99281
* expr.c (store_field): For calls with return-slot optimization
and addressable return type expand the store directly.
2021-02-26 Richard Biener <rguenther@suse.de>
PR c/99275
* builtins.c (warn_string_no_nul): Fix diagnostic formatting.
2021-02-26 Peter Bergner <bergner@linux.ibm.com>
PR target/99279
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Replace assert
with an "if" test.
2021-02-26 Aaron Sawdey <acsawdey@linux.ibm.com>
* config.gcc: Add rs6000-pcrel-opt.o.
* config/rs6000/rs6000-pcrel-opt.c: New file.
* config/rs6000/pcrel-opt.md: New file.
* config/rs6000/predicates.md: Add d_form_memory predicate.
* config/rs6000/rs6000-cpus.def: Add OPTION_MASK_PCREL_OPT.
* config/rs6000/rs6000-passes.def: Add pass_pcrel_opt.
* config/rs6000/rs6000-protos.h: Add reg_to_non_prefixed(),
pcrel_opt_valid_mem_p(), output_pcrel_opt_reloc(),
and make_pass_pcrel_opt().
* config/rs6000/rs6000.c (reg_to_non_prefixed): Make global.
(rs6000_option_override_internal): Add pcrel-opt.
(rs6000_delegitimize_address): Support pcrel-opt.
(rs6000_opt_masks): Add pcrel-opt.
(pcrel_opt_valid_mem_p): New function.
(reg_to_non_prefixed): Make global.
(rs6000_asm_output_opcode): Reset prepend_p_to_next_insn.
(output_pcrel_opt_reloc): New function.
* config/rs6000/rs6000.md (loads_extern_addr): New attr.
(pcrel_extern_addr): Set loads_extern_addr.
Add include for pcrel-opt.md.
* config/rs6000/rs6000.opt: Add -mpcrel-opt.
* config/rs6000/t-rs6000: Add rules for pcrel-opt.c and
pcrel-opt.md.
2021-02-26 YunQiang Su <yunqiang.su@cipunited.com>
PR target/98996
* config/mips/mips.c (mips_expand_ext_as_unaligned_load):
If TARGET_64BIT and dest is SUBREG, we check the width, if it
equal to SImode, we use SImode operation, just like what we are
doing for REG one.
2021-02-26 Marek Polacek <polacek@redhat.com>
* builtins.c (warn_for_access): Fix typos.
2021-02-25 Iain Sandoe <iain@sandoe.co.uk>
* config/aarch64/aarch64.md (<optab>_rol<mode>3): Add a '#'
mark in front of the immediate quantity.
(<optab>_rolsi3_uxtw): Likewise.
2021-02-25 Richard Earnshaw <rearnsha@arm.com>
PR target/99271
* config/arm/thumb2.md (nonsecure_call_reg_thumb2_fpcxt): New pattern.
(nonsecure_call_value_reg_thumb2_fpcxt): Likewise.
(nonsecure_call_reg_thumb2): Restrict to using r4 for the callee
address and disable when the FPCXT is not available.
(nonsecure_call_value_reg_thumb2): Likewise.
2021-02-25 Nathan Sidwell <nathan@acm.org>
PR c++/99166
* doc/invoke.texi (flang-info-module-cmi): Renamed option.
2021-02-25 Tamar Christina <tamar.christina@arm.com>
* tree-vect-slp.c (optimize_load_redistribution_1): Abort on NULL nodes.
2021-02-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/99253
* tree-vect-loop.c (check_reduction_path): First compute
code, then verify out-of-loop uses.
2021-02-25 Jakub Jelinek <jakub@redhat.com>
PR target/95798
* match.pd ((T)(A) + CST -> (T)(A + CST)): Add :s to convert.
2021-02-25 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/80635
* tree-vrp.c (vrp_simplify_cond_using_ranges): Also handle
VIEW_CONVERT_EXPR if modes are the same, innerop is integral and
has mode precision.
2021-02-25 Richard Biener <rguenther@suse.de>
* tree-vect-slp.c (optimize_load_redistribution_1): Delay
load_map population.
(vect_match_slp_patterns_2): Revert part of last change.
(vect_analyze_slp): Do not interleave optimize_load_redistribution
with pattern detection but do it afterwards. Dump the
whole SLP graph after pattern recognition and load
redistribution optimization finished.
2021-02-24 Jakub Jelinek <jakub@redhat.com>
PR fortran/99226
* omp-low.c (struct omp_context): Add teams_nested_p and
nonteams_nested_p members.
(scan_omp_target): Diagnose teams nested inside of target with other
directives strictly nested inside of the same target.
(check_omp_nesting_restrictions): Set ctx->teams_nested_p or
ctx->nonteams_nested_p as needed.
2021-02-24 Vladimir N. Makarov <vmakarov@redhat.com>
PR inline-asm/99123
* lra-constraints.c (uses_hard_regs_p): Don't use decompose_mem_address.
2021-02-24 Hans-Peter Nilsson <hp@axis.com>
* config/cris/cris.c (cris_expand_prologue): Set
current_function_static_stack_size, if flag_stack_usage_info.
2021-02-24 Pat Haugen <pthaugen@linux.ibm.com>
* config/rs6000/rs6000.c (next_insn_prefixed_p): Rename.
(rs6000_final_prescan_insn): Adjust.
(rs6000_asm_output_opcode): Likewise.
2021-02-24 Martin Sebor <msebor@redhat.com>
PR middle-end/97172
* attribs.c (attr_access::free_lang_data): Clear attribute arg spec
from function arguments.
2021-02-24 Tamar Christina <tamar.christina@arm.com>
PR tree-optimization/99220
* tree-vect-slp.c (optimize_load_redistribution_1): Remove
node from cache when it's about