LoongArch: Use UNSPEC for fmin/fmax RTL pattern [PR105414]
I made a mistake defining fmin/fmax RTL patterns in r13-2085: I used
smin and smax in the definition mistakenly. This causes the optimizer
to perform constant folding as if fmin/fmax was "really" smin/smax
operations even with -fsignaling-nans. Then pr105414.c fails.
We don't have fmin/fmax RTL codes for now (PR107013) so we can only use
an UNSPEC for fmin and fmax patterns.
gcc/ChangeLog:
PR tree-optimization/105414
* config/loongarch/loongarch.md (UNSPEC_FMAX): New unspec.
(UNSPEC_FMIN): Likewise.
(fmax<mode>3): Use UNSPEC_FMAX instead of smax.
(fmin<mode>3): Use UNSPEC_FMIN instead of smin.
diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
index 3787fd8..214b14b 100644
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -35,6 +35,8 @@
;; Floating point unspecs.
UNSPEC_FRINT
UNSPEC_FCLASS
+ UNSPEC_FMAX
+ UNSPEC_FMIN
;; Override return address for exception handling.
UNSPEC_EH_RETURN
@@ -1032,8 +1034,9 @@
(define_insn "fmax<mode>3"
[(set (match_operand:ANYF 0 "register_operand" "=f")
- (smax:ANYF (match_operand:ANYF 1 "register_operand" "f")
- (match_operand:ANYF 2 "register_operand" "f")))]
+ (unspec:ANYF [(use (match_operand:ANYF 1 "register_operand" "f"))
+ (use (match_operand:ANYF 2 "register_operand" "f"))]
+ UNSPEC_FMAX))]
""
"fmax.<fmt>\t%0,%1,%2"
[(set_attr "type" "fmove")
@@ -1041,8 +1044,9 @@
(define_insn "fmin<mode>3"
[(set (match_operand:ANYF 0 "register_operand" "=f")
- (smin:ANYF (match_operand:ANYF 1 "register_operand" "f")
- (match_operand:ANYF 2 "register_operand" "f")))]
+ (unspec:ANYF [(use (match_operand:ANYF 1 "register_operand" "f"))
+ (use (match_operand:ANYF 2 "register_operand" "f"))]
+ UNSPEC_FMIN))]
""
"fmin.<fmt>\t%0,%1,%2"
[(set_attr "type" "fmove")
