gcc/config/nds32/nds32.opt

; Options of Andes NDS32 cpu for GNU compiler
; Copyright (C) 2012-2017 Free Software Foundation, Inc.
; Contributed by Andes Technology Corporation.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it
; under the terms of the GNU General Public License as published
; by the Free Software Foundation; either version 3, or (at your
; option) any later version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; <http://www.gnu.org/licenses/>.

HeaderInclude
config/nds32/nds32-opts.h

; ---------------------------------------------------------------
; The following options are designed for aliasing and compatibility options.

EB
Target RejectNegative Alias(mbig-endian)
Generate code in big-endian mode.

EL
Target RejectNegative Alias(mlittle-endian)
Generate code in little-endian mode.

; ---------------------------------------------------------------

mreduced-regs
Target Report RejectNegative Negative(mfull-regs) Mask(REDUCED_REGS)
Use reduced-set registers for register allocation.

mfull-regs
Target Report RejectNegative Negative(mreduced-regs) InverseMask(REDUCED_REGS)
Use full-set registers for register allocation.

; ---------------------------------------------------------------

mbig-endian
Target Undocumented RejectNegative Negative(mlittle-endian) Mask(BIG_ENDIAN)
Generate code in big-endian mode.

mlittle-endian
Target Undocumented RejectNegative Negative(mbig-endian) InverseMask(BIG_ENDIAN)
Generate code in little-endian mode.


mcmov
Target Report Mask(CMOV)
Generate conditional move instructions.

mext-perf
Target Report Mask(EXT_PERF)
Generate performance extension instructions.

mext-perf2
Target Report Mask(EXT_PERF2)
Generate performance extension version 2 instructions.

mext-string
Target Report Mask(EXT_STRING)
Generate string extension instructions.

mv3push
Target Report Mask(V3PUSH)
Generate v3 push25/pop25 instructions.

m16-bit
Target Report Mask(16_BIT)
Generate 16-bit instructions.

misr-vector-size=
Target RejectNegative Joined UInteger Var(nds32_isr_vector_size) Init(NDS32_DEFAULT_ISR_VECTOR_SIZE)
Specify the size of each interrupt vector, which must be 4 or 16.

mcache-block-size=
Target RejectNegative Joined UInteger Var(nds32_cache_block_size) Init(NDS32_DEFAULT_CACHE_BLOCK_SIZE)
Specify the size of each cache block, which must be a power of 2 between 4 and 512.

march=
Target RejectNegative Joined Enum(nds32_arch_type) Var(nds32_arch_option) Init(ARCH_V3)
Specify the name of the target architecture.

Enum
Name(nds32_arch_type) Type(enum nds32_arch_type)
Known arch types (for use with the -march= option):

EnumValue
Enum(nds32_arch_type) String(v2) Value(ARCH_V2)

EnumValue
Enum(nds32_arch_type) String(v3) Value(ARCH_V3)

EnumValue
Enum(nds32_arch_type) String(v3m) Value(ARCH_V3M)

mcmodel=
Target RejectNegative Joined Enum(nds32_cmodel_type) Var(nds32_cmodel_option) Init(CMODEL_MEDIUM)
Specify the address generation strategy for code model.

Enum
Name(nds32_cmodel_type) Type(enum nds32_cmodel_type)
Known cmodel types (for use with the -mcmodel= option):

EnumValue
Enum(nds32_cmodel_type) String(small) Value(CMODEL_SMALL)

EnumValue
Enum(nds32_cmodel_type) String(medium) Value(CMODEL_MEDIUM)

EnumValue
Enum(nds32_cmodel_type) String(large) Value(CMODEL_LARGE)

mctor-dtor
Target Report
Enable constructor/destructor feature.

mrelax
Target Report
Guide linker to relax instructions.