aarch64: add zeroing forms for predicated SVE FP-to-integer conversions

SVE2.2 (or in streaming mode, SME2.2) adds support for zeroing predication
for all variants of the following FP-to-integer conversion instructions:

- FCVTZU (Floating-point convert to unsigned integer, rounding toward zero
  (predicated))
- FCVTZS (Floating-point convert to signed integer, rounding toward zero
  (predicated))

To implement this change, this patch adds a new alternative to patterns
involving the SVE_COND_FCVTI iterator and accepting an independent value
as the merge operand.  The new alternative has the new zeroing-predication
forms as the output string and is only enabled when sve2p2_or_sme2p2 is
true in the target architecture.

The new ASM tests only cover the "_z" versions of the intrinsics and as
such all have the "_z" suffix in their name, and are grouped by type of
the destination operand.

gcc/ChangeLog:

	* config/aarch64/aarch64-sve.md
	(*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed):
	New alternative for zeroing predication.  Add `arch` attribute
	to every alternative.
	(*cond_<optab>_nontrunc<SVE_PARTIAL_F:mode><SVE_HSDI:mode>_relaxed):
	Likewise.
	(*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict):
	Likewise.
	(*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
	Likewise.
	(*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx2SI_ONLY:mode>_relaxed):
	Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/sve2/acle/asm/cvt_s16_z.c: New test.
	* gcc.target/aarch64/sve2/acle/asm/cvt_s32_z.c: Likewise.
	* gcc.target/aarch64/sve2/acle/asm/cvt_s64_z.c: Likewise.
	* gcc.target/aarch64/sve2/acle/asm/cvt_u16_z.c: Likewise.
	* gcc.target/aarch64/sve2/acle/asm/cvt_u32_z.c: Likewise.
	* gcc.target/aarch64/sve2/acle/asm/cvt_u64_z.c: Likewise.