| 2020-12-31 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/98302 |
| * tree-vect-patterns.c (vect_determine_precisions_from_users): Make |
| sure that the precision remains greater than the shift count. |
| |
| 2020-12-31 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/94994 |
| * tree-vect-data-refs.c (vect_vfa_align): Use dr_alignment. |
| |
| 2020-12-31 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/98214 |
| * genmodes.c (emit_insn_modes_h): Emit a definition of CONST_MODE_MASK. |
| (emit_mode_mask): Treat mode_mask_array as non-constant if adj_nunits. |
| (emit_mode_adjustments): Update GET_MODE_MASK when updating |
| GET_MODE_NUNITS. |
| * machmode.h (mode_mask_array): Use CONST_MODE_MASK. |
| |
| 2020-12-31 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94802 |
| * match.pd (clz(X) == 0 -> (int)X < 0): New simplification. |
| (clz(X) == (prec-1) -> X == 1): Likewise. |
| |
| 2020-12-31 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94785 |
| * match.pd ((-(X < 0) | 1) * X -> abs (X)): New simplification. |
| ((-(X < 0) | 1U) * X -> absu (X)): Likewise. |
| |
| 2020-12-31 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/98474 |
| * wide-int.cc (wi::to_mpz): If wide_int has MSB set, but type |
| is unsigned and excess negative, append set bits after len until |
| precision. |
| |
| 2020-12-31 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/98206 |
| * fold-const.c: Include asan.h. |
| (fold_unary_loc): Don't optimize (ptr_type) (((ptr_type2) x) p+ y) |
| into ((ptr_type) x) p+ y if sanitizing alignment in GENERIC and |
| ptr_type points to type with higher alignment than ptr_type2. |
| |
| 2020-12-31 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/56719 |
| * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize |
| x < C && y < C && z < C when C is a power of two constant into |
| (x | y | z) < C. |
| |
| 2020-12-30 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md: Remove unnecessary clobbers |
| from combine splitters. |
| |
| 2020-12-30 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/98461 |
| * config/i386/sse.md (<sse2_avx2>_pmovmskb): Add splitters |
| for pmovmskb of NOT vector. |
| |
| 2020-12-29 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.md (maddsidi4_split): Skip macd gen, use mac insn |
| instead. |
| (macd): Update register letters. |
| (umaddsidi4_split): Skip macdu gen, use macu insn instead. |
| (macdu): Update register letters. |
| |
| 2020-12-29 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (arc_secondary_reload): Flip if-condition |
| predicates. |
| |
| 2020-12-29 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.h (REGNO_OK_FOR_BASE_P): Check if defined |
| reg_renumber. |
| |
| 2020-12-29 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (prepare_move_operands): Use a temporary |
| registers when we have cached mem-to-uncached mem moves. |
| |
| 2020-12-29 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.md (movdi_insn): Update pattern, no predicated |
| vadd2 usage. |
| (movdf_insn): Likewise. |
| * config/arc/simdext.md (movVEC_insn): Likewise. |
| |
| 2020-12-29 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-expand.c (ix86_gen_TWO52): Use REAL_MODE_FORMAT |
| to determine number of mantissa bits. Use real_2expN instead |
| of real_ldexp. |
| (ix86_expand_rint): Use copy_to_reg. |
| (ix86_expand_floorceildf_32): Ditto. |
| (ix86_expand_truncdf_32): Ditto. |
| (ix86_expand_rounddf_32): Ditto. |
| (ix86_expand_floorceil): Use copy_to_reg and int_mode_for_mode. |
| (ix86_expand_trunc): Ditto. |
| (ix86_expand_round): Ditto. |
| |
| 2020-12-28 Gerald Pfeifer <gerald@pfeifer.com> |
| |
| * doc/standards.texi (HSAIL): Remove section. |
| |
| 2020-12-28 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/96793 |
| * config/i386/i386-expand.c (ix86_expand_rint): |
| Remove the sign of the intermediate value for flag_rounding_math. |
| |
| 2020-12-28 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-expand.c (ix86_expand_trunc): Use |
| existing temporary register to avoid a call to force_reg. |
| |
| 2020-12-28 Hongyu Wang <hongyu.wang@intel.com> |
| |
| * config/i386/i386.md (optab): New code attr. |
| * config/i386/sse.md (<code>v32qiv32hi2): Rename to ... |
| (<optab>v32qiv32hi2) ... this. |
| (<code>v16qiv16hi2): Likewise. |
| (<code>v8qiv8hi2): Likewise. |
| (<code>v16qiv16si2): Likewise. |
| (<code>v8qiv8si2): Likewise. |
| (<code>v4qiv4si2): Likewise. |
| (<code>v16hiv16si2): Likewise. |
| (<code>v8hiv8si2): Likewise. |
| (<code>v4hiv4si2): Likewise. |
| (<code>v8qiv8di2): Likewise. |
| (<code>v4qiv4di2): Likewise. |
| (<code>v2qiv2di2): Likewise. |
| (<code>v8hiv8di2): Likewise. |
| (<code>v4hiv4di2): Likewise. |
| (<code>v2hiv2di2): Likewise. |
| (<code>v8siv8di2): Likewise. |
| (<code>v4siv4di2): Likewise. |
| (<code>v2siv2di2): Likewise. |
| |
| 2020-12-27 Gerald Pfeifer <gerald@pfeifer.com> |
| |
| * doc/analyzer.texi (Analyzer Internals): Find a new source for |
| the "A Memory Model for Static Analysis of C Programs" paper. |
| |
| 2020-12-25 Gerald Pfeifer <gerald@pfeifer.com> |
| |
| * doc/invoke.texi (C++ Module Mapper): Fix reference to libcody. |
| |
| 2020-12-24 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * configure.ac: Add gxx-libcxx-include-dir handled |
| in the same way as the regular cxx header directory. |
| * Makefile.in: Regenerated. |
| * config.in: Likewise. |
| * configure: Likewise. |
| * cppdefault.c: Pick up libc++ headers if the option |
| is enabled. |
| * cppdefault.h (struct default_include): Amend comments |
| to reflect the extended use of the cplusplus field. |
| * incpath.c (add_standard_paths): Allow for multiple |
| c++ header include path variants. |
| * doc/invoke.texi: Document the -stdlib= option. |
| |
| 2020-12-24 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/multilib-generator (arch_canonicalize): Call |
| decode for the subprocess return value. |
| |
| 2020-12-23 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/98160 |
| * builtins.c (warn_dealloc_offset): Avoid assuming calls are made |
| through declared functions and not pointers. |
| |
| 2020-12-23 Martin Sebor <msebor@redhat.com> |
| |
| PR c++/98413 |
| * builtins.c (get_offset_range): Avoid non-integers/-pointers. |
| |
| 2020-12-23 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin-driver.c (validate_macosx_version_min): Allow |
| MACOSX_DEPLOYMENT_TARGET=11. |
| (darwin_default_min_version): Adjust warning spelling to avoid |
| an apostrophe. |
| |
| 2020-12-23 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/96793 |
| * config/i386/i386-expand.c (ix86_expand_truncdf_32): |
| Remove the sign of the intermediate value for flag_rounding_math. |
| |
| 2020-12-22 Qian Jianhua <qianjh@cn.fujitsu.com> |
| |
| * config/arm/types.md (define_attr "autodetect_type"): New. |
| (define_attr "type"): Subdivide alu_shift_imm. |
| * config/arm/common.md: New file. |
| * config/aarch64/predicates.md:Include common.md. |
| * config/arm/predicates.md:Include common.md. |
| * config/aarch64/aarch64.md (*add_<shift>_<mode>): Set autodetect_type. |
| (*add_<shift>_si_uxtw): Likewise. |
| (*sub_<shift>_<mode>): Likewise. |
| (*sub_<shift>_si_uxtw): Likewise. |
| (*neg_<shift>_<mode>2): Likewise. |
| (*neg_<shift>_si2_uxtw): Likewise. |
| * config/arm/arm.md (*addsi3_carryin_shift): Likewise. |
| (add_not_shift_cin): Likewise. |
| (*subsi3_carryin_shift): Likewise. |
| (*subsi3_carryin_shift_alt): Likewise. |
| (*rsbsi3_carryin_shift): Likewise. |
| (*rsbsi3_carryin_shift_alt): Likewise. |
| (*arm_shiftsi3): Likewise. |
| (*<arith_shift_insn>_multsi): Likewise. |
| (*<arith_shift_insn>_shiftsi): Likewise. |
| (subsi3_carryin): Set new type. |
| (*if_arith_move): Set new type. |
| (*if_move_arith): Set new type. |
| (define_attr "core_cycles"): Use new type. |
| * config/arm/arm-fixed.md (arm_ssatsihi_shift): Set autodetect_type. |
| * config/arm/thumb2.md (*orsi_not_shiftsi_si): Likewise. |
| (*thumb2_shiftsi3_short): Set new type. |
| * config/aarch64/falkor.md (falkor_alu_1_xyz): Use new type. |
| * config/aarch64/saphira.md (saphira_alu_1_xyz): Likewise. |
| * config/aarch64/thunderx.md (thunderx_arith_shift): Likewise. |
| * config/aarch64/thunderx2t99.md (thunderx2t99_alu_shift): Likewise. |
| * config/aarch64/thunderx3t110.md (thunderx3t110_alu_shift): Likewise. |
| (thunderx3t110_alu_shift1): Likewise. |
| * config/aarch64/tsv110.md (tsv110_alu_shift): Likewise. |
| * config/arm/arm1020e.md (1020alu_shift_op): Likewise. |
| * config/arm/arm1026ejs.md (alu_shift_op): Likewise. |
| * config/arm/arm1136jfs.md (11_alu_shift_op): Likewise. |
| * config/arm/arm926ejs.md (9_alu_op): Likewise. |
| * config/arm/cortex-a15.md (cortex_a15_alu_shift): Likewise. |
| * config/arm/cortex-a17.md (cortex_a17_alu_shiftimm): Likewise. |
| * config/arm/cortex-a5.md (cortex_a5_alu_shift): Likewise. |
| * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise. |
| * config/arm/cortex-a57.md (cortex_a57_alu_shift): Likewise. |
| * config/arm/cortex-a7.md (cortex_a7_alu_shift): Likewise. |
| * config/arm/cortex-a8.md (cortex_a8_alu_shift): Likewise. |
| * config/arm/cortex-a9.md (cortex_a9_dp_shift): Likewise. |
| * config/arm/cortex-m4.md (cortex_m4_alu): Likewise. |
| * config/arm/cortex-m7.md (cortex_m7_alu_shift): Likewise. |
| * config/arm/cortex-r4.md (cortex_r4_alu_shift): Likewise. |
| * config/arm/exynos-m1.md (exynos_m1_alu_shift): Likewise. |
| * config/arm/fa526.md (526_alu_shift_op): Likewise. |
| * config/arm/fa606te.md (606te_alu_op): Likewise. |
| * config/arm/fa626te.md (626te_alu_shift_op): Likewise. |
| * config/arm/fa726te.md (726te_alu_shift_op): Likewise. |
| * config/arm/fmp626.md (mp626_alu_shift_op): Likewise. |
| * config/arm/marvell-pj4.md (pj4_shift): Likewise. |
| (pj4_shift_conds): Likewise. |
| (pj4_alu_shift): Likewise. |
| (pj4_alu_shift_conds): Likewise. |
| * config/arm/xgene1.md (xgene1_alu): Likewise. |
| * config/arm/arm.c (xscale_sched_adjust_cost): Likewise. |
| |
| 2020-12-22 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/96793 |
| * config/i386/i386-expand.c (ix86_expand_floorceil): |
| Remove the sign of the intermediate value for flag_rounding_math. |
| (ix86_expand_floorceildf_32): Ditto. |
| |
| 2020-12-22 liuhongt <hongtao.liu@intel.com> |
| |
| * config/i386/i386.md (*one_cmpl<mode>2_1): Fix typo, change |
| alternative from 2 to 1 in attr isa. |
| |
| 2020-12-22 Ian Lance Taylor <iant@golang.org> |
| |
| * godump.c (go_output_typedef): If DECL_ORIGINAL_TYPE is NULL, use |
| TREE_TYPE. |
| |
| 2020-12-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/98353 |
| * gimplify.c (gimplify_init_ctor_eval_range): Gimplify value before |
| storing it into cref. |
| |
| 2020-12-21 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin-driver.c (darwin_find_version_from_kernel): |
| Compute the minor OS version from the minor kernel version. |
| |
| 2020-12-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/98407 |
| * fold-const.c (native_encode_initializer): When handling flexible |
| array members, fix up computation of length for memset. Also remove |
| " - o" as o is always guaranteed to be 0 in this code path. |
| |
| 2020-12-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/98383 |
| * gimplify.c (struct gimplify_omp_ctx): Add in_for_exprs flag. |
| (gimple_add_tmp_var): For addressable temporaries appearing in |
| simd lb, b or incr expressions, don't add a private clause unless |
| it is seen also outside of those expressions in the simd body. |
| (omp_notice_variable): Likewise. |
| (gimplify_omp_for): Set and reset in_for_exprs around gimplification |
| of lb, b or incr expressions. |
| |
| 2020-12-20 Max Filippov <jcmvbkbc@gmail.com> |
| |
| * config/xtensa/xtensa.md (bswapsi2, bswapdi2): New patterns. |
| |
| 2020-12-20 Jakub Jelinek <jakub@redhat.com> |
| |
| PR other/98400 |
| * doc/invoke.texi (-mbackchain): Fix a typo - -mmo-backchain -> |
| -mno-backchain. |
| |
| 2020-12-19 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/98366 |
| * fold-const.c (native_encode_initializer): Don't try to |
| memset more than total_bytes with off == -1 even if len is large. |
| Handle flexible array member initializers if off == -1 and mask is |
| NULL. |
| * expr.c (convert_to_bytes): Remove. |
| (constant_byte_string): Use native_encode_initializer instead of |
| convert_to_bytes. Remove extraneous semicolon. Punt on various |
| corner-cases the APIs don't handle, like sizes > INT_MAX, |
| BITS_PER_UNIT != 8, CHAR_BIT != 8. |
| |
| 2020-12-19 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| PR d/98067 |
| * dwarf2out.c (dwarf2out_imported_module_or_decl_1): Handle |
| CONST_DECL only if is_fortran, is_ada, or is_dlang. |
| |
| 2020-12-19 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/98378 |
| * gimple-ssa-store-merging.c (find_bswap_or_nop): Punt if CONSTRUCTOR |
| has no elements. |
| |
| 2020-12-18 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimplify.c (struct gimplify_omp_ctx): Add has_depend member. |
| (gimplify_scan_omp_clauses): Set it to true if OMP_CLAUSE_DEPEND |
| appears on OMP_TASK. |
| (gimplify_adjust_omp_clauses_1, gimplify_adjust_omp_clauses): Force |
| GOVD_WRITTEN on shared variables if task construct has depend clause. |
| |
| 2020-12-18 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| PR target/98177 |
| * tree-vect-loop.c (vect_create_epilog_for_reduction): Use |
| get_same_sized_vectype to obtain index type. |
| (vectorizable_reduction): Likewise. |
| |
| 2020-12-18 Kwok Cheung Yeung <kcy@codesourcery.com> |
| |
| * langhooks-def.h (lhd_get_decl_init): New. |
| (lhd_finish_decl_inits): New. |
| (LANG_HOOKS_GET_DECL_INIT): New. |
| (LANG_HOOKS_OMP_FINISH_DECL_INITS): New. |
| (LANG_HOOKS_DECLS): Add LANG_HOOKS_GET_DECL_INIT and |
| LANG_HOOKS_OMP_FINISH_DECL_INITS. |
| * langhooks.c (lhd_omp_get_decl_init): New. |
| (lhd_omp_finish_decl_inits): New. |
| * langhooks.h (struct lang_hooks_for_decls): Add omp_get_decl_init |
| and omp_finish_decl_inits. |
| * omp-offload.c (omp_discover_declare_target_var_r): Use |
| get_decl_init langhook in place of DECL_INITIAL. Call |
| omp_finish_decl_inits langhook at end of function. |
| |
| 2020-12-18 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Use |
| aarch64_full_sve_mode and aarch64_vq_mode directly, instead of |
| going via aarch64_simd_container_mode. |
| |
| 2020-12-18 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/arm/iterators.md (rot): Add UNSPEC_VCMUL, UNSPEC_VCMUL90, |
| UNSPEC_VCMUL180, UNSPEC_VCMUL270. |
| |
| 2020-12-17 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| * config/arm/arm-cpus.in: Add Cortex-A78C core. |
| * config/arm/arm-tables.opt: Regenerate. |
| * config/arm/arm-tune.md: Regenerate. |
| * doc/invoke.texi: Update docs. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/98347 |
| * rtl-ssa/access-utils.h (full_register): Use regno_reg_rtx |
| instead of reg_raw_mode. |
| |
| 2020-12-17 H.J. Lu <hjl.tools@gmail.com> |
| |
| * targhooks.h (default_estimated_poly_value): Updated. |
| |
| 2020-12-17 Nathan Sidwell <nathan@acm.org> |
| |
| * doc/invoke.texi (C++ Modules): Document lack of std |
| library header units. |
| |
| 2020-12-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * target.h (enum poly_value_estimate_kind): Define. |
| (estimated_poly_value): Take an estimate kind argument. |
| * target.def (estimated_poly_value): Update definition for the |
| above. |
| * doc/tm.texi: Regenerate. |
| * targhooks.c (estimated_poly_value): Update prototype. |
| * tree-vect-loop.c (vect_better_loop_vinfo_p): Use min, max and |
| likely estimates of VF to pick between vinfos. |
| * config/aarch64/aarch64.c (aarch64_cmp_autovec_modes): Use |
| estimated_poly_value instead of aarch64_estimated_poly_value. |
| (aarch64_estimated_poly_value): Take a kind argument and handle |
| it. |
| |
| 2020-12-17 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/arm_neon.h (vcreate_p64): Remove call to |
| '__builtin_neon_vcreatedi'. |
| |
| 2020-12-17 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97750 |
| * range-op.cc (operator_cast::op1_range): Handle pointers better. |
| |
| 2020-12-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| |
| * rtl-ssa.h: Include memmodel.h before tm_p.h. |
| |
| 2020-12-17 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/98289 |
| * shrink-wrap.c (can_get_prologue): Don't punt on EDGE_CROSSING |
| incoming edges. |
| |
| 2020-12-17 Marius Hillenbrand <mhillen@linux.ibm.com> |
| |
| * configure.ac: Change --enable-s390-excess-float-precision |
| default behavior for cross compiles with target headers. |
| * configure: Regenerate. |
| * doc/install.texi: Adjust documentation. |
| |
| 2020-12-17 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> |
| |
| * config/xtensa/xtensa.md (*ashlsi3_1, *ashlsi3_3x, *ashrsi3_3x) |
| (*lshrsi3_3x): New patterns. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * fwprop.c: Rewrite to use the RTL SSA framework. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * configure.ac: Add rtl-ssa to the list of dependence directories. |
| * configure: Regenerate. |
| * Makefile.in (rtl-ssa-warn): New variable. |
| (OBJS): Add the rtl-ssa object files. |
| * emit-rtl.h (rtl_data::ssa): New field. |
| * rtl-ssa.h: New file. |
| * system.h: Include <functional> when INCLUDE_FUNCTIONAL is defined. |
| * rtl-ssa/access-utils.h: Likewise. |
| * rtl-ssa/accesses.h: New file. |
| * rtl-ssa/accesses.cc: Likewise. |
| * rtl-ssa/blocks.h: New file. |
| * rtl-ssa/blocks.cc: Likewise. |
| * rtl-ssa/change-utils.h: Likewise. |
| * rtl-ssa/changes.h: New file. |
| * rtl-ssa/changes.cc: Likewise. |
| * rtl-ssa/functions.h: New file. |
| * rtl-ssa/functions.cc: Likewise. |
| * rtl-ssa/insn-utils.h: Likewise. |
| * rtl-ssa/insns.h: New file. |
| * rtl-ssa/insns.cc: Likewise. |
| * rtl-ssa/internals.inl: Likewise. |
| * rtl-ssa/is-a.inl: Likewise. |
| * rtl-ssa/member-fns.inl: Likewise. |
| * rtl-ssa/movement.h: Likewise. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/rtl.texi (RTL SSA): New node. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * rtl.h (simple_regno_set): Declare. |
| * rtlanal.c (simple_regno_set): New function. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * rtlanal.h: New file. |
| (MEM_REGNO): New constant. |
| (rtx_obj_flags): New namespace. |
| (rtx_obj_reference, rtx_properties): New classes. |
| (growing_rtx_properties, vec_rtx_properties_base): Likewise. |
| (vec_rtx_properties): New alias. |
| * rtlanal.c: Include it. |
| (rtx_properties::try_to_add_reg): New function. |
| (rtx_properties::try_to_add_dest): Likewise. |
| (rtx_properties::try_to_add_src): Likewise. |
| (rtx_properties::try_to_add_pattern): Likewise. |
| (rtx_properties::try_to_add_insn): Likewise. |
| (vec_rtx_properties_base::grow): Likewise. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * recog.h (insn_change_watermark): New class. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * recog.h (insn_propagation): New class. |
| * recog.c (insn_propagation::apply_to_mem_1): New function. |
| (insn_propagation::apply_to_rvalue_1): Likewise. |
| (insn_propagation::apply_to_lvalue_1): Likewise. |
| (insn_propagation::apply_to_pattern_1): Likewise. |
| (insn_propagation::apply_to_pattern): Likewise. |
| (insn_propagation::apply_to_rvalue): Likewise. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * recog.h (temporarily_undo_changes, redo_changes): Declare. |
| * recog.c (temporarily_undone_changes): New variable. |
| (validate_change_1, confirm_change_group): Check that it's zero. |
| (cancel_changes): Likewise. |
| (swap_change, temporarily_undo_changes): New functions. |
| (redo_changes): Likewise. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * recog.h (validate_change_xveclen): Declare. |
| * recog.c (change_t::old_len): New field. |
| (validate_change_1): Add a new_len parameter. Conditionally |
| replace the XVECLEN of an rtx, avoiding single-element PARALLELs. |
| (validate_change_xveclen): New function. |
| (cancel_changes): Undo changes made by validate_change_xveclen. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * rtl.h (simplify_context): New class. |
| (simplify_unary_operation, simplify_binary_operation): Use it. |
| (simplify_ternary_operation, simplify_relational_operation): Likewise. |
| (simplify_subreg, simplify_gen_unary, simplify_gen_binary): Likewise. |
| (simplify_gen_ternary, simplify_gen_relational): Likewise. |
| (simplify_gen_subreg, lowpart_subreg): Likewise. |
| * simplify-rtx.c (simplify_gen_binary): Turn into a member function |
| of simplify_context. |
| (simplify_gen_unary, simplify_gen_ternary, simplify_gen_relational) |
| (simplify_truncation, simplify_unary_operation): Likewise. |
| (simplify_unary_operation_1, simplify_byte_swapping_operation) |
| (simplify_associative_operation, simplify_logical_relational_operation) |
| (simplify_binary_operation, simplify_binary_operation_series) |
| (simplify_distributive_operation, simplify_plus_minus): Likewise. |
| (simplify_relational_operation, simplify_relational_operation_1) |
| (simplify_cond_clz_ctz, simplify_merge_mask): Likewise. |
| (simplify_ternary_operation, simplify_subreg, simplify_gen_subreg) |
| (lowpart_subreg): Likewise. |
| (simplify_binary_operation_1): Likewise. Test mem_depth when |
| deciding whether the ASHIFT or MULT form is canonical. |
| (simplify_merge_mask): Use simplify_context. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * rtl.h (register_asm_p): Declare. |
| * recog.c (verify_changes): Split out the test for whether |
| a hard register is a register asm to... |
| * rtlanal.c (register_asm_p): ...this new function. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * print-rtl.h (print_insn_with_notes): Declare. |
| * print-rtl.c (print_insn_with_notes): Make non-static |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * cfgrtl.h (update_cfg_for_uncondjump): Declare. |
| * combine.c (update_cfg_for_uncondjump): Move to... |
| * cfgrtl.c: ...here. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * vec.h (array_slice): New class. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * Makefile.in (OBJS): Add splay-tree-utils.o. |
| * system.h: Include <array> when INCLUDE_ARRAY is defined. |
| * selftest.h (splay_tree_cc_tests): Declare. |
| * selftest-run-tests.c (selftest::run_tests): Run splay_tree_cc_tests. |
| * splay-tree-utils.h: New file. |
| * splay-tree-utils.tcc: Likewise. |
| * splay-tree-utils.cc: Likewise. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * mux-utils.h: New file. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * obstack-utils.h: New file. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * iterator-utils.h (derived_iterator): New class. |
| (const_derived_container, wrapper_iterator): Likewise. |
| (list_iterator): Likewise. |
| |
| 2020-12-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * hard-reg-set.h (global_reg_set): Declare. |
| * reginfo.c (global_reg_set): New variable. |
| (init_reg_sets_1, globalize_reg): Update it when globalizing |
| registers. |
| |
| 2020-12-16 Piotr Kubaj <pkubaj@FreeBSD.org> |
| |
| * config.gcc (powerpc*le-*-freebsd*): Add. |
| * configure.ac (powerpc*le-*-freebsd*): Ditto. |
| * configure: Regenerate. |
| * config/rs6000/freebsd64.h (ASM_SPEC_COMMON): Use ENDIAN_SELECT. |
| (DEFAULT_ASM_ENDIAN): Add little endian support. |
| (LINK_OS_FREEBSD_SPEC64): Ditto. |
| |
| 2020-12-16 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> |
| |
| * config/xtensa/xtensa.c (xtensa_emit_move_sequence): Try to |
| replace 'l32r' with 'movi' + 'slli' when optimizing for size. |
| * config/xtensa/xtensa.md (movdi): Split loading DI mode constant |
| into register pair into two loads of SI mode constants. |
| |
| 2020-12-16 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/arm/arm_mve.h (__arm_vcmulq_rot90_f16): |
| (__arm_vcmulq_rot270_f16, _arm_vcmulq_rot180_f16, __arm_vcmulq_f16, |
| __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32, |
| __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcmlaq_f16, |
| __arm_vcmlaq_rot180_f16, __arm_vcmlaq_rot270_f16, |
| __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32, __arm_vcmlaq_rot180_f32, |
| __arm_vcmlaq_rot270_f32, __arm_vcmlaq_rot90_f32): Update builtin calls. |
| * config/arm/arm_mve_builtins.def (vcmulq_f, vcmulq_rot90_f, |
| vcmulq_rot180_f, vcmulq_rot270_f, vcmlaq_f, vcmlaq_rot90_f, |
| vcmlaq_rot180_f, vcmlaq_rot270_f): Removed. |
| (vcmulq, vcmulq_rot90, vcmulq_rot180, vcmulq_rot270, vcmlaq, |
| vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): New. |
| * config/arm/iterators.md (mve_rot): Add UNSPEC_VCMLA, UNSPEC_VCMLA90, |
| UNSPEC_VCMLA180, UNSPEC_VCMLA270, UNSPEC_VCMUL, UNSPEC_VCMUL90, |
| UNSPEC_VCMUL180, UNSPEC_VCMUL270. |
| (VCMUL): New. |
| * config/arm/mve.md (mve_vcmulq_f<mode, mve_vcmulq_rot180_f<mode>, |
| mve_vcmulq_rot270_f<mode>, mve_vcmulq_rot90_f<mode>, mve_vcmlaq_f<mode>, |
| mve_vcmlaq_rot180_f<mode>, mve_vcmlaq_rot270_f<mode>, |
| mve_vcmlaq_rot90_f<mode>): Removed. |
| (mve_vcmlaq<mve_rot><mode>, mve_vcmulq<mve_rot><mode>, |
| mve_vcaddq<mve_rot><mode>, cadd<rot><mode>3, mve_vcaddq<mve_rot><mode>): |
| New. |
| * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270, UNSPEC_VCMUL, |
| UNSPEC_VCMUL180): New. |
| (VCMULQ_F, VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F, |
| VCMLAQ_F, VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F): Removed. |
| |
| 2020-12-16 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/arm/arm_mve.h (__arm_vcaddq_rot90_u8, __arm_vcaddq_rot270_u8, |
| __arm_vcaddq_rot90_s8, __arm_vcaddq_rot270_s8, |
| __arm_vcaddq_rot90_u16, __arm_vcaddq_rot270_u16, |
| __arm_vcaddq_rot90_s16, __arm_vcaddq_rot270_s16, |
| __arm_vcaddq_rot90_u32, __arm_vcaddq_rot270_u32, |
| __arm_vcaddq_rot90_s32, __arm_vcaddq_rot270_s32, |
| __arm_vcaddq_rot90_f16, __arm_vcaddq_rot270_f16, |
| __arm_vcaddq_rot90_f32, __arm_vcaddq_rot270_f32): Update builtin calls. |
| * config/arm/arm_mve_builtins.def (vcaddq_rot90_u, vcaddq_rot270_u, |
| vcaddq_rot90_s, vcaddq_rot270_s, vcaddq_rot90_f, vcaddq_rot270_f): |
| Removed. |
| (vcaddq_rot90, vcaddq_rot270): New. |
| * config/arm/constraints.md (Dz): Include MVE. |
| * config/arm/iterators.md (mve_rot): New. |
| (supf): Remove VCADDQ_ROT270_S, VCADDQ_ROT270_U, VCADDQ_ROT90_S, |
| VCADDQ_ROT90_U. |
| (VCADDQ_ROT270, VCADDQ_ROT90): Removed. |
| * config/arm/mve.md (mve_vcaddq_rot270_<supf><mode, |
| mve_vcaddq_rot90_<supf><mode>, mve_vcaddq_rot270_f<mode>, |
| mve_vcaddq_rot90_f<mode>): Removed. |
| (mve_vcaddq<mve_rot><mode>, mve_vcaddq<mve_rot><mode>): New. |
| * config/arm/unspecs.md (VCADDQ_ROT270_S, VCADDQ_ROT90_S, |
| VCADDQ_ROT270_U, VCADDQ_ROT90_U, VCADDQ_ROT270_F, |
| VCADDQ_ROT90_F): Removed. |
| * config/arm/vec-common.md (cadd<rot><mode>3): New. |
| |
| 2020-12-16 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/aarch64/aarch64-simd.md (cadd<rot><mode>3): New. |
| * config/aarch64/iterators.md (SVE2_INT_CADD_OP): New. |
| * config/aarch64/aarch64-sve.md (cadd<rot><mode>3): New. |
| * config/aarch64/aarch64-sve2.md (cadd<rot><mode>3): New. |
| |
| 2020-12-16 Pat Haugen <pthaugen@linux.ibm.com> |
| |
| * config/rs6000/mma.md (*movxo, mma_<vvi4i4i8>, mma_<avvi4i4i8>, |
| mma_<vvi4i4i2>, mma_<avvi4i4i2>, mma_<vvi4i4>, mma_<avvi4i4>, |
| mma_<pvi4i2>, mma_<apvi4i2>, mma_<vvi4i4i4>, mma_<avvi4i4i4>): |
| Remove explicit setting of length attribute. |
| |
| 2020-12-16 Jakub Jelinek <jakub@redhat.com> |
| |
| * varasm.c (default_elf_asm_named_section): Always force |
| section flags even for sections with SECTION_LINK_ORDER flag. |
| |
| 2020-12-16 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/98146 |
| * defaults.h (SUPPORTS_SHF_GNU_RETAIN): New. |
| * varasm.c (get_section): Replace HAVE_GAS_SHF_GNU_RETAIN with |
| SUPPORTS_SHF_GNU_RETAIN. |
| (resolve_unique_section): Likewise. |
| (get_variable_section): Likewise. |
| (switch_to_section): Likewise. |
| |
| 2020-12-16 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/98146 |
| * varasm.c (switch_to_section): Warn when a symbol without used |
| attribute and a symbol with used attribute are placed in the |
| section with the same name. |
| |
| 2020-12-16 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/98146 |
| * output.h (switch_to_section): Add a tree argument, default to |
| nullptr. |
| * varasm.c (get_section): If the SECTION_RETAIN bit doesn't match, |
| return and switch to a new section later. |
| (assemble_start_function): Pass decl to switch_to_section. |
| (assemble_variable): Likewise. |
| (switch_to_section): If the SECTION_RETAIN bit doesn't match, |
| switch to a new section. |
| |
| 2020-12-16 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96239 |
| * gimple-ssa-store-merging.c (find_bswap_or_nop): Handle a vector |
| CONSTRUCTOR. |
| (bswap_replace): Likewise. |
| |
| 2020-12-16 Martin Liska <mliska@suse.cz> |
| |
| * common.opt: Remove usage of Report. |
| * config/aarch64/aarch64.opt: Ditto. |
| * config/alpha/alpha.opt: Ditto. |
| * config/arc/arc.opt: Ditto. |
| * config/arm/arm.opt: Ditto. |
| * config/avr/avr.opt: Ditto. |
| * config/bfin/bfin.opt: Ditto. |
| * config/bpf/bpf.opt: Ditto. |
| * config/c6x/c6x.opt: Ditto. |
| * config/cr16/cr16.opt: Ditto. |
| * config/cris/cris.opt: Ditto. |
| * config/cris/elf.opt: Ditto. |
| * config/csky/csky.opt: Ditto. |
| * config/darwin.opt: Ditto. |
| * config/fr30/fr30.opt: Ditto. |
| * config/frv/frv.opt: Ditto. |
| * config/ft32/ft32.opt: Ditto. |
| * config/gcn/gcn.opt: Ditto. |
| * config/i386/cygming.opt: Ditto. |
| * config/i386/i386.opt: Ditto. |
| * config/ia64/ia64.opt: Ditto. |
| * config/ia64/ilp32.opt: Ditto. |
| * config/linux-android.opt: Ditto. |
| * config/linux.opt: Ditto. |
| * config/lm32/lm32.opt: Ditto. |
| * config/m32r/m32r.opt: Ditto. |
| * config/m68k/m68k.opt: Ditto. |
| * config/mcore/mcore.opt: Ditto. |
| * config/microblaze/microblaze.opt: Ditto. |
| * config/mips/mips.opt: Ditto. |
| * config/mmix/mmix.opt: Ditto. |
| * config/mn10300/mn10300.opt: Ditto. |
| * config/moxie/moxie.opt: Ditto. |
| * config/msp430/msp430.opt: Ditto. |
| * config/nds32/nds32.opt: Ditto. |
| * config/nios2/elf.opt: Ditto. |
| * config/nios2/nios2.opt: Ditto. |
| * config/nvptx/nvptx.opt: Ditto. |
| * config/pa/pa.opt: Ditto. |
| * config/pdp11/pdp11.opt: Ditto. |
| * config/pru/pru.opt: Ditto. |
| * config/riscv/riscv.opt: Ditto. |
| * config/rl78/rl78.opt: Ditto. |
| * config/rs6000/aix64.opt: Ditto. |
| * config/rs6000/linux64.opt: Ditto. |
| * config/rs6000/rs6000.opt: Ditto. |
| * config/rs6000/sysv4.opt: Ditto. |
| * config/rx/elf.opt: Ditto. |
| * config/rx/rx.opt: Ditto. |
| * config/s390/s390.opt: Ditto. |
| * config/s390/tpf.opt: Ditto. |
| * config/sh/sh.opt: Ditto. |
| * config/sol2.opt: Ditto. |
| * config/sparc/long-double-switch.opt: Ditto. |
| * config/sparc/sparc.opt: Ditto. |
| * config/tilegx/tilegx.opt: Ditto. |
| * config/tilepro/tilepro.opt: Ditto. |
| * config/v850/v850.opt: Ditto. |
| * config/visium/visium.opt: Ditto. |
| * config/vms/vms.opt: Ditto. |
| * config/vxworks.opt: Ditto. |
| * config/xtensa/xtensa.opt: Ditto. |
| |
| 2020-12-16 Martin Liska <mliska@suse.cz> |
| |
| * doc/options.texi: Remove Report keyword. |
| * opt-functions.awk: Print error when Report keyword |
| is used. |
| * optc-gen.awk: Do not handle Report keyword. |
| * opts.h (struct cl_option): Remove cl_report bitfield flag. |
| |
| 2020-12-16 Martin Liska <mliska@suse.cz> |
| |
| PR sanitizer/97868 |
| * common.opt: Add new warning -Wtsan. |
| * doc/invoke.texi: Likewise. |
| * tsan.c (instrument_builtin_call): Warn users about unsupported |
| std::atomic_thread_fence. |
| |
| 2020-12-16 Martin Liska <mliska@suse.cz> |
| |
| PR rtl-optimization/98271 |
| PR rtl-optimization/98276 |
| PR tree-optimization/98279 |
| * opts-common.c (set_option): Do not allow overflow for integer |
| arguments. |
| |
| 2020-12-16 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR tree-optimization/98272 |
| * tree-switch-conversion.c (bit_test_cluster::emit): When finding |
| out whether the entry test can be merged in the bit test, do the |
| computation using the type of the index expression. |
| |
| 2020-12-16 Kewen Lin <linkw@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_expand_vector_init): Use |
| paradoxical subreg instead of zero_extend for QI/HI promotion. |
| |
| 2020-12-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> |
| |
| PR target/66791 |
| * config/arm/arm_neon.h: Replace calls to __builtin_vcgt* by |
| <, > operators in vclt and vcgt intrinsics respectively. |
| * config/arm/arm_neon_builtins.def: Remove entry for |
| vcgt and vcgtu. |
| |
| 2020-12-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> |
| |
| PR target/66791 |
| * config/arm/arm_neon.h: Replace calls to __builtin_vneg* by - operator |
| in vneg intrinsics. |
| * config/arm/arm_neon_builtins.def: Remove entry for vneg. |
| |
| 2020-12-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> |
| |
| PR target/66791 |
| * config/arm/arm_neon.h: Replace calls to __builtin_vcreate* |
| in vcreate intrinsics. |
| * config/arm/arm_neon_builtins.def: Remove entry for vcreate. |
| |
| 2020-12-15 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96094 |
| * match.pd (X / bool_range_Y -> X): New simplification. |
| |
| 2020-12-15 Nathan Sidwell <nathan@acm.org> |
| |
| * doc/cppopts.texi: Document new cpp opt. |
| * doc/invoke.texi: Add C++20 module option & documentation. |
| |
| 2020-12-15 Nathan Sidwell <nathan@acm.org> |
| |
| * Makefile.in (CODYINC, CODYLIB, CODYLIB_H): New. Use them. |
| |
| 2020-12-15 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/98274 |
| * config/i386/i386-options.c (ix86_option_override_internal): Set |
| ix86_tune_string to "generic" even when it wasn't specified and |
| ix86_arch_string is "x86-64-v2", "x86-64-v3" or "x86-64-v4". |
| Remove useless {}s around a single statement. |
| |
| 2020-12-15 Martin Liska <mliska@suse.cz> |
| |
| PR lto/98275 |
| * lto-wrapper.c: Do not use -j0 when we are unable to detect |
| number of cores. |
| |
| 2020-12-15 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/i386/i386-options.c (ix86_option_override_internal): Don't |
| error on -march=x86-64-v[234] with -m32 or -mabi=ms. |
| * config.gcc: Don't reject --with-arch=x86-64-v[234] or |
| --with-arch_32=x86-64-v[234]. |
| * doc/invoke.texi (-march=x86-64-v[234]): Document what the option |
| does for other ABIs. |
| |
| 2020-12-15 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/98273 |
| * gcov.c (output_json_intermediate_file): Use stack of nested |
| functions for lines in a source file. Pop when a function ends. |
| |
| 2020-12-15 Gerald Pfeifer <gerald@pfeifer.com> |
| |
| * doc/invoke.texi (Instrumentation Options): Update link to |
| KernelAddressSanitizer. |
| |
| 2020-12-15 Max Filippov <jcmvbkbc@gmail.com> |
| |
| * config/xtensa/predicates.md (addsubx_operand): Change accepted |
| values from 2/4/8 to 1..3. |
| * config/xtensa/xtensa.md (*addx, *subx): Change RTL pattern |
| to use 'ashift' instead of 'mult'. Update operands[3] value. |
| |
| 2020-12-14 Piotr Kubaj <pkubaj@FreeBSD.org> |
| Gerald Pfeifer <gerald@pfeifer.com> |
| |
| * config/rs6000/freebsd64.h (PROCESSOR_DEFAULT): Update |
| to PROCESSOR_PPC7450. |
| (PROCESSOR_DEFAULT64): Update to PROCESSOR_POWER8. |
| |
| 2020-12-14 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/98166 |
| PR c++/57111 |
| PR middle-end/98160 |
| * builtins.c (check_access): Call tree_inlined_location |
| fndecl_alloc_p): Handle BUILT_IN_ALIGNED_ALLOC and |
| BUILT_IN_GOMP_ALLOC. |
| call_dealloc_p): Remove unused function. |
| (new_delete_mismatch_p): Call valid_new_delete_pair_p and rework. |
| (matching_alloc_calls_p): Handle built-in deallocation functions. |
| (warn_dealloc_offset): Corrct the handling of user-defined operators |
| delete. |
| (maybe_emit_free_warning): Avoid assuming expression is a decl. |
| Simplify. |
| * doc/extend.texi (attribute malloc): Update. |
| * tree-ssa-dce.c (valid_new_delete_pair_p): Factor code out into |
| valid_new_delete_pair_p in tree.c. |
| * tree.c (tree_inlined_location): Define new function. |
| (valid_new_delete_pair_p): Define. |
| * tree.h (tree_inlined_location): Declare. |
| (valid_new_delete_pair_p): Declare. |
| |
| 2020-12-14 Sebastian Pop <spop@amazon.com> |
| |
| * config.gcc (aarch64*-*-*): Remove --with-{cpu,arch,tune}-32 flags. |
| |
| 2020-12-14 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| * config.gcc (aarch64*-*-*): Add --with-tune. Support --with-cpu=native. |
| * config/aarch64/aarch64.h (OPTION_DEFAULT_SPECS): Add --with-tune. |
| |
| 2020-12-14 Martin Liska <mliska@suse.cz> |
| |
| * gcov.c (output_json_intermediate_file): Update comments. |
| |
| 2020-12-14 Tamar Christina <tamar.christina@arm.com> |
| |
| PR middle-end/98264 |
| * tree-vect-slp-patterns.c (linear_loads_p): Exclude TOP permute. |
| |
| 2020-12-14 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/mve.md (mve_vnegq_f): Use 'neg' instead of unspec. |
| (mve_vnegq_s): Likewise. |
| * config/arm/neon.md (neg<mode>2): Rename into neon_neg<mode>2. |
| (<absneg_str><mode>2): Rename into neon_<absneg_str><mode>2. |
| (neon_v<absneg_str><mode>): Call gen_neon_<absneg_str><mode>2. |
| (vashr<mode>3): Call gen_neon_neg<mode>2. |
| (vlshr<mode>3): Call gen_neon_neg<mode>2. |
| (neon_vneg<mode>): Call gen_neon_neg<mode>2. |
| * config/arm/unspecs.md (VNEGQ_F, VNEGQ_S): Remove. |
| * config/arm/vec-common.md (neg<mode>2): New expander. |
| |
| 2020-12-14 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/iterators.md (VDQNOTM2): New mode iterator. |
| (supf): Remove VMVNQ_S and VMVNQ_U. |
| (VMVNQ): Remove. |
| * config/arm/mve.md (mve_vmvnq_u<mode>): New entry for vmvn |
| instruction using expression not. |
| (mve_vmvnq_s<mode>): New expander. |
| * config/arm/neon.md (one_cmpl<mode>2): Renamed into |
| one_cmpl<mode>2_neon. |
| * config/arm/unspecs.md (VMVNQ_S, VMVNQ_U): Remove. |
| * config/arm/vec-common.md (one_cmpl<mode>2): New expander. |
| |
| 2020-12-14 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/iterators.md (supf): Remove VBICQ_S and VBICQ_U. |
| (VBICQ): Remove. |
| * config/arm/mve.md (mve_vbicq_u<mode>): New entry for vbic |
| instruction using expression and not. |
| (mve_vbicq_s<mode>): New expander. |
| (mve_vbicq_f<mode>): Replace use of unspec by 'and not'. |
| * config/arm/unspecs.md (VBICQ_S, VBICQ_U, VBICQ_F): Remove. |
| |
| 2020-12-14 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/iterators.md (supf): Remove VEORQ_S and VEORQ_U. |
| (VEORQ): Remove. |
| * config/arm/mve.md (mve_veorq_u<mode>): New entry for veor |
| instruction using expression xor. |
| (mve_veorq_s<mode>): New expander. |
| (mve_veorq_f<mode>): Use 'xor' code instead of unspec. |
| * config/arm/neon.md (xor<mode>3): Renamed into xor<mode>3_neon. |
| * config/arm/unspecs.md (VEORQ_S, VEORQ_U, VEORQ_F): Remove. |
| * config/arm/vec-common.md (xor<mode>3): New expander. |
| |
| 2020-12-14 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A78C core. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * doc/invoke.texi: Update docs. |
| |
| 2020-12-14 Nikhil Benesch <nikhil.benesch@gmail.com> |
| |
| * godump.c (go_output_typedef): Suppress typedefs whose name |
| matches the tag of the underlying struct, union, or enum. |
| Output declarations for enums that do not appear in typedefs. |
| |
| 2020-12-13 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (vax_output_int_move): Unify push operation |
| selection. |
| |
| 2020-12-13 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (vax_output_int_move): Check the correct |
| operand for constant 0 push operation. |
| |
| 2020-12-13 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (vax_expand_addsub_di_operands): Handle equal |
| input operands with subtraction. |
| |
| 2020-12-13 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (vax_expand_addsub_di_operands): Handle the |
| addition or subtraction of 0. |
| |
| 2020-12-13 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (vax_expand_addsub_di_operands): Remove |
| unused register allocation. |
| |
| 2020-12-13 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (casesi): Use `gen_int_mode' rather than |
| `GEN_INT' for the immediate used for lower bound adjustment. |
| |
| 2020-12-13 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/98256 |
| * tree-ssa-math-opts.c (match_uaddsub_overflow): For BIT_NOT_EXPR, |
| only handle a single use, and insert .ADD_OVERFLOW before the |
| comparison rather than after the BIT_NOT_EXPR. Return true iff |
| it is BIT_NOT_EXPR and it has been removed. |
| (math_opts_dom_walker::after_dom_children) <case BIT_NOT_EXPR>: |
| If match_uaddsub_overflow returned true, continue instead of break. |
| |
| 2020-12-13 Tamar Christina <tamar.christina@arm.com> |
| |
| Revert: |
| 2020-12-13 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/arm/arm_mve.h (__arm_vcaddq_rot90_u8, __arm_vcaddq_rot270_u8, |
| , __arm_vcaddq_rot90_s8, __arm_vcaddq_rot270_s8, |
| __arm_vcaddq_rot90_u16, __arm_vcaddq_rot270_u16, __arm_vcaddq_rot90_s16, |
| __arm_vcaddq_rot270_s16, __arm_vcaddq_rot90_u32, |
| __arm_vcaddq_rot270_u32, __arm_vcaddq_rot90_s32, |
| __arm_vcaddq_rot270_s32, __arm_vcmulq_rot90_f16, |
| __arm_vcmulq_rot270_f16, __arm_vcmulq_rot180_f16, |
| __arm_vcmulq_f16, __arm_vcaddq_rot90_f16, __arm_vcaddq_rot270_f16, |
| __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32, |
| __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcaddq_rot90_f32, |
| __arm_vcaddq_rot270_f32, __arm_vcmlaq_f16, __arm_vcmlaq_rot180_f16, |
| __arm_vcmlaq_rot270_f16, __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32, |
| __arm_vcmlaq_rot180_f32, __arm_vcmlaq_rot270_f32, |
| __arm_vcmlaq_rot90_f32): Update builtin calls. |
| * config/arm/arm_mve_builtins.def (vcaddq_rot90_u, vcaddq_rot270_u, |
| vcaddq_rot90_s, vcaddq_rot270_s, vcaddq_rot90_f, vcaddq_rot270_f, |
| vcmulq_f, vcmulq_rot90_f, vcmulq_rot180_f, vcmulq_rot270_f, |
| vcmlaq_f, vcmlaq_rot90_f, vcmlaq_rot180_f, vcmlaq_rot270_f): Removed. |
| (vcaddq_rot90, vcaddq_rot270, vcmulq, vcmulq_rot90, vcmulq_rot180, |
| vcmulq_rot270, vcmlaq, vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): |
| New. |
| * config/arm/constraints.md (Dz): Include MVE. |
| * config/arm/iterators.md (mve_rotsplit1, mve_rotsplit2): New. |
| (rot): Add UNSPEC_VCMLS, UNSPEC_VCMUL and UNSPEC_VCMUL180. |
| (rot_op, rotsplit1, rotsplit2, fcmac1, VCMLA_OP, VCMUL_OP): New. |
| * config/arm/mve.md (VCADDQ_ROT270_S, VCADDQ_ROT90_S, VCADDQ_ROT270_U, |
| VCADDQ_ROT90_U, VCADDQ_ROT270_F, VCADDQ_ROT90_F, VCMULQ_F, |
| VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F, VCMLAQ_F, |
| VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F, VCADDQ_ROT270_S, |
| VCADDQ_ROT270, VCADDQ_ROT90): Removed. |
| (mve_rot, VCMUL): New. |
| (mve_vcaddq_rot270_<supf><mode, mve_vcaddq_rot90_<supf><mode>, |
| mve_vcaddq_rot270_f<mode>, mve_vcaddq_rot90_f<mode>, mve_vcmulq_f<mode, |
| mve_vcmulq_rot180_f<mode>, mve_vcmulq_rot270_f<mode>, |
| mve_vcmulq_rot90_f<mode>, mve_vcmlaq_f<mode>, mve_vcmlaq_rot180_f<mode>, |
| mve_vcmlaq_rot270_f<mode>, mve_vcmlaq_rot90_f<mode>): Removed. |
| (mve_vcmlaq<mve_rot><mode>, mve_vcmulq<mve_rot><mode>, |
| mve_vcaddq<mve_rot><mode>, cadd<rot><mode>3, mve_vcaddq<mve_rot><mode>): |
| New. |
| (cmul<rot_op><mode>3): Exclude MVE types. |
| * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270): New. |
| * config/arm/vec-common.md (cadd<rot><mode>3, cmul<rot_op><mode>3, |
| arm_vcmla<rot><mode>, cml<fcmac1><rot_op><mode>4): New. |
| * config/arm/unspecs.md (UNSPEC_VCMUL, UNSPEC_VCMUL180, UNSPEC_VCMLS, |
| UNSPEC_VCMLS180): New. |
| * config/arm/neon.md (cmul<rot_op><mode>3): New. |
| |
| 2020-12-13 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/92469 |
| * varasm.c (eliminable_regno_p): New function. |
| (make_decl_rtl): Reject asm vars for frame and argp |
| if they are different from hard frame pointer. |
| |
| 2020-12-13 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/arm/arm_mve.h (__arm_vcaddq_rot90_u8, __arm_vcaddq_rot270_u8, |
| , __arm_vcaddq_rot90_s8, __arm_vcaddq_rot270_s8, |
| __arm_vcaddq_rot90_u16, __arm_vcaddq_rot270_u16, __arm_vcaddq_rot90_s16, |
| __arm_vcaddq_rot270_s16, __arm_vcaddq_rot90_u32, |
| __arm_vcaddq_rot270_u32, __arm_vcaddq_rot90_s32, |
| __arm_vcaddq_rot270_s32, __arm_vcmulq_rot90_f16, |
| __arm_vcmulq_rot270_f16, __arm_vcmulq_rot180_f16, |
| __arm_vcmulq_f16, __arm_vcaddq_rot90_f16, __arm_vcaddq_rot270_f16, |
| __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32, |
| __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcaddq_rot90_f32, |
| __arm_vcaddq_rot270_f32, __arm_vcmlaq_f16, __arm_vcmlaq_rot180_f16, |
| __arm_vcmlaq_rot270_f16, __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32, |
| __arm_vcmlaq_rot180_f32, __arm_vcmlaq_rot270_f32, |
| __arm_vcmlaq_rot90_f32): Update builtin calls. |
| * config/arm/arm_mve_builtins.def (vcaddq_rot90_u, vcaddq_rot270_u, |
| vcaddq_rot90_s, vcaddq_rot270_s, vcaddq_rot90_f, vcaddq_rot270_f, |
| vcmulq_f, vcmulq_rot90_f, vcmulq_rot180_f, vcmulq_rot270_f, |
| vcmlaq_f, vcmlaq_rot90_f, vcmlaq_rot180_f, vcmlaq_rot270_f): Removed. |
| (vcaddq_rot90, vcaddq_rot270, vcmulq, vcmulq_rot90, vcmulq_rot180, |
| vcmulq_rot270, vcmlaq, vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): |
| New. |
| * config/arm/constraints.md (Dz): Include MVE. |
| * config/arm/iterators.md (mve_rotsplit1, mve_rotsplit2): New. |
| (rot): Add UNSPEC_VCMLS, UNSPEC_VCMUL and UNSPEC_VCMUL180. |
| (rot_op, rotsplit1, rotsplit2, fcmac1, VCMLA_OP, VCMUL_OP): New. |
| * config/arm/mve.md (VCADDQ_ROT270_S, VCADDQ_ROT90_S, VCADDQ_ROT270_U, |
| VCADDQ_ROT90_U, VCADDQ_ROT270_F, VCADDQ_ROT90_F, VCMULQ_F, |
| VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F, VCMLAQ_F, |
| VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F, VCADDQ_ROT270_S, |
| VCADDQ_ROT270, VCADDQ_ROT90): Removed. |
| (mve_rot, VCMUL): New. |
| (mve_vcaddq_rot270_<supf><mode, mve_vcaddq_rot90_<supf><mode>, |
| mve_vcaddq_rot270_f<mode>, mve_vcaddq_rot90_f<mode>, mve_vcmulq_f<mode, |
| mve_vcmulq_rot180_f<mode>, mve_vcmulq_rot270_f<mode>, |
| mve_vcmulq_rot90_f<mode>, mve_vcmlaq_f<mode>, mve_vcmlaq_rot180_f<mode>, |
| mve_vcmlaq_rot270_f<mode>, mve_vcmlaq_rot90_f<mode>): Removed. |
| (mve_vcmlaq<mve_rot><mode>, mve_vcmulq<mve_rot><mode>, |
| mve_vcaddq<mve_rot><mode>, cadd<rot><mode>3, mve_vcaddq<mve_rot><mode>): |
| New. |
| (cmul<rot_op><mode>3): Exclude MVE types. |
| * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270): New. |
| * config/arm/vec-common.md (cadd<rot><mode>3, cmul<rot_op><mode>3, |
| arm_vcmla<rot><mode>, cml<fcmac1><rot_op><mode>4): New. |
| * config/arm/unspecs.md (UNSPEC_VCMUL, UNSPEC_VCMUL180, UNSPEC_VCMLS, |
| UNSPEC_VCMLS180): New. |
| * config/arm/neon.md (cmul<rot_op><mode>3): New. |
| |
| 2020-12-13 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/arm/arm.c (arm_preferred_simd_mode): Add E_HFmode. |
| |
| 2020-12-13 Tamar Christina <tamar.christina@arm.com> |
| |
| * tree-vect-slp-patterns.c: New file. |
| * Makefile.in: Add it. |
| * doc/passes.texi: Document it. |
| * internal-fn.def (COMPLEX_ADD_ROT90, COMPLEX_ADD_ROT270): New. |
| * optabs.def (cadd90_optab, cadd270_optab): New. |
| * doc/md.texi: Document them. |
| * tree-vect-loop.c (vect_analyze_loop_2): Add dissolve code. |
| * tree-vect-slp.c: |
| (vect_free_slp_instance, vect_create_new_slp_node): Export. |
| (vect_match_slp_patterns_2, vect_match_slp_patterns): New. |
| (vect_analyze_slp): Use it. |
| * tree-vectorizer.h (vect_free_slp_tree): Export. |
| (enum _complex_operation): Forward declare. |
| (class vect_pattern): New |
| |
| 2020-12-13 Tamar Christina <tamar.christina@arm.com> |
| |
| * tree-vect-patterns.c (vect_mark_pattern_stmts): Remove static inline. |
| * tree-vect-slp.c (vect_create_new_slp_node): Remove static and only |
| set smts if valid. |
| * tree-vectorizer.c (vec_info::add_pattern_stmt): New. |
| (vec_info::set_vinfo_for_stmt): Optionally enforce read-only. |
| * tree-vectorizer.h (struct _slp_tree): Use new types. |
| (lane_permutation_t, lane_permutation_t): New. |
| (vect_create_new_slp_node, vect_mark_pattern_stmts): New. |
| |
| 2020-12-13 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| |
| * doc/sourcebuild.texi (Commands for use in dg-final, Scan the |
| assembly output, scan-assembler-symbol-section): Document. |
| (scan-symbol-section): Document. |
| |
| 2020-12-13 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * is-a.h (reinterpret_is_a_helper): New class. |
| (static_is_a_helper): Likewise. |
| (is_a_helper): Inherit from reinterpret_is_a_helper. |
| (is_a_helper<const T *>): New specialization. |
| |
| 2020-12-13 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * coretypes.h (iterator_range): Move to... |
| * iterator-utils.h: ...this new file. |
| |
| 2020-12-13 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * rtlanal.c (noop_move_p): Don't check for REG_EQUAL notes. |
| |
| 2020-12-13 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * vec.h (vnull::operator vec<T, A, L>): Make const. |
| |
| 2020-12-12 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96685 |
| * match.pd (~(X - Y) -> ~X + Y): New optimization. |
| (~X + Y -> (Y - X) - 1): Likewise. |
| |
| 2020-12-12 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96272 |
| * tree-ssa-math-opts.c (uaddsub_overflow_check_p): Add OTHER argument. |
| Handle BIT_NOT_EXPR. |
| (match_uaddsub_overflow): Optimize unsigned a > ~b into |
| __imag__ .ADD_OVERFLOW (a, b). |
| (math_opts_dom_walker::after_dom_children): Call match_uaddsub_overflow |
| even for BIT_NOT_EXPR. |
| |
| 2020-12-12 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/98183 |
| * omp-low.c (lower_omp_target): Don't add OMP_RETURN for |
| data regions. |
| * omp-expand.c (expand_omp_target): Don't try to remove |
| OMP_RETURN for data regions. |
| (build_omp_regions_1, omp_make_gimple_edges): Don't expect |
| OMP_RETURN for data regions. |
| |
| 2020-12-11 Nathan Sidwell <nathan@acm.org> |
| |
| * gcc.c (cpp_unique_options): Add Mmodules, Mno-modules. |
| * tree-core.h (enum tree_index): Add TI_MODULE_HWM. |
| |
| 2020-12-11 Jim Wilson <jimw@sifive.com> |
| |
| * varasm.c (get_section): Add DECL_P check before DECL_PRESERVE_P. |
| |
| 2020-12-11 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/iterators.md (VDQ): Remove TARGET_HAVE_MVE |
| conditions. |
| * config/arm/vec-common.md (and<mode>3): Use |
| ARM_HAVE_<MODE>_ARITH. |
| (ior<mode>3): Likewise. |
| |
| 2020-12-11 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (arc_active_insn): Ignore all non essential |
| instructions when getting the next active instruction. |
| (check_store_cacheline_hazard): Update. |
| (workaround_arc_anomaly): Remove obsolete cache hazard code. |
| |
| 2020-12-11 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (arc_reorg): Avoid limm in BRcc. |
| |
| 2020-12-11 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc-protos.h (arc_scheduling_not_expected): Remove |
| it. |
| (arc_sets_cc_p): Likewise. |
| (arc_need_delay): Likewise. |
| * config/arc/arc.c (arc_sets_cc_p): Likewise. |
| (arc_need_delay): Likewise. |
| (arc_scheduling_not_expected): Likewise. |
| * config/arc/arc.md: Convert adc/sbc patterns to simple |
| instruction definitions. |
| |
| 2020-12-11 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/iterators.md (supf): Remove VORRQ_S and VORRQ_U. |
| (VORRQ): Remove. |
| * config/arm/mve.md (mve_vorrq_s<mode>): New entry for vorr |
| instruction using expression ior. |
| (mve_vorrq_u<mode>): New expander. |
| (mve_vorrq_f<mode>): Use ior code instead of unspec. |
| * config/arm/neon.md (ior<mode>3): Renamed into ior<mode>3_neon. |
| * config/arm/predicates.md (imm_for_neon_logic_operand): Enable |
| for MVE. |
| * config/arm/unspecs.md (VORRQ_S, VORRQ_U, VORRQ_F): Remove. |
| * config/arm/vec-common.md (ior<mode>3): New expander. |
| |
| 2020-12-11 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.md (mpyd<su_optab>_arcv2hs): New template |
| pattern. |
| (*pmpyd<su_optab>_arcv2hs): Likewise. |
| (*pmpyd<su_optab>_imm_arcv2hs): Likewise. |
| (mpyd_arcv2hs): Moved into above template. |
| (mpyd_imm_arcv2hs): Moved into above template. |
| (mpydu_arcv2hs): Likewise. |
| (mpydu_imm_arcv2hs): Likewise. |
| (su_optab): New optab prefix for sign/zero-extending operations. |
| |
| 2020-12-11 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/98219 |
| * config/i386/uintrintrin.h (__uintr_frame): Remove uirrv. |
| |
| 2020-12-11 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * doc/sourcebuild.texi (arm_softfloat): Improve documentation. |
| |
| 2020-12-11 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/98229 |
| * optabs.c (expand_doubleword_mod): Canonicalize op1 and |
| 1 - INTVAL (op1) as word_mode constants when used in |
| word_mode arithmetics. |
| |
| 2020-12-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98235 |
| * tree-vect-slp.c (vect_build_slp_tree): Exchange npermutes |
| for limit. Decrement that for each cache miss and fail |
| discovery when it reaches zero. |
| (vect_build_slp_tree_2): Remove npermutes handling and |
| simply pass down limit. |
| (vect_build_slp_instance): Use pass down limit. |
| (vect_analyze_slp_instance): Likewise. |
| (vect_analyze_slp): Base the SLP discovery limit on |
| max_tree_size and pass it down. |
| |
| 2020-12-11 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/98190 |
| * expr.c (expand_assignment): If to_rtx is a promoted SUBREG, |
| ensure sign or zero extension either through use of store_expr |
| or by extending manually. |
| |
| 2020-12-11 Andrea Corallo <andrea.corallo@arm.com> |
| |
| PR rtl-optimization/97092 |
| * ira-color.c (update_costs_from_allocno): Do not carry over mode |
| between subsequent iterations. |
| |
| 2020-12-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95582 |
| * tree-vect-patterns.c (vect_recog_bool_pattern): Check |
| for VECT_SCALAR_BOOLEAN_TYPE_P, not just precision one. |
| |
| 2020-12-11 Hongyu <hongyu.wang@intel.com> |
| |
| * common/config/i386/cpuinfo.h (get_available_features): |
| Move check for HRESET/AVX_VNNI/UINTR out of avx512_usable. |
| |
| 2020-12-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/98212 |
| * dojump.c (do_compare_rtx_and_jump): Change computation of |
| first_prob for and_them. Add comment explaining and_them case. |
| |
| 2020-12-10 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/98174 |
| * gimple-range-cache.cc (ranger_cache::ssa_range_in_bb): Only push |
| poor values to be examined if it isn't a pure global. |
| (ranger_cache::block_range): Don't process pure globals. |
| (ranger_cache::fill_block_cache): Adjust has_edge_range call. |
| * gimple-range-gori.cc (gori_map::all_outgoing): New bitmap. |
| (gori_map::gori_map): Allocate all_outgoing. |
| (gori_map::is_export_p): No specified BB returns global context. |
| (gori_map::calculate_gori): Accumulate each block into global. |
| (gori_compute::gori_compute): Preprocess each block for exports. |
| (gori_compute::has_edge_range_p): No edge returns global context. |
| * gimple-range-gori.h (has_edge_range_p): Provide default parameter. |
| |
| 2020-12-10 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * dwarf2out.c (loc_list_from_tree_1) <PLACEHOLDER_EXPR>: Deal with |
| a nested context type |
| |
| 2020-12-10 Bernd Edlinger <bernd.edlinger@hotmail.de> |
| |
| * cfgexpand.c (expand_gimple_basic_block): Remove special handling |
| of debug_inline_entries without block info. |
| * tree-inline.c (remap_gimple_stmt): Drop debug_nonbind_markers when |
| the call statement has no block info. |
| (copy_debug_stmt): Remove debug_nonbind_markers when inlining |
| and the block info is mapped to NULL. |
| * tree-ssa-live.c (clear_unused_block_pointer): Remove |
| debug_nonbind_markers originating from removed inline functions. |
| |
| 2020-12-10 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-stmts.c (vectorizable_assignment): Remove special |
| allowance of VECTOR_BOOLEAN_TYPE_P conversions. |
| |
| 2020-12-10 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/iterators.md (supf): Remove VANDQ_S and VANDQ_U. |
| (VANQ): Remove. |
| (VDQ): Add TARGET_HAVE_MVE condition where relevant. |
| * config/arm/mve.md (mve_vandq_u<mode>): New entry for vand |
| instruction using expression 'and'. |
| (mve_vandq_s<mode>): New expander. |
| (mve_vaddq_n_f<mode>): Use 'and' code instead of unspec. |
| * config/arm/neon.md (and<mode>3): Rename into and<mode>3_neon. |
| * config/arm/predicates.md (imm_for_neon_inv_logic_operand): |
| Enable for MVE. |
| * config/arm/unspecs.md (VANDQ_S, VANDQ_U, VANDQ_F): Remove. |
| * config/arm/vec-common.md (and<mode>3): New expander. |
| |
| 2020-12-10 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/98069 |
| * tree-data-ref.c (compute_distributive_range): New function. |
| (nop_conversion_for_offset_p): Likewise. |
| (split_constant_offset): In the internal overload, treat integer |
| expressions as having an implicit cast to sizetype and express |
| them accordingly. Pass back the range of the original (uncast) |
| expression in a new range parameter. |
| (split_constant_offset_1): Likewise. Rework the handling of |
| conversions to account for the implicit sizetype casts. |
| |
| 2020-12-10 Joel Hutton <joel.hutton@arm.com> |
| |
| PR tree-optimization/97929 |
| * tree-vect-data-refs.c (vect_get_smallest_scalar_type): Add |
| WIDEN_PLUS/WIDEN_MINUS case. |
| |
| 2020-12-10 Joel Hutton <joel.hutton@arm.com> |
| |
| * tree-pretty-print.c (dump_generic_node): Add case for |
| VEC_WIDEN_(PLUS/MINUS)_(HI/LO)_EXPR and WIDEN_(PLUS/MINUS)_EXPR. |
| |
| 2020-12-10 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98211 |
| * tree-vect-stmts.c (vectorizable_assignment): Disallow |
| invalid conversions to bool vector types. |
| |
| 2020-12-10 Alexandre Oliva <oliva@adacore.com> |
| |
| * tree.c (build_common_builtin_nodes): Drop __builtin_ from |
| __clear_cache libname. |
| |
| 2020-12-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/98212 |
| * dojump.c (do_compare_rtx_and_jump): When splitting NE and backend |
| can do UNEQ, prefer splitting x != y into x unord y || !(x uneq y) |
| instead of into x unord y || x ltgt y. |
| |
| 2020-12-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/98169 |
| * dojump.c (do_compare_rtx_and_jump): Don't split self-EQ/NE |
| comparisons, just use ORDERED or UNORDERED. |
| |
| 2020-12-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/98205 |
| * omp-expand.c (expand_omp_for_generic): Fix up broken_loop handling. |
| |
| 2020-12-10 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): Do |
| not mark the defs to occur in a pattern if it is the |
| pattern root and record the original stmt defs in that |
| case. |
| |
| 2020-12-10 Simon Cook <simon.cook@embecosm.com> |
| |
| * config/riscv/multilib-generator (arch_canonicalize): Invoke |
| python interpreter when calling arch-canonicalize script. |
| |
| 2020-12-10 Nikhil Benesch <nikhil.benesch@gmail.com> |
| |
| * godump.c (go_format_type): Don't consider whether a type has |
| been seen when determining whether to output a type by name. |
| Consider only the use_type_name parameter. |
| (go_output_typedef): When outputting a typedef, format the |
| declaration's original type, which contains the name of the |
| underlying type rather than the name of the typedef. |
| |
| 2020-12-09 Jakub Jelinek <jakub@redhat.com> |
| |
| PR bootstrap/98188 |
| * tree-ssa-phiopt.c (two_value_replacement): Don't special case |
| BOOLEAN_TYPEs for ranges, instead if get_range_info doesn't return |
| VR_RANGE, set min/max to wi::min/max_value. |
| |
| 2020-12-09 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| * config/aarch64/aarch64-option-extensions.def |
| (AARCH64_OPT_EXTENSION): New +pauth option in -march for AArch64. |
| * config/aarch64/aarch64.h (AARCH64_FL_PAUTH): New pauth extension bitmask. |
| (AARCH64_ISA_PUATH): New ISA bitmask for PAUTH. |
| (AARCH64_FL_FOR_ARCH8_3): Add PAUTH to Armv8.3-A. |
| (TARGET_PAUTH): New target mask to isolate PAUTH instructions. |
| * config/aarch64/aarch64.md (do_return): Condition set to TARGET_PAUTH. |
| * doc/invoke.texi: Update docs for +flagm and +pauth. |
| |
| 2020-12-09 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.h (REG_ALLOC_ORDER): Remove |
| |
| 2020-12-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98213 |
| * tree-ssa-loop-im.c (sm_seq_valid_bb): Cache successfully |
| processed PHIs. |
| (hoist_memory_references): Adjust. |
| |
| 2020-12-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (cpu_vector_cost): Move simd |
| fields to... |
| (simd_vec_cost): ... Here. Define. |
| (advsimd_vec_cost): Define. |
| (sve_vec_cost): Define. |
| * config/aarch64/aarch64.c (generic_advsimd_vector_cost): |
| Define. |
| (generic_sve_vector_cost): Likewise. |
| (generic_vector_cost): Update. |
| (qdf24xx_advsimd_vector_cost): Define. |
| (qdf24xx_vector_cost): Update. |
| (thunderx_advsimd_vector_cost): Define. |
| (thunderx_vector_cost): Update. |
| (tsv110_advsimd_vector_cost): Define. |
| (tsv110_vector_cost): Likewise. |
| (cortexa57_advsimd_vector_cost): Define. |
| (cortexa57_vector_cost): Update. |
| (exynosm1_advsimd_vector_cost): Define. |
| (exynosm1_vector_cost): Update. |
| (xgene1_advsimd_vector_cost): Define. |
| (xgene1_vector_cost): Update. |
| (thunderx2t99_advsimd_vector_cost): Define. |
| (thunderx2t99_vector_cost): Update. |
| (thunderx3t110_advsimd_vector_cost): Define. |
| (thunderx3t110_vector_cost): Update. |
| (aarch64_builtin_vectorization_cost): Handle sve and advsimd |
| vector cost fields. |
| |
| 2020-12-09 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/98199 |
| * fold-const.c (native_encode_initializer): Fix handling bit-fields |
| when off > 0. |
| |
| 2020-12-09 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/98193 |
| * fold-const.c (native_encode_initializer): Set pos to field's |
| byte position if iterating over a field with missing initializer. |
| |
| 2020-12-08 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/98182 |
| * gimple-if-to-switch.cc (pass_if_to_switch::execute): Request |
| chain linkage through false edges only. |
| |
| 2020-12-08 Nathan Sidwell <nathan@acm.org> |
| |
| * tree.h (DECL_ALIGN_RAW): New. |
| (DECL_ALIGN): Use it. |
| (DECL_WARN_IF_NOT_ALIGN_RAW): New. |
| (DECL_WARN_IF_NOT_ALIGN): Use it. |
| (SET_DECL_WARN_IF_NOT_ALIGN): Likewise. |
| |
| 2020-12-08 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> |
| |
| PR target/66791 |
| * config/arm/arm_neon.h: Replace calls to __builtin_vmvn* by ~ |
| in vmvn intrinsics. |
| * config/arm/arm_neon_builtins.def: Remove entry for vmvn. |
| |
| 2020-12-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94440 |
| * config/i386/i386.opt (ix86_excess_precision, |
| ix86_unsafe_math_optimizations): New TargetVariables. |
| * config/i386/i386.h (X87_ENABLE_ARITH, X87_ENABLE_FLOAT): Use |
| ix86_unsafe_math_optimizations instead of |
| flag_unsafe_math_optimizations and ix86_excess_precision instead of |
| flag_excess_precision. |
| * config/i386/i386.c (ix86_excess_precision): Rename to ... |
| (ix86_get_excess_precision): ... this. |
| (TARGET_C_EXCESS_PRECISION): Define to ix86_get_excess_precision. |
| * config/i386/i386-options.c (ix86_valid_target_attribute_tree, |
| ix86_option_override_internal): Update ix86_unsafe_math_optimization |
| from flag_unsafe_math_optimizations and ix86_excess_precision |
| from flag_excess_precision when constructing target option nodes. |
| (ix86_set_current_function): If flag_unsafe_math_optimizations |
| or flag_excess_precision is different from the one recorded |
| in TARGET_OPTION_NODE, create a new target option node for the |
| current function and switch to that. |
| |
| 2020-12-08 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98192 |
| * tree-vect-slp.c (vect_build_slp_instance): Get scalar_stmts |
| by reference. |
| |
| 2020-12-08 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98191 |
| * tree-vect-slp.c (vect_slp_check_for_constructors): Do not |
| follow a non-SSA def chain. |
| |
| 2020-12-08 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97559 |
| * tree-ssa-sink.c (statement_sink_location): Never ignore |
| PHIs on sink paths in irreducible regions. |
| |
| 2020-12-08 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> |
| |
| PR target/97872 |
| * gimple-isel.cc (gimple_expand_vec_cond_expr): Try to fold |
| x CMP y ? -1 : 0 to x CMP y. |
| |
| 2020-12-08 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98180 |
| * tree-vect-slp.c (vect_slp_check_for_constructors): Check the |
| first inserted value has a def. |
| |
| 2020-12-08 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR tree-optimization/96344 |
| * tree-switch-conversion.c (bit_test_cluster::emit): Compute the |
| range only if an entry test is necessary. Merge the entry test in |
| the bit test when possible. Use PREC local variable consistently. |
| When there is only one test, do a single gimplification at the end. |
| |
| 2020-12-08 Kito Cheng <kito.cheng@sifive.com> |
| |
| PR target/98152 |
| * config.gcc (riscv*-*-*): Checking python, python3 or python2 |
| is available, and skip doing with_arch canonicalize if no python |
| available. |
| |
| 2020-12-07 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/98147 |
| * builtins.c (default_emit_call_builtin___clear_cache): Call |
| convert_memory_address to ptr_mode on both begin and end. |
| |
| 2020-12-07 Bernd Edlinger <bernd.edlinger@hotmail.de> |
| |
| * ipa-param-manipulation.c |
| (ipa_param_body_adjustments::modify_call_stmt): Set location info. |
| |
| 2020-12-07 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * doc/extend.texi (used function attribute): Document saving |
| the declaration from linker garbage collection. |
| (used variable attribute): Likewise. |
| |
| 2020-12-07 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98113 |
| * tree-vectorizer.h (struct slp_root): New. |
| (_bb_vec_info::roots): New member. |
| * tree-vect-slp.c (vect_analyze_slp): Also walk BB info |
| roots. |
| (_bb_vec_info::_bb_vec_info): Adjust. |
| (_bb_vec_info::~_bb_vec_info): Likewise. |
| (vld_cmp): New. |
| (vect_slp_is_lane_insert): Likewise. |
| (vect_slp_check_for_constructors): Match a series of |
| BIT_INSERT_EXPRs as vector constructor. |
| (vect_slp_analyze_bb_1): Continue if BB info roots is |
| not empty. |
| (vect_slp_analyze_bb_1): Mark the whole BIT_INSERT_EXPR root |
| sequence as pure_slp. |
| |
| 2020-12-07 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98117 |
| * tree-vect-loop-manip.c (vect_gen_vector_loop_niters): |
| Properly handle degenerate niter when setting the vector |
| loop IV range. |
| |
| 2020-12-07 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.c (s390_emit_stack_probe): Change Pmode to |
| word_mode. |
| |
| 2020-12-07 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/97816 |
| * ipa-cp.c (safe_add): Removed. |
| (good_cloning_opportunity_p): Remove special handling of INT_MAX. |
| (value_topo_info<valtype>::propagate_effects): Take care not to |
| propagate from size one value to another through more sources. Scale |
| propagated times with edge frequencies. Include local time and size |
| in propagates ones here. Take care not to overflow size. |
| (decide_about_value): Do not add local and propagated effects when |
| passing them to good_cloning_opportunity_p. |
| |
| 2020-12-07 Matthias Klose <doko@ubuntu.com> |
| |
| * genextract.c (print_header): Undefine ENABLE_RTL_CHECKING |
| and ENABLE_RTL_FLAG_CHECKING. |
| |
| 2020-12-07 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98137 |
| * tree-data-ref.c (split_constant_offset_1): Use |
| determine_value_range instead of get_range_info to handle |
| arbitrary expressions. |
| |
| 2020-12-06 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/98162 |
| * doc/extend.texi: Remove -mcet. |
| |
| 2020-12-06 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/98161 |
| * config/i386/i386-features.c (pseudo_reg_set): Check mode of |
| pseudo register push. |
| |
| 2020-12-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96232 |
| * tree-ssa-phiopt.c (two_value_replacement): Optimize even boolean lhs |
| cases as long as arg0 has wider precision and conditional_replacement |
| doesn't handle that case. |
| (tree_ssa_phiopt_worker): Don't call two_value_replacement during |
| early phiopt. |
| |
| 2020-12-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96232 |
| * match.pd (-(type)!A -> (type)A - 1): New optimization. |
| |
| 2020-12-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| David Edelsohn <dje.gcc@gmail.com> |
| |
| * config/rs6000/xcoff.h (ASM_OUTPUT_DEF): Reference macro arguments. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| PR target/95294 |
| * config/vax/elf.h (REGISTER_NAMES): Append `%psl'. |
| * config/vax/vax-modes.def (CCN, CCNZ, CCZ): New modes. |
| * config/vax/vax-protos.h (vax_select_cc_mode): New prototype. |
| (vax_maybe_split_dimode_move): Likewise. |
| (vax_notice_update_cc): Remove prototype. |
| * config/vax/vax.c (TARGET_FLAGS_REGNUM): New macro. |
| (TARGET_CC_MODES_COMPATIBLE): Likewise. |
| (TARGET_MD_ASM_ADJUST): Likewise. |
| (vax_select_cc_mode): New function |
| (vax_cc_modes_compatible): Likewise. |
| (vax_md_asm_adjust): Likewise. |
| (vax_notice_update_cc): Remove function. |
| (vax_output_int_move): Factor out code checking if a DImode move |
| may have to be split... |
| (vax_maybe_split_dimode_move): ... into this new function. |
| * config/vax/vax.h (FIRST_PSEUDO_REGISTER): Bump up. |
| (FIXED_REGISTERS): Append an entry for PSL. |
| (CALL_USED_REGISTERS): Likewise. |
| (NOTICE_UPDATE_CC, OUTPUT_JUMP): Remove macros. |
| (SELECT_CC_MODE): New macro. |
| (REGISTER_NAMES): Append `psl'. |
| * config/vax/predicates.md (const_zero_operand) |
| (vax_cc_comparison_operator, vax_ccn_comparison_operator) |
| (vax_ccnz_comparison_operator, vax_ccz_comparison_operator): |
| New predicates. |
| * config/vax/builtins.md: Rewrite for MODE_CC representation. |
| * config/vax/vax.md: Likewise. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/elf.h (VAX_CC1_SPEC, VAX_CC1PLUS_SPEC): New macros. |
| * config/vax/netbsd-elf.h (CC1_SPEC): Use VAX_CC1_SPEC rather |
| than VAX_CC1_AND_CC1PLUS_SPEC. |
| (CC1PLUS_SPEC): Use VAX_CC1PLUS_SPEC rather than |
| VAX_CC1_AND_CC1PLUS_SPEC. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/pdp11/pdp11.md (fcc_cc, fcc_ccnz): Use |
| `const_double_zero' to express double zero constant. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * read-rtl.c (rtx_reader::read_rtx_code): Handle syntactic |
| `const_double_zero' rtx. |
| * doc/rtl.texi (Constant Expression Types): Document it. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (divmoddisi4, *amulsi4): Make the comment |
| notation consistent with the rest of the file. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (movti): Fix output predicate. Emit `movo' |
| rather than `movh'. |
| (divmoddisi4): Fix output predicates, correct RTL. |
| (*amulsi4): Name insn. Fix output predicate. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (mulsidi3): Fix the multiplicand predicates. |
| (*maddsidi4, *maddsidi4_const): Likewise. Name insns. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (*cmpv_2): Name insn. |
| (*cmpv, *cmpzv, *cmpzv_2): Likewise. Fix location predicate and |
| constraint. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (extv): Rename insn to... |
| (*extv): ... this. |
| (extv): New expander. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (*insv_aligned, *extzv_aligned) |
| (*extv_aligned): Also make sure the memory address of a bit-field |
| location can be adjusted in the PIC mode. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (*insv_aligned, *extzv_aligned) |
| (*extv_aligned): Reject register bit-field locations that are not |
| aligned to the least significant bit; update output statement |
| accordingly. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (*insv_aligned, *extzv_aligned) |
| (*extv_aligned, *extv_non_const, *extzv_non_const): Name insns. |
| Fix location predicate. |
| (*extzv): Name insn. |
| (*insv): Likewise. Fix location constraint. |
| (*insv_2): Likewise, and the predicate. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md (cpymemhi1): Rename insn to... |
| (movmemhi1): ... this. |
| (cpymemhi): Update accordingly. Remove constraints. |
| (movmemhi): New expander. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/builtins.md: Add a peephole2 for QImode and HImode |
| `ctz' operations. |
| (any_extend): New code iterator. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/builtins.md (width): New mode attribute. |
| (ffssi2): Rework expander into... |
| (ffs<mode>2): ... this. |
| (ctzsi2): Rework insn into... |
| (ctz<mode>2): ... this. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/builtins.md (ffssi2_internal): Rename insn to... |
| (ctzsi2): ... this. Update the RTL operation. |
| (ffssi2): Update accordingly. |
| * config/vax/vax.c (vax_notice_update_cc): Handle CTZ. |
| * config/vax/vax.h (CTZ_DEFINED_VALUE_AT_ZERO): New macro. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.md: Include `builtins.md'. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/predicates.md (volatile_mem_operand) |
| (any_memory_operand): New predicates. |
| * config/vax/builtins.md (VUNSPEC_UNLOCK): Remove constant. |
| (sync_lock_test_and_set<mode>): Remove `set' and `unspec' |
| operations, match operands only. Reformat. |
| (sync_lock_release<mode>): Likewise. Remove cruft. |
| (jbb<ccss>i<mode>): Wrap into `unspec_volatile', use |
| `any_memory_operand' predicate. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/builtins.md (bit): New int iterator. |
| (ccss): New int attribute. |
| (jbbssi<mode>, jbbcci<mode>): Fold insns into... |
| (jbb<ccss>i<mode>): ... this. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/builtins.md (bb_mem): New mode attribute. |
| (jbbssiqi, jbbssihi, jbbssisi): Fold insns into... |
| (jbbssi<mode>): ... this. |
| (jbbcciqi, jbbccihi, jbbccisi): Likewise... |
| (jbbcci<mode>): ... this. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * jump.c (pc_set): Also accept a jump wrapped in UNSPEC or |
| UNSPEC_VOLATILE. |
| (any_uncondjump_p, any_condjump_p): Update comment accordingly. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * loop-doloop.c (add_test): Only remove the jump if `onlyjump_p'. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * cfgrtl.c (rtl_block_empty_p): Return false if `!onlyjump_p' |
| too. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * sel-sched-ir.c (maybe_tidy_empty_bb): Only try to remove a |
| conditional jump if `onlyjump_p'. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * loop-iv.c (simplify_using_initial_values): Only process jumps |
| that match `onlyjump_p'. |
| (check_simple_exit): Likewise. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * ifcvt.c (dead_or_predicable) [!IFCVT_MODIFY_TESTS]: Bail out |
| if `!onlyjump_p'. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * read-rtl.c: Add a page-feed separator at the start of iterator |
| code. |
| (struct iterator_group): Change the return type to HOST_WIDE_INT |
| for the `find_builtin' member. Likewise the second parameter |
| type for the `apply_iterator' member. |
| (atoll) [!HAVE_ATOQ]: Reorder. |
| (find_mode, find_code): Change the return type to HOST_WIDE_INT. |
| (apply_mode_iterator, apply_code_iterator) |
| (apply_subst_iterator): Change the second parameter type to |
| HOST_WIDE_INT. |
| (find_int): Handle input suitable for HOST_WIDE_INT output. |
| (apply_int_iterator): Rewrite in terms of explicit format |
| interpretation. |
| (rtx_reader::read_rtx_operand) <'w'>: Fold into... |
| <'i', 'n', 'p'>: ... this. |
| * doc/md.texi (Int Iterators): Document 'w' rtx format support. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/builtins.md (ffssi2): Make preparation statements |
| actually buildable. |
| (ffssi2_internal): Fix input constraints; make the RTL pattern |
| match reality for `cc0'. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (vax_address_cost): Express the cost in terms |
| of COSTS_N_INSNS. |
| (vax_rtx_costs): Likewise. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/constraints.md (A): New constraint. |
| * config/vax/predicates.md (external_symbolic_operand) |
| (external_const_operand): Remove predicates. |
| (local_symbolic_operand): Rename to... |
| (pic_symbolic_operand): ... this, and rework. |
| (external_memory_operand): Rename to... |
| (non_pic_external_memory_operand): ... this, and rework. |
| (illegal_blk_memory_operand, illegal_addsub_di_memory_operand): |
| Update accordingly. |
| * config/vax/vax-protos.h (vax_acceptable_pic_operand_p): New |
| prototype. |
| * config/vax/vax.c (vax_acceptable_pic_operand_p): New function. |
| (vax_output_int_add): Update according to predicate rework. |
| * config/vax/vax.h (LEGITIMATE_PIC_OPERAND_P): New macro. |
| * config/vax/vax.md (pushlclsymreg, pushextsymreg): Fold |
| together, and rename to... |
| (*pushsymreg): ... this. Use the `pic_symbolic_operand' |
| predicate and the `A' constraint for the displacement operand. |
| (movlclsymreg, movextsymreg): Fold together, and rename to... |
| (*movsymreg): ... this. Use the `pic_symbolic_operand' |
| predicate and the `A' constraint for the displacement operand. |
| (pushextsym, pushlclsym): Fold together, and rename to... |
| (*pushsym): ... this. Use the `pic_symbolic_operand' predicate |
| and the `A' constraint for the displacement operand. |
| (movextsym, movlclsym): Fold together, and rename to... |
| (*movsym): ... this. Use the `pic_symbolic_operand' predicate |
| and the `A' constraint for the displacement operand. |
| |
| 2020-12-05 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (print_operand): Replace `c' and `C' with |
| `k' and `K' respectively. |
| * config/vax/vax.md (*branch, *branch_reversed): Update |
| accordingly. |
| |
| 2020-12-05 Matt Thomas <matt@3am-software.com> |
| Maciej W. Rozycki <macro@linux-mips.org> |
| |
| PR target/58901 |
| * reload.c (push_reload): Also reload the inner expression of a |
| SUBREG for pseudos associated with a mode-dependent memory |
| reference. |
| (find_reloads): Force a reload likewise. |
| |
| 2020-12-05 Roman Zhuykov <zhroma@ispras.ru> |
| |
| PR rtl-optimization/97421 |
| * modulo-sched.c (generate_prolog_epilog): Remove forward |
| declaration, adjust last argument name and type. |
| (const_iteration_count): Add bool pointer parameter to return |
| whether count register is read in pre-header after its |
| initialization. |
| (sms_schedule): Fix count register initialization adjustment |
| procedure according to what const_iteration_count said. |
| |
| 2020-12-05 Iain Sandoe <iain@sandoe.co.uk> |
| |
| PR target/97865 |
| * configure: Regenerate. |
| |
| 2020-12-05 Venkataramanan Kumar <Venkataramanan.Kumar@amd.com> |
| Sharavan Kumar <Shravan.Kumar@amd.com> |
| |
| * common/config/i386/cpuinfo.h (get_amd_cpu) recognize znver3. |
| * common/config/i386/i386-common.c (processor_names): Add |
| znver3. |
| (processor_alias_table): Add znver3 and AMDFAM19H entry. |
| * common/config/i386/i386-cpuinfo.h (processor_types): Add |
| AMDFAM19H. |
| (processor_subtypes): AMDFAM19H_ZNVER3. |
| * config.gcc (i[34567]86-*-linux* | ...): Likewise. |
| * config/i386/driver-i386.c: (host_detect_local_cpu): Let |
| -march=native recognize znver3 processors. |
| * config/i386/i386-c.c (ix86_target_macros_internal): Add |
| znver3. |
| * config/i386/i386-options.c (m_znver3): New definition. |
| (m_ZNVER): Include m_znver3. |
| (processor_cost_table): Add znver3. |
| * config/i386/i386.c (ix86_reassociation_width): Likewise. |
| * config/i386/i386.h (TARGET_znver3): New definition. |
| (enum processor_type): Add PROCESSOR_ZNVER3. |
| * config/i386/i386.md (define_attr "cpu"): Add znver3. |
| * config/i386/x86-tune-sched.c: (ix86_issue_rate): Likewise. |
| (ix86_adjust_cost): Likewise. |
| * config/i386/x86-tune.def (X86_TUNE_AVOID_256FMA_CHAINS: |
| Likewise. |
| * config/i386/znver1.md: Add new reservations for znver3. |
| * doc/extend.texi: Add details about znver3. |
| * doc/invoke.texi: Likewise. |
| |
| 2020-12-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/96226 |
| * config/i386/i386.md (splitter after *<rotate_insn><mode>3_mask, |
| splitter after *<rotate_insn><mode>3_mask_1): Drop the masking from |
| the patterns to split into. |
| |
| 2020-12-04 Jason Merrill <jason@redhat.com> |
| |
| * vec.h (begin, end): Add overloads for vec*. |
| * tree.c (build_constructor_from_vec): Remove *. |
| |
| 2020-12-04 David Edelsohn <dje.gcc@gmail.com> |
| |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Change PTR_SIZE to POINTER_SIZE_UNITS. |
| |
| 2020-12-04 Hans-Peter Nilsson <hp@axis.com> |
| Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/94600 |
| * doc/implement-c.texi (Qualifiers implementation): Add blurb |
| about access to the whole of a volatile aggregate object, only for |
| same-size as a scalar object. |
| |
| 2020-12-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/98130 |
| * gimple.c (gimple_call_fnspec): Only return ".co " for replaceable |
| operator delete or ".mC" for replaceable operator new called from |
| new/delete. |
| |
| 2020-12-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/96226 |
| * config/i386/i386.md (splitter after *<rotate_insn><mode>3_mask, |
| splitter after *<rotate_insn><mode>3_mask_1): New combine splitters. |
| |
| 2020-12-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR libstdc++/93121 |
| * fold-const.c (native_encode_initializer): Use build_zero_cst |
| instead of build_constructor. |
| |
| 2020-12-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/98100 |
| * cfgexpand.c (expand_gimple_basic_block): For vars with |
| vector type, use TYPE_MODE rather than DECL_MODE. |
| |
| 2020-12-04 Jakub Jelinek <jakub@redhat.com> |
| |
| * common.opt (-gdwarf32, -gdwarf64): New options. |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): Default |
| dwarf_offset_size to 8 if not overridden from the command line. |
| * dwarf2out.c: Change all occurrences of DWARF_OFFSET_SIZE to |
| dwarf_offset_size. |
| * doc/invoke.texi (-gdwarf32, -gdwarf64): Document. |
| |
| 2020-12-04 Martin Liska <mliska@suse.cz> |
| |
| * doc/tm.texi: Change argument of the record_gcc_switches |
| hook and remove SWITCH_TYPE_* enum values. |
| * dwarf2out.c (gen_producer_string): Move to opts.c and remove |
| handling of the dwarf_record_gcc_switches option. |
| (dwarf2out_early_finish): Use moved gen_producer_string |
| function. |
| * opts.c (gen_producer_string): New. |
| * opts.h (gen_producer_string): New. |
| * target.def: Change type of record_gcc_switches. |
| * target.h (enum print_switch_type): Remove. |
| (elf_record_gcc_switches): Change first argument. |
| * toplev.c (MAX_LINE): Remove. |
| (print_to_asm_out_file): Likewise. |
| (print_to_stderr): Likewise. |
| (print_single_switch): Likewise. |
| (print_switch_values): Likewise. |
| (init_asm_output): Use new gen_producer_string function. |
| (process_options): Likewise. |
| * varasm.c (elf_record_gcc_switches): Just save the string argument |
| to the ELF container. |
| |
| 2020-12-04 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * ipa-sra.c (verify_access_tree_1): Relax assertion on the size. |
| |
| 2020-12-04 Martin Liska <mliska@suse.cz> |
| |
| * doc/invoke.texi: Add missing params. |
| |
| 2020-12-03 Martin Sebor <msebor@redhat.com> |
| |
| PR c++/90629 |
| PR middle-end/94527 |
| * builtins.c (access_ref::access_ref): Initialize new member. |
| (compute_objsize): Use access_ref::deref. Handle simple pointer |
| assignment. |
| (expand_builtin): Remove handling of the free built-in. |
| (call_dealloc_argno): Same. |
| (find_assignment_location): New function. |
| (fndecl_alloc_p): Same. |
| (gimple_call_alloc_p): Same. |
| (call_dealloc_p): Same. |
| (matching_alloc_calls_p): Same. |
| (warn_dealloc_offset): Same. |
| (maybe_emit_free_warning): Same. |
| * builtins.h (struct access_ref): Declare new member. |
| (maybe_emit_free_warning): Make extern. Make use of access_ref. |
| Handle -Wmismatched-new-delete. |
| * calls.c (initialize_argument_information): Call |
| maybe_emit_free_warning. |
| * doc/extend.texi (attribute malloc): Update. |
| * doc/invoke.texi (-Wfree-nonheap-object): Expand documentation. |
| (-Wmismatched-new-delete): Document new option. |
| (-Wmismatched-dealloc): Document new option. |
| |
| 2020-12-03 Alexandre Oliva <oliva@adacore.com> |
| |
| * tree.c (build_common_builtin_nodes): Declare |
| __builtin___clear_cache for all languages. |
| * builtins.c (maybe_emit_call_builtin___clear_cache): Accept |
| Pmode arguments. |
| |
| 2020-12-03 Sebastian Huber <sebastian.huber@embedded-brains.de> |
| |
| * config/arm/t-rtems: Add "-mthumb -mcpu=cortex-r52 |
| -mfloat-abi=hard" multilib. |
| |
| 2020-12-03 Uroš Bizjak <ubizjak@gmail.com> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/98086 |
| * config/i386/i386.c (ix86_md_asm_adjustmd): Rewrite |
| zero-extension part to use convert_to_mode. |
| |
| 2020-12-03 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.md ("@probe_stack2<mode>"): Change mode |
| iterator to W. |
| |
| 2020-12-03 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins-base.cc (svundef_impl::fold): |
| Delete. |
| |
| 2020-12-03 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR middle-end/98099 |
| * expmed.c (flip_storage_order): In the case of a non-integer mode, |
| sorry out if the integer mode to be used instead is not supported. |
| |
| 2020-12-03 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR middle-end/98082 |
| * function.c (use_register_for_decl): Also return true for a result |
| if cfun->tail_call_marked is true. |
| |
| 2020-12-03 Jakub Jelinek <jakub@redhat.com> |
| |
| PR libstdc++/93121 |
| * fold-const.h (native_encode_initializer): Add mask argument |
| defaulted to nullptr. |
| (find_bitfield_repr_type): Declare. |
| (native_interpret_aggregate): Declare. |
| * fold-const.c (find_bitfield_repr_type): New function. |
| (native_encode_initializer): Add mask argument and support for |
| filling it. Handle also some bitfields without integral |
| DECL_BIT_FIELD_REPRESENTATIVE. |
| (native_interpret_aggregate): New function. |
| * gimple-fold.h (clear_type_padding_in_mask): Declare. |
| * gimple-fold.c (struct clear_padding_struct): Add clear_in_mask |
| member. |
| (clear_padding_flush): Handle buf->clear_in_mask. |
| (clear_padding_union): Copy clear_in_mask. Don't error if |
| buf->clear_in_mask is set. |
| (clear_padding_type): Don't error if buf->clear_in_mask is set. |
| (clear_type_padding_in_mask): New function. |
| (gimple_fold_builtin_clear_padding): Set buf.clear_in_mask to false. |
| * doc/extend.texi (__builtin_bit_cast): Document. |
| |
| 2020-12-03 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * tree-ssa-threadedge.c (record_temporary_equivalences_from_stmts_at_dest): |
| Do not allow __builtin_constant_p on a threading path. |
| |
| 2020-12-03 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * tree-ssa-strlen.c (printf_strlen_execute): Avoid division by |
| 0. |
| |
| 2020-12-03 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/multilib-generator (arch_canonicalize): Move |
| code to arch-canonicalize, and call that script to canonicalize arch |
| string. |
| (canonical_order): Move code to arch-canonicalize. |
| (LONG_EXT_PREFIXES): Ditto. |
| (IMPLIED_EXT): Ditto. |
| * config/riscv/arch-canonicalize: New. |
| * config.gcc (riscv*-*-*): Canonicalize --with-arch. |
| |
| 2020-12-03 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| * config/aarch64/aarch64-option-extensions.def |
| (AARCH64_OPT_EXTENSION): New +flagm option in -march for AArch64. |
| * config/aarch64/aarch64.h (AARCH64_FL_FLAGM): Add new flagm extension bit |
| mask. |
| (AARCH64_FL_FOR_ARCH8_4): Add flagm to Armv8.4-A. |
| * doc/invoke.texi: Update docs with +flagm. |
| |
| 2020-12-03 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/96906 |
| * config/i386/sse.md |
| (<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Add a new |
| define_split after this insn. |
| |
| 2020-12-03 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/97642 |
| * config/i386/i386-expand.c |
| (ix86_expand_special_args_builtin): Don't move all-ones mask |
| operands into register. |
| * config/i386/sse.md (UNSPEC_MASKLOAD): New unspec. |
| (*<avx512>_load<mode>_mask): New define_insns for masked load |
| instructions. |
| (<avx512>_load<mode>_mask): Changed to define_expands which |
| specifically handle memory or all-ones mask operands. |
| (<avx512>_blendm<mode>): Changed to define_insns which are same |
| as original <avx512>_load<mode>_mask with adjustment of |
| operands order. |
| (*<avx512>_load<mode>): New define_insn_and_split which is |
| used to optimize for masked load with all one mask. |
| |
| 2020-12-03 Hongyu Wang <hongyu.wang@intel.com> |
| |
| PR target/97770 |
| * config/i386/sse.md (popcount<mode>2): New expander |
| for SI/DI vector modes. |
| (popcount<mode>2): Likewise for QI/HI vector modes. |
| |
| 2020-12-03 Alexandre Oliva <oliva@adacore.com> |
| |
| * builtins.c (default_emit_call_builtin___clear_cache): New. |
| (maybe_emit_call_builtin___clear_cache): New. |
| (expand_builtin___clear_cache): Split into the above. |
| (expand_builtin): Do not issue clear_cache call any more. |
| * builtins.h (maybe_emit_call_builtin___clear_cache): Declare. |
| * config/aarch64/aarch64.c (aarch64_trampoline_init): Use |
| maybe_emit_call_builtin___clear_cache. |
| * config/arc/arc.c (arc_trampoline_init): Likewise. |
| * config/arm/arm.c (arm_trampoline_init): Likewise. |
| * config/c6x/c6x.c (c6x_initialize_trampoline): Likewise. |
| * config/csky/csky.c (csky_trampoline_init): Likewise. |
| * config/m68k/linux.h (FInALIZE_TRAMPOLINE): Likewise. |
| * config/tilegx/tilegx.c (tilegx_trampoline_init): Likewise. |
| * config/tilepro/tilepro.c (tilepro_trampoline_init): Ditto. |
| * config/vxworks.c: Include rtl.h, memmodel.h, and optabs.h. |
| (vxworks_emit_call_builtin___clear_cache): New. |
| * config/vxworks.h (CLEAR_INSN_CACHE): Drop. |
| (TARGET_EMIT_CALL_BUILTIN___CLEAR_CACHE): Define. |
| * target.def (trampoline_init): In the documentation, refer to |
| maybe_emit_call_builtin___clear_cache. |
| (emit_call_builtin___clear_cache): New. |
| * doc/tm.texi.in: Add new hook point. |
| (CLEAR_CACHE_INSN): Remove duplicate 'both'. |
| * doc/tm.texi: Rebuilt. |
| * targhooks.h (default_meit_call_builtin___clear_cache): |
| Declare. |
| * tree.h (BUILTIN_ASM_NAME_PTR): New. |
| |
| 2020-12-03 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * tree-ssa-threadbackward.c (thread_jumps::profitable_jump_thread_path): |
| Do not allow __builtin_constant_p on a threading path. |
| |
| 2020-12-02 Jakub Jelinek <jakub@redhat.com> |
| |
| * dwarf2out.c (add_scalar_info): Only use add_AT_wide for 128-bit |
| constants and only in dwarf-5 or later, where DW_FORM_data16 is |
| available. Otherwise use DW_FORM_block*/DW_FORM_exprloc with |
| DW_OP_implicit_value to describe the constant. |
| |
| 2020-12-02 qing zhao <qinzhao@gcc.gnu.org> |
| |
| PR rtl-optimization/97777 |
| * reg-stack.c (rest_of_handle_stack_regs): call |
| df_insn_rescan_all if reg_to_stack return true. |
| |
| 2020-12-02 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * config/s390/s390-protos.h (s390_const_int_pool_entry_p): New |
| function. |
| * config/s390/s390.c (s390_const_int_pool_entry_p): New |
| function. |
| * config/s390/s390.md: Add define_peephole2 that produces llihf |
| and oilf. |
| |
| 2020-12-02 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97630 |
| * tree-vectorizer.h (_slp_tree::next_node, |
| _slp_tree::prev_node): New. |
| (vect_slp_init): Declare. |
| (vect_slp_fini): Likewise. |
| * tree-vectorizer.c (vectorize_loops): Call vect_slp_init/fini. |
| (pass_slp_vectorize::execute): Likewise. |
| * tree-vect-slp.c (vect_slp_init): New. |
| (vect_slp_fini): Likewise. |
| (slp_first_node): New global. |
| (_slp_tree::_slp_tree): Link node into the SLP tree list. |
| (_slp_tree::~_slp_tree): Delink node from the SLP tree list. |
| |
| 2020-12-02 Scott Snyder <sss@li-snyder.org> |
| |
| PR plugins/98059 |
| * vec.h (auto_delete_vec): Use |
| DISABLE_COPY_AND_ASSIGN(auto_delete_vec) instead of |
| DISABLE_COPY_AND_ASSIGN(auto_delete_vec<T>) to make it valid C++20 |
| after DR2237. |
| |
| 2020-12-02 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/98075 |
| * cgraph.c (cgraph_node::dump): Dump decl_is_malloc flag. |
| * ipa-pure-const.c (propagate_malloc): Do not set malloc |
| attribute for void functions. |
| |
| 2020-12-02 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR middle-end/93195 |
| PR middle-end/93197 |
| * configure.ac (HAVE_GAS_SECTION_LINK_ORDER): New. Define 1 if |
| the assembler supports the section flag 'o' for specifying |
| section with link-order. |
| * output.h (SECTION_LINK_ORDER): New. Defined to 0x8000000. |
| (SECTION_MACH_DEP): Changed from 0x8000000 to 0x10000000. |
| * targhooks.c (default_print_patchable_function_entry): Pass |
| SECTION_LINK_ORDER to switch_to_section if the section flag 'o' |
| works. Pass current_function_decl to switch_to_section. |
| * varasm.c (default_elf_asm_named_section): Use 'o' flag for |
| SECTION_LINK_ORDER if assembler supports it. |
| * config.in: Regenerated. |
| * configure: Likewise. |
| * doc/sourcebuild.texi: Document o_flag_in_section. |
| |
| 2020-12-02 H.J. Lu <hjl.tools@gmail.com> |
| |
| * config/i386/i386.opt: Add the missing '.' for -mneeded. |
| |
| 2020-12-02 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-loop.c (vect_transform_loop_stmt): Return whether |
| we vectorized a stmt. |
| (vect_transform_loop): Only call maybe_set_vectorized_backedge_value |
| when we vectorized the stmt. |
| |
| 2020-12-02 Jakub Jelinek <jakub@redhat.com> |
| |
| * expmed.h (expand_divmod): Only declare if GCC_OPTABS_H is defined. |
| Add enum optabs_method argument defaulted to OPTAB_LIB_WIDEN. |
| * expmed.c: Include expmed.h after optabs.h. |
| (expand_divmod): Add methods argument, if it is not OPTAB_{,LIB_}WIDEN, |
| don't choose a wider mode, and pass it to other calls instead of |
| hardcoded OPTAB_LIB_WIDEN. Avoid emitting libcalls if not |
| OPTAB_LIB or OPTAB_LIB_WIDEN. |
| * optabs.c: Include expmed.h after optabs.h. |
| (expand_doubleword_mod, expand_doubleword_divmod): Pass OPTAB_DIRECT |
| as last argument to expand_divmod. |
| (expand_binop): Punt if {s,u}divmod_optab has handler for double-word |
| int_mode. |
| * expr.c: Include expmed.h after optabs.h. |
| * explow.c: Include expmed.h after optabs.h. |
| |
| 2020-12-02 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/97459 |
| * optabs.h (expand_doubleword_divmod): Declare. |
| * optabs.c (expand_doubleword_divmod): New function. |
| (expand_binop): Use it. |
| * internal-fn.c (expand_DIVMOD): Likewise. |
| |
| 2020-12-02 Martin Liska <mliska@suse.cz> |
| |
| PR c/98087 |
| * gimple-fold.c (clear_padding_type): Do not divide by zero. |
| |
| 2020-12-02 Martin Liska <mliska@suse.cz> |
| |
| * gdbinit.in: Write what each command calls |
| for a debugging function. |
| |
| 2020-12-02 Kewen Lin <linkw@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Use OPTION_MASK_DIRECT_MOVE for Power8 target_enable instead |
| of OPTION_MASK_HTM. |
| * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): |
| Remove OPTION_MASK_HTM. |
| (RS6000_CPU): Add OPTION_MASK_HTM to power8, power9 and |
| powerpc64le entries. |
| |
| 2020-12-02 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/98079 |
| * config/i386/i386.md (abs<mode>2): Enable QImode |
| only for !TARGET_PARTIAL_REG_STALL. |
| (*abs<mode>2_1): Ditto. |
| (<maxmin:code><mode>3): Ditto. |
| (*<maxmin:code><mode>3_1): Ditto. |
| |
| 2020-12-02 Martin Liska <mliska@suse.cz> |
| |
| * diagnostic.c (diagnostic_report_diagnostic): ICE causes to |
| terminate compiler immediately, so I guess it should be printed |
| always. |
| |
| 2020-12-02 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/88702 |
| * gimple-if-to-switch.cc (pass_if_to_switch::execute): |
| Require at least 2 BBs. |
| * gimple-if-to-switch.cc (find_conditions): Require |
| equal precision for low and high of a range. |
| |
| 2020-12-02 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/98084 |
| * gimple-if-to-switch.cc (find_conditions): Consider only |
| integral types. |
| |
| 2020-12-02 Jeff Law <law@redhat.com> |
| |
| * config/h8300/addsub.md (addqi3_clobber_flags): Rename to |
| addqi3_flags and annotate with a <cczn> for define_subst. |
| (addhi3_h8sx_clobber_flags): Likewise. |
| (subqi3_clobber_flags, sub<mode>3_clobber_flags): Likewise. |
| (neg<mode2>_clobber_flags): Similarly. |
| (addsi3_clobber_flags): Similarly. Update last argument to |
| output_plussi to distinguish when we need flags or do not need |
| flags. |
| (addhi3_clobber_flags): Similarly. Twiddle code for cases |
| +-1, +-2 and +-4. |
| * config/h8300/h8300.md: Define iterators, mode attributes and |
| substitutions for use in compare/test elimination. |
| * config/h8300/jumpcall.md (branch, branch_1): Use H8cc mode |
| iterator to cover the different modes for the CC register. |
| (branch_1_false): Likewise. |
| |
| 2020-12-02 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * loop-iv.c: Fix a typo, s/bu/by/, in the `iv_analyze_expr' |
| description in the introduction. |
| |
| 2020-12-02 H.J. Lu <hjl.tools@gmail.com> |
| |
| * configure.ac (HAVE_GAS_SHF_GNU_RETAIN): New. Define 1 if |
| the assembler supports marking sections with SHF_GNU_RETAIN flag. |
| * output.h (SECTION_RETAIN): New. Defined as 0x4000000. |
| (SECTION_MACH_DEP): Changed from 0x4000000 to 0x8000000. |
| (default_unique_section): Add a bool argument. |
| * varasm.c (get_section): Set SECTION_RETAIN for the preserved |
| symbol with HAVE_GAS_SHF_GNU_RETAIN. |
| (resolve_unique_section): Used named section for the preserved |
| symbol if assembler supports SHF_GNU_RETAIN. |
| (get_variable_section): Handle the preserved common symbol with |
| HAVE_GAS_SHF_GNU_RETAIN. |
| (default_elf_asm_named_section): Require the full declaration and |
| use the 'R' flag for SECTION_RETAIN. |
| * config.in: Regenerated. |
| * configure: Likewise. |
| * doc/sourcebuild.texi: Document R_flag_in_section. |
| |
| 2020-12-02 H.J. Lu <hjl.tools@gmail.com> |
| |
| * config.gcc: Replace cet.o with gnu-property.o. Replace |
| i386/t-cet with i386/t-gnu-property. |
| * config/i386/cet.c: Renamed to ... |
| * config/i386/gnu-property.c: This. |
| (emit_gnu_property): New function. |
| (file_end_indicate_exec_stack_and_cet): Renamed to ... |
| (file_end_indicate_exec_stack_and_gnu_property): This. Call |
| emit_gnu_property to generate GNU_PROPERTY_X86_FEATURE_1_AND and |
| GNU_PROPERTY_X86_ISA_1_NEEDED properties. |
| * config/i386/i386.opt (mneeded): New. |
| * config/i386/linux-common.h (file_end_indicate_exec_stack_and_cet): |
| Renamed to ... |
| (file_end_indicate_exec_stack_and_gnu_property): This. |
| (TARGET_ASM_FILE_END): Updated. |
| * config/i386/t-cet: Renamed to ... |
| * config/i386/t-gnu-property: This. |
| (cet.o): Renamed to ... |
| (gnu-property.o): This. |
| * doc/invoke.texi: Document -mneeded. |
| |
| 2020-12-01 Eugene Rozenfeld <Eugene.Rozenfeld@microsoft.com> |
| |
| PR tree-optimization/96708 |
| * match.pd: New pattern for comparing X with MAX (X, Y) |
| or MIN (X, y). |
| |
| 2020-12-01 Jeff Law <law@redhat.com> |
| |
| * config/mcore/t-mcore (MULTILIB_EXCEPTIONS): Define. |
| |
| 2020-12-01 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97595 |
| * tree.c (component_ref_size): Fail when DECL_SIZE != TYPE_SIZE. |
| * tree.h (DECL_SIZE, TYPE_SIZE): Update comment. |
| |
| 2020-12-01 JeanHeyd Meneide <phdofthehouse@gmail.com> |
| |
| * doc/cpp.texi: Document new macros. |
| |
| 2020-12-01 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97373 |
| * builtins.c (compute_objsize): Rename... |
| (compute_objsize_r): to this. Change order and types of arguments. |
| Use new argument. Adjust calls to self. |
| (access_ref::get_ref): New member function. |
| (pointer_query::pointer_query): New member function. |
| (pointer_query::get_ref): Same. |
| (pointer_query::put_ref): Same. |
| (handle_min_max_size): Change order and types of arguments. |
| (maybe_emit_free_warning): Add a test. |
| * builtins.h (class pointer_query): New class. |
| (compute_objsize): Declare an overload. |
| * gimple-ssa-sprintf.c (get_destination_size): Add argument. |
| (handle_printf_call): Change argument type. |
| * tree-ssa-strlen.c (adjust_last_stmt): Add an argument and use it. |
| (maybe_warn_overflow): Same. |
| (handle_builtin_strcpy): Same. |
| (maybe_diag_stxncpy_trunc): Same. |
| (handle_builtin_memcpy): Change argument type. Adjust calls. |
| (handle_builtin_strcat): Same. |
| (handle_builtin_memset): Same. |
| (handle_store): Same. |
| (strlen_check_and_optimize_call): Same. |
| (check_and_optimize_stmt): Same. |
| (strlen_dom_walker): Add new data members. |
| (strlen_dom_walker::before_dom_children): Use new member. |
| (printf_strlen_execute): Dump cache performance counters. Remove |
| objsize pass cleanup. |
| * tree-ssa-strlen.h (maybe_diag_stxncpy_trunc): Add argument. |
| (handle_printf_call): Change argument type. |
| |
| 2020-12-01 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * function.c (gen_call_used_regs_seq): In a function subject to the |
| leaf register optimization, skip registers that are not present. |
| * config/sparc/sparc.c (TARGET_ZERO_CALL_USED_REGS): Define to... |
| (sparc_zero_call_used_regs): ...this. New function. |
| |
| 2020-12-01 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.h: Remove unused 'X' specs in the link spec |
| rather than driver self-specs. |
| |
| 2020-12-01 Nathan Sidwell <nathan@acm.org> |
| |
| * params.opt (lazy-modules): New. |
| * timevar.def (TV_MODULE_IMPORT, TV_MODULE_EXPORT) |
| (TV_MODULE_MAPPER): New. |
| |
| 2020-12-01 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/97459 |
| * optabs.c (expand_doubleword_mod): Punt early for even op1. |
| (expand_binop): Don't require lshr_optab double-word handler. |
| |
| 2020-12-01 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/97954 |
| * loop-invariant.c (find_invariant_insn): Punt on JUMP_P insns. |
| |
| 2020-12-01 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * configure.ac (check leb128 support): Check that assemblers both |
| accept the LEB128 directives and also give the expected output. |
| Add a test for uleb128 with the MSB set for a 64 bit value. |
| * configure: Regenerated. |
| |
| 2020-12-01 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * configure: Regnerated. |
| |
| 2020-12-01 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * optabs-tree.c (vec_cmp_icode_p): New function. |
| (vec_cmp_eq_icode_p): New function. |
| (expand_vec_cmp_expr_p): Use vec_cmp_icode_p and |
| vec_cmp_eq_icode_p. |
| (vcond_icode_p): Use get_rtx_code_1, just to be uniform with |
| vec_cmp_icode_p. |
| * optabs.c (unsigned_optab_p): New function. |
| (insn_predicate_matches_p): New function. |
| (can_vec_cmp_compare_p): New function. |
| (can_vcond_compare_p): Use unsigned_optab_p and |
| insn_predicate_matches_p. |
| (get_rtx_code): Use get_rtx_code_1. |
| (get_rtx_code_1): Version of get_rtx_code that returns UNKNOWN |
| instead of asserting. |
| * optabs.h (can_vec_cmp_compare_p): New function. |
| (get_rtx_code_1): New function. |
| |
| 2020-12-01 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/14799 |
| PR ipa/88702 |
| * Makefile.in: Add gimple-if-to-switch.o. |
| * dbgcnt.def (DEBUG_COUNTER): Add new debug counter. |
| * passes.def: Include new pass_if_to_switch pass. |
| * timevar.def (TV_TREE_IF_TO_SWITCH): New timevar. |
| * tree-pass.h (make_pass_if_to_switch): New. |
| * tree-ssa-reassoc.c (struct operand_entry): Move to the header. |
| (dump_range_entry): Move to header file. |
| (debug_range_entry): Likewise. |
| (no_side_effect_bb): Make it global. |
| * tree-switch-conversion.h (simple_cluster::simple_cluster): |
| Add inline for couple of functions in order to prevent error |
| about multiple defined symbols. |
| * gimple-if-to-switch.cc: New file. |
| * tree-ssa-reassoc.h: New file. |
| |
| 2020-12-01 Marius Hillenbrand <mhillen@linux.ibm.com> |
| |
| * configure.ac: Add configure option |
| --enable-s390-excess-float-precision and check to derive default |
| from glibc. |
| * config/s390/s390.c: Guard s390_excess_precision with an ifdef |
| for ENABLE_S390_EXCESS_FLOAT_PRECISION. |
| * doc/install.texi: Document --enable-s390-excess-float-precision. |
| * configure: Regenerate. |
| * config.in: Regenerate. |
| |
| 2020-12-01 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/98057 |
| * symtab.c (symtab_node::set_section_for_node): Drop |
| implicit_section if x_section is NULL. |
| |
| 2020-12-01 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/98063 |
| * config/i386/i386-expand.c (ix86_expand_call): Handle non-plt |
| CM_LARGE_PIC calls. |
| |
| 2020-12-01 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/98070 |
| * builtins.c (builtin_fnspec): realloc is ".Cw ". |
| |
| 2020-12-01 Jakub Jelinek <jakub@redhat.com> |
| |
| * dwarf2out.c (gen_compile_unit_die): Treat GNU C++20 |
| like C++14 for -gdwarf-5. |
| |
| 2020-12-01 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/97989 |
| * gcc.c (cpp_unique_options): Add -dD if %:debug-level-gt(2) |
| rather than g3|ggdb3|gstabs3|gxcoff3|gvms3. |
| |
| 2020-12-01 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config.gcc (riscv*-*-*): Drop some commited accidentally code. |
| |
| 2020-11-30 Jeff Law <law@redhat.com> |
| |
| * symtab.c (set_section_for_node): Add function comment. |
| (set_section_from_node): Likewise. |
| |
| 2020-11-30 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/plugins.texi (Plugin callbacks): Add PLUGIN_ANALYZER_INIT. |
| * plugin.c (register_callback): Likewise. |
| (invoke_plugin_callbacks_full): Likewise. |
| * plugin.def (PLUGIN_ANALYZER_INIT): New event. |
| |
| 2020-11-30 Jeff Law <law@redhat.com> |
| |
| * config/h8300/bitfield.md: Remove "cc" attribute on any |
| insns where it remained. |
| * config/h8300/combiner.md: Likewise. |
| * config/h8300/jumpcall.md: Likewise. |
| * config/h8300/logical.md: Likewise. |
| * config/h8300/testcompare.md: Likewise. |
| * config/h8300/h8300.md (old_cc attr): Renamed from cc attr. |
| * config/h8300/h8300.c (notice_update_cc): Remove. |
| (compute_plussi_cc): Change references to CC_* to OLD_CC_. |
| (compute_logical_op_cc): Likewise. |
| (shift_one, shift_two): Likewise. |
| (compute_a_shift_cc): Likewise. |
| (get_shift_alg): Likewise. |
| (struct shift_insn): Change type of cc_valid field. |
| (struct shift_info): Likewise. |
| * config/h8300/save.md: Remove accidentially created file. |
| |
| 2020-11-30 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/98037 |
| * dse.c (find_shift_sequence): Iterate over all integers and |
| skip modes that are too small. |
| |
| 2020-11-30 Eugene Rozenfeld <Eugene.Rozenfeld@microsoft.com> |
| |
| PR tree-optimization/96679 |
| * match.pd (((b | c) & a) | b -> (a & c) | b): New pattern. |
| |
| 2020-11-30 Martin Liska <mliska@suse.cz> |
| |
| * passes.c (emergency_dump_function): Dump symtab when |
| we are in an IPA pass. |
| |
| 2020-11-30 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98064 |
| * tree-vect-loop.c (vectorizable_live_operation): Avoid |
| breaking LC SSA for BB vectorization. |
| |
| 2020-11-30 Jonathan Wakely <jwakely@redhat.com> |
| |
| * doc/sourcebuild.texi (Directives): Fix description of |
| dg-require-effective-target to include "target" in selector. |
| |
| 2020-11-30 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98048 |
| * tree-vect-generic.c (expand_vector_operations_1): Use the |
| correct type for the scalar LHS replacement. |
| |
| 2020-11-30 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/98066 |
| * gimple-isel.cc (gimple_expand_vec_exprs): Return when |
| gimple_expand_vec_exprs replaces last stmt. |
| |
| 2020-11-30 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * cfgrtl.c (rtl_bb_info_initialized_p): New function. |
| (rtl_dump_bb): Use rtl_bb_info_initialized_p before accessing bb |
| insns. |
| |
| 2020-11-30 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| PR d/87818 |
| * config.gcc (*-*-freebsd*): Add freebsd-d.o and t-freebsd. |
| * config/freebsd-d.c: New file. |
| * config/t-freebsd: New file. |
| |
| 2020-11-30 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/97459 |
| * internal-fn.h (expand_addsub_overflow): Declare. |
| * internal-fn.c (expand_addsub_overflow): No longer static. |
| * optabs.c (expand_doubleword_mod): New function. |
| (expand_binop): Optimize double-word mod with constant divisor. |
| |
| 2020-11-30 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config.gcc (riscv*-*-*): Add TARGET_RISCV_DEFAULT_ABI and |
| TARGET_RISCV_DEFAULT_ARCH to tm_defines. |
| Remove including riscv/withmultilib.h for --with-multilib-list. |
| * config/riscv/riscv.h (STRINGIZING): New. |
| (__STRINGIZING): Ditto. |
| (MULTILIB_DEFAULTS): Ditto. |
| * config/riscv/withmultilib.h: Remove. |
| |
| 2020-11-30 Kito Cheng <kito.cheng@sifive.com> |
| |
| * gcc.c (print_multilib_info): Check default arguments not |
| appeared in multi-lib option list with '!' |
| |
| 2020-11-30 Jeff Law <law@redhat.com> |
| |
| * config/ft32/ft32.md (umulsidi3): Do not allow constants as |
| arguments. |
| |
| 2020-11-29 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (ipa_merge_modref_summary_after_inlining): Fix |
| handling of ignore_stores. |
| |
| 2020-11-29 Jan Hubicka <jh@suse.cz> |
| |
| PR jit/97867 |
| * symtab-thunks.h (thunk_info::release): Use ggc_delete. |
| |
| 2020-11-29 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/92936 |
| PR middle-end/92940 |
| PR middle-end/89428 |
| * builtins.c (access_ref::access_ref): Initialize member. |
| (access_ref::phi): New function. |
| (access_ref::get_ref): New function. |
| (access_ref::add_offset): Remove duplicate assignment. |
| (maybe_warn_for_bound): Add "maybe" kind of warning messages. |
| (warn_for_access): Same. |
| (inform_access): Rename... |
| (access_ref::inform_access): ...to this. Print PHI arguments. Format |
| offset the same as size and simplify. Improve printing of allocation |
| functions and VLAs. |
| (check_access): Adjust to the above. |
| (gimple_parm_array_size): Change argument. |
| (handle_min_max_size): New function. |
| * builtins.h (class ssa_name_limit_t): Move class here from |
| tree-ssa-strlen.c. |
| (struct access_ref): Declare new members. |
| (gimple_parm_array_size): Change argument. |
| * tree-ssa-strlen.c (maybe_warn_overflow): Use access_ref and simplify. |
| (handle_builtin_memcpy): Correct argument passed to maybe_warn_overflow. |
| (handle_builtin_memset): Same. |
| (class ssa_name_limit_t): Move class to builtins.{h,c}. |
| |
| 2020-11-29 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| * config.gcc (*-*-darwin*): Set d_target_objs and target_has_targetdm. |
| * config/elfos.h (TARGET_D_MINFO_SECTION): New macro. |
| (TARGET_D_MINFO_START_NAME): New macro. |
| (TARGET_D_MINFO_END_NAME): New macro. |
| * config/t-darwin: Add darwin-d.o. |
| * doc/tm.texi: Regenerate. |
| * doc/tm.texi.in (D language and ABI): Add @hook for |
| TARGET_D_MINFO_SECTION, TARGET_D_MINFO_START_NAME, and |
| TARGET_D_MINFO_END_NAME. |
| * config/darwin-d.c: New file. |
| |
| 2020-11-29 Jan Hubicka <jh@suse.cz> |
| |
| * tree-ssa-structalias.c (handle_pure_call): Skip EAF_UNUSED |
| parameters. |
| |
| 2020-11-29 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (modref_lattice::merge): Do nothing if F is EAF_UNUSED. |
| (analyze_parms): Detect unused params. |
| (modref_merge_call_site_flags): Merge correct EAF_UNUSED. |
| |
| 2020-11-28 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR target/97939 |
| * config/sparc/predicates.md (arith_double_add_operand): Comment. |
| * config/sparc/sparc.md (uaddvdi4): Use arith_double_operand. |
| (addvdi4): Use arith_double_add_operand. |
| (addsi3): Remove useless attributes. |
| (addvsi4): Use arith_add_operand. |
| (*cmp_ccv_plus): Likewise and add second alternative accordingly. |
| (*cmp_ccxv_plus): Likewise. |
| (*cmp_ccv_plus_set): Likewise. |
| (*cmp_ccxv_plus_set): Likewise. |
| (*cmp_ccv_plus_sltu_set): Likewise. |
| (usubvdi4): Use arith_double_operand. |
| (subvdi4): Use arith_double_add_operand. |
| (subsi3): Remove useless attributes. |
| (subvsi4): Use arith_add_operand. |
| (*cmp_ccv_minus): Likewise and add second alternative accordingly. |
| (*cmp_ccxv_minus): Likewise. |
| (*cmp_ccv_minus_set): Likewise. |
| (*cmp_ccxv_minus_set): Likewise. |
| (*cmp_ccv_minus_sltu_set): Likewise. |
| (negsi2): Use register_operand. |
| (unegvsi3): Likewise. |
| (negvsi3) Likewise. |
| (*cmp_ccnz_neg): Likewise. |
| (*cmp_ccxnz_neg): Likewise. |
| (*cmp_ccnz_neg_set): Likewise. |
| (*cmp_ccxnz_neg_set): Likewise. |
| (*cmp_ccc_neg_set): Likewise. |
| (*cmp_ccxc_neg_set): Likewise. |
| (*cmp_ccc_neg_sltu_set): Likewise. |
| (*cmp_ccv_neg): Likewise. |
| (*cmp_ccxv_neg): Likewise. |
| (*cmp_ccv_neg_set): Likewise. |
| (*cmp_ccxv_neg_set): Likewise. |
| (*cmp_ccv_neg_sltu_set): Likewise. |
| |
| 2020-11-27 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR other/98027 |
| * doc/install.texi: Default to --enable-cet=auto. |
| |
| 2020-11-27 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * omp-oacc-kernels-decompose.cc (flatten_binds): Don't choke on |
| empty GIMPLE sequence, and examine all statements contained in |
| inner 'GIMPLE_BIND'. |
| |
| 2020-11-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/98024 |
| * tree-ssa-pre.c (insert): Fix successor RPO order check. |
| (do_pre_regular_insertion): When inserting an assignment |
| in place of an all-same-value PHI still record that into |
| PHI_GEN. |
| |
| 2020-11-27 Jakub Jelinek <jakub@redhat.com> |
| |
| * tree-ssanames.c (get_range_info): Handle INTEGER_CST by returning |
| VR_RANGE with both *min and *max set to the wide_int value of the |
| INTEGER_CST. Return VR_VARYING for non-SSA_NAMEs. |
| * match.pd ((t * 2) / 2) -> t): Handle also @0 being INTEGER_CST. |
| Simplify by calling get_range_info on everything. |
| * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Simplify by calling |
| get_range_info on everything. |
| * tree-scalar-evolution.c (iv_can_overflow_p): Likewise. |
| |
| 2020-11-27 Jakub Jelinek <jakub@redhat.com> |
| |
| PR libstdc++/88101 |
| * gimple-fold.c (clear_padding_type): Ignore fields with is_empty_type |
| types. |
| |
| 2020-11-27 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR c/97880 |
| * omp-expand.c (expand_oacc_collapse_init, expand_oacc_collapse_vars): |
| Use now passed diff_type. |
| (expand_oacc_for): Take largest type for diff_type, taking tiling |
| and collapsing into account. |
| |
| 2020-11-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64.opt |
| (-param=aarch64-autovec-preference): Define. |
| * config/aarch64/aarch64.c (aarch64_override_options_internal): |
| Set aarch64_sve_compare_costs to 0 when preferring only Advanced |
| SIMD. |
| (aarch64_cmp_autovec_modes): Define. |
| (aarch64_preferred_simd_mode): Adjust to use the above. |
| (aarch64_autovectorize_vector_modes): Likewise. |
| * doc/invoke.texi: Document aarch64-autovec-preference param. |
| |
| 2020-11-27 Xionghu Luo <luoxhu@linux.ibm.com> |
| |
| * config/rs6000/rs6000-call.c (altivec_expand_vec_set_builtin): |
| Change call param 2 from type int to rtx. |
| * config/rs6000/rs6000-protos.h (rs6000_expand_vector_set): |
| Likewise. |
| * config/rs6000/rs6000.c (rs6000_expand_vector_init): |
| Change call param 2 from type int to rtx. |
| (rs6000_expand_vector_set): Likewise. |
| * config/rs6000/vector.md (vec_set<mode>): Support both constant |
| and variable index vec_set. |
| |
| 2020-11-27 Haochen Gui <guihaoc@gcc.gnu.org> |
| |
| * config/rs6000/rs6000-protos.h (rs6000_output_addr_vec_elt): Declare. |
| * config/rs6000/rs6000.c (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): |
| Define. |
| (rs6000_gen_pic_addr_diff_vec, rs6000_output_addr_vec_elt): Implement. |
| * config/rs6000/rs6000.h (CASE_VECTOR_PC_RELATIVE, |
| CASE_VECTOR_MODE, ASM_OUTPUT_ADDR_VEC_ELT): Define. |
| * config/rs6000/rs6000.md (tablejump<mode>_absolute, |
| tablejump<mode>_absolute_nospec): New expanders. |
| * config/rs6000/rs6000.opt (mrelative-jumptables): New. |
| |
| 2020-11-26 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR target/96607 |
| * config/sparc/sparc-protos.h (eligible_for_call_delay): Delete. |
| * config/sparc/sparc.c (eligible_for_call_delay): Likewise. |
| * config/sparc/sparc.md (in_call_delay): Likewise. |
| (tls_delay_slot): New attribute. |
| (define_delay [call]): Use in_branch_delay. |
| (tgd_call<P:mode>): Set type to call_no_delay_slot when |
| tls_delay_slot is false. |
| (tldm_call<P:mode>): Likewise. |
| |
| 2020-11-26 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/97997 |
| * match.pd ((t * 2) / 2) -> t): Optimize even for defined |
| overflow if ranges prove there is no overflow. |
| |
| 2020-11-26 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97953 |
| * gimple-ssa-evrp-analyze.c |
| (evrp_range_analyzer::record_ranges_from_incoming_edge): Make |
| sure the condition post-dominates the SSA definition before |
| recording into SSA_NAME_RANGE_INFO. |
| |
| 2020-11-26 Richard Biener <rguenther@suse.de> |
| |
| * gimple-isel.cc (gimple_expand_vec_cond_expr): Only |
| lower VECTOR_BOOLEAN_TYPE_P VEC_COND_EXPRs. |
| |
| 2020-11-26 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/mkoffload.c (copy_early_debug_info): Don't wipe |
| relocation symbols. |
| |
| 2020-11-26 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-expand.c (ix86_expand_multi_arg_builtin): |
| Remove args array of structs, declare rtx xops array instead. |
| Update all uses. |
| (ix86_expand_args_builtin): Ditto. |
| (ix86_expand_round_builtin): Ditto. |
| (ix86_expand_special_args_builtin): Ditto. |
| |
| 2020-11-26 Martin Liska <mliska@suse.cz> |
| |
| * dwarf2out.c (gen_compile_unit_die): Fix missing == 0 in a |
| strcmp. |
| |
| 2020-11-26 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| |
| * config/sol2.h (TIME_LIBRARY): Remove. |
| |
| 2020-11-26 Kewen Lin <linkw@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Set param_vect_partial_vector_usage as 1 for Power10 and up |
| by default. |
| |
| 2020-11-26 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimple-fold.c (clear_padding_union): Ignore DECL_PADDING_P |
| fields. |
| (clear_padding_type): Ignore DECL_PADDING_P fields, rather than |
| DECL_BIT_FIELD with NULL DECL_NAME. |
| |
| 2020-11-26 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/97979 |
| * match.pd ((X {&,^,|} C2) << C1 into (X << C1) {&,^,|} (C2 << C1)): |
| Only optimize if int_const_binop returned non-NULL. |
| |
| 2020-11-26 liuhongt <hongtao.liu@intel.com> |
| |
| * config/i386/i386-expand.c |
| (ix86_expand_special_args_builtin): Delete last_arg_constant |
| and match. |
| |
| 2020-11-26 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/97873 |
| * config/i386/i386.md (abs<mode>2): Use SDWIM mode iterator. |
| (*abs<mode>2_1): Use SWI mode iterator. |
| (<maxmin:code><mode>3): Use SDWIM mode iterator. |
| (*<maxmin:code><mode>3_1): Use SWI mode iterator. |
| |
| 2020-11-26 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/96906 |
| * config/i386/sse.md (VI12_AVX2): Remove V64QI/V32HI modes. |
| (VI12_AVX2_AVX512BW): New mode iterator. |
| (<sse2_avx2>_<plusminus_insn><mode>3<mask_name>, |
| uavg<mode>3_ceil, <sse2_avx2>_uavg<mode>3<mask_name>): Use |
| VI12_AVX2_AVX512BW iterator instead of VI12_AVX2. |
| (*<sse2_avx2>_<plusminus_insn><mode>3<mask_name>): Likewise. |
| (*<sse2_avx2>_uavg<mode>3<mask_name>): Likewise. |
| (*<sse2_avx2>_<plusminus_insn><mode>3<mask_name>): Add a new |
| define_split after this insn. |
| |
| 2020-11-26 Martin Uecker <muecker@gwdg.de> |
| |
| PR c/65455 |
| PR c/92935 |
| * ginclude/stdatomic.h: Use comma operator to drop qualifiers. |
| |
| 2020-11-26 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR bootstrap/97983 |
| * lra.c (lra_process_new_insns): Use emit_insn_before_noloc or |
| emit_insn_after_noloc with the destination BB. |
| |
| 2020-11-25 Martin Sebor <msebor@redhat.com> |
| |
| PR bootstrap/97622 |
| PR bootstrap/94982 |
| * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p): |
| Avoid -Wformat-diag. |
| * digraph.cc (struct test_edge): Same. |
| * dumpfile.c (dump_loc): Same. |
| (dump_context::begin_scope): Same. |
| * edit-context.c (edited_file::print_diff): Same. |
| (edited_file::print_diff_hunk): Same. |
| * json.cc (object::print): Same. |
| * lto-wrapper.c (merge_and_complain): Same. |
| * reload.c (find_reloads): Same. |
| * tree-diagnostic-path.cc (print_path_summary_as_text): Same. |
| * ubsan.c (ubsan_type_descriptor): Same. |
| |
| 2020-11-25 Jan Hubicka <jh@suse.cz> |
| |
| * gimple.c (gimple_call_arg_flags): Also imply EAF_NODIRECTESCAPE. |
| * tree-core.h (EAF_NODRECTESCAPE): New flag. |
| * tree-ssa-structalias.c (make_indirect_escape_constraint): New |
| function. |
| (handle_rhs_call): Hanlde EAF_NODIRECTESCAPE. |
| * ipa-modref.c (dump_eaf_flags): Print EAF_NODIRECTESCAPE. |
| (deref_flags): Dereference is always EAF_NODIRECTESCAPE. |
| (modref_lattice::init): Also set EAF_NODIRECTESCAPE. |
| (analyze_ssa_name_flags): Pure functions do not affect |
| EAF_NODIRECTESCAPE. |
| (analyze_params): Likewise. |
| (ipa_merge_modref_summary_after_inlining): Likewise. |
| (modref_merge_call_site_flags): Likewise. |
| |
| 2020-11-25 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (modref_summaries::duplicate, |
| modref_summaries_lto::duplicate): Copy arg_flags. |
| (remap_arg_flags): Fix remapping of arg_flags. |
| |
| 2020-11-25 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97956 |
| * gimple-fold.c (gimple_fold_builtin_memchr): Use sizetype for pointer |
| offsets. |
| |
| 2020-11-25 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * asan.c (asan_instrument_reads): New. |
| (asan_instrument_writes): New. |
| (asan_memintrin): New. |
| (handle_builtin_stack_restore): Account for HWASAN. |
| (handle_builtin_alloca): Account for HWASAN. |
| (get_mem_refs_of_builtin_call): Special case strlen for HWASAN. |
| (hwasan_instrument_reads): New. |
| (hwasan_instrument_writes): New. |
| (hwasan_memintrin): New. |
| (report_error_func): Assert not HWASAN. |
| (build_check_stmt): Make HWASAN_CHECK instead of ASAN_CHECK. |
| (instrument_derefs): HWASAN does not tag globals. |
| (instrument_builtin_call): Use new helper functions. |
| (maybe_instrument_call): Don't instrument `noreturn` functions. |
| (initialize_sanitizer_builtins): Add new type. |
| (asan_expand_mark_ifn): Account for HWASAN. |
| (asan_expand_check_ifn): Assert never called by HWASAN. |
| (asan_expand_poison_ifn): Account for HWASAN. |
| (asan_instrument): Branch based on whether using HWASAN or ASAN. |
| (pass_asan::gate): Return true if sanitizing HWASAN. |
| (pass_asan_O0::gate): Return true if sanitizing HWASAN. |
| (hwasan_check_func): New. |
| (hwasan_expand_check_ifn): New. |
| (hwasan_expand_mark_ifn): New. |
| (gate_hwasan): New. |
| * asan.h (hwasan_expand_check_ifn): New decl. |
| (hwasan_expand_mark_ifn): New decl. |
| (gate_hwasan): New decl. |
| (asan_intercepted_p): Always false for hwasan. |
| (asan_sanitize_use_after_scope): Account for HWASAN. |
| * builtin-types.def (BT_FN_PTR_CONST_PTR_UINT8): New. |
| * gimple-fold.c (gimple_build): New overload for building function |
| calls without arguments. |
| (gimple_build_round_up): New. |
| * gimple-fold.h (gimple_build): New decl. |
| (gimple_build): New inline function. |
| (gimple_build_round_up): New decl. |
| (gimple_build_round_up): New inline function. |
| * gimple-pretty-print.c (dump_gimple_call_args): Account for |
| HWASAN. |
| * gimplify.c (asan_poison_variable): Account for HWASAN. |
| (gimplify_function_tree): Remove requirement of |
| SANITIZE_ADDRESS, requiring asan or hwasan is accounted for in |
| `asan_sanitize_use_after_scope`. |
| * internal-fn.c (expand_HWASAN_CHECK): New. |
| (expand_HWASAN_ALLOCA_UNPOISON): New. |
| (expand_HWASAN_CHOOSE_TAG): New. |
| (expand_HWASAN_MARK): New. |
| (expand_HWASAN_SET_TAG): New. |
| * internal-fn.def (HWASAN_ALLOCA_UNPOISON): New. |
| (HWASAN_CHOOSE_TAG): New. |
| (HWASAN_CHECK): New. |
| (HWASAN_MARK): New. |
| (HWASAN_SET_TAG): New. |
| * sanitizer.def (BUILT_IN_HWASAN_LOAD1): New. |
| (BUILT_IN_HWASAN_LOAD2): New. |
| (BUILT_IN_HWASAN_LOAD4): New. |
| (BUILT_IN_HWASAN_LOAD8): New. |
| (BUILT_IN_HWASAN_LOAD16): New. |
| (BUILT_IN_HWASAN_LOADN): New. |
| (BUILT_IN_HWASAN_STORE1): New. |
| (BUILT_IN_HWASAN_STORE2): New. |
| (BUILT_IN_HWASAN_STORE4): New. |
| (BUILT_IN_HWASAN_STORE8): New. |
| (BUILT_IN_HWASAN_STORE16): New. |
| (BUILT_IN_HWASAN_STOREN): New. |
| (BUILT_IN_HWASAN_LOAD1_NOABORT): New. |
| (BUILT_IN_HWASAN_LOAD2_NOABORT): New. |
| (BUILT_IN_HWASAN_LOAD4_NOABORT): New. |
| (BUILT_IN_HWASAN_LOAD8_NOABORT): New. |
| (BUILT_IN_HWASAN_LOAD16_NOABORT): New. |
| (BUILT_IN_HWASAN_LOADN_NOABORT): New. |
| (BUILT_IN_HWASAN_STORE1_NOABORT): New. |
| (BUILT_IN_HWASAN_STORE2_NOABORT): New. |
| (BUILT_IN_HWASAN_STORE4_NOABORT): New. |
| (BUILT_IN_HWASAN_STORE8_NOABORT): New. |
| (BUILT_IN_HWASAN_STORE16_NOABORT): New. |
| (BUILT_IN_HWASAN_STOREN_NOABORT): New. |
| (BUILT_IN_HWASAN_TAG_MISMATCH4): New. |
| (BUILT_IN_HWASAN_HANDLE_LONGJMP): New. |
| (BUILT_IN_HWASAN_TAG_PTR): New. |
| * sanopt.c (sanopt_optimize_walker): Act for hwasan. |
| (pass_sanopt::execute): Act for hwasan. |
| * toplev.c (compile_file): Use `gate_hwasan` function. |
| |
| 2020-11-25 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * asan.c (struct hwasan_stack_var): New. |
| (hwasan_sanitize_p): New. |
| (hwasan_sanitize_stack_p): New. |
| (hwasan_sanitize_allocas_p): New. |
| (initialize_sanitizer_builtins): Define new builtins. |
| (ATTR_NOTHROW_LIST): New macro. |
| (hwasan_current_frame_tag): New. |
| (hwasan_frame_base): New. |
| (stack_vars_base_reg_p): New. |
| (hwasan_maybe_init_frame_base_init): New. |
| (hwasan_record_stack_var): New. |
| (hwasan_get_frame_extent): New. |
| (hwasan_increment_frame_tag): New. |
| (hwasan_record_frame_init): New. |
| (hwasan_emit_prologue): New. |
| (hwasan_emit_untag_frame): New. |
| (hwasan_finish_file): New. |
| (hwasan_truncate_to_tag_size): New. |
| * asan.h (hwasan_record_frame_init): New declaration. |
| (hwasan_record_stack_var): New declaration. |
| (hwasan_emit_prologue): New declaration. |
| (hwasan_emit_untag_frame): New declaration. |
| (hwasan_get_frame_extent): New declaration. |
| (hwasan_maybe_enit_frame_base_init): New declaration. |
| (hwasan_frame_base): New declaration. |
| (stack_vars_base_reg_p): New declaration. |
| (hwasan_current_frame_tag): New declaration. |
| (hwasan_increment_frame_tag): New declaration. |
| (hwasan_truncate_to_tag_size): New declaration. |
| (hwasan_finish_file): New declaration. |
| (hwasan_sanitize_p): New declaration. |
| (hwasan_sanitize_stack_p): New declaration. |
| (hwasan_sanitize_allocas_p): New declaration. |
| (HWASAN_TAG_SIZE): New macro. |
| (HWASAN_TAG_GRANULE_SIZE): New macro. |
| (HWASAN_STACK_BACKGROUND): New macro. |
| * builtin-types.def (BT_FN_VOID_PTR_UINT8_PTRMODE): New. |
| * builtins.def (DEF_SANITIZER_BUILTIN): Enable for HWASAN. |
| * cfgexpand.c (align_local_variable): When using hwasan ensure |
| alignment to tag granule. |
| (align_frame_offset): New. |
| (expand_one_stack_var_at): For hwasan use tag offset. |
| (expand_stack_vars): Record stack objects for hwasan. |
| (expand_one_stack_var_1): Record stack objects for hwasan. |
| (init_vars_expansion): Initialise hwasan state. |
| (expand_used_vars): Emit hwasan prologue and generate hwasan epilogue. |
| (pass_expand::execute): Emit hwasan base initialization if needed. |
| * doc/tm.texi (TARGET_MEMTAG_TAG_SIZE,TARGET_MEMTAG_GRANULE_SIZE, |
| TARGET_MEMTAG_INSERT_RANDOM_TAG,TARGET_MEMTAG_ADD_TAG, |
| TARGET_MEMTAG_SET_TAG,TARGET_MEMTAG_EXTRACT_TAG, |
| TARGET_MEMTAG_UNTAGGED_POINTER): Document new hooks. |
| * doc/tm.texi.in (TARGET_MEMTAG_TAG_SIZE,TARGET_MEMTAG_GRANULE_SIZE, |
| TARGET_MEMTAG_INSERT_RANDOM_TAG,TARGET_MEMTAG_ADD_TAG, |
| TARGET_MEMTAG_SET_TAG,TARGET_MEMTAG_EXTRACT_TAG, |
| TARGET_MEMTAG_UNTAGGED_POINTER): Document new hooks. |
| * explow.c (get_dynamic_stack_base): Take new `base` argument. |
| * explow.h (get_dynamic_stack_base): Take new `base` argument. |
| * sanitizer.def (BUILT_IN_HWASAN_INIT): New. |
| (BUILT_IN_HWASAN_TAG_MEM): New. |
| * target.def (target_memtag_tag_size,target_memtag_granule_size, |
| target_memtag_insert_random_tag,target_memtag_add_tag, |
| target_memtag_set_tag,target_memtag_extract_tag, |
| target_memtag_untagged_pointer): New hooks. |
| * targhooks.c (HWASAN_SHIFT): New. |
| (HWASAN_SHIFT_RTX): New. |
| (default_memtag_tag_size): New default hook. |
| (default_memtag_granule_size): New default hook. |
| (default_memtag_insert_random_tag): New default hook. |
| (default_memtag_add_tag): New default hook. |
| (default_memtag_set_tag): New default hook. |
| (default_memtag_extract_tag): New default hook. |
| (default_memtag_untagged_pointer): New default hook. |
| * targhooks.h (default_memtag_tag_size): New default hook. |
| (default_memtag_granule_size): New default hook. |
| (default_memtag_insert_random_tag): New default hook. |
| (default_memtag_add_tag): New default hook. |
| (default_memtag_set_tag): New default hook. |
| (default_memtag_extract_tag): New default hook. |
| (default_memtag_untagged_pointer): New default hook. |
| * toplev.c (compile_file): Call hwasan_finish_file when finished. |
| |
| 2020-11-25 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * common.opt (flag_sanitize_recover): Default for kernel |
| hwaddress. |
| (static-libhwasan): New cli option. |
| * config/aarch64/aarch64.c (aarch64_can_tag_addresses): New. |
| (TARGET_MEMTAG_CAN_TAG_ADDRESSES): New. |
| * config/gnu-user.h (LIBHWASAN_EARLY_SPEC): hwasan equivalent of |
| asan command line flags. |
| * cppbuiltin.c (define_builtin_macros_for_compilation_flags): |
| Add hwasan equivalent of __SANITIZE_ADDRESS__. |
| * doc/invoke.texi: Document hwasan command line flags. |
| * doc/tm.texi: Document new hook. |
| * doc/tm.texi.in: Document new hook. |
| * flag-types.h (enum sanitize_code): New sanitizer values. |
| * gcc.c (STATIC_LIBHWASAN_LIBS): New macro. |
| (LIBHWASAN_SPEC): New macro. |
| (LIBHWASAN_EARLY_SPEC): New macro. |
| (SANITIZER_EARLY_SPEC): Update to include hwasan. |
| (SANITIZER_SPEC): Update to include hwasan. |
| (sanitize_spec_function): Use hwasan options. |
| * opts.c (finish_options): Describe conflicts between address |
| sanitizers. |
| (find_sanitizer_argument): New. |
| (report_conflicting_sanitizer_options): New. |
| (sanitizer_opts): Introduce new sanitizer flags. |
| (common_handle_option): Add defaults for kernel sanitizer. |
| * params.opt (hwasan--instrument-stack): New |
| (hwasan-random-frame-tag): New |
| (hwasan-instrument-allocas): New |
| (hwasan-instrument-reads): New |
| (hwasan-instrument-writes): New |
| (hwasan-instrument-mem-intrinsics): New |
| * target.def (HOOK_PREFIX): Add new hook. |
| (can_tag_addresses): Add new hook under memtag prefix. |
| * targhooks.c (default_memtag_can_tag_addresses): New. |
| * targhooks.h (default_memtag_can_tag_addresses): New decl. |
| * toplev.c (process_options): Ensure hwasan only on |
| architectures that advertise the possibility. |
| |
| 2020-11-25 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * doc/install.texi: Document new option. |
| |
| 2020-11-25 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_maybe_expand_sve_subreg_move): |
| Do not optimize LRA subregs. |
| * config/aarch64/aarch64-sve.md |
| (@aarch64_pred_<SVE_INT_UNARY:optab><mode>): Tie the input to the |
| output. |
| (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>): Likewise. |
| (*<ANY_EXTEND:optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2): Likewise. |
| (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>): Likewise. |
| (*cnot<mode>): Likewise. |
| (@aarch64_pred_<SVE_COND_FP_UNARY:optab><mode>): Likewise. |
| (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>): |
| Likewise. |
| (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>): |
| Likewise. |
| (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>): |
| Likewise. |
| (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>): |
| Likewise. |
| (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>): |
| Likewise. |
| (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): |
| Likewise. |
| (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>): |
| Likewise. |
| * config/aarch64/aarch64-sve2.md |
| (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise. |
| (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise. |
| (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise. |
| (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise. |
| |
| 2020-11-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/95862 |
| * internal-fn.c (get_min_precision): For narrowing conversion, recurse |
| on the operand and if the operand precision is smaller than the |
| current one, return that smaller precision. |
| (expand_mul_overflow): For s1 * u2 -> ur and s1 * s2 -> ur cases |
| if the sum of minimum precisions of both operands is smaller or equal |
| to the result precision, just perform normal multiplication and |
| set overflow to the sign bit of the multiplication result. For |
| u1 * u2 -> sr if both arguments have the MSB known zero, use |
| normal s1 * s2 -> sr expansion. |
| |
| 2020-11-25 Jan Hubicka <jh@suse.cz> |
| |
| * cfg.c (free_block): New function. |
| (clear_edges): Rename to .... |
| (free_cfg): ... this one; also free BBs and vectors. |
| (expunge_block): Update comment. |
| * cfg.h (clear_edges): Rename to ... |
| (free_cfg): ... this one. |
| * cgraph.c (release_function_body): Use free_cfg. |
| |
| 2020-11-25 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/97579 |
| * gimple-isel.cc (gimple_expand_vec_cond_expr): Lower |
| VECTOR_BOOLEAN_TYPE_P, non-vector mode VEC_COND_EXPRs. |
| |
| 2020-11-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/97943 |
| * gimple-fold.c (clear_padding_union, clear_padding_type): Error on and |
| ignore flexible array member fields. Ignore fields with |
| error_mark_node type. |
| |
| 2020-11-24 Ulrich Weigand <ulrich.weigand@de.ibm.com> |
| |
| Revert: |
| 2020-11-24 Ulrich Weigand <uweigand@de.ibm.com> |
| |
| * doc/invoke.texi (-ffast-math): Remove mention of -fno-signaling-nans. |
| Clarify conditions when __FAST_MATH__ preprocessor macro is defined. |
| * opts.c (common_handle_option): Pass OPTS_SET to set_fast_math_flags |
| and set_unsafe_math_optimizations_flags. |
| (set_fast_math_flags): Add OPTS_SET argument, and use it to avoid |
| setting flags already explicitly set on the command line. In the !set |
| case, also reset x_flag_cx_limited_range and x_flag_excess_precision. |
| Never reset x_flag_signaling_nans or x_flag_rounding_math. |
| (set_unsafe_math_optimizations_flags): Add OPTS_SET argument, and use |
| it to avoid setting flags already explicitly set on the command line. |
| (fast_math_flags_set_p): Also test x_flag_cx_limited_range, |
| x_flag_associative_math, x_flag_reciprocal_math, and |
| x_flag_rounding_math. |
| |
| 2020-11-24 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR bootstrap/97933 |
| * lra.c (lra_process_new_insns): Stop on the first real insn after |
| head of e->dest. |
| |
| 2020-11-24 Richard Earnshaw <rearnsha@arm.com> |
| |
| PR target/97534 |
| * config/arm/arm.c (arm_split_atomic_op): Use gen_int_mode when |
| negating a const_int. |
| |
| 2020-11-24 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * config/s390/vector.md: Use vcond_comparison_operator |
| predicate. |
| |
| 2020-11-24 Ulrich Weigand <uweigand@de.ibm.com> |
| |
| * doc/invoke.texi (-ffast-math): Remove mention of -fno-signaling-nans. |
| Clarify conditions when __FAST_MATH__ preprocessor macro is defined. |
| * opts.c (common_handle_option): Pass OPTS_SET to set_fast_math_flags |
| and set_unsafe_math_optimizations_flags. |
| (set_fast_math_flags): Add OPTS_SET argument, and use it to avoid |
| setting flags already explicitly set on the command line. In the !set |
| case, also reset x_flag_cx_limited_range and x_flag_excess_precision. |
| Never reset x_flag_signaling_nans or x_flag_rounding_math. |
| (set_unsafe_math_optimizations_flags): Add OPTS_SET argument, and use |
| it to avoid setting flags already explicitly set on the command line. |
| (fast_math_flags_set_p): Also test x_flag_cx_limited_range, |
| x_flag_associative_math, x_flag_reciprocal_math, and |
| x_flag_rounding_math. |
| |
| 2020-11-24 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/97950 |
| * config/i386/i386.md (*setcc_si_1_and): Macroize into... |
| (*setcc_<mode>_1_and): New define_insn_and_split with SWI24 iterator. |
| (*setcc_si_1_movzbl): Macroize into... |
| (*setcc_<mode>_1_movzbl): New define_insn_and_split with SWI24 |
| iterator. |
| |
| 2020-11-24 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimple-fold.c (clear_padding_flush): If a word contains only 0 |
| or 0xff bytes of padding other than all set, all clear, all set |
| followed by all clear or all clear followed by all set, don't emit |
| a RMW operation on the whole word or parts of it, but instead |
| clear the individual bytes of padding. For paddings of one byte |
| size, don't use char[1] and {}, but instead just char and 0. |
| |
| 2020-11-24 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * omp-expand.c (expand_oacc_for): More explicit checking of which |
| OMP constructs we're expecting. |
| |
| 2020-11-24 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * doc/install.texi (Prerequisites) <Tcl>: Add comment. |
| |
| 2020-11-24 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96929 |
| * fold-const.c (wide_int_binop) <case LSHIFT_EXPR, case RSHIFT_EXPR>: |
| Return false on negative second argument rather than trying to handle |
| it as shift in the other direction. |
| * tree-ssa-ccp.c (bit_value_binop) <case LSHIFT_EXPR, |
| case RSHIFT_EXPR>: Punt on negative shift count rather than trying |
| to handle it as shift in the other direction. |
| * match.pd (-1 >> x to -1): Remove tree_expr_nonnegative_p check. |
| |
| 2020-11-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> |
| |
| PR tree-optimization/97849 |
| * tree-if-conv.c (tree_if_conversion): Move ssa_name |
| replacement code from ifcvt_local_dce to this function |
| before calling do_rpo_vn. |
| |
| 2020-11-24 Martin Sebor <msebor@redhat.com> |
| |
| * tree-cfg.c (dump_function_to_file): Print type attributes |
| and return type. |
| |
| 2020-11-23 Martin Jambor <mjambor@suse.cz> |
| |
| * ipa-prop.h (ipa_pass_through_data): Expand comment describing |
| operation. |
| * ipa-prop.c (analyze_agg_content_value): Detect new special case and |
| encode it as ASSERT_EXPR. |
| * ipa-cp.c (values_equal_for_ipcp_p): Move before |
| ipa_get_jf_arith_result. |
| (ipa_get_jf_arith_result): Special case ASSERT_EXPR. |
| |
| 2020-11-23 Jeff Law <law@redhat.com> |
| |
| * config/h8300/h8300.c (h8300_rtx_costs): Handle the various |
| comparison rtx codes too. |
| |
| 2020-11-23 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-prop.c (build_agg_jump_func_from_list, |
| ipa_read_jump_function): Reserve agg.items precisely. |
| * ipa-prop.h (ipa_node_params::~ipa_node_params): Release descriptors |
| (ipa_edge_args::~ipa_edge_args): Release agg.items. |
| |
| 2020-11-23 Jan Hubicka <jh@suse.cz> |
| |
| * lto-streamer-in.c (input_cfg): Do not init ssa operands. |
| (input_function): Do not init tree_ssa and set in_ssa_p. |
| (input_ssa_names): Do it here. |
| * tree-ssa.c (init_tree_ssa): Add additional SIZE parameter, default |
| to 0 |
| * tree-ssanames.c (init_ssanames): Do not round size up to 50, allocate |
| precisely. |
| * tree-ssa.h (init_tree_ssa): Update prototype. |
| |
| 2020-11-23 Nathan Sidwell <nathan@acm.org> |
| |
| * diagnostic.c (diagnostic_report_current_module): Adjust for C++ |
| module importation. |
| |
| 2020-11-23 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (msp430_section_attr): Don't warn for "lower" |
| attribute used with "noinit" or "persistent" attributes. |
| (msp430_persist_attr): Remove. |
| (attr_lower_exclusions): Remove ATTR_PERSIST exclusion. |
| (attr_upper_exclusions): Likewise. |
| (attr_either_exclusions): Likewise. |
| (attr_persist_exclusions): Remove. |
| (msp430_attribute_table): Remove ATTR_PERSIST handling. |
| (msp430_handle_generic_attribute): Remove ATTR_PERSIST section conflict |
| handling. |
| (TARGET_ASM_INIT_SECTIONS): Remove. |
| (msp430_init_sections): Remove. |
| (msp430_select_section): Use default_elf_select_section for decls with |
| the "persistent" attribute. |
| (msp430_section_type_flags): Remove ".persistent" section handling. |
| * doc/extend.texi (MSP430 Variable Attributes): Remove "noinit" and |
| "persistent" documentation. |
| |
| 2020-11-23 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (maybe_push_to_hybrid_worklist): Skip |
| debug stmts. |
| |
| 2020-11-23 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * doc/extend.texi (Common Variable Attributes): Document the |
| "persistent" variable attribute. |
| * doc/sourcebuild.texi (Effective-Target Keywords): Document |
| the "persistent" effective target keyword. |
| * tree.h (DECL_PERSISTENT_P): Define. |
| * varasm.c (bss_initializer_p): Return false for a |
| DECL_PERSISTENT_P decl initialized to zero. |
| (default_section_type_flags): Handle the ".persistent" section. |
| (default_elf_select_section): Likewise. |
| (default_unique_section): Likewise. |
| |
| 2020-11-23 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * tree.h (DECL_NOINIT_P): Define. |
| * varasm.c (DECL_NOINIT_P): Check DECL_NOINIT_P before using |
| unnamed bss/lcomm sections for bss_initializer variables. |
| (default_elf_select_section): Use DECL_NOINIT_P instead of |
| looking up attribute for .noinit section selection. |
| (default_unique_section): Check DECL_NOINIT_P for .noinit |
| section selection. |
| |
| 2020-11-23 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * doc/install.texi: Document bootstrap-asan option. |
| |
| 2020-11-22 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/97873 |
| * config/i386/i386.md (abs<mode>2): Use SWI48DWI mode iterator. |
| (*abs<dwi>2_doubleword): Use DWIH mode iterator. |
| (<maxmin:code><mode>3): Use SWI48DWI mode iterator. |
| (*<maxmin:code><dwi>3_doubleword): Use DWIH mode iterator. |
| |
| 2020-11-22 Austin Law <austinklaw@gmail.com> |
| |
| * config/h8300/addsub.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. |
| (add<mod>3_incdec): Remove pattern |
| (adds/subs splitter): Only run before reload. |
| * config/h8300/bitfield.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output |
| of the splitters. |
| (cstoreqi4, cstorehi4, cstoresi4): Comment out |
| (*bstzhireg, *cmpstz, *bstz, *bistz, *cmpcondset): Likewise |
| (*condbset, *cmpcondbclr, *condbclr): Likewise. |
| (*cmpcondbsetreg, *condbsetreg, *cmpcondbclrreg): Likewise. |
| (*condbclrreg): Likewise. |
| * config/h8300/combiner.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. Add appropriate CC register clobbers to |
| existing splitters. |
| (*addsi3_and_r_1): Disable for now. |
| (*addsi3_and_not_r_1, bit-test branches): Likewise. |
| * config/h8300/divmod.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. |
| * config/h8300/extensions.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. |
| * config/h8300/genmova.sh: Drop "cc" attribute from patterns. |
| * config/h8300/mova.md: Drop "cc" attribute from patterns. |
| * config/h8300/h8300-modes.def: Add CCZN and CCZNV modes. |
| * config/h8300/h8300-protos.h (output_plussi): Update prototype. |
| (compute_plussi_length): Likewise. |
| (h8300_select_cc_mode): Add prototype. |
| (compute_a_shift_cc): Remove prototype |
| (cmpute_logical_op_cc): Likewise. |
| * config/h8300/h8300.c (names_big): Add "cc" register. |
| (names_extended, names_upper_extended): Likewise. |
| (h8300_emit_stack_adjustment): Be more selective about setting |
| RTX_FRAME_RELATED_P. |
| (h8300_print_operand): Handle CCZN mode |
| (h8300_select_cc_mode): New function. |
| (notice_update_cc): if-0 out. Only kept for reference purposes. |
| (h8300_expand_store): Likewise. |
| (h8300_binary_length): Handle new insn forms. |
| (output_plussi): Add argument for NEED_FLAGS and handle that case. |
| (compute_plussi_length): Likewise. |
| (compute_logical_op_cc): Return integer. |
| (TARGET_FLAGS_REGNUM): Define. |
| * config/h8300/h8300.h (FIRST_PSEUDO_REGISTER): Bump for cc register. |
| (FIXED_REGISTERS, CALL_USED_REGISTERS): Handle cc register. |
| (REG_ALLOC_ORDER, REGISTER_NAMES): Likewise. |
| (SELECT_CC_MODE): Define. |
| * config/h8300/h8300.md: Add CC_REG. |
| Do not include peepholes.md for now. |
| * config/h8300/jumpcall.md (cbranchqi4): Consolidate into |
| cbranch<mode>4. |
| (cbranchhi4, cbranchsi4): Likewise. |
| (cbranch<mode>4): New expander. |
| (branch): New define_insn_and_split for use before reload. |
| (branch_1, branch_1_false): New patterns to match splitter output. |
| Remove code to manage cc_status.flags. |
| * config/h8300/logical.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. Move various peepholes into this file. |
| * config/h8300/movepush.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. |
| * config/h8300/multiply.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. |
| * config/h8300/other.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. |
| * config/h8300/peepholes.md: Remove peepholes that were moved |
| elsewhere. |
| * config/h8300/predicates.md (simple_memory_operand): New. |
| * config/h8300/proepi.md: Drop "cc" attribute setting. |
| * config/h8300/shiftrotate.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. |
| * config/h8300/testcompare.md: Turn existing patterns into |
| define_insn_and_split style patterns where the splitter |
| adds a clobber of the condition code register. Drop "cc" |
| attribute. Add _clobber_flags patterns to match output of |
| the splitters. Disable various patterns for now. |
| Move some peepholes that were previously in peepholes.md here. |
| * config/h8300/save.md: New file. |
| |
| 2020-11-22 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/95853 |
| * tree-ssa-math-opts.c (uaddsub_overflow_check_p): Add maxval |
| argument, if non-NULL, instead look for r > maxval or r <= maxval |
| comparisons. |
| (match_uaddsub_overflow): Pattern recognize even other forms of |
| __builtin_add_overflow, in particular when addition is performed |
| in a wider type and result compared to maximum of the narrower |
| type. |
| |
| 2020-11-22 Jeff Law <law@redhat.com> |
| |
| * config/h8300/jumpcall.md (branch_true, branch_false): Revert |
| recent change. Ensure operand[0] is always the target label. |
| |
| 2020-11-22 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin-c.c (struct f_align_stack): Rename |
| to type from align_stack to f_align_stack. |
| (push_field_alignment): Likewise. |
| (pop_field_alignment): Likewise. |
| |
| 2020-11-21 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/94695 |
| * doc/invoke.texi: Update the -Wrange-loop-construct description. |
| |
| 2020-11-21 Jan Hubicka <jh@suse.cz> |
| |
| * tree-ssa-alias.c (ao_compare::compare_ao_refs, |
| ao_compare::hash_ao_ref): Use OEP_MATCH_SIDE_EFFECTS. |
| |
| 2020-11-21 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-icf.c (sem_function::equals_wpa): Do not compare ODR type with |
| -fno-devirtualize. |
| (sem_item_optimizer::update_hash_by_addr_refs): Hash anonymous ODR |
| types by TYPE_UID of their main variant. |
| |
| 2020-11-21 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Enable vector pair memcpy/memmove expansion. |
| |
| 2020-11-21 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| * config/rs6000/mma.md (unspec): Add assemble/extract UNSPECs. |
| (movoi): Change to movoo. |
| (*movpoi): Change to *movoo. |
| (movxi): Change to movxo. |
| (*movpxi): Change to *movxo. |
| (mma_assemble_pair): Change to OO mode. |
| (*mma_assemble_pair): New define_insn_and_split. |
| (mma_disassemble_pair): New define_expand. |
| (*mma_disassemble_pair): New define_insn_and_split. |
| (mma_assemble_acc): Change to XO mode. |
| (*mma_assemble_acc): Change to XO mode. |
| (mma_disassemble_acc): New define_expand. |
| (*mma_disassemble_acc): New define_insn_and_split. |
| (mma_<acc>): Change to XO mode. |
| (mma_<vv>): Change to XO mode. |
| (mma_<avv>): Change to XO mode. |
| (mma_<pv>): Change to OO mode. |
| (mma_<apv>): Change to XO/OO mode. |
| (mma_<vvi4i4i8>): Change to XO mode. |
| (mma_<avvi4i4i8>): Change to XO mode. |
| (mma_<vvi4i4i2>): Change to XO mode. |
| (mma_<avvi4i4i2>): Change to XO mode. |
| (mma_<vvi4i4>): Change to XO mode. |
| (mma_<avvi4i4>): Change to XO mode. |
| (mma_<pvi4i2>): Change to XO/OO mode. |
| (mma_<apvi4i2>): Change to XO/OO mode. |
| (mma_<vvi4i4i4>): Change to XO mode. |
| (mma_<avvi4i4i4>): Change to XO mode. |
| * config/rs6000/predicates.md (input_operand): Allow opaque. |
| (mma_disassemble_output_operand): New predicate. |
| * config/rs6000/rs6000-builtin.def: |
| Changes to disassemble builtins. |
| * config/rs6000/rs6000-call.c (rs6000_return_in_memory): |
| Disallow __vector_pair/__vector_quad as return types. |
| (rs6000_promote_function_mode): Remove function return type |
| check because we can't test it here any more. |
| (rs6000_function_arg): Do not allow __vector_pair/__vector_quad |
| as as function arguments. |
| (rs6000_gimple_fold_mma_builtin): |
| Handle mma_disassemble_* builtins. |
| (rs6000_init_builtins): Create types for XO/OO modes. |
| * config/rs6000/rs6000-modes.def: DElete OI, XI, |
| POI, and PXI modes, and create XO and OO modes. |
| * config/rs6000/rs6000-string.c (expand_block_move): |
| Update to OO mode. |
| * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok_uncached): |
| Update for XO/OO modes. |
| (rs6000_rtx_costs): Make UNSPEC_MMA_XXSETACCZ cost 0. |
| (rs6000_modes_tieable_p): Update for XO/OO modes. |
| (rs6000_debug_reg_global): Update for XO/OO modes. |
| (rs6000_setup_reg_addr_masks): Update for XO/OO modes. |
| (rs6000_init_hard_regno_mode_ok): Update for XO/OO modes. |
| (reg_offset_addressing_ok_p): Update for XO/OO modes. |
| (rs6000_emit_move): Update for XO/OO modes. |
| (rs6000_preferred_reload_class): Update for XO/OO modes. |
| (rs6000_split_multireg_move): Update for XO/OO modes. |
| (rs6000_mangle_type): Update for opaque types. |
| (rs6000_invalid_conversion): Update for XO/OO modes. |
| * config/rs6000/rs6000.h (VECTOR_ALIGNMENT_P): |
| Update for XO/OO modes. |
| * config/rs6000/rs6000.md (RELOAD): Update for XO/OO modes. |
| |
| 2020-11-21 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| * typeclass.h: Add opaque_type_class. |
| * builtins.c (type_to_class): Identify opaque type class. |
| * dwarf2out.c (is_base_type): Handle opaque types. |
| (gen_type_die_with_usage): Handle opaque types. |
| * expr.c (count_type_elements): Opaque types should |
| never have initializers. |
| * ipa-devirt.c (odr_types_equivalent_p): No type-specific handling |
| for opaque types is needed as it eventually checks the underlying |
| mode which is what is important. |
| * tree-streamer.c (record_common_node): Handle opaque types. |
| * tree.c (type_contains_placeholder_1): Handle opaque types. |
| (type_cache_hasher::equal): No additional comparison needed for |
| opaque types. |
| |
| 2020-11-20 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000-call.c (rs6000_expand_builtin): Add missing |
| XSCMP* cases for IEEE 128-bit long double. |
| |
| 2020-11-20 Jason Merrill <jason@redhat.com> |
| |
| PR c++/97918 |
| * dwarf2out.c (dwarf2out_early_finish): flush_limbo_die_list |
| after gen_scheduled_generic_parms_dies. |
| |
| 2020-11-20 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97879 |
| * tree-core.h (enum attribute_flags): Add ATTR_FLAG_INTERNAL. |
| |
| 2020-11-20 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-icf-gimple.c (func_checker::hash_operand): Improve hashing of |
| decls. |
| |
| 2020-11-20 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-icf-gimple.c (func_checker::compare_decl): Do not compare types |
| of local variables. |
| |
| 2020-11-20 Nathan Sidwell <nathan@acm.org> |
| |
| * doc/invoke.texi: Replace a couple of @code with @command |
| |
| 2020-11-20 Tamar Christina <tamar.christina@arm.com> |
| |
| * tree-vect-slp.c (vectorizable_slp_permutation): Update types on nodes |
| when needed. |
| |
| 2020-11-20 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (maybe_push_to_hybrid_worklist): New function. |
| (vect_detect_hybrid_slp): Use it. Perform a backward walk |
| over the IL. |
| |
| 2020-11-20 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_print_slp_tree): Also dump |
| SLP_TREE_REPRESENTATIVE. |
| |
| 2020-11-20 Jakub Jelinek <jakub@redhat.com> |
| |
| PR libstdc++/88101 |
| * builtins.def (BUILT_IN_CLEAR_PADDING): New built-in function. |
| * gimplify.c (gimplify_call_expr): Rewrite single argument |
| BUILT_IN_CLEAR_PADDING into two-argument variant. |
| * gimple-fold.c (clear_padding_unit, clear_padding_buf_size): New |
| const variables. |
| (struct clear_padding_struct): New type. |
| (clear_padding_flush, clear_padding_add_padding, |
| clear_padding_emit_loop, clear_padding_type, |
| clear_padding_union, clear_padding_real_needs_padding_p, |
| clear_padding_type_may_have_padding_p, |
| gimple_fold_builtin_clear_padding): New functions. |
| (gimple_fold_builtin): Handle BUILT_IN_CLEAR_PADDING. |
| * doc/extend.texi (__builtin_clear_padding): Document. |
| |
| 2020-11-20 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/97528 |
| * config/arm/arm.c (neon_vector_mem_operand): For POST_MODIFY, require |
| first POST_MODIFY operand is a REG and is equal to the first operand |
| of PLUS. |
| |
| 2020-11-20 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gimple-ssa-store-merging.c (struct merged_store_group): Add |
| new 'consecutive' field. |
| (merged_store_group): Set it to true. |
| (do_merge): Set it to false if the store is not consecutive and |
| set string_concatenation to false in this case. |
| (merge_into): Call do_merge on entry. |
| (merge_overlapping): Likewise. |
| |
| 2020-11-20 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-icf-gimple.c (func_checker::operand_equal_p): Fix comment. |
| |
| 2020-11-20 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-icf-gimple.c (func_checker::hash_operand): Hash gimple clobber. |
| (func_checker::operand_equal_p): Special case gimple clobber. |
| |
| 2020-11-20 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/97873 |
| * config/i386/i386.md (*neg<mode>2_2): Rename from |
| "*neg<mode>2_cmpz". Use CCGOCmode instead of CCZmode. |
| (*negsi2_zext): Rename from *negsi2_cmpz_zext. |
| Use CCGOCmode instead of CCZmode. |
| (*neg<mode>_ccc_1): New insn pattern. |
| (*neg<dwi>2_doubleword): Use *neg<mode>_ccc_1. |
| (abs<mode>2): Add FLAGS_REG clobber. |
| Use TARGET_CMOVE insn predicate. |
| (*abs<mode>2_1): New insn_and_split pattern. |
| (*absdi2_doubleword): Ditto. |
| (<maxmin:code><mode>3): Use SWI48x mode iterator. |
| (*<maxmin:code><mode>3): Use SWI48 mode iterator. |
| * config/i386/i386-features.c |
| (general_scalar_chain::compute_convert_gain): Handle ABS code. |
| (general_scalar_chain::convert_insn): Ditto. |
| (general_scalar_to_vector_candidate_p): Ditto. |
| |
| 2020-11-20 Jakub Jelinek <jakub@redhat.com> |
| |
| PR other/97911 |
| * configure.ac: In SERIAL_LIST use lang words without .serial |
| suffix. Change $lang.prev from a target to variable and instead |
| of depending on *.serial expand to the *.serial variable if |
| the word is in the SERIAL_LIST at all, otherwise to nothing. |
| * configure: Regenerated. |
| |
| 2020-11-20 Kewen Lin <linkw@linux.ibm.com> |
| |
| * config/rs6000/rs6000.md (p8_mtvsrd_df): Fix insn type. |
| |
| 2020-11-20 Martin Uecker <muecker@gwdg.de> |
| |
| * gimplify.c (gimplify_modify_expr_rhs): Optimizie |
| NOP_EXPRs that contain compound literals. |
| |
| 2020-11-19 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/91029 |
| * range-op.cc (operator_trunc_mod::op1_range): Don't require signed |
| types, nor require that op2 >= 0. Implement (a % b) >= x && x > 0 |
| implies a >= x and (a % b) <= x && x < 0 implies a <= x. |
| (operator_trunc_mod::op2_range): New method. |
| |
| 2020-11-19 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/93781 |
| * range-op.cc (get_shift_range): Rename from |
| undefined_shift_range_check and now return valid shift ranges. |
| (operator_lshift::fold_range): Use result from get_shift_range. |
| (operator_rshift::fold_range): Ditto. |
| |
| 2020-11-19 Jan Hubicka <jh@suse.cz> |
| |
| * fold-const.c (operand_compare::operand_equal_p): Fix thinko in |
| COMPONENT_REF handling and guard types_same_for_odr by |
| virtual_method_call_p. |
| (operand_compare::hash_operand): Likewise. |
| |
| 2020-11-19 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c/97860 |
| * tree.c (array_type_nelts): For complete arrays with zero min |
| and NULL max and zero size return -1. |
| |
| 2020-11-19 Nathan Sidwell <nathan@acm.org> |
| |
| * configure.ac: Add tests for fstatat, sighandler_t, O_CLOEXEC, |
| unix-domain and ipv6 sockets. |
| * config.in: Rebuilt. |
| * configure: Rebuilt. |
| |
| 2020-11-19 Dimitar Dimitrov <dimitar@dinux.eu> |
| |
| * config/pru/alu-zext.md: Add lmbd patterns for zero_extend |
| variants. |
| * config/pru/pru.c (enum pru_builtin): Add HALT and LMBD. |
| (pru_init_builtins): Ditto. |
| (pru_builtin_decl): Ditto. |
| (pru_expand_builtin): Ditto. |
| * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Define PRU |
| value for CLZ with zero value parameter. |
| * config/pru/pru.md: Add halt, lmbd and clz patterns. |
| * doc/extend.texi: Document PRU builtins. |
| |
| 2020-11-19 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/invoke.texi (-fvect-cost-model): Add a very-cheap model. |
| * common.opt (fvect-cost-model=): Add very-cheap as a possible option. |
| (fsimd-cost-model=): Likewise. |
| (vect_cost_model): Add very-cheap. |
| * flag-types.h (vect_cost_model): Add VECT_COST_MODEL_VERY_CHEAP. |
| Put the values in order of increasing aggressiveness. |
| * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use |
| range checks when comparing against VECT_COST_MODEL_CHEAP. |
| (vect_prune_runtime_alias_test_list): Do not allow any alias |
| checks for the very-cheap cost model. |
| * tree-vect-loop.c (vect_analyze_loop_costing): Do not allow |
| any peeling for the very-cheap cost model. Also require one |
| iteration of the vector loop to pay for itself. |
| |
| 2020-11-19 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| * config/aarch64/aarch64.c (neoversen1_tunings): Use new |
| cortexa76_extra_costs. |
| (neoversev1_tunings): Likewise. |
| (neoversen2_tunines): Likewise. |
| * config/arm/aarch-cost-tables.h (cortexa76_extra_costs): |
| add new costs. |
| |
| 2020-11-19 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_expand_cpymem): Cleanup code and |
| comments, tweak expansion decisions and improve tail expansion. |
| |
| 2020-11-19 Richard Biener <rguenther@suse.de> |
| |
| * fold-const.c (operand_compare::hash_operand): Fix typo. |
| |
| 2020-11-19 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-reassoc.c (get_rank): Refactor to consistently |
| use the cache and dump ranks assigned. |
| |
| 2020-11-19 Jan Hubicka <jh@suse.cz> |
| |
| * fold-const.c (operand_compare::operand_equal_p): More OBJ_TYPE_REF |
| matching to correct place; drop OEP_ADDRESS_OF for TOKEN, OBJECT and |
| class. |
| (operand_compare::hash_operand): Hash ODR type for OBJ_TYPE_REF. |
| |
| 2020-11-19 Joel Hutton <joel.hutton@arm.com> |
| |
| * config/aarch64/aarch64-simd.md: Add vec_widen_lshift_hi/lo<mode> |
| patterns. |
| * tree-vect-stmts.c (vectorizable_conversion): Fix for widen_lshift |
| case. |
| |
| 2020-11-19 Joel Hutton <joel.hutton@arm.com> |
| |
| * doc/generic.texi: Document new widen_plus/minus_lo/hi tree codes. |
| * doc/md.texi: Document new widenening add/subtract hi/lo optabs. |
| * expr.c (expand_expr_real_2): Add widen_add, widen_subtract cases. |
| * optabs-tree.c (optab_for_tree_code): Add case for widening optabs. |
| * optabs.def (OPTAB_D): Define vectorized widen add, subtracts. |
| * tree-cfg.c (verify_gimple_assign_binary): Add case for widening adds, |
| subtracts. |
| * tree-inline.c (estimate_operator_cost): Add case for widening adds, |
| subtracts. |
| * tree-vect-generic.c (expand_vector_operations_1): Add case for |
| widening adds, subtracts |
| * tree-vect-patterns.c (vect_recog_widen_add_pattern): New recog |
| pattern. |
| (vect_recog_widen_sub_pattern): New recog pattern. |
| (vect_recog_average_pattern): Update widened add code. |
| (vect_recog_average_pattern): Update widened add code. |
| * tree-vect-stmts.c (vectorizable_conversion): Add case for widened add, |
| subtract. |
| (supportable_widening_operation): Add case for widened add, subtract. |
| * tree.def |
| (WIDEN_PLUS_EXPR): New tree code. |
| (WIDEN_MINUS_EXPR): New tree code. |
| (VEC_WIDEN_ADD_HI_EXPR): New tree code. |
| (VEC_WIDEN_PLUS_LO_EXPR): New tree code. |
| (VEC_WIDEN_MINUS_HI_EXPR): New tree code. |
| (VEC_WIDEN_MINUS_LO_EXPR): New tree code. |
| |
| 2020-11-19 Joel Hutton <joel.hutton@arm.com> |
| |
| * config/aarch64/aarch64-simd.md: New patterns |
| vec_widen_saddl_lo/hi_<mode>. |
| |
| 2020-11-19 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97901 |
| * tree-ssa-propagate.c (clean_up_loop_closed_phi): Compute |
| dominators and use replace_uses_by. |
| |
| 2020-11-19 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * dwarf2out.h (struct fixed_point_type_info) <scale_factor>: Turn |
| numerator and denominator into a tree. |
| * dwarf2out.c (base_type_die): In the case of a fixed-point type |
| with arbitrary scale factor, call add_scalar_info on numerator and |
| denominator to emit the appropriate attributes. |
| |
| 2020-11-19 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97897 |
| * tree-complex.c (complex_propagate::visit_stmt): Make sure |
| abnormally used SSA names are VARYING. |
| (complex_propagate::visit_phi): Likewise. |
| * tree-ssa.c (verify_phi_args): Verify PHI arguments on abnormal |
| edges are SSA names. |
| |
| 2020-11-19 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (*<absneg:code><mode>2_i387_1): |
| Disable for TARGET_SSE_MATH modes. |
| |
| 2020-11-19 Jeff Law <law@redhat.com> |
| |
| * config/h8300/constraints.md (R constraint): Add argument to call |
| to h8300_shift_needs_scratch_p. |
| (S and T constraints): Similary. |
| * config/h8300/h8300-protos.h: Update h8300_shift_needs_scratch_p |
| prototype. |
| * config/h8300/h8300.c (expand_a_shift): Emit a different pattern |
| if the shift does not require a scratch register. |
| (h8300_shift_needs_scratch_p): Refine to be more accurate. |
| * config/h8300/shiftrotate.md (shiftqi_noscratch): New pattern. |
| (shifthi_noscratch, shiftsi_noscratch): Similarly. |
| |
| 2020-11-18 Roger Sayle <roger@nextmovesoftware.com> |
| |
| PR middle-end/85811 |
| * fold-const.c (tree_expr_finite_p): New function to test whether |
| a tree expression must be finite, i.e. not a FP NaN or infinity. |
| (tree_expr_infinite_p): New function to test whether a tree |
| expression must be infinite, i.e. a FP infinity. |
| (tree_expr_maybe_infinite_p): New function to test whether a tree |
| expression may be infinite, i.e. a FP infinity. |
| (tree_expr_signaling_nan_p): New function to test whether a tree |
| expression must evaluate to a signaling NaN (sNaN). |
| (tree_expr_maybe_signaling_nan_p): New function to test whether a |
| tree expression may be a signaling NaN (sNaN). |
| (tree_expr_nan_p): New function to test whether a tree expression |
| must evaluate to a (quiet or signaling) NaN. |
| (tree_expr_maybe_nan_p): New function to test whether a tree |
| expression me be a (quiet or signaling) NaN. |
| (tree_binary_nonnegative_warnv_p) [MAX_EXPR]: In the presence |
| of NaNs, MAX_EXPR is only guaranteed to be non-negative, if both |
| operands are non-negative. |
| (tree_call_nonnegative_warnv_p) [CASE_CFN_FMAX,CASE_CFN_FMAX_FN]: |
| In the presence of signaling NaNs, fmax is only guaranteed to be |
| non-negative if both operands are negative. In the presence of |
| quiet NaNs, fmax is non-negative if either operand is non-negative |
| and not a qNaN, or both operands are non-negative. |
| * fold-const.h (tree_expr_finite_p, tree_expr_infinite_p, |
| tree_expr_maybe_infinite_p, tree_expr_signaling_nan_p, |
| tree_expr_maybe_signaling_nan_p, tree_expr_nan_p, |
| tree_expr_maybe_nan_p): Prototype new functions here. |
| * builtins.c (fold_builtin_classify) [BUILT_IN_ISINF]: Fold to |
| a constant if argument is known to be (or not to be) an Infinity. |
| [BUILT_IN_ISFINITE]: Fold to a constant if argument is known to |
| be (or not to be) finite. |
| [BUILT_IN_ISNAN]: Fold to a constant if argument is known to be |
| (or not to be) a NaN. |
| (fold_builtin_fpclassify): Check tree_expr_maybe_infinite_p and |
| tree_expr_maybe_nan_p instead of HONOR_INFINITIES and HONOR_NANS |
| respectively. |
| (fold_builtin_unordered_cmp): Fold UNORDERED_EXPR to a constant |
| when its arguments are known to be (or not be) NaNs. Check |
| tree_expr_maybe_nan_p instead of HONOR_NANS when choosing between |
| unordered and regular forms of comparison operators. |
| * match.pd (ordered(x,y)->true/false): Constant fold ORDERED_EXPR |
| if its operands are known to be (or not to be) NaNs. |
| (unordered(x,y)->true/false): Constant fold UNORDERED_EXPR if its |
| operands are known to be (or not to be) NaNs. |
| (sqrt(x)*sqrt(x)->x): Check tree_expr_maybe_signaling_nan_p instead |
| of HONOR_SNANS. |
| |
| 2020-11-18 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/91029 |
| PR tree-optimization/97888 |
| * range-op.cc (operator_trunc_mod::op1_range): Only set op1 |
| range to >= 0 if lhs is > 0, rather than >= 0. Fix up comments. |
| |
| 2020-11-18 Jakub Jelinek <jakub@redhat.com> |
| |
| * opts.h (struct cl_var): New type. |
| (cl_vars): Declare. |
| * optc-gen.awk: Generate cl_vars array. |
| |
| 2020-11-18 Eugene Rozenfeld <Eugene.Rozenfeld@microsoft.com> |
| |
| PR tree-optimization/96671 |
| * match.pd (three xor patterns): New patterns. |
| |
| 2020-11-18 Jakub Jelinek <jakub@redhat.com> |
| |
| * optc-save-gen.awk: Initialize var_opt_init. In |
| cl_optimization_stream_out for params with default values larger than |
| 10, xor the default value with the actual parameter value. In |
| cl_optimization_stream_in repeat the above xor. |
| |
| 2020-11-18 Jakub Jelinek <jakub@redhat.com> |
| |
| * configure.ac: Add $lang.prev rules, INDEX.$lang and SERIAL_LIST and |
| SERIAL_COUNT variables to Make-hooks. |
| (--enable-link-serialization): New configure option. |
| * Makefile.in (DO_LINK_SERIALIZATION, LINK_PROGRESS): New variables. |
| * doc/install.texi (--enable-link-serialization): Document. |
| * configure: Regenerated. |
| |
| 2020-11-18 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR target/97870 |
| * lra-constraints.c (curr_insn_transform): Do not delete asm goto |
| with wrong constraints. Nullify it saving CFG. |
| |
| 2020-11-18 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.md (mulhi3): New. |
| (mulsi3): New. |
| (mulsidi3): Rename to *mulsidi3_inline. |
| (umulsidi3): Rename to *umulsidi3_inline. |
| (mulsidi3): New define_expand. |
| (umulsidi3): New define_expand. |
| |
| 2020-11-18 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97886 |
| * tree-vect-loop.c (vectorizable_lc_phi): Properly assign |
| vector types to invariants for SLP. |
| |
| 2020-11-18 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| * config.gcc (*-*-dragonfly*): Add dragonfly-d.o and t-dragonfly. |
| * config/dragonfly-d.c: New file. |
| * config/t-dragonfly: New file. |
| |
| 2020-11-18 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/97862 |
| * omp-expand.c (expand_omp_for_init_vars): Don't use the sqrt path |
| if number of iterations is constant 0. |
| |
| 2020-11-18 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.c (riscv_ext_version): New. |
| (riscv_ext_version_table): Ditto. |
| (get_default_version): Ditto. |
| (riscv_subset_t::implied_p): New field. |
| (riscv_subset_t::riscv_subset_t): Init implied_p. |
| (riscv_subset_list::add): New. |
| (riscv_subset_list::handle_implied_ext): Pass riscv_subset_t |
| instead of separated argument. |
| (riscv_subset_list::to_string): Handle zifencei and zicsr, and |
| omit version if version is unknown. |
| (riscv_subset_list::parsing_subset_version): New argument `ext`, |
| remove default_major_version and default_minor_version, get |
| default version info via get_default_version. |
| (riscv_subset_list::parse_std_ext): Update argument for |
| parsing_subset_version calls. |
| Handle 2.2 ISA spec, always enable zicsr and zifencei, they are |
| included in baseline ISA in that time. |
| (riscv_subset_list::parse_multiletter_ext): Update argument for |
| `parsing_subset_version` and `add` calls. |
| (riscv_subset_list::parse): Adjust argument for |
| riscv_subset_list::handle_implied_ext call. |
| * config.gcc (riscv*-*-*): Handle --with-isa-spec=. |
| * config.in (HAVE_AS_MISA_SPEC): New. |
| (HAVE_AS_MARCH_ZIFENCEI): Ditto. |
| * config/riscv/riscv-opts.h (riscv_isa_spec_class): New. |
| (riscv_isa_spec): Ditto. |
| * config/riscv/riscv.h (HAVE_AS_MISA_SPEC): New. |
| (ASM_SPEC): Pass -misa-spec if gas supported. |
| * config/riscv/riscv.opt (riscv_isa_spec_class) New. |
| * configure.ac (HAVE_AS_MARCH_ZIFENCEI): New test. |
| (HAVE_AS_MISA_SPEC): Ditto. |
| * configure: Regen. |
| |
| 2020-11-18 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.c (riscv_implied_info): |
| d and f implied zicsr. |
| (riscv_ext_flag_table): Handle zicsr and zifencei. |
| * config/riscv/riscv-opts.h (MASK_ZICSR): New. |
| (MASK_ZIFENCEI): Ditto. |
| (TARGET_ZICSR): Ditto. |
| (TARGET_ZIFENCEI): Ditto. |
| * config/riscv/riscv.md (clear_cache): Check TARGET_ZIFENCEI. |
| (fence_i): Ditto. |
| * config/riscv/riscv.opt (riscv_zi_subext): New. |
| |
| 2020-11-18 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.c (single_letter_subset_rank): New. |
| (multi_letter_subset_rank): Ditto. |
| (subset_cmp): Ditto. |
| (riscv_subset_list::add): Insert subext in canonical ordering. |
| (riscv_subset_list::parse_std_ext): Move handle_implied_ext to ... |
| (riscv_subset_list::parse): ... here. |
| |
| 2020-11-18 Jiufu Guo <guojiufu@linux.ibm.com> |
| |
| * cfgloop.h (loop_optimizer_finalize): Add flag argument. |
| * loop-init.c (loop_optimizer_finalize): Call clean_up_loop_closed_phi. |
| * tree-cfgcleanup.h (clean_up_loop_closed_phi): New declare. |
| * tree-ssa-loop.c (tree_ssa_loop_done): Call loop_optimizer_finalize |
| with flag argument. |
| * tree-ssa-propagate.c (clean_up_loop_closed_phi): New function. |
| |
| 2020-11-17 Sebastian Pop <spop@amazon.com> |
| |
| * config.gcc: add configure flags --with-{cpu,arch,tune}-{32,64} |
| as alias flags for --with-{cpu,arch,tune} on AArch64. |
| * doc/install.texi: Document new flags for aarch64. |
| |
| 2020-11-17 Sebastian Pop <spop@amazon.com> |
| |
| * config.gcc: Add --with-tune to AArch64 configure flags. |
| |
| 2020-11-17 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/91029 |
| * range-op.cc (operator_trunc_mod::op1_range): New. |
| |
| 2020-11-17 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-icf.c (sem_function::hash_stmt): Fix conditional on |
| variably_modified_type_p. |
| |
| 2020-11-17 Nathan Sidwell <nathan@acm.org> |
| |
| * tree.h (cache_integer_cst): Add defaulted might_duplicate parm. |
| * tree.c (cache_integer_cst): Return the integer cst, add |
| might_duplicate parm to permit finding a small duplicate. |
| |
| 2020-11-17 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/83072 |
| * range-op.cc (wi_optimize_and_or): Remove zero from IOR range when |
| mask is non-zero. |
| |
| 2020-11-17 Joseph Myers <joseph@codesourcery.com> |
| |
| * ginclude/float.h (CR_DECIMAL_DIG): Also define for |
| [__STDC_WANT_IEC_60559_EXT__]. |
| |
| 2020-11-17 Joseph Myers <joseph@codesourcery.com> |
| |
| * ginclude/float.h [__STDC_VERSION__ > 201710L] (FLT_IS_IEC_60559, |
| DBL_IS_IEC_60559, LDBL_IS_IEC_60559): New macros. |
| |
| 2020-11-17 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| PR target/96791 |
| * mode-classes.def: Add MODE_OPAQUE. |
| * machmode.def: Add OPAQUE_MODE. |
| * tree.def: Add OPAQUE_TYPE for types that will use |
| MODE_OPAQUE. |
| * doc/generic.texi: Document OPAQUE_TYPE. |
| * doc/rtl.texi: Document MODE_OPAQUE. |
| * machmode.h: Add OPAQUE_MODE_P(). |
| * genmodes.c (complete_mode): Add MODE_OPAQUE. |
| (opaque_mode): New function. |
| * tree.c (tree_code_size): Add OPAQUE_TYPE. |
| * tree.h: Add OPAQUE_TYPE_P(). |
| * stor-layout.c (int_mode_for_mode): Treat MODE_OPAQUE modes |
| like BLKmode. |
| * ira.c (find_moveable_pseudos): Treat MODE_OPAQUE modes more |
| like integer/float modes here. |
| * dbxout.c (dbxout_type): Treat OPAQUE_TYPE like VOID_TYPE. |
| * tree-pretty-print.c (dump_generic_node): Treat OPAQUE_TYPE |
| like like other types. |
| |
| 2020-11-17 Jan Hubicka <hubicka@ucw.cz> |
| Martin Liska <mliska@suse.cz> |
| |
| * ipa-icf.c: Include data-streamer.h and alias.h. |
| (sem_function::sem_function): Initialize memory_access_types |
| and m_alias_sets_hash. |
| (sem_function::hash_stmt): For memory accesses and when going to |
| do lto streaming add base and ref types into memory_access_types. |
| (sem_item_optimizer::write_summary): Stream memory access types. |
| (sem_item_optimizer::read_section): Likewise and also iniitalize |
| m_alias_sets_hash. |
| (sem_item_optimizer::execute): Call |
| sem_item_optimizer::update_hash_by_memory_access_type. |
| (sem_item_optimizer::update_hash_by_memory_access_type): Updat. |
| * ipa-icf.h (sem_function): Add memory_access_types and |
| m_alias_sets_hash. |
| |
| 2020-11-17 Jan Hubicka <jh@suse.cz> |
| |
| PR bootstrap/97857 |
| * ipa-devirt.c (odr_based_tbaa_p): Do not ICE when |
| odr_hash is not initialized |
| * ipa-utils.h (type_with_linkage_p): Do not sanity check |
| CXX_ODR_P. |
| * tree-streamer-out.c (pack_ts_type_common_value_fields): Set |
| CXX_ODR_P according to the canonical type. |
| |
| 2020-11-17 Nathan Sidwell <nathan@acm.org> |
| |
| * langhooks-def.h (LANG_HOOKS_PREPROCESS_MAIN_FILE) |
| (LANG_HOOKS_PREPROCESS_OPTIONS, LANG_HOOKS_PREPROCESS_UNDEF) |
| (LANG_HOOKS_PREPROCESS_TOKEN): New. |
| (LANG_HOOKS_INITIALIZER): Add them. |
| * langhooks.h (struct lang_hooks): Add preprocess_main_file, |
| preprocess_options, preprocess_undef, preprocess_token hooks. Add |
| enum PT_flags. |
| |
| 2020-11-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/97693 |
| * tree-vect-stmts.c (vectorizable_call): Pass the required vectype |
| to vect_get_vec_defs_for_operand. |
| |
| 2020-11-17 Liu Hao <lh_mouse@126.com> |
| |
| * config/i386/msformat-c.c: Add more length modifiers. |
| |
| 2020-11-17 Tamar Christina <tamar.christina@arm.com> |
| |
| PR driver/97574 |
| * gcc.c (convert_filename): Don't add suffix to things that are |
| not files. |
| (not_actual_file_p): Use supplied argument. |
| |
| 2020-11-17 Haochen Gui <guihaoc@gcc.gnu.org> |
| |
| * final.c (final_scan_insn_1): Set jump table relocatable as the |
| second argument of targetm.asm_out.function_rodata_section. |
| * output.h (default_function_rodata_section, |
| default_no_function_rodata_section): Add the second argument to the |
| declarations. |
| * target.def (function_rodata_section): Change the doc and add |
| the second argument. |
| * doc/tm.texi: Regenerate. |
| * varasm.c (jumptable_relocatable): Implement. |
| (default_function_rodata_section): Add the second argument |
| and the support for relocatable read only sections. |
| (default_no_function_rodata_section): Add the second argument. |
| (function_mergeable_rodata_prefix): Set the second argument to false. |
| * config/mips/mips.c (mips_function_rodata_section): Add the second |
| arugment and set it to false. |
| * config/s390/s390.c (targetm.asm_out.function_rodata_section): Set |
| the second argument to false. |
| * config/s390/s390.md: Likewise. |
| |
| 2020-11-17 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/97194 |
| * config/i386/i386-expand.c (ix86_expand_vector_set_var): New function. |
| * config/i386/i386-protos.h (ix86_expand_vector_set_var): New Decl. |
| * config/i386/predicates.md (vec_setm_operand): New predicate, |
| true for const_int_operand or register_operand under TARGET_AVX2. |
| * config/i386/sse.md (vec_set<mode>): Support both constant |
| and variable index vec_set. |
| |
| 2020-11-17 Martin Sebor <msebor@redhat.com> |
| |
| * tree-ssa-uninit.c (maybe_warn_operand): Call is_empty_type. |
| * tree.c (default_is_empty_type): Rename... |
| (is_empty_type): ...to this. |
| * tree.h (is_empty_type): Declare. |
| |
| 2020-11-17 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/95673 |
| * tree-ssa-strlen.c (used_only_for_zero_equality): Rename... |
| (use_in_zero_equality): ...to this. Add a default argument. |
| (handle_builtin_memcmp): Adjust to the name change above. |
| (handle_builtin_string_cmp): Same. |
| (maybe_warn_pointless_strcmp): Same. Pass in an explicit argument. |
| |
| 2020-11-17 Joseph Myers <joseph@codesourcery.com> |
| |
| * ginclude/float.h (DEC32_SNAN, DEC64_SNAN, DEC128_SNAN): New C2x |
| macros. |
| |
| 2020-11-17 Joseph Myers <joseph@codesourcery.com> |
| |
| * ginclude/float.h (INFINITY, NAN, FLT_SNAN, DBL_SNAN, LDBL_SNAN) |
| (FLT16_SNAN, FLT32_SNAN, FLT64_SNAN, FLT128_SNAN, FLT32X_SNAN) |
| (FLT64X_SNAN, FLT128X_SNAN, DEC_INFINITY, DEC_NAN): New C2x |
| macros. |
| * doc/sourcebuild.texi (Effective-Target Keywords): Document inff. |
| |
| 2020-11-17 Armin Brauns via Gcc-patches <gcc-patches@gcc.gnu.org> |
| |
| * gcc.c: Document %T spec file directive. |
| * doc/invoke.texi: Remove %p, %P spec file directives. |
| Add %M, %R, %V, %nSTR, %>S, %<S*, %{%:function(args):X}, %@{...} spec |
| file directives add sanitize, version-compare, include, gt and |
| debug-level-gt spec functions. |
| |
| 2020-11-16 Roger Sayle <roger@nextmovesoftware.com> |
| |
| PR rtl-optimization/92180 |
| * config/i386/i386.c (ix86_hardreg_mov_ok): New function to |
| determine whether (set DST SRC) should be allowed at this point. |
| * config/i386/i386-protos.h (ix86_hardreg_mov_ok): Prototype here. |
| * config/i386/i386-expand.c (ix86_expand_move): Check whether |
| this is a complex set of a likely spilled hard register, and if |
| so place the value in a pseudo, and load the hard reg from it. |
| * config/i386/i386.md (*movdi_internal, *movsi_internal) |
| (*movhi_internal, *movqi_internal): Make these instructions |
| conditional on ix86_hardreg_mov_ok. |
| (*lea<mode>): Make this define_insn_and_split conditional on |
| ix86_hardreg_mov_ok. |
| |
| 2020-11-16 Martin Liska <mliska@suse.cz> |
| |
| * params.opt: Add missing dot. |
| |
| 2020-11-16 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (escape_point): New type. |
| (modref_lattice): New type. |
| (escape_entry): New type. |
| (escape_summary): New type. |
| (escape_summaries_t): New type. |
| (escape_summaries): New static variable. |
| (eaf_flags_useful_p): New function. |
| (modref_summary::useful_p): Add new check_flags |
| attribute; check eaf_flags for usefulness. |
| (modref_summary_lto): Add arg_flags. |
| (modref_summary_lto::useful_p): Add new check_flags |
| attribute; check eaf_flags for usefulness. |
| (dump_modref_edge_summaries): New function. |
| (remove_modref_edge_summaries): New function. |
| (ignore_retval_p): New predicate. |
| (ignore_stores_p): Also ignore for const. |
| (remove_summary): Call remove_modref_edge_summaries. |
| (modref_lattice::init): New member function. |
| (modref_lattice::release): New member unction. |
| (modref_lattice::dump): New member function. |
| (modref_lattice::add_escape_point): New member function. |
| (modref_lattice::merge): Two new member functions. |
| (modref_lattice::merge_deref): New member functions. |
| (modref_lattice::merge_direct_load): New member function. |
| (modref_lattice::merge_direct_store): New member function. |
| (call_lhs_flags): Rename to ... |
| (merge_call_lhs_flags): ... this one; reimplement using |
| modreflattice. |
| (analyze_ssa_name_flags): Replace KNOWN_FLAGS param by LATTICE; |
| add IPA parametr; use modref_lattice. |
| (analyze_parms): New parameter IPA and SUMMARY_LTO; update for |
| modref_lattice; initialize escape_summary. |
| (analyze_function): Allocate escape_summaries; update uses of useful_p. |
| (modref_write_escape_summary): New function. |
| (modref_read_escape_summary): New function. |
| (modref_write): Write escape summary. |
| (read_section): Read escape summary. |
| (modref_read): Initialie escape_summaries. |
| (remap_arg_flags): New function. |
| (update_signature): Use it. |
| (escape_map): New structure. |
| (update_escape_summary_1, update_escape_summary): New functions. |
| (ipa_merge_modref_summary_after_inlining): Merge escape summaries. |
| (propagate_unknown_call): Do not remove useless summaries. |
| (remove_useless_summaries): Remove them here. |
| (modref_propagate_in_scc): Update; do not dump scc. |
| (modref_propagate_dump_scc): New function. |
| (modref_merge_call_site_flags): New function. |
| (modref_propagate_flags_in_scc): New function. |
| (pass_ipa_modref::execute): Use modref_propagate_flags_in_scc |
| and modref_propagate_dump_scc; delete escape_summaries. |
| (ipa_modref_c_finalize): Remove escape_summaries. |
| * ipa-modref.h (modref_summary): Update prototype of useful_p. |
| * params.opt (param=modref-max-escape-points): New param. |
| * doc/invoke.texi (modref-max-escape-points): Document. |
| |
| 2020-11-16 Jan Hubicka <jh@suse.cz> |
| |
| PR middle-end/97840 |
| * ipa-modref.c (analyze_ssa_name_flags): Skip clobbers if inlining |
| is done. |
| * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Make stmt gcall; |
| skip const calls and unused arguments. |
| (warn_uninitialized_vars): Update prototype. |
| |
| 2020-11-16 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vect_gather_slp_loads): Declare. |
| * tree-vect-loop.c (vect_analyze_loop_2): Call |
| vect_gather_slp_loads. |
| * tree-vect-slp.c (vect_build_slp_instance): Do not gather |
| SLP loads here. |
| (vect_gather_slp_loads): Remove wrapper, new function. |
| (vect_slp_analyze_bb_1): Call it. |
| |
| 2020-11-16 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-loop-im.c (analyze_memory_references): Add |
| store_motion parameter and elide unnecessary work. |
| (tree_ssa_lim_initialize): Likewise. |
| (loop_invariant_motion_in_fun): Pass down store_motion. |
| |
| 2020-11-16 Martin Liska <mliska@suse.cz> |
| |
| * params.opt: All modref parameters miss Optimization and Param |
| keyword as seen in testsuite failure. |
| |
| 2020-11-16 Jan Hubicka <jh@suse.cz> |
| |
| * params.opt (-param=modref-max-depth=): Add missing full stop. |
| |
| 2020-11-16 Sebastian Huber <sebastian.huber@embedded-brains.de> |
| |
| * common.opt (fprofile-info-section): New. |
| * coverage.c (build_gcov_info_var_registration): New. |
| (coverage_obj_init): Evaluate profile_info_section and use |
| build_gcov_info_var_registration(). |
| * doc/invoke.texi (fprofile-info-section): Document. |
| * opts.c (common_handle_option): Process fprofile-info-section |
| option. |
| |
| 2020-11-16 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97838 |
| * tree-vect-slp.c (vect_slp_build_vertices): Properly handle |
| not backwards reachable cycles. |
| (vect_optimize_slp): Check a node is leaf before marking it |
| visited. |
| |
| 2020-11-16 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/97736 |
| * tree-switch-conversion.c (switch_decision_tree::analyze_switch_statement): |
| Prefer bit tests. |
| |
| 2020-11-16 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97835 |
| * tree-vect-loop.c (vectorizable_induction): Convert step |
| scalars rather than step vector. |
| |
| 2020-11-16 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97830 |
| * tree-ssa-sccvn.c (vn_reference_eq): Check for incomplete |
| types before comparing TYPE_SIZE. |
| |
| 2020-11-16 Cui,Lili <lili.cui@intel.com> |
| |
| * config/i386/i386.h: Add PREFETCHW to march=broadwell. |
| * doc/invoke.texi: Put PREFETCHW back to relation arch. |
| |
| 2020-11-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (msp430_output_labelref): Don't process mspabi |
| hwmult library function names into GCC-style names. |
| |
| 2020-11-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (msp430_use_16bit_hwmult): New. |
| (use_32bit_hwmult): Rename to.. |
| (msp430_use_32bit_hwmult): ..this. |
| (msp430_muldiv_costs): Use msp430_use_16bit_hwmult and |
| msp430_use_32bit_hwmult. |
| (msp430_expand_helper): Use msp430_use_16bit_hwmult and |
| msp430_use_32bit_hwmult. |
| (msp430_output_labelref): Use msp430_use_32bit_hwmult. |
| |
| 2020-11-15 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (vax_rtx_costs): Use `rtx_code' rather than |
| `int' for `code'. |
| |
| 2020-11-15 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (vax_output_int_add) <E_DImode>: Fix a typo |
| in NO_EXTERNAL_INDIRECT_ADDRESS. |
| |
| 2020-11-15 Maciej W. Rozycki <macro@linux-mips.org> |
| |
| * config/vax/vax.c (vax_output_int_add) <E_SImode>: Also check |
| `operands[2]' for being symbolic with PIC rather than checking |
| `operands[1]' twice. |
| |
| 2020-11-15 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.c (vr_values::extract_range_builtin): Rename to... |
| (vr_values::extract_range_from_ubsan_builtin): ...this. |
| Remove everything but UBSAN code. |
| (vr_values::extract_range_basic): Call ranger version for |
| everything except UBSAN built-ins. |
| * vr-values.h (class vr_values): Rename extract_range_builtin to |
| extract_range_from_ubsan_builtin. |
| |
| 2020-11-15 Vladimir N. Makarov <vmakarov@redhat.com> |
| |
| * lra.c (lra_process_new_insns): Don't put reload insns in the |
| last empty BB. |
| |
| 2020-11-15 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (analyze_ssa_name_flags): Make return to clear |
| EAF_UNUSED flag. |
| |
| 2020-11-14 Jan Hubicka <jh@suse.cz> |
| |
| * gimple.c: Include ipa-modref-tree.h and ipa-modref.h. |
| (gimple_call_arg_flags): Use modref to determine flags. |
| * ipa-modref.c: Include gimple-ssa.h, tree-phinodes.h, |
| tree-ssa-operands.h, stringpool.h and tree-ssanames.h. |
| (analyze_ssa_name_flags): Declare. |
| (modref_summary::useful_p): Summary is also useful if arg flags are |
| known. |
| (dump_eaf_flags): New function. |
| (modref_summary::dump): Use it. |
| (get_modref_function_summary): Be read for current_function_decl |
| being NULL. |
| (memory_access_to): New function. |
| (deref_flags): New function. |
| (call_lhs_flags): New function. |
| (analyze_parms): New function. |
| (analyze_function): Use it. |
| * ipa-modref.h (struct modref_summary): Add arg_flags. |
| * doc/invoke.texi (ipa-modref-max-depth): Document. |
| * params.opt (ipa-modref-max-depth): New param. |
| |
| 2020-11-14 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/97599 |
| * dwarf2out.c (gen_subprogram_die): Call |
| gen_unspecified_parameters_die even if not early dwarf, but only |
| if subr_die is a newly created DIE. |
| |
| 2020-11-14 Monk Chiang <monk.chiang@sifive.com> |
| |
| PR target/97682 |
| * config/riscv/riscv.h (RISCV_PROLOGUE_TEMP_REGNUM): Change register |
| to t0. |
| (RISCV_CALL_ADDRESS_TEMP_REGNUM): New Marco, define t1 register. |
| (RISCV_CALL_ADDRESS_TEMP): Use it for call instructions. |
| * config/riscv/riscv.c (riscv_legitimize_call_address): Use |
| RISCV_CALL_ADDRESS_TEMP. |
| (riscv_compute_frame_info): Change temporary register to t0 form t1. |
| (riscv_trampoline_init): Adjust comment. |
| |
| 2020-11-14 Jim Wilson <jimw@sifive.com> |
| cooper.joshua <cooper.joshua@linux.alibaba.com> |
| |
| * config/riscv/riscv.c (riscv_asan_shadow_offset): New. |
| (TARGET_ASAN_SHADOW_OFFSET): New. |
| * doc/tm.texi: Regenerated. |
| * target.def (asan_shadow_offset); Mention that it can return zero. |
| * toplev.c (process_options): Check for and handle zero return from |
| targetm.asan_shadow_offset call. |
| |
| 2020-11-14 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimplify.c (gimplify_omp_for): Add OMP_CLAUSE_ALLOCATE_ALLOCATOR |
| decls as firstprivate on task clauses even when allocate clause |
| decl is not lastprivate. |
| * omp-low.c (install_var_field): Don't dereference omp_is_reference |
| types if mask is 33 rather than 1. |
| (scan_sharing_clauses): Populate allocate_map even for task |
| constructs. For now remove it back for variables mentioned in |
| reduction and in_reduction clauses on task/taskloop constructs |
| or on VLA task firstprivates. For firstprivate on task construct, |
| install the var field into field_map with by_ref and 33 instead |
| of false and 1 if mentioned in allocate clause. |
| (lower_private_allocate): Set TREE_THIS_NOTRAP on the created |
| MEM_REF. |
| (lower_rec_input_clauses): Handle allocate for task firstprivatized |
| non-VLA variables. |
| (create_task_copyfn): Likewise. |
| |
| 2020-11-13 Jan Hubicka <jh@suse.cz> |
| |
| * tree-ssa-alias.c (ao_ref_base_alias_ptr_type): Remove accidental |
| commit. |
| (ao_ref_alias_ptr_type): Remove accidental commit. |
| |
| 2020-11-13 Kwok Cheung Yeung <kcy@codesourcery.com> |
| |
| * omp-oacc-kernels-decompose.cc (maybe_build_inner_data_region): |
| Use langhook instead of accessing language-specific decl |
| information. |
| |
| 2020-11-13 Gergö Barany <gergo@codesourcery.com> |
| Thomas Schwinge <thomas@codesourcery.com> |
| |
| * omp-oacc-kernels-decompose.cc: New. |
| * Makefile.in (OBJS): Add it. |
| * passes.def: Instantiate it. |
| * tree-pass.h (make_pass_omp_oacc_kernels_decompose): Declare. |
| * flag-types.h (enum openacc_kernels): Add. |
| * doc/invoke.texi (-fopenacc-kernels): Document. |
| * gimple.h (enum gf_mask): Add |
| 'GF_OMP_TARGET_KIND_OACC_PARALLEL_KERNELS_PARALLELIZED', |
| 'GF_OMP_TARGET_KIND_OACC_PARALLEL_KERNELS_GANG_SINGLE', |
| 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'. |
| (is_gimple_omp_oacc, is_gimple_omp_offloaded): Handle these. |
| * gimple-pretty-print.c (dump_gimple_omp_target): Likewise. |
| * omp-expand.c (expand_omp_target, build_omp_regions_1) |
| (omp_make_gimple_edges): Likewise. |
| * omp-low.c (scan_sharing_clauses, scan_omp_for) |
| (check_omp_nesting_restrictions, lower_oacc_reductions) |
| (lower_oacc_head_mark, lower_omp_target): Likewise. |
| * omp-offload.c (execute_oacc_device_lower): Likewise. |
| |
| 2020-11-13 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * omp-low.c (scan_sharing_clauses, scan_omp_for) |
| (lower_oacc_reductions, lower_omp_target): More explicit checking |
| of which OMP constructs we're expecting. |
| |
| 2020-11-13 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * omp-expand.c (expand_omp_target): Attach an attribute to all |
| outlined OpenACC compute regions. |
| * omp-offload.c (execute_oacc_device_lower): Adjust. |
| |
| 2020-11-13 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (modref_summaries::insert, |
| modref_summaries_lto::insert): Remove summary if ipa-modref is disabled. |
| |
| 2020-11-13 Jan Hubicka <jh@suse.cz> |
| |
| * attr-fnspec.h (attr_fnspec::arg_readonly_p): Accept '1'...'9'. |
| |
| 2020-11-13 Peter Jones <pjones@redhat.com> |
| |
| * doc/extend.texi: Clarify the documentation for the ms_abi |
| function attribute. |
| |
| 2020-11-13 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range.h (gimple_range_handler): Cast to gimple stmt |
| kinds before asking for code and type. |
| * gimple.h (gimple_expr_code): Call gassign and gcond routines |
| to get their expr_code. |
| |
| 2020-11-13 Jason Merrill <jason@redhat.com> |
| |
| * dwarf2out.c (gen_enumeration_type_die): Call |
| equate_decl_number_to_die for enumerators. |
| (gen_member_die): Don't move enumerators to their |
| enclosing class. |
| (dwarf2out_imported_module_or_decl_1): Allow importing |
| individual enumerators. |
| (force_decl_die): Handle CONST_DECL. |
| |
| 2020-11-13 Vladimir N. Makarov <vmakarov@redhat.com> |
| |
| * cfgexpand.c (expand_asm_stmt): Output asm goto with outputs too. |
| Place insns after asm goto on edges. |
| * doc/extend.texi: Reflect the changes in asm goto documentation. |
| * gimple.c (gimple_build_asm_1): Remove an assert checking output |
| absence for asm goto. |
| * gimple.h (gimple_asm_label_op, gimple_asm_set_label_op): Take |
| possible asm goto outputs into account. |
| * ira.c (ira): Remove critical edges for potential asm goto output |
| reloads. |
| (ira_nullify_asm_goto): New function. |
| * ira.h (ira_nullify_asm_goto): New prototype. |
| * lra-assigns.c (lra_split_hard_reg_for): Use ira_nullify_asm_goto. |
| Check that splitting is done inside a basic block. |
| * lra-constraints.c (curr_insn_transform): Permit output reloads |
| for any jump insn. |
| * lra-spills.c (lra_final_code_change): Remove USEs added in ira |
| for asm gotos. |
| * lra.c (lra_process_new_insns): Place output reload insns after |
| jumps in the beginning of destination BBs. |
| * reload.c (find_reloads): Report error for asm gotos with |
| outputs. Modify them to keep CFG consistency to avoid crashes. |
| * tree-into-ssa.c (rewrite_stmt): Don't put debug stmt after asm |
| goto. |
| |
| 2020-11-13 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-low.c (scan_sharing_clauses): For now remove for reduction |
| clauses with inscan or task modifiers decl from allocate_map. |
| (lower_private_allocate): Handle TYPE_P (new_var). |
| (lower_rec_input_clauses): Handle allocate clause for C/C++ array |
| reductions. |
| |
| 2020-11-13 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/97816 |
| * ipa-cp.c (value_topo_info<valtype>::propagate_effects): Use |
| safe_add instead of a simple addition. |
| |
| 2020-11-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (TARGET_INSN_COST): Define. |
| (msp430_insn_cost): New function. |
| * config/msp430/msp430.h (BRANCH_COST): Define. |
| (LOGICAL_OP_NON_SHORT_CIRCUIT): Define. |
| |
| 2020-11-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430-protos.h (msp430x_extendhisi): Return int |
| instead of char *. |
| (msp430_output_asm_shift_insns): Likewise. |
| Add new return_length argument. |
| (msp430x_insn_required): Add prototype. |
| * config/msp430/msp430.c (msp430_output_asm_shift_insns): Return the |
| total length, in bytes, of the emitted instructions. |
| (msp430x_insn_required): New function. |
| (msp430x_extendhisi): Return the total length, in bytes, of the |
| emitted instructions. |
| * config/msp430/msp430.h (ADJUST_INSN_LENGTH): Define. |
| * config/msp430/msp430.md: New define_attr "type". |
| New define_attr "extension". |
| New define_attr "length_multiplier". |
| New define_attr "extra_length". |
| Rewrite define_attr "length". |
| Set type, extension, length, length_multiplier or extra_length insn |
| attributes on all insns, as appropriate. |
| (andneghi3): Rewrite using constraints instead of C code to decide |
| output insns. |
| * config/msp430/predicates.md (msp430_cheap_operand): New predicate. |
| (msp430_high_memory_operand): New predicate. |
| |
| 2020-11-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (use_helper_for_const_shift): Add forward |
| declaration. |
| Remove unused argument. |
| (struct msp430_multlib_costs): New struct. |
| (msp430_is_mem_indirect): New function. |
| (msp430_costs): Likewise. |
| (msp430_shift_costs): Likewise. |
| (msp430_muldiv_costs): Likewise. |
| (msp430_get_inner_dest_code): Likewise. |
| (msp430_single_op_cost): Likewise. |
| (msp430_rtx_costs): Rewrite from scratch. |
| (msp430_expand_shift): Adjust use_helper_for_const_shift call. |
| |
| 2020-11-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (struct single_op_cost): New struct. |
| (struct double_op_cost): Likewise. |
| (TARGET_REGISTER_MOVE_COST): Don't define but add comment. |
| (TARGET_MEMORY_MOVE_COST): Define to... |
| (msp430_memory_move_cost): New function. |
| (BRANCH_COST): Don't define but add comment. |
| |
| 2020-11-13 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-icf-gimple.c: Include tree-ssa-alias-compare.h. |
| (find_checker::func_checker): Initialize m_tbaa. |
| (func_checker::hash_operand): Use hash_ao_ref for memory accesses. |
| (func_checker::compare_operand): Use compare_ao_refs for memory |
| accesses. |
| (func_checker::cmopare_gimple_assign): Do not check LHS types |
| of memory stores. |
| * ipa-icf-gimple.h (func_checker): Derive from ao_compare; |
| add m_tbaa. |
| * ipa-icf.c: Include tree-ssa-alias-compare.h. |
| (sem_function::equals_private): Update call of |
| func_checker::func_checker. |
| * ipa-utils.h (lto_streaming_expected_p): New inline |
| predicate. |
| * tree-ssa-alias-compare.h: New file. |
| * tree-ssa-alias.c: Include tree-ssa-alias-compare.h |
| and bultins.h |
| (view_converted_memref_p): New function. |
| (types_equal_for_same_type_for_tbaa_p): New function. |
| (ao_ref_alias_ptr_type, ao_ref_base_alias_ptr_type): New functions. |
| (ao_compare::compare_ao_refs): New member function. |
| (ao_compare::hash_ao_ref): New function |
| * tree-ssa-alias.h (ao_ref_base_alias_ptr_type, |
| ao_ref_alias_ptr_type): Declare. |
| |
| 2020-11-13 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-icf-gimple.c: Include gimple-walk.h. |
| (func_checker::compare_ssa_name): Update call of compare_operand. |
| (func_checker::hash_operand): Fix comment and add variant taking |
| operand_access_type parameter. |
| (func_checker::compare_operand): Add operand_access_type parameter. |
| (func_checker::compare_asm_inputs_outputs): Add |
| operand_access_type_map parameter; update use of |
| func_checker::compare_operand. |
| (func_checker::compare_gimple_call): Update use of |
| func_checker::compare_operand. |
| (func_checker::compare_gimple_assign): Likewise. |
| (func_checker::compare_gimple_cond): Likewise. |
| (func_checker::compare_gimple_switch): Likewise. |
| (func_checker::compare_gimple_return): Likewise. |
| (func_checker::compare_gimple_goto): Likewise. |
| (func_checker::compare_gimple_asm): Likewise. |
| (visit_load_store): New static functio. |
| (func_checker::classify_operands): New member function. |
| (func_checker::get_operand_access_type): New member function. |
| * ipa-icf-gimple.h (func_checker::operand_access_type): New enum |
| (func_checker::operand_access_type_map): New typedef. |
| (func_checker::compare_operand): Update prototype. |
| (func_checker::compare_asm_inputs_outputs): Likewise. |
| (func_checker::cleassify_operands): Declare. |
| (func_checker::get_operand_access_type): Declare. |
| (func_checker::hash_operand): New variant with operand_access_type. |
| * ipa-icf.c (sem_function::hash_stmt): Update uses of hash_operand. |
| (sem_function::compare_phi_node): Update use of compare_operand. |
| |
| 2020-11-13 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/aarch-common.c (aarch_accumulator_forwarding): Use |
| RTL predicates where possible. |
| * config/arm/arm.c (legitimate_pic_operand_p) |
| (legitimize_pic_address, arm_is_segment_info_known) |
| (can_avoid_literal_pool_for_label_p) |
| (thumb1_legitimate_address_p, arm_legitimize_address) |
| (arm_tls_referenced_p, thumb_legitimate_constant_p) |
| (REG_OR_SUBREG_REG, thumb1_rtx_costs, thumb1_size_rtx_costs) |
| (arm_adjust_cost, arm_coproc_mem_operand_wb) |
| (neon_vector_mem_operand, neon_struct_mem_operand) |
| (symbol_mentioned_p, label_mentioned_p, ) |
| (load_multiple_sequence, store_multiple_sequence) |
| (arm_select_cc_mode, arm_reload_in_hi, arm_reload_out_hi) |
| (mem_ok_for_ldrd_strd, arm_emit_call_insn, output_move_neon) |
| (arm_attr_length_move_neon, arm_assemble_integer) |
| (arm_emit_coreregs_64bit_shift, arm_valid_symbolic_address_p) |
| (extract_base_offset_in_addr, fusion_load_store): Likewise. |
| |
| 2020-11-13 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range.cc: (gimple_ranger::range_of_range_op): Check for |
| ADDR_EXPR and call range_of_address. |
| (gimple_ranger::range_of_address): Rename from |
| range_of_non_trivial_assignment and match vrp_stmt_computes_nonzero. |
| * gimple-range.h: (range_of_address): Renamed. |
| * range-op.cc: (pointer_table): Add INTEGER_CST handler. |
| |
| 2020-11-13 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/94406 |
| * tree-ssa-loop-im.c (tree_ssa_lim): Renamed to |
| loop_invariant_motion_in_fun, added a parameter to control store |
| motion. |
| (pass_lim::execute): Adjust call to tree_ssa_lim, now |
| loop_invariant_motion_in_fun. |
| * tree-ssa-loop-manip.h (loop_invariant_motion_in_fun): Declare. |
| * gimple-loop-interchange.cc (pass_linterchange::execute): Call |
| loop_invariant_motion_in_fun if any interchange has been done. |
| |
| 2020-11-13 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-sccvn.c (vn_phi_compute_hash): Always hash the |
| number of predecessors. Hash the block number also for |
| loop header PHIs. |
| (expressions_equal_p): Short-cut SSA name compares, remove |
| test for NULL operands. |
| (vn_phi_eq): Cache number of predecessors, change inlined |
| test from expressions_equal_p. |
| |
| 2020-11-13 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * doc/extend.texi: Don't try to line-wrap an @r command. |
| |
| 2020-11-13 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97812 |
| * tree-vrp.c (register_edge_assert_for_2): Extend the range |
| according to its sign before seeing whether it fits. |
| |
| 2020-11-13 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/aarch64.c (tls_symbolic_operand_type) |
| (aarch64_load_symref_appropriately, aarch64_mov128_immediate) |
| (aarch64_expand_mov_immediate) |
| (aarch64_maybe_expand_sve_subreg_move) |
| (aarch64_tls_referenced_p, aarch64_cannot_force_const_mem) |
| (aarch64_base_register_rtx_p, aarch64_classify_index) |
| (aarch64_classify_address, aarch64_symbolic_address_p) |
| (aarch64_reinterpret_float_as_int, aarch64_float_const_rtx_p) |
| (aarch64_can_const_movi_rtx_p, aarch64_select_cc_mode) |
| (aarch64_print_operand, aarch64_label_mentioned_p) |
| (aarch64_secondary_reload, aarch64_preferred_reload_class) |
| (aarch64_address_cost, aarch64_tls_symbol_p) |
| (aarch64_classify_symbol, aarch64_legitimate_pic_operand_p) |
| (aarch64_legitimate_constant_p) |
| (aarch64_sve_float_arith_immediate_p) |
| (aarch64_sve_float_mul_immediate_p, aarch64_mov_operand_p) |
| (fusion_load_store): Use RTL operands where possible. |
| |
| 2020-11-13 Sudakshina Das <sudi.das@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (aarch64_expand_setmem): New |
| declaration. |
| * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case for |
| E_V16QImode. |
| (aarch64_set_one_block_and_progress_pointer): New helper for |
| aarch64_expand_setmem. |
| (aarch64_expand_setmem): Define the expansion for memset. |
| * config/aarch64/aarch64.h (CLEAR_RATIO): Tweak to favor |
| aarch64_expand_setmem when allowed and profitable. |
| (SET_RATIO): Likewise. |
| * config/aarch64/aarch64.md: Define pattern for setmemdi. |
| |
| 2020-11-13 Iain Sandoe <iain@sandoe.co.uk> |
| |
| PR objc/90707 |
| * doc/extend.texi: Document the objc_nullability attribute. |
| |
| 2020-11-13 Iain Sandoe <iain@sandoe.co.uk> |
| |
| PR objc/77404 |
| * doc/extend.texi: Document the objc_root_class attribute. |
| * doc/invoke.texi: Document -Wobjc-root-class. |
| |
| 2020-11-13 Richard Biener <rguenther@suse.de> |
| |
| * cfgexpand.c (gimple_assign_rhs_to_tree): Use |
| gimple_assign_rhs_class. |
| (expand_gimple_stmt_1): Likewise. |
| * gimplify-me.c (gimple_regimplify_operands): Use |
| gimple_assign_single_p. |
| * ipa-icf-gimple.c (func_checker::compare_gimple_assign): |
| Remove redundant compare. |
| (func_checker::compare_gimple_cond): Use gimple_cond_code. |
| * tree-ssa-tail-merge.c (gimple_equal_p): Likewise. |
| * predict.c (predict_loops): Use gimple_assign_rhs_code. |
| |
| 2020-11-13 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (class vrp_folder): Make visit_stmt, visit_phi, |
| and m_vr_values private. |
| (vrp_folder::vrp_evaluate_conditional): Remove. |
| (vrp_folder::vrp_simplify_stmt_using_ranges): Remove. |
| (vrp_folder::fold_predicate_in): Inline |
| vrp_evaluate_conditional and vrp_simplify_stmt_using_ranges. |
| (vrp_folder::fold_stmt): Same. |
| |
| 2020-11-13 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (class vrp_prop): Rename vr_values to m_vr_values. |
| (vrp_prop::vrp_prop): New. |
| (vrp_prop::initialize): Rename vr_values to m_vr_values. |
| (vrp_prop::visit_stmt): Same. |
| (vrp_prop::visit_phi): Same. |
| (vrp_prop::finalize): Same. |
| (execute_vrp): Instantiate vrp_vr_values and pass it to folder |
| and propagator. |
| |
| 2020-11-13 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (class vrp_prop): Move entire class... |
| (class vrp_folder): ...before here. |
| |
| 2020-11-13 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (identify_jump_threads): Refactor to.. |
| (vrp_jump_threader::vrp_jump_threader): ...here |
| (vrp_jump_threader::~vrp_jump_threader): ...and here. |
| (vrp_jump_threader::after_dom_children): Rename vr_values to |
| m_vr_values. |
| (execute_vrp): Use vrp_jump_threader. |
| |
| 2020-11-13 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (struct assert_locus): Move. |
| (class vrp_insert): Rename to vrp_asserts. |
| (vrp_insert::build_assert_expr_for): Move to vrp_asserts. |
| (fp_predicate): Same. |
| (vrp_insert::dump): Same. |
| (vrp_insert::register_new_assert_for): Same. |
| (extract_code_and_val_from_cond_with_ops): Move. |
| (vrp_insert::finish_register_edge_assert_for): Move to vrp_asserts. |
| (maybe_set_nonzero_bits): Move. |
| (vrp_insert::find_conditional_asserts): Move to vrp_asserts. |
| (stmt_interesting_for_vrp): Move. |
| (struct case_info): Move. |
| (compare_case_labels): Move. |
| (lhs_of_dominating_assert): Move. |
| (find_case_label_index): Move. |
| (find_case_label_range): Move. |
| (class vrp_asserts): New. |
| (vrp_asserts::build_assert_expr_for): Rename from vrp_insert. |
| (vrp_asserts::dump): Same. |
| (vrp_asserts::register_new_assert_for): Same. |
| (vrp_asserts::finish_register_edge_assert_for): Same. |
| (vrp_asserts::find_conditional_asserts): Same. |
| (vrp_asserts::compare_case_labels): Same. |
| (vrp_asserts::find_switch_asserts): Same. |
| (vrp_asserts::find_assert_locations_in_bb): Same. |
| (vrp_asserts::find_assert_locations): Same. |
| (vrp_asserts::process_assert_insertions_for): Same. |
| (vrp_asserts::compare_assert_loc): Same. |
| (vrp_asserts::process_assert_insertions): Same. |
| (vrp_asserts::insert_range_assertions): Same. |
| (vrp_asserts::all_imm_uses_in_stmt_or_feed_cond): Same. |
| (vrp_asserts::remove_range_assertions): Same. |
| (class vrp_prop): Move. |
| (all_imm_uses_in_stmt_or_feed_cond): Move. |
| (vrp_prop::vrp_initialize): Move. |
| (class vrp_folder): Move. |
| (vrp_folder::fold_predicate_in): Move. |
| (vrp_folder::fold_stmt): Move. |
| (vrp_prop::initialize): Move. |
| (vrp_prop::visit_stmt): Move. |
| (enum ssa_prop_result): Move. |
| (vrp_prop::visit_phi): Move. |
| (vrp_prop::finalize): Move. |
| (class vrp_dom_walker): Rename to... |
| (class vrp_jump_threader): ...this. |
| (vrp_jump_threader::before_dom_children): Rename from |
| vrp_dom_walker. |
| (simplify_stmt_for_jump_threading): Rename to... |
| (vrp_jump_threader::simplify_stmt): ...here. |
| (vrp_jump_threader::after_dom_children): Same. |
| (identify_jump_threads): Move. |
| (vrp_prop::vrp_finalize): Move array bounds setup code to... |
| (execute_vrp): ...here. |
| |
| 2020-11-13 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range.h (gimple_range_handler): Use gimple_assign and |
| gimple_cond routines to get type and code. |
| * range-op.cc (range_op_handler): Check for integral types. |
| |
| 2020-11-12 Nelson Chu <nelson.chu@sifive.com> |
| |
| * configure: Regenerated. |
| * configure.ac: If ifunc was supported in the binutils for |
| linux toolchain, then set enable_gnu_indirect_function to yes. |
| |
| 2020-11-12 Joseph Myers <joseph@codesourcery.com> |
| |
| * doc/cpp.texi (__has_attribute): Document when scopes are allowed |
| for C. |
| (__has_c_attribute): New. |
| |
| 2020-11-12 Jakub Jelinek <jakub@redhat.com> |
| |
| * builtin-types.def (BT_FN_PTR_SIZE_SIZE_PTRMODE): New function type. |
| * omp-builtins.def (BUILT_IN_GOACC_DECLARE): Move earlier. |
| (BUILT_IN_GOMP_ALLOC, BUILT_IN_GOMP_FREE): New builtins. |
| * gimplify.c (gimplify_scan_omp_clauses): Force allocator into a |
| decl if it is not NULL, INTEGER_CST or decl. |
| (gimplify_adjust_omp_clauses): Clear GOVD_EXPLICIT on explicit clauses |
| which are being removed. Remove allocate clauses for variables not seen |
| if they are private, firstprivate or linear too. Call |
| omp_notice_variable on the allocator otherwise. |
| (gimplify_omp_for): Handle iterator vars mentioned in allocate clauses |
| similarly to non-is_gimple_reg iterators. |
| * omp-low.c (struct omp_context): Add allocate_map field. |
| (delete_omp_context): Delete it. |
| (scan_sharing_clauses): Fill it from allocate clauses. Remove it |
| if mentioned also in shared clause. |
| (lower_private_allocate): New function. |
| (lower_rec_input_clauses): Handle allocate clause for privatized |
| variables, except for task/taskloop, C/C++ array reductions for now |
| and task/inscan variables. |
| (lower_send_shared_vars): Don't consider variables in allocate_map |
| as shared. |
| * omp-expand.c (expand_omp_for_generic, expand_omp_for_static_nochunk, |
| expand_omp_for_static_chunk): Use expand_omp_build_assign instead of |
| gimple_build_assign + gsi_insert_after. |
| * builtins.c (builtin_fnspec): Handle BUILTIN_GOMP_ALLOC and |
| BUILTIN_GOMP_FREE. |
| * tree-ssa-ccp.c (evaluate_stmt): Handle BUILTIN_GOMP_ALLOC. |
| * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Handle |
| BUILTIN_GOMP_ALLOC. |
| (mark_all_reaching_defs_necessary_1): Handle BUILTIN_GOMP_ALLOC |
| and BUILTIN_GOMP_FREE. |
| (propagate_necessity): Likewise. |
| |
| 2020-11-12 Martin Jambor <mjambor@suse.cz> |
| |
| * cgraphclones.c (cgraph_node::materialize_clone): Check that clone |
| info is not NULL before attempting to dump it. |
| |
| 2020-11-12 Martin Jambor <mjambor@suse.cz> |
| |
| * ipa-cp.c (class ipcp_value_base): Change the type of |
| local_time_benefit and prop_time_benefit to sreal. Adjust the |
| constructor initializer. |
| (ipcp_lattice::print): Dump sreals. |
| (struct caller_statistics): Change the type of freq_sum to sreal. |
| (gather_caller_stats): Work with sreal freq_sum. |
| (incorporate_penalties): Work with sreal evaluation. |
| (good_cloning_opportunity_p): Adjusted for sreal sreal time_benefit |
| and freq_sum. Bail out if size_cost is INT_MAX. |
| (perform_estimation_of_a_value): Work with sreal time_benefit. Avoid |
| unnecessary capping. |
| (estimate_local_effects): Pass sreal time benefit to |
| good_cloning_opportunity_p without capping it. Adjust dumping. |
| (safe_add): If there can be overflow, return INT_MAX. |
| (propagate_effects): Work with sreal times. |
| (get_info_about_necessary_edges): Work with sreal frequencies. |
| (decide_about_value): Likewise and with sreal time benefits. |
| |
| 2020-11-12 Marek Polacek <polacek@redhat.com> |
| |
| * system.h (WARN_UNUSED_RESULT): Define for GCC >= 3.4. |
| * tree.h (maybe_wrap_with_location): Add WARN_UNUSED_RESULT. |
| |
| 2020-11-12 Jan Hubicka <jh@suse.cz> |
| |
| * fold-const.c (operand_compare::operand_equal_p): Compare field |
| offsets in operand_equal_p and OEP_ADDRESS_OF. |
| (operand_compare::hash_operand): Update. |
| |
| 2020-11-12 Richard Biener <rguenther@suse.de> |
| |
| * bitmap.c (bitmap_list_view): Restore head->current. |
| * tree-ssa-pre.c (pre_expr_DFS): Elide expr_visited bitmap. |
| Special-case value expression bitmaps with one element. |
| (bitmap_find_leader): Likewise. |
| (sorted_array_from_bitmap_set): Elide expr_visited bitmap. |
| |
| 2020-11-12 Jan Hubicka <jh@suse.cz> |
| |
| * attr-fnspec.h: Update topleve comment. |
| (attr_fnspec::arg_direct_p): Accept 1...9. |
| (attr_fnspec::arg_maybe_written_p): Reject 1...9. |
| (attr_fnspec::arg_copied_to_arg_p): New member function. |
| * builtins.c (builtin_fnspec): Update fnspec of block copy. |
| * tree-ssa-alias.c (attr_fnspec::verify): Update. |
| |
| 2020-11-12 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-pre.c (bitmap_value_replace_in_set): Return |
| whether we have changed anything. |
| (do_pre_regular_insertion): Get topologically sorted array |
| of expressions from caller. |
| (do_pre_partial_partial_insertion): Likewise. |
| (insert): Compute topologically sorted arrays of expressions |
| here and locally iterate actual insertion. Iterate only |
| when AVAIL_OUT of an already visited block source changed. |
| |
| 2020-11-12 Alex Coplan <alex.coplan@arm.com> |
| |
| PR target/97730 |
| * config/aarch64/aarch64-sve2.md (@aarch64_sve2_bcax<mode>): |
| Change to define_expand, add missing (trivially-predicated) not |
| rtx to fix wrong code bug. |
| (*aarch64_sve2_bcax<mode>): New. |
| |
| 2020-11-12 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97806 |
| * tree-ssa-pre.c (pre_expr_DFS): New overload for visiting |
| values, visiting all leaders for a value. Use a bitmap |
| for visited values. |
| (sorted_array_from_bitmap_set): Walk over values and adjust. |
| |
| 2020-11-12 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| PR target/97326 |
| * config/s390/vector.md: Support vector floating point modes in |
| vec_cmp. |
| |
| 2020-11-12 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/vector.md: Rename tointvec to TOINTVEC. |
| * config/s390/vx-builtins.md: Likewise. |
| |
| 2020-11-12 Jason Merrill <jason@redhat.com> |
| |
| PR debug/97060 |
| * dwarf2out.c (gen_subprogram_die): It's a declaration |
| if DECL_INITIAL isn't set. |
| |
| 2020-11-12 David Malcolm <dmalcolm@redhat.com> |
| |
| PR tree-optimization/97424 |
| * doc/invoke.texi (Static Analyzer Options): Add |
| -Wno-analyzer-shift-count-negative and |
| -Wno-analyzer-shift-count-overflow. |
| (-Wno-analyzer-shift-count-negative): New. |
| (-Wno-analyzer-shift-count-overflow): New. |
| |
| 2020-11-11 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin-protos.h (darwin_make_eh_symbol_indirect): New. |
| * config/darwin.c (darwin_make_eh_symbol_indirect): New. Use |
| Mach-O semantics for personality and ldsa indirections. |
| * config/darwin.h (TARGET_ASM_MAKE_EH_SYMBOL_INDIRECT): New. |
| * doc/tm.texi: Regenerate. |
| * doc/tm.texi.in: Add TARGET_ASM_MAKE_EH_SYMBOL_INDIRECT hook. |
| * dwarf2out.c (dwarf2out_do_cfi_startproc): If the target defines |
| a hook for indirecting personality and ldsa references, use that |
| otherwise default to ELF semantics. |
| * target.def (make_eh_symbol_indirect): New target hook. |
| |
| 2020-11-11 Patrick Palka <ppalka@redhat.com> |
| |
| PR c++/88115 |
| * common.opt (-fabi-version): Document =15. |
| * doc/invoke.texi (C++ Dialect Options): Likewise. |
| |
| 2020-11-11 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/97518 |
| * tree.c (maybe_wrap_with_location): Don't add a location |
| wrapper around an artificial and ignored decl. |
| |
| 2020-11-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97623 |
| * tree-ssa-pre.c (create_expression_by_pieces): Guard |
| NEW_SETS access. |
| (insert_into_preds_of_block): Likewise. |
| |
| 2020-11-11 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-pre.c (pre_expr_DFS): New function. |
| (sorted_array_from_bitmap_set): Use it to properly |
| topologically sort the expression set. |
| (clean): Verify we've cleaned everything we should. |
| |
| 2020-11-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97623 |
| * params.opt (-param=max-pre-hoist-insert-iterations): Remove |
| again. |
| * doc/invoke.texi (max-pre-hoist-insert-iterations): Likewise. |
| * tree-ssa-pre.c (insert): Move hoist insertion after PRE |
| insertion iteration and do not iterate it. |
| |
| 2020-11-11 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve.md (@vcond_mask_<mode><vpred>): Extend |
| from SVE_FULL to SVE_ALL. |
| (*vcond_mask_<mode><vpred>): Likewise. |
| (@aarch64_sel_dup<mode>): Likewise. |
| (vcond<SVE_FULL:mode><v_int_equiv>): Extend to... |
| (vcond<SVE_ALL:mode><SVE_I:mode>): ...this, but requiring the |
| sizes of the container modes to match. |
| (vcondu<SVE_FULL:mode><v_int_equiv>): Extend to... |
| (vcondu<SVE_ALL:mode><SVE_I:mode>): ...this. |
| (vec_cmp<SVE_FULL_I:mode><vpred>): Extend to... |
| (vec_cmp<SVE_I:mode><vpred>): ...this. |
| (vec_cmpu<SVE_FULL_I:mode><vpred>): Extend to... |
| (vec_cmpu<SVE_I:mode><vpred>): ...this. |
| (@aarch64_pred_cmp<cmp_op><SVE_FULL_I:mode>): Extend to... |
| (@aarch64_pred_cmp<cmp_op><SVE_I:mode>): ...this. |
| (*cmp<cmp_op><SVE_FULL_I:mode>_cc): Extend to... |
| (*cmp<cmp_op><SVE_I:mode>_cc): ...this. |
| (*cmp<cmp_op><SVE_FULL_I:mode>_ptest): Extend to... |
| (*cmp<cmp_op><SVE_I:mode>_ptest): ...this. |
| (*cmp<cmp_op><SVE_FULL_I:mode>_and): Extend to... |
| (*cmp<cmp_op><SVE_I:mode>_and): ...this. |
| |
| 2020-11-11 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * optabs-tree.c (expand_vec_cond_expr_p): Allow the compared values |
| and the selected values to have different mode sizes. |
| * gimple-isel.cc (gimple_expand_vec_cond_expr): Likewise. |
| |
| 2020-11-11 Hongtao Liu <hongtao.liu@intel.com> |
| Hongyu Wang <hongyu.wang@intel.com> |
| |
| * common/config/i386/cpuinfo.h (get_available_features): |
| Detect AVXVNNI. |
| * common/config/i386/i386-common.c |
| (OPTION_MASK_ISA2_AVXVNNI_SET, |
| OPTION_MASK_ISA2_AVXVNNI_UNSET): New. |
| (OPTION_MASK_ISA2_AVX2_UNSET): Add AVXVNNI. |
| (ix86_hanlde_option): Handle -mavxvnni, unset avxvnni when |
| avx2 is disabled. |
| * common/config/i386/i386-cpuinfo.h (enum processor_features): |
| Add FEATURE_AVXVNNI. |
| * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY |
| for avxvnni. |
| * config.gcc: Add avxvnniintrin.h. |
| * config/i386/avx512vnnivlintrin.h: Reimplement 128/256 bit non-mask |
| intrinsics with macros to support unified interface. |
| * config/i386/avxvnniintrin.h: New header file. |
| * config/i386/cpuid.h (bit_AVXVNNI): New. |
| * config/i386/i386-builtins.c (def_builtin): Handle AVXVNNI mask |
| for unified builtin. |
| * config/i386/i386-builtin.def (BDESC): Adjust AVX512VNNI |
| builtins for AVXVNNI. |
| * config/i386/i386-c.c (ix86_target_macros_internal): Define |
| __AVXVNNI__. |
| * config/i386/i386-expand.c (ix86_expand_builtin): Handle bisa |
| for AVXVNNI to support unified intrinsic name, since there is no |
| dependency between AVX512VNNI and AVXVNNI. |
| * config/i386/i386-options.c (isa2_opts): Add -mavxvnni. |
| (ix86_valid_target_attribute_inner_p): Handle avxnnni. |
| (ix86_option_override_internal): Ditto. |
| * config/i386/i386.h (TARGET_AVXVNNI, TARGET_AVXVNNI_P, |
| TARGET_AVXVNNI_P, PTA_AVXVNNI): New. |
| (PTA_SAPPHIRERAPIDS): Add AVX_VNNI. |
| (PTA_ALDERLAKE): Likewise. |
| * config/i386/i386.md ("isa"): Add avxvnni, avx512vnnivl. |
| ("enabled"): Adjust for avxvnni and avx512vnnivl. |
| * config/i386/i386.opt: Add option -mavxvnni. |
| * config/i386/immintrin.h: Include avxvnniintrin.h. |
| * config/i386/sse.md (vpdpbusd_<mode>): Adjust for AVXVNNI. |
| (vpdpbusds_<mode>): Likewise. |
| (vpdpwssd_<mode>): Likewise. |
| (vpdpwssds_<mode>): Likewise. |
| (vpdpbusd_v16si): New. |
| (vpdpbusds_v16si): Likewise. |
| (vpdpwssd_v16si): Likewise. |
| (vpdpwssds_v16si): Likewise. |
| * doc/invoke.texi: Document -mavxvnni. |
| * doc/extend.texi: Document avxvnni. |
| * doc/sourcebuild.texi: Document target avxvnni. |
| |
| 2020-11-11 Martin Liska <mliska@suse.cz> |
| |
| * tree.c (copy_node): Fix spelling. |
| |
| 2020-11-11 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-pre.c (phi_translate_set): Do not sort the |
| expression set topologically. |
| |
| 2020-11-11 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::set): Early exit on VR_VARYING. |
| |
| 2020-11-11 Zhiheng Xie <xiezhiheng@huawei.com> |
| Nannan Zheng <zhengnannan@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for arithmetic operation intrinsics. |
| |
| 2020-11-11 Strager Neds <strager.nds@gmail.com> |
| |
| * cgraph.h (symtab_node::set_section_for_node): Declare new |
| overload. |
| (symtab_node::set_section_from_string): Rename from set_section. |
| (symtab_node::set_section_from_node): Declare. |
| * symtab.c (symtab_node::set_section_for_node): Define new |
| overload. |
| (symtab_node::set_section_from_string): Rename from set_section. |
| (symtab_node::set_section_from_node): Define. |
| (symtab_node::set_section): Call renamed set_section_from_string. |
| (symtab_node::set_section): Call new set_section_from_node. |
| |
| 2020-11-11 Strager Neds <strager.nds@gmail.com> |
| |
| * symtab.c (symtab_node::set_section_for_node): Extract reference |
| counting logic into ... |
| (retain_section_hash_entry): ... here (new function) and ... |
| (release_section_hash_entry): ... here (new function). |
| |
| 2020-11-11 liuhongt <hongtao.liu@intel.com> |
| |
| * config/i386/i386.h (PTA_MOVDIRI, PTA_MOVDIR64B, |
| PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16, PTA_HRESET): |
| Formatting. |
| |
| 2020-11-11 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * config/s390/s390.h (HAVE_TF): Use opaque value when |
| GENERATOR_FILE is defined. |
| |
| 2020-11-10 Strager Neds <strager.nds@gmail.com> |
| |
| * cgraph.h (symtab_node::get_section): Constify. |
| (symtab_node::set_section): Declare new overload. |
| * symtab.c (symtab_node::set_section): Define new overload. |
| (symtab_node::copy_visibility_from): Use new overload of |
| symtab_node::set_section. |
| (symtab_node::resolve_alias): Same. |
| * tree.h (set_decl_section_name): Declare new overload. |
| * tree.c (set_decl_section_name): Define new overload. |
| * tree-emutls.c (get_emutls_init_templ_addr): Same. |
| * cgraphclones.c (cgraph_node::create_virtual_clone): Use new |
| overload of symtab_node::set_section. |
| (cgraph_node::create_version_clone_with_body): Same. |
| * trans-mem.c (ipa_tm_create_version): Same. |
| |
| 2020-11-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::set): Early exit for poly ints. |
| |
| 2020-11-10 Tobias Burnus <tobias@codesourcery.com> |
| |
| * gimplify.c (gimplify_scan_omp_clauses, gimplify_omp_loop): Use 'do' |
| instead of 'for' in error messages for Fortran. |
| * omp-low.c (check_omp_nesting_restrictions): Likewise |
| |
| 2020-11-10 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * opts.c (control_options_for_live_patching): Reform 'is incompatible |
| with' error messages to use a standard message with differing format |
| arguments. |
| (finish_options): Likewise. |
| |
| 2020-11-10 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97769 |
| * tree-vect-data-refs.c (vect_update_misalignment_for_peel): |
| Remove assert. |
| |
| 2020-11-10 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97780 |
| * tree-ssa-pre.c (fini_pre): Deal with added basic blocks |
| when freeing PHI_TRANS_TABLE. |
| |
| 2020-11-10 Zhiheng Xie <xiezhiheng@huawei.com> |
| Nannan Zheng <zhengnannan@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for tbl/tbx intrinsics. |
| |
| 2020-11-10 Chung-Lin Tang <cltang@codesourcery.com> |
| |
| * gimplify.c (is_or_contains_p): New static helper function. |
| (omp_target_reorder_clauses): New function. |
| (gimplify_scan_omp_clauses): Add use of omp_target_reorder_clauses to |
| reorder clause list according to OpenMP 5.0 rules. Add handling of |
| GOMP_MAP_ATTACH_DETACH for OpenMP cases. |
| * omp-low.c (is_omp_target): New static helper function. |
| (scan_sharing_clauses): Add scan phase handling of GOMP_MAP_ATTACH/DETACH |
| for OpenMP cases. |
| (lower_omp_target): Add lowering handling of GOMP_MAP_ATTACH/DETACH for |
| OpenMP cases. |
| |
| 2020-11-10 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * config/s390/s390-modes.def (FPRX2): New mode. |
| * config/s390/s390-protos.h (s390_fma_allowed_p): New function. |
| * config/s390/s390.c (s390_fma_allowed_p): Likewise. |
| (s390_build_signbit_mask): Support 128-bit masks. |
| (print_operand): Support printing the second word of a TFmode |
| operand as vector register. |
| (constant_modes): Add FPRX2mode. |
| (s390_class_max_nregs): Return 1 for TFmode on z14+. |
| (s390_is_fpr128): New function. |
| (s390_is_vr128): Likewise. |
| (s390_can_change_mode_class): Use s390_is_fpr128 and |
| s390_is_vr128 in order to determine whether mode refers to a FPR |
| pair or to a VR. |
| (s390_emit_compare): Force TFmode operands into registers on |
| z14+. |
| * config/s390/s390.h (HAVE_TF): New macro. |
| (EXPAND_MOVTF): New macro. |
| (EXPAND_TF): Likewise. |
| * config/s390/s390.md (PFPO_OP_TYPE_FPRX2): PFPO_OP_TYPE_TF |
| alias. |
| (ALL): Add FPRX2. |
| (FP_ALL): Add FPRX2 for z14+, restrict TFmode to z13-. |
| (FP): Likewise. |
| (FP_ANYTF): New mode iterator. |
| (BFP): Add FPRX2 for z14+, restrict TFmode to z13-. |
| (TD_TF): Likewise. |
| (xde): Add FPRX2. |
| (nBFP): Likewise. |
| (nDFP): Likewise. |
| (DSF): Likewise. |
| (DFDI): Likewise. |
| (SFSI): Likewise. |
| (DF): Likewise. |
| (SF): Likewise. |
| (fT0): Likewise. |
| (bt): Likewise. |
| (_d): Likewise. |
| (HALF_TMODE): Likewise. |
| (tf_fpr): New mode_attr. |
| (type): New mode_attr. |
| (*cmp<mode>_ccz_0): Use type instead of mode with fsimp. |
| (*cmp<mode>_ccs_0_fastmath): Likewise. |
| (*cmptf_ccs): New pattern for wfcxb. |
| (*cmptf_ccsfps): New pattern for wfkxb. |
| (mov<mode>): Rename to mov<mode><tf_fpr>. |
| (signbit<mode>2): Rename to signbit<mode>2<tf_fpr>. |
| (isinf<mode>2): Renamed to isinf<mode>2<tf_fpr>. |
| (*TDC_insn_<mode>): Use type instead of mode with fsimp. |
| (fixuns_trunc<FP:mode><GPR:mode>2): Rename to |
| fixuns_trunc<FP:mode><GPR:mode>2<FP:tf_fpr>. |
| (fix_trunctf<mode>2): Rename to fix_trunctf<mode>2_fpr. |
| (floatdi<mode>2): Rename to floatdi<mode>2<tf_fpr>, use type |
| instead of mode with itof. |
| (floatsi<mode>2): Rename to floatsi<mode>2<tf_fpr>, use type |
| instead of mode with itof. |
| (*floatuns<GPR:mode><FP:mode>2): Use type instead of mode for |
| itof. |
| (floatuns<GPR:mode><FP:mode>2): Rename to |
| floatuns<GPR:mode><FP:mode>2<tf_fpr>. |
| (trunctf<mode>2): Rename to trunctf<mode>2_fpr, use type instead |
| of mode with fsimp. |
| (extend<DSF:mode><BFP:mode>2): Rename to |
| extend<DSF:mode><BFP:mode>2<BFP:tf_fpr>. |
| (<FPINT:fpint_name><BFP:mode>2): Rename to |
| <FPINT:fpint_name><BFP:mode>2<BFP:tf_fpr>, use type instead of |
| mode with fsimp. |
| (rint<BFP:mode>2): Rename to rint<BFP:mode>2<BFP:tf_fpr>, use |
| type instead of mode with fsimp. |
| (<FPINT:fpint_name><DFP:mode>2): Use type instead of mode for |
| fsimp. |
| (rint<DFP:mode>2): Likewise. |
| (trunc<BFP:mode><DFP_ALL:mode>2): Rename to |
| trunc<BFP:mode><DFP_ALL:mode>2<BFP:tf_fpr>. |
| (trunc<DFP_ALL:mode><BFP:mode>2): Rename to |
| trunc<DFP_ALL:mode><BFP:mode>2<BFP:tf_fpr>. |
| (extend<BFP:mode><DFP_ALL:mode>2): Rename to |
| extend<BFP:mode><DFP_ALL:mode>2<BFP:tf_fpr>. |
| (extend<DFP_ALL:mode><BFP:mode>2): Rename to |
| extend<DFP_ALL:mode><BFP:mode>2<BFP:tf_fpr>. |
| (add<mode>3): Rename to add<mode>3<tf_fpr>, use type instead of |
| mode with fsimp. |
| (*add<mode>3_cc): Use type instead of mode with fsimp. |
| (*add<mode>3_cconly): Likewise. |
| (sub<mode>3): Rename to sub<mode>3<tf_fpr>, use type instead of |
| mode with fsimp. |
| (*sub<mode>3_cc): Use type instead of mode with fsimp. |
| (*sub<mode>3_cconly): Likewise. |
| (mul<mode>3): Rename to mul<mode>3<tf_fpr>, use type instead of |
| mode with fsimp. |
| (fma<mode>4): Restrict using s390_fma_allowed_p. |
| (fms<mode>4): Restrict using s390_fma_allowed_p. |
| (div<mode>3): Rename to div<mode>3<tf_fpr>, use type instead of |
| mode with fdiv. |
| (neg<mode>2): Rename to neg<mode>2<tf_fpr>. |
| (*neg<mode>2_cc): Use type instead of mode with fsimp. |
| (*neg<mode>2_cconly): Likewise. |
| (*neg<mode>2_nocc): Likewise. |
| (*neg<mode>2): Likeiwse. |
| (abs<mode>2): Rename to abs<mode>2<tf_fpr>, use type instead of |
| mode with fdiv. |
| (*abs<mode>2_cc): Use type instead of mode with fsimp. |
| (*abs<mode>2_cconly): Likewise. |
| (*abs<mode>2_nocc): Likewise. |
| (*abs<mode>2): Likewise. |
| (*negabs<mode>2_cc): Likewise. |
| (*negabs<mode>2_cconly): Likewise. |
| (*negabs<mode>2_nocc): Likewise. |
| (*negabs<mode>2): Likewise. |
| (sqrt<mode>2): Rename to sqrt<mode>2<tf_fpr>, use type instead |
| of mode with fsqrt. |
| (cbranch<mode>4): Use FP_ANYTF instead of FP. |
| (copysign<mode>3): Rename to copysign<mode>3<tf_fpr>, use type |
| instead of mode with fsimp. |
| * config/s390/s390.opt (flag_vx_long_double_fma): New |
| undocumented option. |
| * config/s390/vector.md (V_HW): Add TF for z14+. |
| (V_HW2): Likewise. |
| (VFT): Likewise. |
| (VF_HW): Likewise. |
| (V_128): Likewise. |
| (tf_vr): New mode_attr. |
| (tointvec): Add TF. |
| (mov<mode>): Rename to mov<mode><tf_vr>. |
| (movetf): New dispatcher. |
| (*vec_tf_to_v1tf): Rename to *vec_tf_to_v1tf_fpr, restrict to |
| z13-. |
| (*vec_tf_to_v1tf_vr): New pattern for z14+. |
| (*fprx2_to_tf): Likewise. |
| (*mov_tf_to_fprx2_0): Likewise. |
| (*mov_tf_to_fprx2_1): Likewise. |
| (add<mode>3): Rename to add<mode>3<tf_vr>. |
| (addtf3): New dispatcher. |
| (sub<mode>3): Rename to sub<mode>3<tf_vr>. |
| (subtf3): New dispatcher. |
| (mul<mode>3): Rename to mul<mode>3<tf_vr>. |
| (multf3): New dispatcher. |
| (div<mode>3): Rename to div<mode>3<tf_vr>. |
| (divtf3): New dispatcher. |
| (sqrt<mode>2): Rename to sqrt<mode>2<tf_vr>. |
| (sqrttf2): New dispatcher. |
| (fma<mode>4): Restrict using s390_fma_allowed_p. |
| (fms<mode>4): Likewise. |
| (neg_fma<mode>4): Likewise. |
| (neg_fms<mode>4): Likewise. |
| (neg<mode>2): Rename to neg<mode>2<tf_vr>. |
| (negtf2): New dispatcher. |
| (abs<mode>2): Rename to abs<mode>2<tf_vr>. |
| (abstf2): New dispatcher. |
| (float<mode>tf2_vr): New forwarder. |
| (float<mode>tf2): New dispatcher. |
| (floatuns<mode>tf2_vr): New forwarder. |
| (floatuns<mode>tf2): New dispatcher. |
| (fix_trunctf<mode>2_vr): New forwarder. |
| (fix_trunctf<mode>2): New dispatcher. |
| (fixuns_trunctf<mode>2_vr): New forwarder. |
| (fixuns_trunctf<mode>2): New dispatcher. |
| (<FPINT:fpint_name><VF_HW:mode>2<VF_HW:tf_vr>): New pattern. |
| (<FPINT:fpint_name>tf2): New forwarder. |
| (rint<mode>2<tf_vr>): New pattern. |
| (rinttf2): New forwarder. |
| (*trunctfdf2_vr): New pattern. |
| (trunctfdf2_vr): New forwarder. |
| (trunctfdf2): New dispatcher. |
| (trunctfsf2_vr): New forwarder. |
| (trunctfsf2): New dispatcher. |
| (extenddftf2_vr): New pattern. |
| (extenddftf2): New dispatcher. |
| (extendsftf2_vr): New forwarder. |
| (extendsftf2): New dispatcher. |
| (signbittf2_vr): New forwarder. |
| (signbittf2): New dispatchers. |
| (isinftf2_vr): New forwarder. |
| (isinftf2): New dispatcher. |
| * config/s390/vx-builtins.md (*vftci<mode>_cconly): Use VF_HW |
| instead of VECF_HW, add missing constraint, add vw support. |
| (vftci<mode>_intcconly): Use VF_HW instead of VECF_HW. |
| (*vftci<mode>): Rename to vftci<mode>, use VF_HW instead of |
| VECF_HW, and vw support. |
| (vftci<mode>_intcc): Use VF_HW instead of VECF_HW. |
| |
| 2020-11-10 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * range-op.cc (operator_logical_not::fold_range): Tidy up. |
| (operator_logical_not::op1_range): Call above method. |
| (operator_bitwise_not::fold_range): If the type is compatible |
| with boolean, call op_logical_not.fold_range. |
| (operator_bitwise_not::op1_range): If the type is compatible |
| with boolean, call op_logical_not.op1_range. |
| |
| 2020-11-10 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-pre.c (pre_expr_d::value_id): Add. |
| (constant_value_expressions): Turn into an array of pre_expr. |
| (get_or_alloc_expr_for_nary): New function. |
| (get_or_alloc_expr_for_reference): Likewise. |
| (add_to_value): For constant values only ever add a single |
| CONSTANT. |
| (get_expr_value_id): Return the new value_id member. |
| (vn_valnum_from_value_id): Split out and simplify constant |
| value id handling. |
| (get_or_alloc_expr_for_constant): Set the value_id member. |
| (phi_translate_1): Use get_or_alloc_expr_for_*. |
| (compute_avail): Likewise. |
| (bitmap_find_leader): Simplify constant value id handling. |
| |
| 2020-11-10 Alex Coplan <alex.coplan@arm.com> |
| |
| * doc/md.texi (Modifiers): Fix grammar in description of |
| earlyclobber constraint modifier. |
| |
| 2020-11-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/97764 |
| * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): For |
| little-endian stores with negative pd.offset, subtract |
| BITS_PER_UNIT - amnt from size if amnt is non-zero. |
| |
| 2020-11-10 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97760 |
| * tree-vect-loop.c (check_reduction_path): Reject |
| reduction paths we do not handle in epilogue generation. |
| |
| 2020-11-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97767 |
| * value-range.cc (dump_bound_with_infinite_markers): Use |
| wi::min_value and wi::max_value. |
| (range_tests_strict_enum): New. |
| (range_tests): Call range_tests_strict_enum. |
| * value-range.h (irange::varying_p): Use wi::min_value |
| and wi::max_value. |
| (irange::set_varying): Same. |
| (irange::normalize_min_max): Remove comment. |
| |
| 2020-11-10 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97567 |
| * gimple-range-gori.cc: (gori_compute::logical_combine): False |
| OR operations should intersect the 2 results. |
| (gori_compute::compute_logical_operands_in_chain): If def chains |
| are outside the current basic block, don't follow them. |
| |
| 2020-11-09 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (arc_split_move): Recognize vadd2 instructions. |
| * config/arc/arc.md (movdi_insn): Update pattern to use vadd2 |
| instructions. |
| (movdf_insn): Likewise. |
| (maddhisi4): New pattern. |
| (umaddhisi4): Likewise. |
| * config/arc/simdext.md (mov<mode>_int): Update pattern to use |
| vadd2. |
| (sdot_prodv4hi): New pattern. |
| (udot_prodv4hi): Likewise. |
| (arc_vec_<V_US>mac_hi_v4hi): Update/renamed to |
| arc_vec_<V_US>mac_v2hiv2si. |
| (arc_vec_<V_US>mac_v2hiv2si_zero): New pattern. |
| * config/arc/constraints.md (Ral): Accumulator register |
| constraint. |
| |
| 2020-11-09 Aldy Hernandez <aldyh@redhat.com> |
| |
| * function-tests.c (test_ranges): Call range_op_tests. |
| * range-op.cc (build_range3): Move to value-range.cc. |
| (range3_tests): Same. |
| (int_range_max_tests): Same. |
| (multi_precision_range_tests): Same. |
| (range_tests): Same. |
| (operator_tests): Split up... |
| (range_op_tests): Split up... |
| (range_op_cast_tests): ...here. |
| (range_op_lshift_tests): ...here. |
| (range_op_rshift_tests): ...here. |
| (range_op_bitwise_and_tests): ...here. |
| * selftest.h (range_op_tests): New. |
| * value-range.cc (build_range3): New. |
| (range_tests_irange3): New. |
| (range_tests_int_range_max): New. |
| (range_tests_legacy): New. |
| (range_tests_misc): New. |
| (range_tests): New. |
| |
| 2020-11-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97761 |
| * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): Remove |
| premature end of DFS walk. |
| |
| 2020-11-09 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::swap_out_of_order_endpoints): Rewrite |
| into static function. |
| (irange::set): Cleanup redundant manipulations. |
| * value-range.h (irange::normalize_min_max): Modify object |
| in-place instead of modifying arguments. |
| |
| 2020-11-09 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/aarch64-builtins.c |
| (aarch64_expand_fcmla_builtin): Do not alter force_reg returned |
| register. |
| |
| 2020-11-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97753 |
| * tree-vect-loop.c (vectorizable_induction): Fill vec_steps |
| when CSEing inside the group. |
| |
| 2020-11-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97746 |
| * tree-vect-patterns.c (vect_determine_precisions): First walk PHIs. |
| |
| 2020-11-09 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-pre.c (get_representative_for): CSE VN_INFO calls. |
| (create_expression_by_pieces): Likewise. |
| (insert_into_preds_of_block): Likewsie. |
| (do_pre_regular_insertion): Likewsie. |
| * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_insert): |
| Likewise. |
| (eliminate_dom_walker::eliminate_stmt): Likewise. |
| |
| 2020-11-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97765 |
| * tree-ssa-pre.c (bb_bitmap_sets::phi_translate_table): Add. |
| (PHI_TRANS_TABLE): New macro. |
| (phi_translate_table): Remove. |
| (expr_pred_trans_d::pred): Remove. |
| (expr_pred_trans_d::hash): Simplify. |
| (expr_pred_trans_d::equal): Likewise. |
| (phi_trans_add): Adjust. |
| (phi_translate): Likewise. Remove hash-table expansion |
| detection and optimization. |
| (phi_translate_set): Allocate PHI_TRANS_TABLE here. |
| (init_pre): Adjsust. |
| (fini_pre): Free PHI_TRANS_TABLE. |
| |
| 2020-11-09 Lili Cui <lili.cui@intel.com> |
| |
| PR target/97685 |
| * config/i386/i386.h: |
| (PTA_BROADWELL): Delete PTA_PRFCHW. |
| (PTA_SILVERMONT): Add PTA_PRFCHW. |
| (PTA_KNL): Add PTA_PREFETCHWT1. |
| (PTA_TREMONT): Add PTA_MOVDIRI, PTA_MOVDIR64B, PTA_CLDEMOTE and PTA_WAITPKG. |
| * doc/invoke.texi: Delete PREFETCHW for broadwell, skylake, knl, knm, |
| skylake-avx512, cannonlake, icelake-client, icelake-server, cascadelake, |
| cooperlake, tigerlake and sapphirerapids. |
| Add PREFETCHW for silvermont, goldmont, goldmont-plus and tremont. |
| Add XSAVEC and XSAVES for goldmont, goldmont-plus and tremont. |
| Add MOVDIRI, MOVDIR64B, CLDEMOTE and WAITPKG for tremont. |
| Add KEYLOCKER and HREST for alderlake. |
| Add AMX-BF16, AMX-TILE, AMX-INT8 and UINTR for sapphirerapids. |
| Add KEYLOCKER for tigerlake. |
| |
| 2020-11-09 Kewen Lin <linkw@linux.ibm.com> |
| |
| PR rtl-optimization/97705 |
| * ira.c (ira): Refactor some regstat free/init/compute invocation |
| into lambda function regstat_recompute_for_max_regno, and call it |
| when max_regno increases as remove_scratches succeeds. |
| |
| 2020-11-08 David Edelsohn <dje.gcc@gmail.com> |
| |
| * config/rs6000/rs6000.c (rs6000_mangle_decl_assembler_name): Change |
| DECL_IS_BUILTIN -> DECL_IS_UNDECLARED_BUILTIN. |
| |
| 2020-11-07 Martin Uecker <muecker@gwdg.de> |
| |
| * doc/extend.texi: Document mixing labels and code. |
| * doc/invoke.texi: Likewise. |
| |
| 2020-11-06 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000.md (@tablejump<mode>_normal): Don't abuse |
| operands[]. |
| (@tablejump<mode>_nospec): Ditto. |
| |
| 2020-11-06 Peter Bergner <bergner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.h (BIGGEST_ALIGNMENT): Revert previous commit |
| so as not to break the ABI. |
| * config/rs6000/rs6000-call.c (rs6000_init_builtins): Set the ABI |
| mandated alignment for __vector_pair and __vector_quad types. |
| |
| 2020-11-06 Jeff Law <law@torsion.usersys.redhat.com> |
| |
| PR target/91489 |
| * config/i386/i386.md (simple_return): Also check |
| for ms_hook_prologue function attribute. |
| * config/i386/i386.c (ix86_can_use_return_insn_p): |
| Also check for ms_hook_prologue function attribute. |
| * config/i386/i386-protos.h (ix86_function_ms_hook_prologue): Declare. |
| |
| 2020-11-06 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| PR target/96933 |
| * config/rs6000/rs6000.c (rs6000_expand_vector_init): Use |
| TARGET_POWERPC64 instead of TARGET_64BIT. |
| |
| 2020-11-06 Joseph Myers <joseph@codesourcery.com> |
| |
| * builtins.def (BUILT_IN_NANSD32, BUILT_IN_NANSD64) |
| (BUILT_IN_NANSD128): New built-in functions. |
| * fold-const-call.c (fold_const_call): Handle the new built-in |
| functions. |
| * doc/extend.texi (__builtin_nansd32, __builtin_nansd64) |
| (__builtin_nansd128): Document. |
| * doc/sourcebuild.texi (Effective-Target Keywords): Document |
| fenv_exceptions_dfp. |
| |
| 2020-11-06 Bin Cheng <bin.cheng@linux.alibaba.com> |
| |
| * tree-ssa-uninit.c (find_var_cmp_const): New function. |
| (use_pred_not_overlap_with_undef_path_pred): Call above. |
| |
| 2020-11-06 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin-c.c: Allow for Darwin20 to correspond to macOS 11. |
| * config/darwin-driver.c: Likewise. |
| |
| 2020-11-06 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-pre.c (expr_pred_trans_d): Modify so elements |
| are embedded rather than allocated. Remove hashval member, |
| make all members integers. |
| (phi_trans_add): Adjust accordingly. |
| (phi_translate): Likewise. Deal with re-allocation |
| of the table. |
| |
| 2020-11-06 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97737 |
| PR tree-optimization/97741 |
| * gimple-range.cc: (gimple_ranger::range_of_stmt): Intersect newly |
| calculated ranges with the existing known global range. |
| |
| 2020-11-06 Darius Galis <darius.galis@cyberthorstudios.com> |
| |
| * config/rx/rx.md (CTRLREG_PC): Add. |
| * config/rx/rx.c (CTRLREG_PC): Add |
| (rx_expand_builtin_mvtc): Add warning: PC register cannot |
| be used as dest. |
| |
| 2020-11-06 Nathan Sidwell <nathan@acm.org> |
| |
| * tree.h (DECL_IS_BUILTIN): Rename to ... |
| (DECL_IS_UNDECLARED_BUILTIN): ... here. No need to use SOURCE_LOCUS. |
| * calls.c (maybe_warn_alloc_args_overflow): Adjust for rename. |
| * cfgexpand.c (pass_expand::execute): Likewise. |
| * dwarf2out.c (base_type_die, is_naming_typedef_decl): Likewise. |
| * godump.c (go_decl, go_type_decl): Likewise. |
| * print-tree.c (print_decl_identifier): Likewise. |
| * tree-pretty-print.c (dump_generic_node): Likewise. |
| * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Likewise. |
| * xcoffout.c (xcoff_assign_fundamental_type_number): Likewise. |
| |
| 2020-11-06 David Candler <david.candler@arm.com> |
| |
| * config/aarch64/aarch64-builtins.c |
| (TYPES_SHIFT2IMM): Add define. |
| (TYPES_SHIFT2IMM_UUSS): Add define. |
| (TYPES_USHIFT2IMM): Add define. |
| * config/aarch64/aarch64-simd.md |
| (aarch64_<sur>q<r>shr<u>n2_n<mode>): Add new insn for upper saturating shift right. |
| * config/aarch64/aarch64-simd-builtins.def: Add intrinsics. |
| * config/aarch64/arm_neon.h: |
| (vqrshrn_high_n_s16): Expand using intrinsic rather than inline asm. |
| (vqrshrn_high_n_s32): Likewise. |
| (vqrshrn_high_n_s64): Likewise. |
| (vqrshrn_high_n_u16): Likewise. |
| (vqrshrn_high_n_u32): Likewise. |
| (vqrshrn_high_n_u64): Likewise. |
| (vqrshrun_high_n_s16): Likewise. |
| (vqrshrun_high_n_s32): Likewise. |
| (vqrshrun_high_n_s64): Likewise. |
| (vqshrn_high_n_s16): Likewise. |
| (vqshrn_high_n_s32): Likewise. |
| (vqshrn_high_n_s64): Likewise. |
| (vqshrn_high_n_u16): Likewise. |
| (vqshrn_high_n_u32): Likewise. |
| (vqshrn_high_n_u64): Likewise. |
| (vqshrun_high_n_s16): Likewise. |
| (vqshrun_high_n_s32): Likewise. |
| (vqshrun_high_n_s64): Likewise. |
| |
| 2020-11-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-modes.def (VNx2BF, VNx4BF): Adjust nunits |
| and alignment based on the current VG. |
| * config/aarch64/iterators.md (SVE_ALL, SVE_24, SVE_2, SVE_4): Add |
| partial SVE BF modes. |
| (UNSPEC_REVBHW): New unspec. |
| (Vetype, Vesize, Vctype, VEL, Vel, vwcore, V_INT_CONTAINER) |
| (v_int_container, VPRED, vpred): Handle partial SVE BF modes. |
| (container_bits, Vcwtype): New mode attributes. |
| * config/aarch64/aarch64-sve.md |
| (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>): New pattern. |
| (@aarch64_sve_dup_lane<mode>): Extended from SVE_FULL to SVE_ALL. |
| (@aarch64_sve_rev<mode>, @aarch64_sve_<perm_insn><mode>): Likewise. |
| (@aarch64_sve_ext<mode>): Likewise. |
| * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle |
| E_VNx2BFmode and E_VNx4BFmode. |
| (aarch64_evpc_rev_local): Base the analysis on the container size |
| instead of the element size. Use the new aarch64_sve_revbhw |
| patterns for SVE. |
| (aarch64_evpc_dup): Handle partial SVE data modes. Use the |
| container size instead of the element size when applying the |
| SVE immediate limit. Fix a previously incorrect bounds check. |
| (aarch64_expand_vec_perm_const_1): Handle partial SVE data modes. |
| |
| 2020-11-06 Martin Liska <mliska@suse.cz> |
| |
| * common.opt: Add new -fbit-tests option. |
| * doc/invoke.texi: Document the option. |
| * tree-switch-conversion.c (bit_test_cluster::find_bit_tests): |
| Use the option. |
| * tree-switch-conversion.h (is_enabled): New function. |
| |
| 2020-11-06 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-sccvn.h (get_max_constant_value_id): Declare. |
| (get_next_constant_value_id): Likewise. |
| (value_id_constant_p): Inline and simplify. |
| * tree-ssa-sccvn.c (constant_value_ids): Remove. |
| (next_constant_value_id): Add. |
| (get_or_alloc_constant_value_id): Adjust. |
| (value_id_constant_p): Remove definition. |
| (get_max_constant_value_id): Define. |
| (get_next_value_id): Add assert for overflow. |
| (get_next_constant_value_id): Define. |
| (run_rpo_vn): Adjust. |
| (free_rpo_vn): Likewise. |
| (do_rpo_vn): Initialize next_constant_value_id. |
| * tree-ssa-pre.c (constant_value_expressions): New. |
| (add_to_value): Split into constant/non-constant value |
| handling. Avoid exact re-allocation. |
| (vn_valnum_from_value_id): Adjust. |
| (phi_translate_1): Remove spurious exact re-allocation. |
| (bitmap_find_leader): Adjust. Make sure we return |
| a CONSTANT value for a constant value id. |
| (do_pre_regular_insertion): Use 2 auto-elements for avail. |
| (do_pre_partial_partial_insertion): Likewise. |
| (init_pre): Allocate constant_value_expressions. |
| (fini_pre): Release constant_value_expressions. |
| |
| 2020-11-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97706 |
| * tree-vect-patterns.c (possible_vector_mask_operation_p): |
| PHIs are possible mask operations. |
| (vect_determine_mask_precision): Handle PHIs. |
| (vect_determine_precisions): Walk PHIs in BB analysis. |
| |
| 2020-11-06 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_analyze_slp): Pass down the |
| SLP graph entry kind. |
| (vect_analyze_slp_instance): Simplify. |
| (vect_build_slp_instance): Adjust. |
| (vect_slp_check_for_constructors): Perform more |
| eligibility checks here. |
| |
| 2020-11-06 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-ref.h (enum ipa_ref_use): Remove GTY marker. |
| (struct ipa_ref): Remove GTY marker; reorder for better packing. |
| (struct ipa_ref_list): Remove GTY marker; turn references |
| nad referring to va_heap, vl_ptr vectors; update accesors. |
| * cgraph.h (symtab_node::iterate_reference): Update. |
| * ipa-ref.c (ipa_ref::remove_reference): Update. |
| * symtab.c (symtab_node::create_reference): Update. |
| (symtab_node::remove_all_references): Update. |
| (symtab_node::resolve_alias): Update. |
| |
| 2020-11-06 Jakub Jelinek <jakub@redhat.com> |
| |
| * ipa-modref-tree.h: Fix comment typos. |
| * ipa-modref.c: Likewise. |
| |
| 2020-11-06 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.c (s390_option_override_internal): Remove |
| override of inline params. |
| |
| 2020-11-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97706 |
| * tree-vect-patterns.c (vect_determine_mask_precision): |
| Remove worklist operation. |
| (vect_determine_stmt_precisions): Do not call |
| vect_determine_mask_precision here. |
| (vect_determine_precisions): Compute mask precision |
| in a forward walk. |
| |
| 2020-11-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97732 |
| * tree-vect-loop.c (vectorizable_induction): Convert the |
| init elements to the vector component type. |
| * gimple-fold.c (gimple_build_vector): Use CONSTANT_CLASS_P |
| rather than TREE_CONSTANT to determine if elements are |
| eligible for VECTOR_CSTs. |
| |
| 2020-11-06 Jan Hubicka <jh@suse.cz> |
| |
| * attr-fnspec.h (attr_fnspec::get_str): New accessor |
| * ipa-fnsummary.c (read_ipa_call_summary): Store also parm info |
| for builtins. |
| * ipa-modref.c (class fnspec_summary): New type. |
| (class fnspec_summaries_t): New type. |
| (modref_summary::modref_summary): Initialize writes_errno. |
| (struct modref_summary_lto): Add writes_errno. |
| (modref_summary_lto::modref_summary_lto): Initialize writes_errno. |
| (modref_summary::dump): Check for NULL pointers. |
| (modref_summary_lto::dump): Dump writes_errno. |
| (collapse_loads): Move up in source file. |
| (collapse_stores): New function. |
| (process_fnspec): Handle also internal calls. |
| (analyze_call): Likewise. |
| (analyze_stmt): Store fnspec string if needed. |
| (analyze_function): Initialize fnspec_sumarries. |
| (modref_summaries_lto::duplicate): Copy writes_errno. |
| (modref_write): Store writes_errno and fnspec summaries. |
| (read_section): Read writes_errno and fnspec summaries. |
| (modref_read): Initialize fnspec summaries. |
| (update_signature): Fix formating. |
| (compute_parm_map): Return true if sucessful. |
| (get_parm_type): New function. |
| (get_access_for_fnspec): New function. |
| (propagate_unknown_call): New function. |
| (modref_propagate_in_scc): Use it. |
| (pass_ipa_modref::execute): Delete fnspec_summaries. |
| (ipa_modref_c_finalize): Delete fnspec_summaries. |
| * ipa-prop.c: Include attr-fnspec.h. |
| (ipa_compute_jump_functions_for_bb): Also compute jump functions |
| for functions with fnspecs. |
| (ipa_read_edge_info): Read jump functions for builtins. |
| |
| 2020-11-06 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-fnsummary.h (class size_time_entry): Do not GTY annotate. |
| (class ipa_fnsummary): Turn size_time_table to auto_vec and |
| call_size_time_table to effecient vec; update constructors. |
| * ipa-fnsummary.c (ipa_fn_summary::account_size_time): Update. |
| (ipa_fn_summary::~ipa_fn_summary): Update. |
| (ipa_fn_summary_t::duplicate): Update. |
| (ipa_dump_fn_summary): Update. |
| (set_switch_stmt_execution_predicate): Update. |
| (analyze_function_body): Update. |
| (estimate_calls_size_and_time): Update. |
| (ipa_call_context::estimate_size_and_time): Update. |
| (ipa_merge_fn_summary_after_inlining): Update. |
| (ipa_update_overall_fn_summary): Update. |
| (inline_read_section): Update. |
| (ipa_fn_summary_write): Update. |
| |
| 2020-11-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97733 |
| * tree-vect-slp.c (vect_analyze_slp_instance): If less |
| than two reductions were relevant or live do nothing. |
| |
| 2020-11-06 Jeff Law <law@redhat.com> |
| |
| PR tree-optimization/97223 |
| * match.pd (overflow detection and optimization): Handle conversions. |
| |
| 2020-11-06 Eugene Rozenfeld <erozen@microsoft.com> |
| |
| * match.pd (x >> x): New pattern. |
| |
| 2020-11-06 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.c (riscv_implied_info): |
| Add static and const. |
| (riscv_subset_list::handle_implied_ext): Add const due to |
| riscv_implied_info changed to const. |
| |
| 2020-11-06 Kito Cheng <kito.cheng@sifive.com> |
| |
| PR target/96307 |
| * toplev.c (process_options): Remove param_asan_stack checking for kasan |
| option checking. |
| |
| 2020-11-05 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/97675 |
| * doc/invoke.texi: Document -Wexceptions. |
| |
| 2020-11-05 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/25814 |
| * doc/invoke.texi: Document -Wvexing-parse. |
| |
| 2020-11-05 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97725 |
| * range-op.cc (operator_equal::fold_range): Use new tmp value. |
| (operator_not_equal::fold_range): Ditto. |
| * value-query.cc (range_query::value_of_expr): Use int_range_max |
| not a value_range. |
| (range_query::value_on_edge): Ditto. |
| (range_query::value_of_stmt): Ditto. |
| |
| 2020-11-05 Olivier Hainque <hainque@adacore.com> |
| |
| * config/aarch64/aarch64-vxworks.h (TARGET_OS_USES_R18): |
| Remove definition. |
| (STATIC_CHAIN_REGNUM): Redefine to 9. |
| |
| 2020-11-05 Olivier Hainque <hainque@adacore.com> |
| |
| * config/aarch64/aarch64.md: Define PROBE_STACK_FIRST_REGNUM |
| and PROBE_STACK_SECOND_REGNUM constants, designating r10/r11. |
| Replacements for the PROBE_STACK_FIRST/SECOND_REG constants in |
| aarch64.c. |
| * config/aarch64/aarch64.c (PROBE_STACK_FIRST_REG): Remove. |
| (PROBE_STACK_SECOND_REG): Remove. |
| (aarch64_emit_probe_stack_range): Adjust to the _REG -> _REGNUM |
| suffix update for PROBE_STACK register numbers. |
| |
| 2020-11-05 Jan Hubicka <jh@suse.cz> |
| |
| * gimple.c (gimple_call_fnspec): Handle C++ new and delete. |
| * gimple.h (gimple_call_from_new_or_delete): Constify parameter. |
| |
| 2020-11-05 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97721 |
| * gimple-range.cc (get_tree_range): Drop overflow from constants. |
| |
| 2020-11-05 David Malcolm <dmalcolm@redhat.com> |
| |
| * tree-diagnostic-path.cc (struct path_summary::event_range): Move |
| out of path_summary to... |
| (struct event_range): ...here. |
| (class path_summary): Convert to... |
| (struct path_summary): ...this. |
| (path_summary::m_ranges): Drop "private". |
| (path_summary::print): Convert to... |
| (print_path_summary_as_text): ...this, passing in the path_summary |
| explicitly. |
| (default_tree_diagnostic_path_printer): Update for above change. |
| (selftest::test_empty_path): Likewise. |
| (selftest::test_intraprocedural_path): Likewise. |
| (selftest::test_interprocedural_path_1): Likewise. |
| (selftest::test_interprocedural_path_2): Likewise. |
| (selftest::test_recursion): Likewise. |
| |
| 2020-11-05 qing zhao <qinzhao@gcc.gnu.org> |
| |
| PR target/97715 |
| * config/i386/i386.c (zero_all_st_registers): Return |
| earlier when the FPU is disabled. |
| |
| 2020-11-05 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (parm_map_for_arg): Initialize parm_offset and |
| parm_offset_knonw. |
| (read_section): Set writes_errno to false. |
| |
| 2020-11-05 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-data-refs.c (vect_slp_analyze_node_dependences): |
| Use the original stmts. |
| (vect_slp_analyze_node_alignment): Use the pattern stmt. |
| * tree-vect-slp.c (vect_fixup_store_groups_with_patterns): |
| New function. |
| (vect_slp_analyze_bb_1): Call it. |
| |
| 2020-11-05 Tamar Christina <tamar.christina@arm.com> |
| |
| * tree-vect-slp.c (vect_slp_tree_permute_noop_p): New. |
| (vect_optimize_slp): Optimize permutes. |
| (vectorizable_slp_permutation): Fix typo. |
| |
| 2020-11-05 Richard Biener <rguenther@suse.de> |
| |
| PR debug/97718 |
| * dwarf2out.c (add_abstract_origin_attribute): Make sure to |
| point to the abstract instance. |
| |
| 2020-11-05 Tamar Christina <tamar.christina@arm.com> |
| |
| * tree-vect-loop.c (vect_analyze_loop_2): Check kind. |
| * tree-vect-slp.c (vect_build_slp_instance): New. |
| (enum slp_instance_kind): Move to... |
| * tree-vectorizer.h (enum slp_instance_kind): .. Here |
| (SLP_INSTANCE_KIND): New. |
| |
| 2020-11-05 Kewen Lin <linkw@linux.ibm.com> |
| |
| PR target/96933 |
| * config/rs6000/rs6000.c (rs6000_expand_vector_init): Use direct move |
| instructions for vector construction with char/short types. |
| * config/rs6000/rs6000.md (p8_mtvsrwz_v16qisi2): New define_insn. |
| (p8_mtvsrd_v16qidi2): Likewise. |
| |
| 2020-11-04 Tamar Christina <tamar.christina@arm.com> |
| |
| * tree-vect-slp.c (vect_analyze_slp_instance): Moved load/store lanes |
| check to ... |
| * tree-vect-loop.c (vect_analyze_loop_2): ..Here |
| |
| 2020-11-04 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * config/s390/s390.c (NR_C_MODES): Unhardcode. |
| (s390_alloc_pool): Use size_t for iterating from 0 to |
| NR_C_MODES. |
| (s390_add_constant): Likewise. |
| (s390_find_constant): Likewise. |
| (s390_dump_pool): Likewise. |
| (s390_free_pool): Likewise. |
| |
| 2020-11-04 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * config/s390/s390.md (RRe): Remove. |
| (RXe): Remove. |
| |
| 2020-11-04 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97515 |
| * gimple-range-cache.h (class ranger_cache): New prototypes plus |
| temporal cache pointer. |
| * gimple-range-cache.cc (struct range_timestamp): New. |
| (class temporal_cache): New. |
| (temporal_cache::temporal_cache): New. |
| (temporal_cache::~temporal_cache): New. |
| (temporal_cache::get_timestamp): New. |
| (temporal_cache::set_dependency): New. |
| (temporal_cache::temporal_value): New. |
| (temporal_cache::current_p): New. |
| (temporal_cache::set_timestamp): New. |
| (temporal_cache::set_always_current): New. |
| (ranger_cache::ranger_cache): Allocate the temporal cache. |
| (ranger_cache::~ranger_cache): Free temporal cache. |
| (ranger_cache::get_non_stale_global_range): New. |
| (ranger_cache::set_global_range): Add a timestamp. |
| (ranger_cache::register_dependency): New. Add timestamp dependency. |
| * gimple-range.cc (gimple_ranger::range_of_range_op): Add operand |
| dependencies. |
| (gimple_ranger::range_of_phi): Ditto. |
| (gimple_ranger::range_of_stmt): Check if global range is stale, and |
| recalculate if so. |
| |
| 2020-11-04 Tobias Burnus <tobias@codesourcery.com> |
| |
| * targhooks.c (default_zero_call_used_regs): Fix flag-name typo |
| in sorry. |
| |
| 2020-11-04 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vectorizable_phi): Adjust prototype. |
| * tree-vect-stmts.c (vect_transform_stmt): Adjust. |
| (vect_analyze_stmt): Pass cost_vec to vectorizable_phi. |
| * tree-vect-loop.c (vectorizable_phi): Do costing. |
| |
| 2020-11-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97709 |
| * tree-vect-loop.c (vectorizable_live_operation): Set |
| SSA_NAME_OCCURS_IN_ABNORMAL_PHI when necessary. |
| |
| 2020-11-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/97690 |
| * tree-ssa-phiopt.c (conditional_replacement): Also optimize |
| cond ? pow2p_cst : 0 as ((type) cond) << cst. |
| |
| 2020-11-04 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-loop.c (vectorizable_induction): Re-instantiate |
| previously removed CSE of SLP IVs. |
| |
| 2020-11-04 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-options.c (ix86_recompute_optlev_based_flags): |
| Fix Intel MCU psABI comment w.r.t DEFAULT_PCC_STRUCT_RETURN. |
| |
| 2020-11-04 Richard Biener <rguenther@suse.de> |
| |
| PR bootstrap/97666 |
| * tree-vect-slp.c (vect_build_slp_tree_2): Revert previous |
| fix and instead adjust the memset. |
| |
| 2020-11-04 Pat Bernardi <bernardi@adacore.com> |
| |
| * config/i386/i386elf.h (SUBTARGET_RETURN_IN_MEMORY): Remove. |
| (ASM_OUTPUT_ASCII): Likewise. |
| (DEFAULT_PCC_STRUCT_RETURN): Define. |
| * config/i386/i386.c (ix86_return_in_memory): Remove |
| SUBTARGET_RETURN_IN_MEMORY. |
| |
| 2020-11-04 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/97540 |
| * ira.c: (ira_setup_alts): Extract memory from operand only |
| for special memory constraint. |
| * recog.c (asm_operand_ok): Ditto. |
| * lra-constraints.c (process_alt_operands): MEM_P is |
| required for normal memory constraint. |
| |
| 2020-11-04 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/97532 |
| * lra-constraints.c (valid_address_p): Handle operand of |
| special memory constraint. |
| (process_address_1): Ditto. |
| |
| 2020-11-03 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/97695 |
| * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Fix ICE with |
| in dumping code. |
| (cgraph_node::remove): Save clone info before releasing it and pass it |
| to unregister. |
| * cgraph.h (symtab_node::unregister): Add clone_info parameter. |
| (cgraph_clone::unregister): Likewise. |
| * cgraphclones.c (cgraph_node::find_replacement): Copy clone info |
| * symtab-clones.cc (clone_infos_t::duplicate): Remove. |
| (clone_info::get_create): Simplify. |
| * symtab.c (symtab_node::unregister): Pass around clone info. |
| * varpool.c (varpool_node::remove): Update. |
| |
| 2020-11-03 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * omp-low.c (scan_omp_for) <OpenACC>: Use proper location to |
| 'inform' of enclosing parent compute construct. |
| |
| 2020-11-03 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/97698 |
| * cgraphclones.c (duplicate_thunk_for_node): Check that info is |
| non-NULL. |
| |
| 2020-11-03 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.c (ix86_function_arg_regno_p): Use up to |
| SSE_REGPARM_MAX registers to pass function parameters |
| for 32bit Mach-O targets. |
| * config/i386/i386.h (X86_32_MMX_REGPARM_MAX): New macro. |
| (MMX_REGPARM_MAX): Use it. |
| |
| 2020-11-03 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def (vget_lo_half): New entry. |
| (vget_hi_half): Likewise. |
| * config/aarch64/aarch64-simd.md (aarch64_vget_lo_halfv8bf): New entry. |
| (aarch64_vget_hi_halfv8bf): Likewise. |
| * config/aarch64/arm_neon.h (vget_low_bf16): New intrinsic. |
| (vget_high_bf16): Likewise. |
| |
| 2020-11-03 Yang Yang <yangyang305@huawei.com> |
| |
| * cgraph.h (struct cgraph_simd_clone): Change field "simdlen" of |
| struct cgraph_simd_clone from unsigned int to poly_uint64. |
| * config/aarch64/aarch64.c |
| (aarch64_simd_clone_compute_vecsize_and_simdlen): adaptation of |
| operations on "simdlen". |
| * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen): |
| Printf formats update. |
| * gengtype.c (main): Handle poly_uint64. |
| * omp-simd-clone.c (simd_clone_mangle): Likewise.Re |
| (simd_clone_adjust_return_type): Likewise. |
| (create_tmp_simd_array): Likewise. |
| (simd_clone_adjust_argument_types): Likewise. |
| (simd_clone_init_simd_arrays): Likewise. |
| (ipa_simd_modify_function_body): Likewise. |
| (simd_clone_adjust): Likewise. |
| (expand_simd_clones): Likewise. |
| * poly-int-types.h (vector_unroll_factor): New macro. |
| * poly-int.h (constant_multiple_p): Add two-argument versions. |
| * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise. |
| |
| 2020-11-03 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97623 |
| * params.opt (-param=max-pre-hoist-insert-iterations): New. |
| * doc/invoke.texi (max-pre-hoist-insert-iterations): Document. |
| * tree-ssa-pre.c (insert): Do at most max-pre-hoist-insert-iterations |
| hoist insert iterations. |
| |
| 2020-11-03 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/97579 |
| * gimple-isel.cc (gimple_expand_vec_cond_expr): Use |
| the correct types for the vcond_mask/vec_cmp optab queries. |
| |
| 2020-11-03 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-cache.cc (ssa_global_cache::get_global_range): Return |
| true if there was a previous range set. |
| (ranger_cache::ranger_cache): Take a gimple_ranger parameter. |
| (ranger_cache::set_global_range): Propagate the value if updating. |
| (ranger_cache::propagate_cache): Renamed from iterative_cache_update. |
| (ranger_cache::propagate_updated_value): New. Split from: |
| (ranger_cache::fill_block_cache): Split out value propagator. |
| * gimple-range-cache.h (ssa_global_cache): Update prototypes. |
| (ranger_cache): Update prototypes. |
| |
| 2020-11-03 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-cache.h (block_range_cache): Add new entry point. |
| (ranger_cache): Privatize global abnd block cache members. |
| * gimple-range-cache.cc (ssa_block_ranges::set_bb_range): Add bounds |
| check. |
| (ssa_block_ranges::set_bb_varying): Ditto. |
| (ssa_block_ranges::get_bb_range): Ditto. |
| (ssa_block_ranges::bb_range_p): Ditto. |
| (block_range_cache::get_block_ranges): Fix formatting. |
| (block_range_cache::query_block_ranges): New. |
| (block_range_cache::get_bb_range): Use Query_block_ranges. |
| (block_range_cache::bb_range_p): Ditto. |
| (ranger_cache::dump): New. |
| (ranger_cache::get_global_range): New. |
| (ranger_cache::set_global_range): New. |
| * gimple-range.cc (gimple_ranger::range_of_expr): Use new API. |
| (gimple_ranger::range_of_stmt): Ditto. |
| (gimple_ranger::export_global_ranges): Ditto. |
| (gimple_ranger::dump): Ditto. |
| |
| 2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de> |
| |
| * fold-const.c (getbyterep): Remove duplicated statement. |
| |
| 2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de> |
| |
| PR target/97205 |
| * cfgexpand.c (align_local_variable): Make SSA_NAMEs |
| at least MODE_ALIGNED. |
| (expand_one_stack_var_at): Increase MEM_ALIGN for SSA_NAMEs. |
| |
| 2020-11-03 Zhiheng Xie <xiezhiheng@huawei.com> |
| Nannan Zheng <zhengnannan@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for AES/SHA/SM3/SM4 intrinsics. |
| |
| 2020-11-03 Zhiheng Xie <xiezhiheng@huawei.com> |
| Nannan Zheng <zhengnannan@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for compare intrinsics. |
| |
| 2020-11-03 Richard Biener <rguenther@suse.de> |
| |
| * dwarf2out.c (maybe_create_die_with_external_ref): Remove |
| hashtable entry. |
| |
| 2020-11-03 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/arm_neon.h (vst2_lane_bf16, vst2q_lane_bf16) |
| (vst3_lane_bf16, vst3q_lane_bf16, vst4_lane_bf16) |
| (vst4q_lane_bf16): New intrinsics. |
| * config/arm/arm_neon_builtins.def: Touch it for: |
| __builtin_neon_vst2_lanev4bf, __builtin_neon_vst2_lanev8bf, |
| __builtin_neon_vst3_lanev4bf, __builtin_neon_vst3_lanev8bf, |
| __builtin_neon_vst4_lanev4bf,__builtin_neon_vst4_lanev8bf. |
| |
| 2020-11-03 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/arm_neon.h (vld2_lane_bf16, vld2q_lane_bf16) |
| (vld3_lane_bf16, vld3q_lane_bf16, vld4_lane_bf16) |
| (vld4q_lane_bf16): Add intrinsics. |
| * config/arm/arm_neon_builtins.def: Touch for: |
| __builtin_neon_vld2_lanev4bf, __builtin_neon_vld2_lanev8bf, |
| __builtin_neon_vld3_lanev4bf, __builtin_neon_vld3_lanev8bf, |
| __builtin_neon_vld4_lanev4bf, __builtin_neon_vld4_lanev8bf. |
| * config/arm/iterators.md (VQ_HS): Add V8BF to the iterator. |
| |
| 2020-11-03 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/arm_neon.h (vst1_bf16, vst1q_bf16): Add intrinsics. |
| * config/arm/arm_neon_builtins.def : Touch for: |
| __builtin_neon_vst1v4bf, __builtin_neon_vst1v8bf. |
| |
| 2020-11-03 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/arm-builtins.c (VAR14): Define macro. |
| * config/arm/arm_neon_builtins.def: Touch for: |
| __builtin_neon_vld1v4bf, __builtin_neon_vld1v8bf. |
| * config/arm/arm_neon.h (vld1_bf16, vld1q_bf16): Add intrinsics. |
| |
| 2020-11-03 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/arm_neon.h (vst1_lane_bf16, vst1q_lane_bf16): Add |
| intrinsics. |
| * config/arm/arm_neon_builtins.def (STORE1LANE): Add v4bf, v8bf. |
| |
| 2020-11-03 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/arm_neon_builtins.def: Add to LOAD1LANE v4bf, v8bf. |
| * config/arm/arm_neon.h (vld1_lane_bf16, vld1q_lane_bf16): Add |
| intrinsics. |
| |
| 2020-11-03 Richard Biener <rguenther@suse.de> |
| |
| PR bootstrap/97666 |
| * tree-vect-slp.c (vect_build_slp_tree_2): Scale |
| allocation of skip_args by sizeof (bool). |
| |
| 2020-11-03 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/80928 |
| * tree-vect-loop.c (vectorizable_induction): SLP vectorize |
| nested inductions. |
| |
| 2020-11-03 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/97578 |
| * ipa-inline-transform.c (maybe_materialize_called_clones): New |
| function. |
| (inline_transform): Use it. |
| |
| 2020-11-03 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97678 |
| * tree-vect-slp.c (vect_build_slp_tree_2): Do not track |
| the initial values of inductions when not nested. |
| * tree-vect-loop.c (vectorizable_induction): Look at |
| PHI node initial values again for SLP and not nested |
| inductions. Handle LOOP_VINFO_MASK_SKIP_NITERS and cost |
| invariants. |
| |
| 2020-11-03 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/sse.md (aes<aeswideklvariant>u8): |
| Do not use xmm_regs array. Fix whitespace. |
| |
| 2020-11-03 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-expand.c (ix86_expand_builtin): Fix comment. |
| |
| 2020-11-03 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * omp-low.c (scan_omp_for) <OpenACC>: Move earlier inconsistent |
| nested 'reduction' clauses checking. |
| |
| 2020-11-03 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * omp-low.c (scan_omp_for) <OpenACC>: More precise diagnostics for |
| 'gang', 'worker', 'vector' clauses with arguments only allowed in |
| 'kernels' regions. |
| |
| 2020-11-03 Kewen Lin <linkw@gcc.gnu.org> |
| |
| PR tree-optimization/96789 |
| * function.h (struct function): New member unsigned pending_TODOs. |
| * passes.c (class pass_pre_slp_scalar_cleanup): New class. |
| (make_pass_pre_slp_scalar_cleanup): New function. |
| (pass_data_pre_slp_scalar_cleanup): New pass data. |
| * passes.def: (pass_pre_slp_scalar_cleanup): New pass, add |
| pass_fre and pass_dse as its children. |
| * timevar.def (TV_SCALAR_CLEANUP): New timevar. |
| * tree-pass.h (PENDING_TODO_force_next_scalar_cleanup): New |
| pending TODO flag. |
| (make_pass_pre_slp_scalar_cleanup): New declare. |
| * tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1): |
| Once any outermost loop gets unrolled, flag cfun pending_TODOs |
| PENDING_TODO_force_next_scalar_cleanup on. |
| |
| 2020-11-02 Alan Modra <amodra@gmail.com> |
| |
| PR middle-end/97267 |
| * calls.h (maybe_complain_about_tail_call): Declare. |
| * calls.c (maybe_complain_about_tail_call): Make global. |
| (can_implement_as_sibling_call_p): Delete reg_parm_stack_space |
| param. Adjust caller. Move REG_PARM_STACK_SPACE check to.. |
| * config/i386/i386.c (ix86_function_ok_for_sibcall): ..here. |
| |
| 2020-11-02 Vladimir N. Makarov <vmakarov@redhat.com> |
| |
| * ira.c (ira_remove_scratches): Rename to remove_scratches. Make |
| it static and returning flag of any change. |
| (ira.c): Call ira_expand_reg_equiv in case of removing scratches. |
| |
| 2020-11-02 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/97140 |
| * config/i386/i386-expand.c (ix86_expand_builtin): Require MMX |
| for __builtin_ia32_maskmovq. |
| |
| 2020-11-02 Martin Sebor <msebor@redhat.com> |
| |
| * doc/invoke.texi (-Wstringop-overflow): Correct default setting. |
| (-Wstringop-overread): Move past -Wstringop-overflow. |
| |
| 2020-11-02 François-Xavier Coudert <fxcoudert@gcc.gnu.org> |
| |
| PR bootstrap/57076 |
| * Makefile.in (gcc-vers.texi): Quote @, { and }. |
| |
| 2020-11-02 Carl Love <cel@us.ibm.com> |
| |
| PR target/93449 |
| * config/rs6000/altivec.h (__builtin_bcdadd, __builtin_bcdadd_lt, |
| __builtin_bcdadd_eq, __builtin_bcdadd_gt, __builtin_bcdadd_ofl, |
| __builtin_bcdadd_ov, __builtin_bcdsub, __builtin_bcdsub_lt, |
| __builtin_bcdsub_eq, __builtin_bcdsub_gt, __builtin_bcdsub_ofl, |
| __builtin_bcdsub_ov, __builtin_bcdinvalid, __builtin_bcdmul10, |
| __builtin_bcddiv10, __builtin_bcd2dfp, __builtin_bcdcmpeq, |
| __builtin_bcdcmpgt, __builtin_bcdcmplt, __builtin_bcdcmpge, |
| __builtin_bcdcmple): Add defines. |
| * config/rs6000/altivec.md: Add UNSPEC_BCDSHIFT. |
| (BCD_TEST): Add le, ge to code iterator. |
| Add VBCD mode iterator. |
| (bcd<bcd_add_sub>_test, *bcd<bcd_add_sub>_test2, |
| bcd<bcd_add_sub>_<code>, bcd<bcd_add_sub>_<code>): Add mode to name. |
| Change iterator from V1TI to VBCD. |
| (*bcdinvalid_<mode>, bcdshift_v16qi): New define_insn. |
| (bcdinvalid_<mode>, bcdmul10_v16qi, bcddiv10_v16qi): New define. |
| * config/rs6000/dfp.md (dfp_denbcd_v16qi_inst): New define_insn. |
| (dfp_denbcd_v16qi): New define_expand. |
| * config/rs6000/rs6000-builtin.def (BU_P8V_MISC_1): New define. |
| (BCDADD): Replaced with BCDADD_V1TI and BCDADD_V16QI. |
| (BCDADD_LT): Replaced with BCDADD_LT_V1TI and BCDADD_LT_V16QI. |
| (BCDADD_EQ): Replaced with BCDADD_EQ_V1TI and BCDADD_EQ_V16QI. |
| (BCDADD_GT): Replaced with BCDADD_GT_V1TI and BCDADD_GT_V16QI. |
| (BCDADD_OV): Replaced with BCDADD_OV_V1TI and BCDADD_OV_V16QI. |
| (BCDSUB_V1TI, BCDSUB_V16QI, BCDSUB_LT_V1TI, BCDSUB_LT_V16QI, |
| BCDSUB_LE_V1TI, BCDSUB_LE_V16QI, BCDSUB_EQ_V1TI, BCDSUB_EQ_V16QI, |
| BCDSUB_GT_V1TI, BCDSUB_GT_V16QI, BCDSUB_GE_V1TI, BCDSUB_GE_V16QI, |
| BCDSUB_OV_V1TI, BCDSUB_OV_V16QI, BCDINVALID_V1TI, BCDINVALID_V16QI, |
| BCDMUL10_V16QI, BCDDIV10_V16QI, DENBCD_V16QI): New builtin definitions. |
| (BCDADD, BCDADD_LT, BCDADD_EQ, BCDADD_GT, BCDADD_OV, BCDSUB, BCDSUB_LT, |
| BCDSUB_LE, BCDSUB_EQ, BCDSUB_GT, BCDSUB_GE, BCDSUB_OV, BCDINVALID, |
| BCDMUL10, BCDDIV10, DENBCD): New overload definitions. |
| * config/rs6000/rs6000-call.c (P8V_BUILTIN_VEC_BCDADD, P8V_BUILTIN_VEC_BCDADD_LT, |
| P8V_BUILTIN_VEC_BCDADD_EQ, P8V_BUILTIN_VEC_BCDADD_GT, P8V_BUILTIN_VEC_BCDADD_OV, |
| P8V_BUILTIN_VEC_BCDINVALID, P9V_BUILTIN_VEC_BCDMUL10, P8V_BUILTIN_VEC_DENBCD. |
| P8V_BUILTIN_VEC_BCDSUB, P8V_BUILTIN_VEC_BCDSUB_LT, P8V_BUILTIN_VEC_BCDSUB_LE, |
| P8V_BUILTIN_VEC_BCDSUB_EQ, P8V_BUILTIN_VEC_BCDSUB_GT, P8V_BUILTIN_VEC_BCDSUB_GE, |
| P8V_BUILTIN_VEC_BCDSUB_OV): New overloaded specifications. |
| (CODE_FOR_bcdadd): Replaced with CODE_FOR_bcdadd_v16qi and CODE_FOR_bcdadd_v1ti. |
| (CODE_FOR_bcdadd_lt): Replaced with CODE_FOR_bcdadd_lt_v16qi and CODE_FOR_bcdadd_lt_v1ti. |
| (CODE_FOR_bcdadd_eq): Replaced with CODE_FOR_bcdadd_eq_v16qi and CODE_FOR_bcdadd_eq_v1ti. |
| (CODE_FOR_bcdadd_gt): Replaced with CODE_FOR_bcdadd_gt_v16qi and CODE_FOR_bcdadd_gt_v1ti. |
| (CODE_FOR_bcdsub): Replaced with CODE_FOR_bcdsub_v16qi and CODE_FOR_bcdsub_v1ti. |
| (CODE_FOR_bcdsub_lt): Replaced with CODE_FOR_bcdsub_lt_v16qi and CODE_FOR_bcdsub_lt_v1ti. |
| (CODE_FOR_bcdsub_eq): Replaced with CODE_FOR_bcdsub_eq_v16qi and CODE_FOR_bcdsub_eq_v1ti. |
| (CODE_FOR_bcdsub_gt): Replaced with CODE_FOR_bcdsub_gt_v16qi and CODE_FOR_bcdsub_gt_v1ti. |
| (rs6000_expand_ternop_builtin): Add CODE_FOR_dfp_denbcd_v16qi to else if. |
| * doc/extend.texi: Add documentation for new builtins. |
| |
| 2020-11-02 Nathan Sidwell <nathan@acm.org> |
| |
| * tree.c (cache_integer_cst): Fixup pointer caching to match |
| wide_int_to_type_1's expectations. Add comment. |
| |
| 2020-11-02 Nathan Sidwell <nathan@acm.org> |
| |
| * tree.h (id_equal): Call the symetric predicate with swapped |
| arguments. |
| |
| 2020-11-02 Nathan Sidwell <nathan@acm.org> |
| |
| * print-tree.c (print_node): Display all the operands of a call |
| expr. |
| |
| 2020-11-02 Vladimir N. Makarov <vmakarov@redhat.com> |
| |
| * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Add hint * |
| to 2nd alternative of the 1st scratch. |
| |
| 2020-11-02 Sudakshina Das <sudi.das@arm.com> |
| |
| PR target/97638 |
| * config/aarch64/aarch64-bti-insert.c (aarch64_pac_insn_p): Update |
| return value on INSN_P check. |
| |
| 2020-11-02 Richard Biener <rguenther@suse.de> |
| |
| * tree.h (build_real_from_wide): Declare. |
| * tree.c (build_real_from_wide): New function. |
| * tree-vect-slp.c (vect_build_slp_tree_2): Remove |
| restriction on induction vectorization, represent |
| the initial value. |
| * tree-vect-loop.c (vect_model_induction_cost): Inline ... |
| (vectorizable_induction): ... here. Rewrite SLP |
| code generation. |
| |
| 2020-11-02 Martin Jambor <mjambor@suse.cz> |
| |
| * dbgcnt.def (ipa_cp_values): New counter. |
| (ipa_cp_vr): Likewise. |
| * ipa-cp.c (decide_about_value): Check and bump ipa_cp_values debug |
| counter. |
| (decide_whether_version_node): Likewise. |
| (ipcp_store_vr_results):Check and bump ipa_cp_vr debug counter. |
| |
| 2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/arm.c (arm_thumb1_mi_thunk): Build mi_delta in r3 and |
| do not emit function address and delta when -mpure-code is used. |
| |
| 2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/thumb1.md (thumb1_movsi_insn): Call |
| thumb1_gen_const_int_print. |
| * config/arm/arm-protos.h (thumb1_gen_const_int_print): Add |
| prototype. |
| * config/arm/arm.c (thumb1_gen_const_int_print): New. |
| |
| 2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/arm.c (thumb1_const_rtl, thumb1_const_print): New |
| classes. |
| (thumb1_gen_const_int): Rename to ... |
| (thumb1_gen_const_int_1): ... New helper function. Add capability |
| to emit either RTL or asm, improve generated code. |
| (thumb1_gen_const_int_rtl): New function. |
| * config/arm/arm-protos.h (thumb1_gen_const_int): Rename to |
| thumb1_gen_const_int_rtl. |
| * config/arm/thumb1.md: Call thumb1_gen_const_int_rtl instead |
| of thumb1_gen_const_int. |
| |
| 2020-11-02 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97558 |
| * tree-vect-loop.c (vectorizable_reduction): For nested SLP |
| cycles compute invariant operands vector type. |
| |
| 2020-11-02 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97558 |
| * tree-vect-loop.c (vect_fixup_scalar_cycles_with_patterns): |
| Check for any mismatch in pattern vs. non-pattern and dissolve |
| the group if there is one. |
| * tree-vect-slp.c (vect_analyze_slp_instance): Avoid |
| analyzing not relevant reductions. |
| (vect_analyze_slp): Avoid analyzing not relevant reduction |
| groups. |
| |
| 2020-11-02 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97650 |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): Check |
| for SSA_NAME before checking SSA_NAME_IS_DEFAULT_DEF. |
| |
| 2020-11-02 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.c |
| (riscv_subset_list::parse_multiletter_ext): Checking multiletter |
| extension has more than 1 letter. |
| |
| 2020-11-02 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config.gcc (riscv*-*-*): Handle --with-multilib-generator. |
| * configure: Regen. |
| * configure.ac: Add --with-multilib-generator. |
| * config/riscv/multilib-generator: Exit when parsing arch string error. |
| * config/riscv/t-withmultilib-generator: New. |
| * doc/install.texi: Document --with-multilib-generator. |
| |
| 2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| PR target/96770 |
| * config/arm/arm.c (thumb_legitimate_constant_p): Accept |
| (symbol_ref + addend) when literal pool is disabled. |
| (arm_valid_symbolic_address_p): Add support for thumb-1 without |
| MOVT/MOVW. |
| * config/arm/thumb1.md (*thumb1_movsi_insn): Accept (symbol_ref + |
| addend) in the pure-code alternative. |
| |
| 2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| PR target/96967 |
| * config/arm/arm.c (thumb_legitimate_constant_p): Add support for |
| disabled literal pool in thumb-1. |
| * config/arm/thumb1.md (thumb1_movsi_symbol_ref): Remove. |
| (*thumb1_movsi_insn): Add support for SYMBOL_REF with -mpure-code. |
| |
| 2020-11-01 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/host-darwin.c: Align pch_address_space to 16384. |
| |
| 2020-11-01 Pat Bernardi <bernardi@adacore.com> |
| |
| * config/i386/i386.c (ix86_expand_prologue): Set the stack usage to 0 |
| for naked functions. |
| |
| 2020-11-01 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| PR ipa/97660 |
| * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Don't call |
| clone_info::get when cgraph_node::get returns NULL. |
| |
| 2020-10-31 Jan Hubicka <jh@suse.cz> |
| |
| * Makefile.in: (OBJS): Add symtab-clones.o |
| (GTFILES): Add symtab-clones.h |
| * cgraph.c: Include symtab-clones.h. |
| (cgraph_edge::resolve_speculation): Fix formating |
| (cgraph_edge::redirect_call_stmt_to_callee): Update. |
| (cgraph_update_edges_for_call_stmt): Update |
| (release_function_body): Fix formating. |
| (cgraph_node::remove): Fix formating. |
| (cgraph_node::dump): Fix formating. |
| (cgraph_node::get_availability): Fix formating. |
| (cgraph_node::call_for_symbol_thunks_and_aliases): Fix formating. |
| (set_const_flag_1): Fix formating. |
| (set_pure_flag_1): Fix formating. |
| (cgraph_node::can_remove_if_no_direct_calls_p): Fix formating. |
| (collect_callers_of_node_1): Fix formating. |
| (clone_of_p): Update. |
| (cgraph_node::verify_node): Update. |
| (cgraph_c_finalize): Call clone_info::release (). |
| * cgraph.h (struct cgraph_clone_info): Move to symtab-clones.h. |
| (cgraph_node): Remove clone_info. |
| (symbol_table): Add m_clones. |
| * cgraphclones.c: Include symtab-clone.h. |
| (duplicate_thunk_for_node): Update. |
| (cgraph_node::create_clone): Update. |
| (cgraph_node::create_virtual_clone): Update. |
| (cgraph_node::find_replacement): Update. |
| (cgraph_node::materialize_clone): Update. |
| * gengtype.c (open_base_files): Include symtab-clones.h. |
| * ipa-cp.c: Include symtab-clones.h. |
| (initialize_node_lattices): Update. |
| (want_remove_some_param_p): Update. |
| (create_specialized_node): Update. |
| * ipa-fnsummary.c: Include symtab-clones.h. |
| (ipa_fn_summary_t::duplicate): Update. |
| * ipa-modref.c: Include symtab-clones.h. |
| (update_signature): Update. |
| * ipa-param-manipulation.c: Include symtab-clones.h. |
| (ipa_param_body_adjustments::common_initialization): Update. |
| * ipa-prop.c: Include symtab-clones.h. |
| (adjust_agg_replacement_values): Update. |
| (ipcp_get_parm_bits): Update. |
| (ipcp_update_bits): Update. |
| (ipcp_update_vr): Update. |
| * ipa-sra.c: Include symtab-clones.h. |
| (process_isra_node_results): Update. |
| (disable_unavailable_parameters): Update. |
| * lto-cgraph.c: Include symtab-clone.h. |
| (output_cgraph_opt_summary_p): Update. |
| (output_node_opt_summary): Update. |
| (input_node_opt_summary): Update. |
| * symtab-clones.cc: New file. |
| * symtab-clones.h: New file. |
| * tree-inline.c (expand_call_inline): Update. |
| (update_clone_info): Update. |
| (tree_function_versioning): Update. |
| |
| 2020-10-31 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (modref_summary::dump): Dump writes_errno. |
| (parm_map_for_arg): Break out from ... |
| (merge_call_side_effects): ... here. |
| (get_access_for_fnspec): New function. |
| (process_fnspec): New function. |
| (analyze_call): Use it. |
| (analyze_stmt): Update. |
| (analyze_function): Initialize writes_errno. |
| (modref_summaries::duplicate): Duplicate writes_errno. |
| * ipa-modref.h (struct modref_summary): Add writes_errno. |
| * tree-ssa-alias.c (call_may_clobber_ref_p_1): Check errno. |
| |
| 2020-10-30 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (glibc_supports_ieee_128bit): New helper |
| function. |
| (rs6000_option_override_internal): Call it. |
| |
| 2020-10-30 Qing Zhao <qing.zhao@oracle.com> |
| H.J.Lu <hjl.tools@gmail.com> |
| |
| * common.opt: Add new option -fzero-call-used-regs |
| * config/i386/i386.c (zero_call_used_regno_p): New function. |
| (zero_call_used_regno_mode): Likewise. |
| (zero_all_vector_registers): Likewise. |
| (zero_all_st_registers): Likewise. |
| (zero_all_mm_registers): Likewise. |
| (ix86_zero_call_used_regs): Likewise. |
| (TARGET_ZERO_CALL_USED_REGS): Define. |
| * df-scan.c (df_epilogue_uses_p): New function. |
| (df_get_exit_block_use_set): Replace EPILOGUE_USES with |
| df_epilogue_uses_p. |
| * df.h (df_epilogue_uses_p): Declare. |
| * doc/extend.texi: Document the new zero_call_used_regs attribute. |
| * doc/invoke.texi: Document the new -fzero-call-used-regs option. |
| * doc/tm.texi: Regenerate. |
| * doc/tm.texi.in (TARGET_ZERO_CALL_USED_REGS): New hook. |
| * emit-rtl.h (struct rtl_data): New field must_be_zero_on_return. |
| * flag-types.h (namespace zero_regs_flags): New namespace. |
| * function.c (gen_call_used_regs_seq): New function. |
| (class pass_zero_call_used_regs): New class. |
| (pass_zero_call_used_regs::execute): New function. |
| (make_pass_zero_call_used_regs): New function. |
| * optabs.c (expand_asm_reg_clobber_mem_blockage): New function. |
| * optabs.h (expand_asm_reg_clobber_mem_blockage): Declare. |
| * opts.c (zero_call_used_regs_opts): New structure array |
| initialization. |
| (parse_zero_call_used_regs_options): New function. |
| (common_handle_option): Handle -fzero-call-used-regs. |
| * opts.h (zero_call_used_regs_opts): New structure array. |
| * passes.def: Add new pass pass_zero_call_used_regs. |
| * recog.c (valid_insn_p): New function. |
| * recog.h (valid_insn_p): Declare. |
| * resource.c (init_resource_info): Replace EPILOGUE_USES with |
| df_epilogue_uses_p. |
| * target.def (zero_call_used_regs): New hook. |
| * targhooks.c (default_zero_call_used_regs): New function. |
| * targhooks.h (default_zero_call_used_regs): Declare. |
| * tree-pass.h (make_pass_zero_call_used_regs): Declare. |
| |
| 2020-10-30 Vladimir N. Makarov <vmakarov@redhat.com> |
| |
| * lra.c (get_scratch_reg): New function. |
| (remove_scratches_1): Rename remove_insn_scratches. Use |
| ira_remove_insn_scratches and get_scratch_reg. |
| (remove_scratches): Do not |
| initialize scratches, scratch_bitmap, and scratch_operand_bitmap. |
| (lra): Call ira_restore_scratches instead of restore_scratches. |
| (struct sloc, sloc_t, scratches, scratch_bitmap) |
| (scratch_operand_bitmap, lra_former_scratch_p) |
| (lra_former_scratch_operand_p, lra_register_new_scratch_op) |
| (restore_scratches): Move them to ... |
| * ira.c: ... here. |
| (former_scratch_p, former_scratch_operand_p): Rename to |
| ira_former_scratch_p and ira_former_scratch_operand_p. |
| (contains_X_constraint_p): New function. |
| (register_new_scratch_op): Rename to ira_register_new_scratch_op. |
| Change it to work for IRA and LRA. |
| (restore_scratches): Rename to ira_restore_scratches. |
| (get_scratch_reg, ira_remove_insn_scratches): New functions. |
| (ira): Call ira_remove_scratches if we use LRA. |
| * ira.h (ira_former_scratch_p, ira_former_scratch_operand_p): New |
| prototypes. |
| (ira_register_new_scratch_op, ira_restore_scratches): New prototypes. |
| (ira_remove_insn_scratches): New prototype. |
| * lra-int.h (lra_former_scratch_p, lra_former_scratch_operand_p): |
| Remove prototypes. |
| (lra_register_new_scratch_op): Ditto. |
| * lra-constraints.c: Rename lra_former_scratch_p and |
| lra_former_scratch_p to ira_former_scratch_p and to |
| ira_former_scratch_p. |
| * lra-remat.c: Ditto. |
| * lra-spills.c: Rename lra_former_scratch_p to ira_former_scratch_p. |
| |
| 2020-10-30 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97556 |
| * builtins.c (access_ref::add_offset): Cap offset lower bound |
| to at most the the upper bound. |
| |
| 2020-10-30 Jan Hubicka <jh@suse.cz> |
| |
| PR pch/97593 |
| * cgraph.c (cgraph_node::create_thunk): Register thunk as early during |
| parsing. |
| * cgraphunit.c (analyze_functions): Call |
| thunk_info::process_early_thunks. |
| * symtab-thunks.cc (struct unprocessed_thunk): New struct. |
| (thunks): New static variable. |
| (thunk_info::register_early): New member function. |
| (thunk_info::process_early_thunks): New member function. |
| * symtab-thunks.h (thunk_info::register_early): Declare. |
| (thunk_info::process_early_thunks): Declare. |
| |
| 2020-10-30 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97623 |
| * tree-ssa-pre.c (insert): First do hoist insertion in |
| a backward walk. |
| |
| 2020-10-30 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97626 |
| * tree-vect-slp.c (vect_slp_analyze_node_operations): |
| Exchange the lvisited hash-set for a vector, roll back |
| recursive adds to visited when analysis failed. |
| (vect_slp_analyze_operations): Likewise. |
| |
| 2020-10-30 Zhiheng Xie <xiezhiheng@huawei.com> |
| Nannan Zheng <zhengnannan@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for conversion intrinsics. |
| |
| 2020-10-30 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97633 |
| * tree-vect-slp.c (): Update backedges in single-node cycles. |
| Optimize processing of externals. |
| |
| 2020-10-30 Alex Coplan <alex.coplan@arm.com> |
| |
| PR target/96998 |
| * combine.c (make_extraction): Also handle shifts written as |
| (mult x 2^n), avoid creating an extract rtx for these. |
| * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Delete. |
| (aarch64_classify_index): Remove extract-based address handling. |
| (aarch64_strip_extend): Likewise. |
| (aarch64_rtx_arith_op_extract_p): Likewise, remove now-unused parameter. |
| Update callers... |
| (aarch64_rtx_costs): ... here. |
| |
| 2020-10-30 Olivier Hainque <hainque@adacore.com> |
| |
| * config/rs6000/vxworks.h (TARGET_OS_CPP_BUILTINS): Also |
| builtin_define __ppc and __ppc__ for VxWorks 7. |
| |
| 2020-10-30 Olivier Hainque <hainque@adacore.com> |
| Douglas Rupp <rupp@adacore.com> |
| Pat Bernardi <bernardi@adacore.com> |
| |
| * config.gcc: Adjust the ix86/x86_64-wrs-vxworks filters |
| to apply to VxWorks 7 as well. |
| * config/i386/t-vxworks (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): |
| Remove the fPIC multilib and add one for the large code model |
| on x86_64. |
| * config/i386/vxworks.h: Separate sections for TARGET_VXWORKS7, |
| other variants and common bits. |
| (TARGET_OS_CPP_BUILTINS): Augment to support a range of CPU |
| families. Leverage VX_CPU_PREFIX. |
| (CC1_SPEC): Add definition. |
| (STACK_CHECK_PROTECT): Use conditional expression instead of |
| heavier to read conditioned macro definitions. |
| |
| 2020-10-30 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimplify.c (gimplify_scan_omp_clauses): Force |
| OMP_CLAUSE_ALLOCATE_ALLOCATOR into a temporary if it is non-NULL and |
| non-constant. |
| (gimplify_omp_for): Only put allocate on inner taskloop if lastprivate |
| for the same variable is going to be put there, and in that case |
| if the OMP_CLAUSE_ALLOCATE_ALLOCATOR is non-NULL non-constant, make |
| the allocator firstprivate on task. |
| |
| 2020-10-30 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): Allow |
| long double type to be changed for C/C++ if glibc 2.32 or newer. |
| (rs6000_invalid_binary_op): Update error messages about mixing IBM |
| long double and IEEE 128-bit. |
| |
| 2020-10-29 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-pre.c (compute_avail): Free operands consistently. |
| * tree-vect-loop.c (vectorizable_phi): Make sure all operand |
| defs vectors are released. |
| |
| 2020-10-29 Jan Hubicka <jh@suse.cz> |
| |
| * vec.h (vec<T, va_heap, vl_ptr>::copy): Pass mem stat info. |
| |
| 2020-10-29 Jan Hubicka <jh@suse.cz> |
| |
| * wide-int.h (trailing_wide_ints <N>): Turn len to array of structures |
| so it does not imply typeless storage. |
| (trailing_wide_ints <N>::operator): update |
| (trailing_wide_ints <N>::operator []): Update. |
| |
| 2020-10-29 Joseph Myers <joseph@codesourcery.com> |
| |
| * ginclude/stdbool.h [__STDC_VERSION__ > 201710L] (true, false): |
| Define with type _Bool. |
| |
| 2020-10-29 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97505 |
| * vr-values.c (vr_values::extract_range_basic): Enable |
| trap again for everything except UBSAN builtins. |
| |
| 2020-10-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-vectorizer.h (vect_transform_slp_perm_load): Take an |
| optional extra parameter. |
| * tree-vect-slp.c (vect_transform_slp_perm_load): Calculate |
| the number of loads as well as the number of permutes, taking |
| the counting loop from... |
| * tree-vect-stmts.c (vect_model_load_cost): ...here. Use the |
| value computed by vect_transform_slp_perm_load for ncopies. |
| |
| 2020-10-29 Martin Liska <mliska@suse.cz> |
| |
| PR lto/97508 |
| * langhooks.c (lhd_begin_section): Call get_section with |
| not_existing = true. |
| * output.h (get_section): Add new argument. |
| * varasm.c (get_section): Fail when NOT_EXISTING is true |
| and a section already exists. |
| * ipa-cp.c (ipcp_write_summary): Remove. |
| (ipcp_read_summary): Likewise. |
| * ipa-fnsummary.c (ipa_fn_summary_read): Always read jump |
| functions summary. |
| (ipa_fn_summary_write): Always stream it. |
| |
| 2020-10-29 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_bb_slp_scalar_cost): Pass |
| SLP_TREE_VECTYPE to record_stmt_cost. |
| |
| 2020-10-29 Martin Liska <mliska@suse.cz> |
| |
| * optc-gen.awk: Check that params start with -param=. |
| * params.opt: Fix ipa-jump-function-lookups. |
| |
| 2020-10-29 Alexandre Oliva <oliva@adacore.com> |
| |
| * tree-ssa-math-opts.c (sincos_stats): Add conv_removed. |
| (execute_cse_conv_1): New. |
| (execute_cse_sincos_1): Call it. Fix return within |
| FOR_EACH_IMM_USE_STMT. |
| (pass_cse_sincos::execute): Report conv_inserted. |
| |
| 2020-10-29 Xuepeng Guo <xuepeng.guo@intel.com> |
| Hongyu Wang <hongyu.wang@intel.com> |
| Hongtao Liu <hongtao.liu@intel.com> |
| |
| * common/config/i386/cpuinfo.h (get_available_features): |
| Detect KL, AESKLE and WIDEKL features. |
| * common/config/i386/i386-common.c |
| (OPTION_MASK_ISA_KL_SET): New. |
| (OPTION_MASK_ISA_WIDEKL_SET): Likewise. |
| (OPTION_MASK_ISA_KL_UNSET): Likewise. |
| (OPTION_MASK_ISA_WIDEKL_UNSET): Likewise. |
| (OPTION_MASK_ISA2_AVX2_UNSET): Likewise. |
| (OPTION_MASK_ISA2_AVX_UNSET): Likewise. |
| (OPTION_MASK_ISA2_SSE4_2_UNSET): Likewise. |
| (OPTION_MASK_ISA2_SSE4_1_UNSET): Likewise. |
| (OPTION_MASK_ISA2_SSE4_UNSET): Likewise. |
| (OPTION_MASK_ISA2_SSSE3_UNSET): Likewise. |
| (OPTION_MASK_ISA2_SSE3_UNSET): Likewise. |
| (OPTION_MASK_ISA2_SSE2_UNSET): Likewise. |
| (OPTION_MASK_ISA2_SSE_UNSET): Likewise. |
| (ix86_handle_option): Handle kl and widekl, add dependency chain |
| for KL and SSE2. |
| * common/config/i386/i386-cpuinfo.h (enum processor_features): |
| (FEATURE_KL, FEATURE_AESKLE, FEATURE_WIDEKL): New. |
| * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY |
| for KL, AESKLE and WIDEKL. |
| * config.gcc: Add keylockerintrin.h. |
| * doc/invoke.texi: Document new option -mkl and -mwidekl. |
| * doc/extend.texi: Document kl and widekl. |
| * config/i386/cpuid.h (bit_KL, bit_AESKLE, bit_WIDEKL): New. |
| * config/i386/i386-builtin-types.def ((UINT, UINT, V2DI, V2DI, PVOID), |
| (UINT, UINT, V2DI, PVOID), (VOID, V2DI, V2DI, V2DI, UINT), |
| (UINT8, PV2DI, V2DI, PCVOID), (UINT8, PV2DI, PCV2DI, PCVOID)): New |
| function types. |
| * config/i386/i386-builtin.def: Add |
| __builtin_ia32_loadiwkey, |
| __builtin_ia32_aesdec128kl_u8, |
| __builtin_ia32_aesdec256kl_u8, |
| __builtin_ia32_aesenc128kl_u8, |
| __builtin_ia32_aesenc256kl_u8, |
| __builtin_ia32_aesdecwide128kl_u8, |
| __builtin_ia32_aesdecwide256kl_u8, |
| __builtin_ia32_aesencwide128kl_u8, |
| __builtin_ia32_aesencwide256kl_u8, |
| __builtin_ia32_encodekey128_u32, |
| __builtin_ia32_encodekey256_u32. |
| * config/i386/i386-c.c (ix86_target_macros_internal): Handle |
| kl and widekl. |
| * config/i386/i386-options.c (isa2_opts): Add -mkl and -mwidekl. |
| (ix86_option_override_internal): Handle KL and WIDEKL. |
| (ix86_valid_target_attribute_inner_p): Add attribute for kl and widekl. |
| * config/i386/i386-expand.c |
| (ix86_expand_builtin): Expand Keylocker Builtins. |
| * config/i386/i386.h (TARGET_KL): New. |
| (TARGET_KL_P): Likewise. |
| (TARGET_WIDEKL): Likewise. |
| (TARGET_WIDEKL_P): Likewise. |
| (PTA_KL): Likewise. |
| (PTA_WIDEKL): Likewise. |
| (PTA_TIGERLAKE): Add PTA_KL, PTA_WIDEKL. |
| (PTA_ALDERLAKE): Likewise. |
| * config/i386/i386.opt: Add new option mkl and mwidekl. |
| * config/i386/keylockerintrin.h: New header file for Keylocker. |
| * config/i386/immintrin.h: Include keylockerintrin.h. |
| * config/i386/predicates.md (encodekey128_operation): New |
| predicate. |
| (encodekey256_operation): Likewise. |
| (aeswidekl_operation): Likewise. |
| * config/i386/sse.md (UNSPECV_LOADIWKEY): New. |
| (UNSPECV_AESDEC128KLU8): Likewise. |
| (UNSPECV_AESENC128KLU8): Likewise. |
| (UNSPECV_AESDEC256KLU8): Likewise. |
| (UNSPECV_AESENC256KLU8): Likewise. |
| (UNSPECV_AESDECWIDE128KLU8): Likewise. |
| (UNSPECV_AESENCWIDE128KLU8): Likewise. |
| (UNSPECV_AESDECWIDE256KLU8): Likewise. |
| (UNSPECV_AESENCWIDE256KLU8): Likewise. |
| (UNSPECV_ENCODEKEY128U32): Likewise. |
| (UNSPECV_ENCODEKEY256U32): Likewise. |
| (encodekey128u32): New expander. |
| (encodekey256u32): Likewise. |
| (aes<aeswideklvariant>u8): Likewise. |
| (loadiwkey): New insn pattern. |
| (*encodekey128u32): Likewise. |
| (*encodekey256u32): Likewise. |
| (aes<aesklvariant>u8): Likewise. |
| (*aes<aeswideklvariant>u8): Likewise. |
| |
| 2020-10-29 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_build_slp_tree_2): Allow splatting |
| not vectorizable loads. |
| (vect_build_slp_instance): Amend dumping with address. |
| (vect_slp_convert_to_external): Likewise. |
| |
| 2020-10-29 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97609 |
| * gimple-range-cache.cc (non_null_ref::process_name): Call |
| infer_nonnull_range directly instead of infer_value_range. |
| |
| 2020-10-29 David Malcolm <dmalcolm@redhat.com> |
| |
| * Makefile.in (ANALYZER_OBJS): Add analyzer/complexity.o. |
| |
| 2020-10-28 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/97573 |
| * doc/invoke.texi: Document -Wdeprecated-enum-enum-conversion |
| and -Wdeprecated-enum-float-conversion. -Wenum-conversion is |
| no longer C/ObjC only. |
| |
| 2020-10-28 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/97457 |
| * value-range.cc (irange::set): Don't decay POLY_INT_CST ranges |
| to integer ranges. |
| |
| 2020-10-28 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/vsx.md(xxgenpcvm_<mode>_internal): Remove TARGET_64BIT. |
| |
| 2020-10-28 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_slp_analyze_node_operations_1): Dump |
| when shared vectype update fails. |
| |
| 2020-10-28 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): For skipped |
| args just push NULLs and vect_uninitialized_def. |
| (vect_build_slp_tree_2): Allocate skip_args for all ops |
| and pass it down to vect_get_and_check_slp_defs. |
| |
| 2020-10-28 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97615 |
| * tree-vect-slp.c (vect_build_slp_tree_2): Do not build |
| an external from pattern defs. |
| |
| 2020-10-28 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_optimize_slp): Fix iteration over |
| all loads. |
| |
| 2020-10-28 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_build_slp_instance): Split the store |
| group at the failure boundary and also re-analyze a large enough |
| matching rest. |
| |
| 2020-10-28 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-data-refs.c (vect_slp_analyze_node_alignment): |
| Dump when vect_update_shared_vectype fails. |
| |
| 2020-10-28 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/arm_neon.h (__ST2_LANE_FUNC, __ST3_LANE_FUNC) |
| (__ST4_LANE_FUNC): Rename the macro generating the 'q' variants |
| into __ST2Q_LANE_FUNC, __ST2Q_LANE_FUNC, __ST2Q_LANE_FUNC so they |
| all can be undefed at the and of the file. |
| (vst2_lane_bf16, vst2q_lane_bf16, vst3_lane_bf16, vst3q_lane_bf16) |
| (vst4_lane_bf16, vst4q_lane_bf16): Add new intrinsics. |
| |
| 2020-10-28 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/arm_neon.h (__LD2_LANE_FUNC, __LD3_LANE_FUNC) |
| (__LD4_LANE_FUNC): Rename the macro generating the 'q' variants |
| into __LD2Q_LANE_FUNC, __LD2Q_LANE_FUNC, __LD2Q_LANE_FUNC so they |
| all can be undefed at the and of the file. |
| (vld2_lane_bf16, vld2q_lane_bf16, vld3_lane_bf16, vld3q_lane_bf16) |
| (vld4_lane_bf16, vld4q_lane_bf16): Add new intrinsics. |
| |
| 2020-10-28 Jakub Jelinek <jakub@redhat.com> |
| |
| * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_ALLOCATE. |
| * tree.h (OMP_CLAUSE_ALLOCATE_ALLOCATOR, |
| OMP_CLAUSE_ALLOCATE_COMBINED): Define. |
| * tree.c (omp_clause_num_ops, omp_clause_code_name): Add allocate |
| clause. |
| (walk_tree_1): Handle OMP_CLAUSE_ALLOCATE. |
| * tree-pretty-print.c (dump_omp_clause): Likewise. |
| * gimplify.c (gimplify_scan_omp_clauses, gimplify_adjust_omp_clauses, |
| gimplify_omp_for): Likewise. |
| * tree-nested.c (convert_nonlocal_omp_clauses, |
| convert_local_omp_clauses): Likewise. |
| * omp-low.c (scan_sharing_clauses): Likewise. |
| |
| 2020-10-28 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-offload.c (omp_declare_target_tgt_fn_r): Handle direct calls to |
| declare variant base functions. |
| |
| 2020-10-28 Jakub Jelinek <jakub@redhat.com> |
| |
| PR lto/96680 |
| * lto-streamer.h (omp_lto_output_declare_variant_alt, |
| omp_lto_input_declare_variant_alt): Declare variant. |
| * symtab.c (symtab_node::get_partitioning_class): Return |
| SYMBOL_DUPLICATE for declare_variant_alt nodes. |
| * passes.c (ipa_write_summaries): Add declare_variant_alt to |
| partition. |
| * lto-cgraph.c (output_refs): Call omp_lto_output_declare_variant_alt |
| on declare_variant_alt nodes. |
| (input_refs): Call omp_lto_input_declare_variant_alt on |
| declare_variant_alt nodes. |
| * lto-streamer-out.c (output_function): Don't call |
| collect_block_tree_leafs if DECL_INITIAL is error_mark_node. |
| (lto_output): Call output_function even for declare_variant_alt |
| nodes. |
| * omp-general.c (omp_lto_output_declare_variant_alt, |
| omp_lto_input_declare_variant_alt): New functions. |
| |
| 2020-10-28 Jakub Jelinek <jakub@redhat.com> |
| |
| * wide-int.cc (wi::set_bit_large): Call canonize unless setting |
| msb bit and clearing bits above it. |
| |
| 2020-10-28 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-gori.cc (gori_compute_cache::cache_stmt): Accumulate |
| return values and only set cache when everything returned true. |
| * gimple-range.cc (get_tree_range): Set the return range to UNDEFINED |
| when the range isn't supported. |
| (gimple_ranger::calc_stmt): Return varying if the type is supported, |
| even if the stmt processing failed. False otherwise. |
| (range_of_builtin_ubsan_call): Don't use gcc_assert. |
| (range_of_builtin_call): Ditto. |
| (gimple_ranger::range_of_cond_expr): Ditto. |
| (gimple_ranger::range_of_expr): Ditto |
| (gimple_ranger::range_on_entry): Ditto. |
| (gimple_ranger::range_on_exit): Ditto. |
| (gimple_ranger::range_on_edge): DItto. |
| (gimple_ranger::range_of_stmt): Don't use gcc_assert, and initialize |
| return value to UNDEFINED. |
| |
| 2020-10-27 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| PR rtl-optimization/97497 |
| * config/s390/s390.c (s390_hard_regno_call_part_clobbered): Do not |
| return true for r12 when -fpic is used. |
| |
| 2020-10-27 Tamar Christina <tamar.christina@arm.com> |
| |
| PR target/97535 |
| * config/aarch64/aarch64.c (aarch64_expand_cpymem): Use unsigned |
| arithmetic in check. |
| |
| 2020-10-27 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/arm_neon.h (vcopy_lane_bf16, vcopyq_lane_bf16) |
| (vcopyq_laneq_bf16, vcopy_laneq_bf16): New intrinsics. |
| |
| 2020-10-27 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks.h (VX_CPU_PREFIX): #define here. |
| * config/rs6000/vxworks.h: Remove #definition. |
| |
| 2020-10-27 Olivier Hainque <hainque@adacore.com> |
| |
| * config/rs6000/vxworks.h (CPP_SPEC): Fix macro definition |
| for -mcpu=e6500. |
| |
| 2020-10-27 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_build_slp_instance): Use ceil_log2 |
| to compute maximum group-size. |
| |
| 2020-10-27 Jan Hubicka <jh@suse.cz> |
| |
| PR ipa/97586 |
| * ipa-modref-tree.h (modref_tree::remap_params): New member function. |
| * ipa-modref.c (modref_summaries_lto::duplicate): Check that |
| optimization summaries are not duplicated. |
| (remap_arguments): Remove. |
| (modref_transform): Rename to ... |
| (update_signature): ... this one; handle also lto summary. |
| (pass_ipa_modref::execute): Update signatures here rather |
| than in transform hook. |
| |
| 2020-10-27 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_slp_bbs): Remove no-op |
| slp-max-insns-in-bb check. |
| (vect_slp_function): Dump when splitting the function. |
| Adjust the split condition for control altering stmts. |
| * params.opt (-param=slp-max-insns-in-bb): Remove. |
| * doc/invoke.texi (-param=slp-max-insns-in-bb): Likewise. |
| |
| 2020-10-27 Richard Biener <rguenther@suse.de> |
| |
| * gimple.h (gimple_expr_type): For PHIs return the type |
| of the result. |
| * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg): |
| Make sure edge order into copied loop headers line up with the |
| originals. |
| * tree-vect-loop.c (vect_transform_cycle_phi): Handle nested |
| loops with SLP. |
| (vectorizable_phi): New function. |
| (vectorizable_live_operation): For BB vectorization compute insert |
| location here. |
| * tree-vect-slp.c (vect_free_slp_tree): Deal with NULL |
| SLP_TREE_CHILDREN entries. |
| (vect_create_new_slp_node): Add overloads with pre-existing node |
| argument. |
| (vect_print_slp_graph): Likewise. |
| (vect_mark_slp_stmts): Likewise. |
| (vect_mark_slp_stmts_relevant): Likewise. |
| (vect_gather_slp_loads): Likewise. |
| (vect_optimize_slp): Likewise. |
| (vect_slp_analyze_node_operations): Likewise. |
| (vect_bb_slp_scalar_cost): Likewise. |
| (vect_remove_slp_scalar_calls): Likewise. |
| (vect_get_and_check_slp_defs): Handle PHIs. |
| (vect_build_slp_tree_1): Handle PHIs. |
| (vect_build_slp_tree_2): Continue SLP build, following PHI |
| arguments. Fix memory leak. |
| (vect_build_slp_tree): Put stub node into the hash-map so |
| we can discover cycles directly. |
| (vect_build_slp_instance): Set the backedge SLP def for |
| reduction chains. |
| (vect_analyze_slp_backedges): Remove. |
| (vect_analyze_slp): Do not call it. |
| (vect_slp_convert_to_external): Release SLP_TREE_LOAD_PERMUTATION. |
| (vect_slp_analyze_node_operations): Handle stray failed |
| backedge defs by failing. |
| (vect_slp_build_vertices): Adjust leaf condition. |
| (vect_bb_slp_mark_live_stmts): Handle PHIs, use visited |
| hash-set to handle cycles. |
| (vect_slp_analyze_operations): Adjust. |
| (vect_bb_partition_graph_r): Likewise. |
| (vect_slp_function): Adjust split condition to allow CFG |
| merges. |
| (vect_schedule_slp_instance): Rename to ... |
| (vect_schedule_slp_node): ... this. Move DFS walk to ... |
| (vect_schedule_scc): ... this new function. |
| (vect_schedule_slp): Call it. Remove ad-hoc vectorized |
| backedge fill code. |
| * tree-vect-stmts.c (vect_analyze_stmt): Call |
| vectorizable_phi. |
| (vect_transform_stmt): Likewise. |
| (vect_is_simple_use): Handle vect_backedge_def. |
| * tree-vectorizer.c (vec_info::new_stmt_vec_info): Only |
| set loop header PHIs to vect_unknown_def_type for loop |
| vectorization. |
| * tree-vectorizer.h (enum vect_def_type): Add vect_backedge_def. |
| (enum stmt_vec_info_type): Add phi_info_type. |
| (vectorizable_phi): Declare. |
| |
| 2020-10-27 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_build_slp_tree_2): When vectorizing |
| BBs splat uniform operands and stop SLP discovery. |
| |
| 2020-10-27 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_D_CRITSEC_SIZE): |
| Remove. |
| * config/glibc-d.c (glibc_d_critsec_size): Likewise. |
| (TARGET_D_CRITSEC_SIZE): Likewise. |
| * config/i386/linux-common.h (GNU_USER_TARGET_D_CRITSEC_SIZE): |
| Likewise. |
| * config/sol2-d.c (solaris_d_critsec_size): Likewise. |
| (TARGET_D_CRITSEC_SIZE): Likewise. |
| * doc/tm.texi.in (TARGET_D_CRITSEC_SIZE): Likewise. |
| * doc/tm.texi: Regenerate. |
| |
| 2020-10-27 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/97461 |
| * gcov-io.h (GCOV_PREALLOCATED_KVP): Pre-allocate 64 |
| static counters. |
| |
| 2020-10-27 Jan Hubicka <jh@suse.cz> |
| |
| * tree-ssa-alias.c (attr_fnspec::verify): Re-enabl checking. |
| |
| 2020-10-27 Jan Hubicka <jh@suse.cz> |
| |
| * builtin-attrs.def (STRERRNOC): New macro. |
| (STRERRNOP): New macro. |
| (ATTR_ERRNOCONST_NOTHROW_LEAF_LIST): New attr list. |
| (ATTR_ERRNOPURE_NOTHROW_LEAF_LIST): New attr list. |
| * builtins.def (ATTR_MATHFN_ERRNO): Use |
| ATTR_ERRNOCONST_NOTHROW_LEAF_LIST. |
| (ATTR_MATHFN_FPROUNDING_ERRNO): Use ATTR_ERRNOCONST_NOTHROW_LEAF_LIST |
| or ATTR_ERRNOPURE_NOTHROW_LEAF_LIST. |
| |
| 2020-10-27 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.c (opt_var_ref_t): New. |
| (riscv_ext_flag_table_t): New. |
| (riscv_ext_flag_table): New. |
| (riscv_parse_arch_string): Pass gcc_options* instead of |
| &opts->x_target_flags only, and using riscv_arch_option_table to |
| setup flags. |
| (riscv_handle_option): Update argument for riscv_parse_arch_string. |
| (riscv_expand_arch): Ditto. |
| (riscv_expand_arch_from_cpu): Ditto. |
| |
| 2020-10-27 Jan Hubicka <jh@suse.cz> |
| |
| * tree-ssa-ccp.c (evaluate_stmt): Use EAF_RETURN_ARG; do not handle |
| string buitings specially. |
| |
| 2020-10-27 Jan Hubicka <jh@suse.cz> |
| |
| * tree.c (set_call_expr_flags): Fix string for ECF_RET1. |
| (build_common_builtin_nodes): Do not set ECF_RET1 for memcpy, memmove, |
| and memset. They are handled by builtin_fnspec. |
| |
| 2020-10-27 Jan Hubicka <jh@suse.cz> |
| |
| * builtins.c (builtin_fnspec): Add bzero, memcmp, memcmp_eq, bcmp, |
| strncmp, strncmp_eq, strncasecmp, rindex, strlen, strlnen, strcasecmp, |
| strcspn, strspn, strcmp, strcmp_eq. |
| |
| 2020-10-27 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (slp_tree_pool): Declare. |
| (_slp_tree::operator new): Likewise. |
| (_slp_tree::operator delete): Likewise. |
| * tree-vectorizer.c (vectorize_loops): Allocate and free the |
| slp_tree_pool. |
| (pass_slp_vectorize::execute): Likewise. |
| * tree-vect-slp.c (slp_tree_pool): Define. |
| (_slp_tree::operator new): Likewise. |
| (_slp_tree::operator delete): Likewise. |
| |
| 2020-10-27 Martin Liska <mliska@suse.cz> |
| |
| * lto-wrapper.c (run_gcc): Do not use sub-make when jobserver is |
| not detected properly. |
| |
| 2020-10-27 Martin Liska <mliska@suse.cz> |
| |
| * symbol-summary.h (call_summary_base): Pass symtab hooks to |
| base and register (or unregister) hooks directly. |
| |
| 2020-10-27 Martin Liska <mliska@suse.cz> |
| |
| * symbol-summary.h (function_summary_base::unregister_hooks): |
| Call disable_insertion_hook and disable_duplication_hook. |
| (function_summary_base::symtab_insertion): New field. |
| (function_summary_base::symtab_removal): Likewise. |
| (function_summary_base::symtab_duplication): Likewise. |
| Register hooks in function_summary_base and directly register |
| (or unregister) hooks. |
| |
| 2020-10-26 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97567 |
| * gimple-range-gori.cc (gori_compute::logical_combine): Union the |
| ranges of operand1 and operand2, not intersect. |
| |
| 2020-10-26 Jan Hubicka <jh@suse.cz> |
| |
| * attr-fnspec.h: Update toplevel comment. |
| (attr_fnspec::attr_fnspec): New constructor. |
| (attr_fnspec::arg_read_p, |
| attr_fnspec::arg_written_p, |
| attr_fnspec::arg_access_size_given_by_arg_p, |
| attr_fnspec::arg_single_access_p |
| attr_fnspec::loads_known_p |
| attr_fnspec::stores_known_p, |
| attr_fnspec::clobbers_errno_p): New member functions. |
| (gimple_call_fnspec): Declare. |
| (builtin_fnspec): Declare. |
| * builtins.c: Include attr-fnspec.h |
| (builtin_fnspec): New function. |
| * builtins.def (BUILT_IN_MEMCPY): Do not specify RET1 fnspec. |
| (BUILT_IN_MEMMOVE): Do not specify RET1 fnspec. |
| (BUILT_IN_MEMSET): Do not specify RET1 fnspec. |
| (BUILT_IN_STRCAT): Do not specify RET1 fnspec. |
| (BUILT_IN_STRCPY): Do not specify RET1 fnspec. |
| (BUILT_IN_STRNCAT): Do not specify RET1 fnspec. |
| (BUILT_IN_STRNCPY): Do not specify RET1 fnspec. |
| (BUILT_IN_MEMCPY_CHK): Do not specify RET1 fnspec. |
| (BUILT_IN_MEMMOVE_CHK): Do not specify RET1 fnspec. |
| (BUILT_IN_MEMSET_CHK): Do not specify RET1 fnspec. |
| (BUILT_IN_STRCAT_CHK): Do not specify RET1 fnspec. |
| (BUILT_IN_STRCPY_CHK): Do not specify RET1 fnspec. |
| (BUILT_IN_STRNCAT_CHK): Do not specify RET1 fnspec. |
| (BUILT_IN_STRNCPY_CHK): Do not specify RET1 fnspec. |
| * gimple.c (gimple_call_fnspec): Return attr_fnspec. |
| (gimple_call_arg_flags): Update. |
| (gimple_call_return_flags): Update. |
| * tree-ssa-alias.c (check_fnspec): New function. |
| (ref_maybe_used_by_call_p_1): Use fnspec for builtin handling. |
| (call_may_clobber_ref_p_1): Likewise. |
| (attr_fnspec::verify): Update verifier. |
| * calls.c (decl_fnspec): New function. |
| (decl_return_flags): Use it. |
| |
| 2020-10-26 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97555 |
| * range-op.cc (range_tests): Test 1-bit signed invert. |
| * value-range.cc (subtract_one): Adjust comment. |
| (add_one): New. |
| (irange::invert): Call add_one. |
| |
| 2020-10-26 Jan Hubicka <jh@suse.cz> |
| |
| * cgraph.h (cgraph_node::optimize_for_size_p): Return |
| optimize_size_level. |
| (cgraph_node::optimize_for_size_p): Update. |
| * coretypes.h (enum optimize_size_level): New enum. |
| * predict.c (unlikely_executed_edge_p): Microoptimize. |
| (optimize_function_for_size_p): Return optimize_size_level. |
| (optimize_bb_for_size_p): Likewise. |
| (optimize_edge_for_size_p): Likewise. |
| (optimize_insn_for_size_p): Likewise. |
| (optimize_loop_nest_for_size_p): Likewise. |
| * predict.h (optimize_function_for_size_p): Update declaration. |
| (optimize_bb_for_size_p): Update declaration. |
| (optimize_edge_for_size_p): Update declaration. |
| (optimize_insn_for_size_p): Update declaration. |
| (optimize_loop_for_size_p): Update declaration. |
| (optimize_loop_nest_for_size_p): Update declaration. |
| |
| 2020-10-26 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (enum slp_instance_kind): New. |
| (vect_build_slp_instance): Split out from... |
| (vect_analyze_slp_instance): ... this. |
| |
| 2020-10-26 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range.cc (range_of_builtin_call): Initialize zerov to 0. |
| |
| 2020-10-26 Jan Hubicka <jh@suse.cz> |
| |
| PR ipa/97576 |
| * cgraphclones.c (cgraph_node::materialize_clone): Clear stmt |
| references. |
| * cgraphunit.c (mark_functions_to_output): Do not clear them here. |
| * ipa-inline-transform.c (inline_transform): Clear stmt references. |
| * symtab.c (symtab_node::clear_stmts_in_references): Make recursive |
| for clones. |
| * tree-ssa-structalias.c (ipa_pta_execute): Do not clear references. |
| |
| 2020-10-26 Zhiheng Xie <xiezhiheng@huawei.com> |
| Nannan Zheng <zhengnannan@huawei.com> |
| |
| * config/aarch64/aarch64-builtins.c: Add FLAG STORE. |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for store intrinsics. |
| |
| 2020-10-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR tree-optimization/97546 |
| * gimple-ssa-store-merging.c (find_bswap_or_nop): Return NULL if |
| type is not INTEGER_CST. |
| |
| 2020-10-26 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/97521 |
| * expr.c (const_scalar_mask_from_tree): Remove. |
| (expand_expr_real_1): Always VIEW_CONVERT integer mode |
| vector constants to an integer type. |
| * tree.c (build_truth_vector_type_for_mode): Use a single-bit |
| boolean component type for non-vector-mode mask_mode. |
| |
| 2020-10-26 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95458 |
| * config/i386/i386-expand.c (ix86_expand_cmpstrn_or_cmpmem): |
| Return false for -mno-inline-all-stringops. |
| |
| 2020-10-26 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95151 |
| * config/i386/i386-expand.c (ix86_expand_cmpstrn_or_cmpmem): New |
| function. |
| * config/i386/i386-protos.h (ix86_expand_cmpstrn_or_cmpmem): New |
| prototype. |
| * config/i386/i386.md (cmpmemsi): New pattern. |
| |
| 2020-10-26 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/vector.md ("vcond_mask_<mode><mode>"): New expander. |
| |
| 2020-10-26 Richard Biener <rguenther@suse.de> |
| |
| * sbitmap.c (sbitmap_vector_alloc): Use size_t for byte |
| quantities to avoid overflow. |
| |
| 2020-10-26 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97539 |
| * tree-vect-loop-manip.c (vect_do_peeling): Reset out-of-loop |
| debug uses before peeling. |
| |
| 2020-10-26 Jan Hubicka <hubicka@ucw.cz> |
| |
| * cgraph.h (struct cgraph_node): Make ipa_transforms_to_apply vl_ptr. |
| * ipa-inline-analysis.c (initialize_growth_caches): Disable insertion |
| and duplication hooks. |
| * ipa-inline-transform.c (clone_inlined_nodes): Clear |
| ipa_transforms_to_apply. |
| (save_inline_function_body): Disable insertion hoook for |
| ipa_saved_clone_sources. |
| * ipa-prop.c (ipcp_transformation_initialize): Disable insertion hook. |
| * ipa-prop.h (ipa_node_params_t): Disable insertion hook. |
| * ipa-reference.c (propagate): Disable insertion hoook. |
| * ipa-sra.c (ipa_sra_summarize_function): Move out of anonymous |
| namespace. |
| (ipa_sra_function_summaries::insert): New virtual function. |
| * passes.c (execute_one_pass): Do not add transforms to inline clones. |
| * symbol-summary.h (function_summary_base): Make insert and duplicate |
| hooks fail instead of silently producing empty summaries; add way to |
| disable duplication hooks |
| (call_summary_base): Likewise. |
| * tree-nested.c (nested_function_info::get_create): Disable insertion |
| hooks |
| (maybe_record_nested_function): Likewise. |
| |
| 2020-10-26 Xionghu Luo <luoxhu@linux.ibm.com> |
| |
| * cfg.c (debug_bb): New overloaded function. |
| (debug_bb_n): New overloaded function. |
| * cfg.h (debug_bb): New declaration. |
| (debug_bb_n): New declaration. |
| * print-rtl.c (debug_bb_slim): Call debug_bb with flags. |
| |
| 2020-10-24 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR bootstrap/97451 |
| * configure.ac (HAVE_AS_WORKING_DWARF_4_FLAG): Renamed to ... |
| (HAVE_AS_WORKING_DWARF_N_FLAG): This. Don't define if there is |
| an extra assembly input file in debug info. Replace success |
| with dwarf4_success in the 32-bit --gdwarf-4 check. |
| * dwarf2out.c (asm_outputs_debug_line_str): Check |
| HAVE_AS_WORKING_DWARF_N_FLAG instead of |
| HAVE_AS_WORKING_DWARF_4_FLAG. |
| * gcc.c (ASM_DEBUG_SPEC): Likewise. |
| (ASM_DEBUG_OPTION_SPEC): Likewise. |
| * config.in: Regenerated. |
| * configure: Likewise. |
| |
| 2020-10-24 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97538 |
| * calls.c (get_size_range): Handle undefined ranges. |
| |
| 2020-10-24 Martin Liska <mliska@suse.cz> |
| |
| * cgraph.c (cgraph_node::former_thunk_p): Move out of CHECKING_P |
| macro. |
| |
| 2020-10-24 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Limit |
| AND addressing to just lvx/stvx style addresses. |
| |
| 2020-10-24 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000.md (cstore<mode>4): Don't call |
| rs6000_emit_int_cmove for power10 when -mno-isel. |
| |
| 2020-10-23 Jan Hubicka <hubicka@ucw.cz> |
| |
| * Makefile.in: Add symtab-thunks.o |
| (GTFILES): Add symtab-thunks.h and symtab-thunks.cc; remove cgraphunit.c |
| * cgraph.c: Include symtab-thunks.h. |
| (cgraph_node::create_thunk): Update |
| (symbol_table::create_edge): Update |
| (cgraph_node::dump): Update |
| (cgraph_node::call_for_symbol_thunks_and_aliases): Update |
| (set_nothrow_flag_1): Update |
| (set_malloc_flag_1): Update |
| (set_const_flag_1): Update |
| (collect_callers_of_node_1): Update |
| (clone_of_p): Update |
| (cgraph_node::verify_node): Update |
| (cgraph_node::function_symbol): Update |
| (cgraph_c_finalize): Call thunk_info::release. |
| (cgraph_node::has_thunk_p): Update |
| (cgraph_node::former_thunk_p): Move here from cgraph.h; reimplement. |
| * cgraph.h (struct cgraph_thunk_info): Rename to symtab-thunks.h. |
| (cgraph_node): Remove thunk field; add thunk bitfield. |
| (cgraph_node::expand_thunk): Move to symtab-thunks.h |
| (symtab_thunks_cc_finalize): Declare. |
| (cgraph_node::has_gimple_body_p): Update. |
| (cgraph_node::former_thunk_p): Update. |
| * cgraphclones.c: Include symtab-thunks.h. |
| (duplicate_thunk_for_node): Update. |
| (cgraph_edge::redirect_callee_duplicating_thunks): Update. |
| (cgraph_node::expand_all_artificial_thunks): Update. |
| (cgraph_node::create_edge_including_clones): Update. |
| * cgraphunit.c: Include symtab-thunks.h. |
| (vtable_entry_type): Move to symtab-thunks.c. |
| (cgraph_node::analyze): Update. |
| (analyze_functions): Update. |
| (mark_functions_to_output): Update. |
| (thunk_adjust): Move to symtab-thunks.c |
| (cgraph_node::expand_thunk): Move to symtab-thunks.c |
| (cgraph_node::assemble_thunks_and_aliases): Update. |
| (output_in_order): Update. |
| (cgraphunit_c_finalize): Do not clear vtable_entry_type. |
| (cgraph_node::create_wrapper): Update. |
| * gengtype.c (open_base_files): Add symtab-thunks.h |
| * ipa-comdats.c (propagate_comdat_group): UPdate. |
| (ipa_comdats): Update. |
| * ipa-cp.c (determine_versionability): UPdate. |
| (gather_caller_stats): Update. |
| (count_callers): Update |
| (set_single_call_flag): Update |
| (initialize_node_lattices): Update |
| (call_passes_through_thunk_p): Update |
| (call_passes_through_thunk): Update |
| (propagate_constants_across_call): Update |
| (find_more_scalar_values_for_callers_subset): Update |
| (has_undead_caller_from_outside_scc_p): Update |
| * ipa-fnsummary.c (evaluate_properties_for_edge): Update. |
| (compute_fn_summary): Update. |
| (inline_analyze_function): Update. |
| * ipa-icf.c: Include symtab-thunks.h. |
| (sem_function::equals_wpa): Update. |
| (redirect_all_callers): Update. |
| (sem_function::init): Update. |
| (sem_function::parse): Update. |
| * ipa-inline-transform.c: Include symtab-thunks.h. |
| (inline_call): Update. |
| (save_inline_function_body): Update. |
| (preserve_function_body_p): Update. |
| * ipa-inline.c (inline_small_functions): Update. |
| * ipa-polymorphic-call.c: Include alloc-pool.h, symbol-summary.h, |
| symtab-thunks.h |
| (ipa_polymorphic_call_context::ipa_polymorphic_call_context): Update. |
| * ipa-pure-const.c: Include symtab-thunks.h. |
| (analyze_function): Update. |
| * ipa-sra.c (check_for_caller_issues): Update. |
| * ipa-utils.c (ipa_reverse_postorder): Update. |
| (ipa_merge_profiles): Update. |
| * ipa-visibility.c (non_local_p): Update. |
| (cgraph_node::local_p): Update. |
| (function_and_variable_visibility): Update. |
| * ipa.c (symbol_table::remove_unreachable_nodes): Update. |
| * lto-cgraph.c: Include alloc-pool.h, symbol-summary.h and |
| symtab-thunks.h |
| (lto_output_edge): Update. |
| (lto_output_node): Update. |
| (compute_ltrans_boundary): Update. |
| (output_symtab): Update. |
| (verify_node_partition): Update. |
| (input_overwrite_node): Update. |
| (input_node): Update. |
| * lto-streamer-in.c (fixup_call_stmt_edges): Update. |
| * symtab-thunks.cc: New file. |
| * symtab-thunks.h: New file. |
| * toplev.c (toplev::finalize): Call symtab_thunks_cc_finalize. |
| * trans-mem.c (ipa_tm_mayenterirr_function): Update. |
| (ipa_tm_execute): Update. |
| * tree-inline.c (expand_call_inline): Update. |
| * tree-nested.c (create_nesting_tree): Update. |
| (convert_all_function_calls): Update. |
| (gimplify_all_functions): Update. |
| * tree-profile.c (tree_profiling): Update. |
| * tree-ssa-structalias.c (associate_varinfo_to_alias): Update. |
| * tree.c (free_lang_data_in_decl): Update. |
| * value-prof.c (init_node_map): Update. |
| |
| 2020-10-23 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/91741 |
| * doc/invoke.texi: Document -Wsizeof-array-div. |
| |
| 2020-10-23 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97552 |
| * attribs.c (init_attr_rdwr_indices): Handle static VLA parameters. |
| |
| 2020-10-23 Douglas Rupp <rupp@adacore.com> |
| |
| * config/vxworks.h (VXWORKS_NET_LIBS_RTP): Use -lrtnet if |
| rtnetStackLib.h is available,fallback to -lnet otherwise. |
| |
| 2020-10-23 Douglas Rupp <rupp@adacore.com> |
| |
| * gcc.c (if-exists-then-else): New built-in spec function. |
| * doc/invoke.texi: Document it. |
| |
| 2020-10-23 Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com> |
| |
| * doc/extend.texi (PowerPC Built-in Functions): Replace |
| extraneous characters with whitespace. |
| |
| 2020-10-23 Martin Liska <mliska@suse.cz> |
| |
| * gcov.c (read_count_file): Never call gcov_sync with a negative |
| value. |
| |
| 2020-10-23 Jakub Jelinek <jakub@redhat.com> |
| |
| * Makefile.in (PLUGIN_HEADERS): Add gomp-constants.h and $(EXPR_H). |
| (s-header-vars): Accept not just spaces but also tabs between *_H name |
| and =. Handle common/config/ headers similarly to config. Don't |
| throw away everything from first ... to last / on the remaining |
| string, instead skip just ... to corresponding last / without |
| intervening spaces and tabs. |
| (install-plugin): Treat common/config headers like config headers. |
| * config/i386/t-i386 (TM_H): Add |
| $(srcdir)/common/config/i386/i386-cpuinfo.h. |
| |
| 2020-10-23 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/97164 |
| * stor-layout.c (layout_type): Also reject arrays where element size |
| is constant, but not a multiple of element alignment. |
| |
| 2020-10-23 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * tree-ssa-loop-ivopts.c (analyze_and_mark_doloop_use): Bail out if |
| the loop is subject to a pragma Unroll with no specific count. |
| |
| 2020-10-23 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/arm/mve.md (mve_vsubq<mode>): New entry for vsub instruction |
| using expression 'minus'. |
| (mve_vsubq_f<mode>): Use minus instead of VSUBQ_F unspec. |
| * config/arm/neon.md (sub<mode>3, sub<mode>3_fp16): Removed. |
| (neon_vsub<mode>): Use gen_sub<mode>3 instead of gen_sub<mode>3_fp16. |
| * config/arm/vec-common.md (sub<mode>3): Use the new mode macros |
| ARM_HAVE_<MODE>_ARITH. Use iterator VDQ instead of VALL. |
| |
| 2020-10-23 Martin Liska <mliska@suse.cz> |
| |
| PR lto/97524 |
| * lto-wrapper.c (make_exists): New function. |
| (run_gcc): Use it to check that make is present and working |
| for parallel execution. |
| |
| 2020-10-23 Richard Biener <rguenther@suse.de> |
| |
| Revert: |
| 2020-10-22 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/97521 |
| * expr.c (expand_expr_real_1): Be more careful when |
| expanding a VECTOR_BOOLEAN_TYPE_P VECTOR_CSTs. |
| |
| 2020-10-23 Kewen Lin <linkw@linux.ibm.com> |
| |
| * tree-vect-loop.c (vect_transform_loop): Remove the redundant |
| LOOP_VINFO_FULLY_MASKED_P check. |
| |
| 2020-10-23 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/arm/mve.md (mve_vsubq<mode>): New entry for vsub instruction |
| using expression 'minus'. |
| (mve_vsubq_f<mode>): Use minus instead of VSUBQ_F unspec. |
| * config/arm/neon.md (sub<mode>3, sub<mode>3_fp16): Removed. |
| (neon_vsub<mode>): Use gen_sub<mode>3 instead of gen_sub<mode>3_fp16. |
| * config/arm/vec-common.md (sub<mode>3): Use the new mode macros |
| ARM_HAVE_<MODE>_ARITH. Use iterator VDQ instead of VALL. |
| |
| 2020-10-22 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000.c (rs6000_emit_xxspltidp_v2df): Delete |
| debug printf. Remove trailing ".\n" from inform message. |
| Break long line. |
| |
| 2020-10-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-range-gori.cc (is_gimple_logical_p): Use types_compatible_p |
| for logical compatibility. |
| (logical_stmt_cache::cacheable_p): Ditto. |
| |
| 2020-10-22 Jan Hubicka <hubicka@ucw.cz> |
| |
| * cgraph.c (cgraph_node::get_untransformed_body): Perform lazy |
| clone materialization. |
| * cgraph.h (cgraph_node::materialize_clone): Declare. |
| (symbol_table::materialize_all_clones): Remove. |
| * cgraphclones.c (cgraph_materialize_clone): Turn to ... |
| (cgraph_node::materialize_clone): .. this one; move here |
| dumping from symbol_table::materialize_all_clones. |
| (symbol_table::materialize_all_clones): Remove. |
| * cgraphunit.c (mark_functions_to_output): Clear stmt references. |
| (cgraph_node::expand): Initialize bitmaps early; |
| do not call execute_all_ipa_transforms if there are no transforms. |
| * ipa-inline-transform.c (save_inline_function_body): Fix formating. |
| (inline_transform): Materialize all clones before function is modified. |
| * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): |
| Materialize clone if needed. |
| * ipa.c (class pass_materialize_all_clones): Remove. |
| (make_pass_materialize_all_clones): Remove. |
| * passes.c (execute_all_ipa_transforms): Materialize all clones. |
| * passes.def: Remove pass_materialize_all_clones. |
| * tree-pass.h (make_pass_materialize_all_clones): Remove. |
| * tree-ssa-structalias.c (ipa_pta_execute): Clear refs. |
| |
| 2020-10-22 Will Schmidt <will_schmidt@vnet.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_xl_zext, vec_xl_sext, vec_xst_trunc): |
| New defines. |
| * config/rs6000/rs6000-builtin.def (BU_P10V_OVERLOAD_X): New builtin |
| macro. |
| (BU_P10V_AV_X): New builtin macro. |
| (se_lxvrhbx, se_lxrbhx, se_lxvrwx, se_lxvrdx): Define internal names |
| for load and sign extend vector element. |
| (ze_lxvrbx, ze_lxvrhx, ze_lxvrwx, ze_lxvrdx): Define internal names |
| for load and zero extend vector element. |
| (tr_stxvrbx, tr_stxvrhx, tr_stxvrwx, tr_stxvrdx): Define internal names |
| for truncate and store vector element. |
| (se_lxvrx, ze_lxvrx, tr_stxvrx): Define internal names for overloaded |
| load/store rightmost element. |
| * config/rs6000/rs6000-call.c (altivec_builtin_types): Define the |
| internal monomorphs P10_BUILTIN_SE_LXVRBX, P10_BUILTIN_SE_LXVRHX, |
| P10_BUILTIN_SE_LXVRWX, P10_BUILTIN_SE_LXVRDX, |
| P10_BUILTIN_ZE_LXVRBX, P10_BUILTIN_ZE_LXVRHX, P10_BUILTIN_ZE_LXVRWX, |
| P10_BUILTIN_ZE_LXVRDX, |
| P10_BUILTIN_TR_STXVRBX, P10_BUILTIN_TR_STXVRHX, P10_BUILTIN_TR_STXVRWX, |
| P10_BUILTIN_TR_STXVRDX, |
| (altivec_expand_lxvr_builtin): New expansion for load element builtins. |
| (altivec_expand_stv_builtin): Update to for truncate and store builtins. |
| (altivec_expand_builtin): Add clases for load/store rightmost builtins. |
| (altivec_init_builtins): Add def_builtin entries for |
| __builtin_altivec_se_lxvrbx, __builtin_altivec_se_lxvrhx, |
| __builtin_altivec_se_lxvrwx, __builtin_altivec_se_lxvrdx, |
| __builtin_altivec_ze_lxvrbx, __builtin_altivec_ze_lxvrhx, |
| __builtin_altivec_ze_lxvrwx, __builtin_altivec_ze_lxvrdx, |
| __builtin_altivec_tr_stxvrbx, __builtin_altivec_tr_stxvrhx, |
| __builtin_altivec_tr_stxvrwx, __builtin_altivec_tr_stxvrdx, |
| __builtin_vec_se_lxvrx, __builtin_vec_ze_lxvrx, __builtin_vec_tr_stxvrx. |
| * config/rs6000/vsx.md (vsx_lxvr<wd>x, vsx_stxvr<wd>x, vsx_stxvr<wd>x): |
| New define_insn entries. |
| * doc/extend.texi: Add documentation for vsx_xl_sext, vsx_xl_zext, |
| and vec_xst_trunc. |
| |
| 2020-10-22 Will Schmidt <will_schmidt@vnet.ibm.com> |
| |
| * config/rs6000/vsx.md (enum unspec): Add |
| UNSPEC_EXTENDDITI2 and UNSPEC_MTVSRD_DITI_W1 entries. |
| (mtvsrdd_diti_w1, extendditi2_vector): New define_insns. |
| (extendditi2): New define_expand. |
| |
| 2020-10-22 Alexandre Oliva <oliva@adacore.com> |
| |
| * config/i386/mingw-w64.h (TARGET_LIBC_HAS_FUNCTION): Enable |
| sincos optimization. |
| |
| 2020-10-22 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/vsx.md (vec_cntmb_<mode>, vec_extract_<mode>), |
| (vec_expand_<mode>): Replace <VSX_MM_SUFFIX> with <wd>. |
| |
| 2020-10-22 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_analyze_slp_instance): Refactor so |
| computing a vector type early is not needed, for store group |
| splitting compute a new vector type based on the desired |
| group size. |
| |
| 2020-10-22 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/97521 |
| * expr.c (expand_expr_real_1): Be more careful when |
| expanding a VECTOR_BOOLEAN_TYPE_P VECTOR_CSTs. |
| |
| 2020-10-22 David Malcolm <dmalcolm@redhat.com> |
| |
| * ipa-modref-tree.c (selftest::test_insert_search_collapse): Fix |
| leak. |
| (selftest::test_merge): Fix leaks. |
| |
| 2020-10-22 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| PR target/97502 |
| * config/s390/vector.md ("vec_cmp<VI_HW:mode><VI_HW:mode>") |
| ("vec_cmpu<VI_HW:mode><VI_HW:mode>"): New expanders. |
| |
| 2020-10-22 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| PR rtl-optimization/97439 |
| * dfp.c (decimal_real_maxval): Set the sign flag in the |
| generated number. |
| |
| 2020-10-22 Martin Liska <mliska@suse.cz> |
| |
| PR c/94722 |
| * cfgexpand.c (stack_protect_decl_phase): |
| Guard with lookup_attribute("no_stack_protector") at |
| various places. |
| (expand_used_vars): Likewise here. |
| * doc/extend.texi: Document no_stack_protector attribute. |
| |
| 2020-10-22 Martin Liska <mliska@suse.cz> |
| |
| * cfgexpand.c: Move the enum to ... |
| * coretypes.h (enum stack_protector): ... here. |
| * function.c (assign_parm_adjust_stack_rtl): Use the stack_protector |
| enum. |
| |
| 2020-10-22 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/multilib-generator: Add TODO, import itertools |
| and functools.reduce. |
| Handle expantion operator. |
| (LONG_EXT_PREFIXES): New. |
| (arch_canonicalize): Update comment and improve python3 |
| debuggability/compatibility. |
| (add_underline_prefix): New. |
| (_expand_combination): Ditto. |
| (unique): Ditto. |
| (expand_combination): Ditto. |
| |
| 2020-10-22 Jakub Jelinek <jakub@redhat.com> |
| |
| * tree-ssa-phiopt.c (cond_removal_in_popcount_clz_ctz_pattern): |
| For CLZ and CTZ tests, use type temporary instead of mode. |
| |
| 2020-10-22 Jakub Jelinek <jakub@redhat.com> |
| |
| * config.gcc (x86_archs): Add samuel-2, nehemiah, c7 and esther. |
| (x86_64_archs): Add eden-x2, nano, nano-1000, nano-2000, nano-3000, |
| nano-x2, eden-x4, nano-x4, x86-64-v2, x86-64-v3 and x86-64-v4. |
| (i[34567]86-*-* | x86_64-*-*): Only allow x86-64-v* as argument |
| to --with-arch_64=. |
| |
| 2020-10-22 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-pure-const.c (funct_state_summary_t::insert): Free stale |
| summaries. |
| |
| 2020-10-22 Jan Hubicka <hubicka@ucw.cz> |
| |
| * cgraph.c: Include tree-nested.h |
| (cgraph_node::create): Call maybe_record_nested_function. |
| (cgraph_node::remove): Do not remove function from nested function |
| infos. |
| (cgraph_node::dump): Update. |
| (cgraph_node::unnest): Move to tree-nested.c |
| (cgraph_node::verify_node): Update. |
| (cgraph_c_finalize): Call nested_function_info::release. |
| * cgraph.h (struct symtab_node): Remove nested function info. |
| * cgraphclones.c (cgraph_node::create_clone): Do not clone nested |
| function info. |
| * cgraphunit.c (cgraph_node::analyze): Update. |
| (cgraph_node::expand): Do not worry about nested functions; they are |
| lowered. |
| (symbol_table::finalize_compilation_unit): Call |
| nested_function_info::release. |
| * gimplify.c: Include tree-nested.h |
| (unshare_body): Update. |
| (unvisit_body): Update. |
| * omp-offload.c (omp_discover_implicit_declare_target): Update. |
| * tree-nested.c: Include alloc-pool.h, tree-nested.h, symbol-summary.h |
| (nested_function_sum): New static variable. |
| (nested_function_info::get): New member function. |
| (nested_function_info::get_create): New member function. |
| (unnest_function): New function. |
| (nested_function_info::~nested_function_info): New member function. |
| (nested_function_info::release): New function. |
| (maybe_record_nested_function): New function. |
| (lookup_element_for_decl): Update. |
| (check_for_nested_with_variably_modified): Update. |
| (create_nesting_tree): Update. |
| (unnest_nesting_tree_1): Update. |
| (gimplify_all_functions): Update. |
| (lower_nested_functions): Update. |
| * tree-nested.h (class nested_function_info): New class. |
| (maybe_record_nested_function): Declare. |
| (unnest_function): Declare. |
| (first_nested_function): New inline function. |
| (next_nested_function): New inline function. |
| (nested_function_origin): New inline function. |
| |
| 2020-10-22 liuhongt <hongtao.liu@intel.com> |
| |
| PR rtl-optimization/97249 |
| * simplify-rtx.c (simplify_binary_operation_1): Simplify |
| vec_select of a subreg of X to a vec_select of X. |
| |
| 2020-10-22 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/87767 |
| * config/i386/constraints.md ("Br"): New special memory |
| constraint. |
| * config/i386/i386-expand.c (ix86_binary_operator_ok): Both |
| source operand cannot be in memory or bcst_memory_operand. |
| * config/i386/i386.c (ix86_print_operand): Print bcst_mem_operand. |
| * config/i386/i386.h (VALID_BCST_MODE_P): New. |
| * config/i386/predicates.md (bcst_mem_operand): New predicate |
| for AVX512 embedding broadcast memory operand. |
| (bcst_vector_operand): New predicate, vector_operand or |
| bcst_mem_operand. |
| * config/i386/sse.md |
| (*<plusminus_insn><mode>3<mask_name><round_name>): Extend |
| predicate and constraints to handle bcst_mem_operand. |
| (*mul<mode>3<mask_name><round_name>): Ditto. |
| (<sse>_div<mode>3<mask_name><round_name>): Ditto. |
| (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>): |
| Ditto. |
| (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>): |
| Ditto. |
| (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>): |
| Ditto. |
| (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>): |
| Ditto. |
| (*<plusminus_insn><mode>3): Ditto. |
| (avx512dq_mul<mode>3<mask_name>): Ditto. |
| (*<sse4_1_avx2>_mul<mode>3<mask_name>): Ditto. |
| (*andnot<mode>3): Ditto. |
| (<mask_codefor><code><mode>3<mask_name>): Ditto. |
| (*sub<mode>3<mask_name>_bcst): Removed. |
| (*add<mode>3<mask_name>_bcst): Ditto. |
| (*mul<mode>3<mask_name>_bcst): Ditto. |
| (*<avx512>_div<mode>3<mask_name>_bcst): Ditto. |
| (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1): |
| Ditto. |
| (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2): |
| Ditto. |
| (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3): |
| Ditto. |
| (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1): |
| Ditto. |
| (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_2): |
| Ditto. |
| (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_3): |
| Ditto. |
| (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1): |
| Ditto. |
| (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_2): |
| Ditto. |
| (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_3): |
| Ditto. |
| (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): |
| Ditto. |
| (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_2): |
| Ditto. |
| (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_3): |
| Ditto. |
| (*sub<mode>3_bcst): Ditto. |
| (*add<mode>3_bcst): Ditto. |
| (*avx512dq_mul<mode>3<mask_name>_bcst): Ditto. |
| (*avx512f_mul<mode>3<mask_name>_bcst): Ditto. |
| (*andnot<mode>3_bcst): Ditto. |
| (*<code><mode>3_bcst): Ditto. |
| * config/i386/subst.md (bcst_round_constraint): New subst |
| attribute. |
| (bcst_round_nimm_predicate): Ditto. |
| (bcst_mask_prefix3): Ditto. |
| (bcst_mask_prefix4): Ditto. |
| |
| 2020-10-22 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/87767 |
| * ira-costs.c (record_operand_costs): Extract memory operand |
| from recog_data.operand[i] for record_address_regs. |
| (record_reg_classes): Extract memory operand from OP for |
| conditional judgement MEM_P. |
| * ira.c (ira_setup_alts): Ditto. |
| * lra-constraints.c (extract_mem_from_operand): New function. |
| (satisfies_memory_constraint_p): Extract memory operand from |
| OP for decompose_mem_address, return false when there's no |
| memory operand inside OP. |
| (process_alt_operands): Remove MEM_P (op) since it would be |
| judged in satisfies_memory_constraint_p. |
| * recog.c (asm_operand_ok): Extract memory operand from OP for |
| judgement of memory_operand (OP, VOIDmode). |
| (constrain_operands): Don't unwrapper unary operator when |
| there's memory operand inside. |
| * rtl.h (extract_mem_from_operand): New decl. |
| |
| 2020-10-22 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/arm/mve.md (mve_vmaxq_<supf><mode>): Replace with ... |
| (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>): ... these new insns to |
| use smax/umax instead of VMAXQ. |
| (mve_vminq_<supf><mode>): Replace with ... |
| (mve_vminq_s<mode>, mve_vminq_u<mode>): ... these new insns to |
| use smin/umin instead of VMINQ. |
| (mve_vmaxnmq_f<mode>): Use smax instead of VMAXNMQ_F. |
| (mve_vminnmq_f<mode>): Use smin instead of VMINNMQ_F. |
| * config/arm/vec-common.md (smin<mode>3): Use the new mode macros |
| ARM_HAVE_<MODE>_ARITH. |
| (umin<mode>3, smax<mode>3, umax<mode>3): Likewise. |
| |
| 2020-10-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97520 |
| * gimple-range.cc (range_of_non_trivial_assignment): Handle x = &a |
| by returning a non-zero range. |
| |
| 2020-10-22 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/arm/mve.md (mve_vmulq<mode>): New entry for vmul instruction |
| using expression 'mult'. |
| (mve_vmulq_f<mode>): Use mult instead of VMULQ_F. |
| * config/arm/neon.md (mul<mode>3): Removed. |
| * config/arm/vec-common.md (mul<mode>3): Use the new mode macros |
| ARM_HAVE_<MODE>_ARITH. Use mode iterator VDQWH instead of VALLW. |
| |
| 2020-10-22 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97515 |
| * value-query.cc (range_query::value_of_expr): If the result is |
| UNDEFINED, check to see if the global value is a constant. |
| (range_query::value_on_edge): Ditto. |
| |
| 2020-10-21 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/97445 |
| * ipa-inline.c (inline_insns_single): Add hint2 parameter. |
| (inline_insns_auto): Add hint2 parameter. |
| (can_inline_edge_by_limits_p): Update. |
| (want_inline_small_function_p): Update. |
| (wrapper_heuristics_may_apply): Update. |
| |
| 2020-10-21 Richard Biener <rguenther@suse.de> |
| Andrew MacLeod <amacleod@redhat.com> |
| Martin Liska <mliska@suse.cz> |
| |
| PR target/97360 |
| * config/rs6000/rs6000-call.c (rs6000_init_builtins): Remove call to |
| build_distinct_type_copy(). |
| |
| 2020-10-21 Jan Hubicka <jh@suse.cz> |
| |
| PR ipa/97445 |
| * ipa-fnsummary.c (ipa_dump_hints): Add INLINE_HINT_builtin_constant_p. |
| (ipa_fn_summary::~ipa_fn_summary): Free builtin_constant_p_parms. |
| (ipa_fn_summary_t::duplicate): Duplicate builtin_constant_p_parms. |
| (ipa_dump_fn_summary): Dump builtin_constant_p_parms. |
| (add_builtin_constant_p_parm): New function |
| (set_cond_stmt_execution_predicate): Update builtin_constant_p_parms. |
| (ipa_call_context::estimate_size_and_time): Set |
| INLINE_HINT_builtin_constant_p.. |
| (ipa_merge_fn_summary_after_inlining): Merge builtin_constant_p_parms. |
| (inline_read_section): Read builtin_constant_p_parms. |
| (ipa_fn_summary_write): Write builtin_constant_p_parms. |
| * ipa-fnsummary.h (enum ipa_hints_vals): Add |
| INLINE_HINT_builtin_constant_p. |
| * ipa-inline.c (want_inline_small_function_p): Use |
| INLINE_HINT_builtin_constant_p. |
| (edge_badness): Use INLINE_HINT_builtin_constant_p. |
| |
| 2020-10-21 Douglas Rupp <rupp@adacore.com> |
| |
| * config/vx-common.h (LINK_SPEC, LIB_SPEC): Remove #undef. |
| |
| 2020-10-21 Douglas Rupp <rupp@adacore.com> |
| Olivier Hainque <hainque@adacore.com> |
| |
| * config.gcc (powerpc*-wrs-vxworks7r*): New case. |
| * config/rs6000/vxworks.h: Rework to handle VxWorks7. |
| Refactor as common bits + vx6 vs vx7 ones. For the |
| latter, rely essentially on the Linux configuration |
| and adjust CPU to _VX_CPU in CPP_SPEC. Add a case |
| for e6500. Use SUB3TARGET_OVERRIDE_OPTIONS for specifics |
| to preserve the Linux SUBSUBTARGET_OVERRIDE_OPTIONS |
| for vx7. |
| |
| 2020-10-21 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97500 |
| * tree-vect-slp.c (vect_analyze_slp_backedges): Do not |
| fill backedges for inductions. |
| |
| 2020-10-21 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/97506 |
| * config/i386/i386-expand.c (ix86_expand_sse_movcc): Move |
| op_true to dest directly when op_true equals op_false. |
| |
| 2020-10-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/97503 |
| * tree-ssa-phiopt.c: Include internal-fn.h. |
| (cond_removal_in_popcount_pattern): Rename to ... |
| (cond_removal_in_popcount_clz_ctz_pattern): ... this. Handle not just |
| popcount, but also clz and ctz if it has C?Z_DEFINED_VALUE_AT_ZERO 2. |
| |
| 2020-10-21 Richard Biener <rguenther@suse.de> |
| |
| * cfg.c (htab_bb_copy_original_entry): Remove. |
| (bb_copy_hasher): Likewise. |
| (bb_original, bb_copy, loop_copy): Use |
| hash_map<int_hash<int, -1, -2>, int>. |
| (original_copy_bb_pool): Remove. |
| (initialize_original_copy_tables): Adjust. |
| (reset_original_copy_tables): Likewise. |
| (free_original_copy_tables): Likewise. |
| (original_copy_tables_initialized_p): Likewise. |
| (copy_original_table_clear): Simplify. |
| (copy_original_table_set): Likewise. |
| (get_bb_original): Likewise. |
| (get_bb_copy): Likewise. |
| (get_loop_copy): Likewise. |
| |
| 2020-10-21 Richard Biener <rguenther@suse.de> |
| |
| * cfghooks.c (copy_bbs): Split out loop computing new_edges. |
| |
| 2020-10-21 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-range.cc (gimple_ranger::range_of_ssa_name_with_loop_info): |
| Remove TREE_OVERFLOW special case. |
| * vr-values.c (bounds_of_var_in_loop): Adjust overflow for |
| invariants. |
| |
| 2020-10-21 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.h: Remove simplify_cond_using_ranges_2. |
| (range_fits_type_p): New. |
| * vr-values.c (range_fits_type_p): Remove static qualifier. |
| (vrp_simplify_cond_using_ranges): Move... |
| * tree-vrp.c (vrp_simplify_cond_using_ranges): ...to here. |
| |
| 2020-10-20 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97505 |
| * vr-values.c (vr_values::extract_range_basic): Trap if |
| vr_values version disagrees with range_of_builtin_call. |
| |
| 2020-10-20 David Edelsohn <dje.gcc@gmail.com> |
| |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Don't implcitly enable Altivec ABI if set on the command line. |
| |
| 2020-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| * calls.c (get_size_range): Adjust to work with ranger. |
| * calls.h (get_size_range): Add ranger argument to prototype. |
| * gimple-ssa-warn-restrict.c (class wrestrict_dom_walker): Remove. |
| (check_call): Pull out of wrestrict_dom_walker into a |
| static function. |
| (wrestrict_dom_walker::before_dom_children): Rename to... |
| (wrestrict_walk): ...this. |
| (pass_wrestrict::execute): Instantiate ranger. |
| (class builtin_memref): Add stmt and query fields. |
| (builtin_access::builtin_access): Add range_query field. |
| (builtin_memref::builtin_memref): Same. |
| (builtin_memref::extend_offset_range): Same. |
| (builtin_access::builtin_access): Make work with ranger. |
| (wrestrict_dom_walker::check_call): Pull out into... |
| (check_call): ...here. |
| (check_bounds_or_overlap): Add range_query argument. |
| * gimple-ssa-warn-restrict.h (check_bounds_or_overlap): |
| Add range_query and gimple stmt arguments. |
| |
| 2020-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-ssa-warn-alloca.c (enum alloca_type): Remove |
| ALLOCA_BOUND_UNKNOWN and ALLOCA_CAST_FROM_SIGNED. |
| (warn_limit_specified_p): New. |
| (alloca_call_type_by_arg): Remove. |
| (cast_from_signed_p): Remove. |
| (is_max): Remove. |
| (alloca_call_type): Remove heuristics and replace with call into |
| ranger. |
| (pass_walloca::execute): Instantiate ranger. |
| |
| 2020-10-20 Tobias Burnus <tobias@codesourcery.com> |
| |
| * lto-wrapper.c (run_gcc): Use proper variable for |
| %u.ltrans_args dump suffix. |
| |
| 2020-10-20 Zhiheng Xie <xiezhiheng@huawei.com> |
| Nannan Zheng <zhengnannan@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for get/set reg intrinsics. |
| |
| 2020-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-range.cc (gimple_ranger::range_of_builtin_ubsan_call): |
| Make externally visble... |
| (range_of_builtin_ubsan_call): ...here. Add range_query argument. |
| (gimple_ranger::range_of_builtin_call): Make externally visible... |
| (range_of_builtin_call): ...here. Add range_query argument. |
| * gimple-range.h (range_of_builtin_call): Move out from class and |
| make externally visible. |
| * vr-values.c (vr_values::extract_range_basic): Abstract out |
| builtin handling to... |
| (vr_values::range_of_expr): Handle non SSAs. |
| (vr_values::extract_range_builtin): ...here. |
| * vr-values.h (class vr_values): Add extract_range_builtin. |
| (range_of_expr): Rename NAME to EXPR. |
| |
| 2020-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97501 |
| * gimple-range.cc (gimple_ranger::range_of_ssa_name_with_loop_info): |
| Saturate overflows returned from SCEV. |
| |
| 2020-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::operator=): Split up call to |
| copy_legacy_range into... |
| (irange::copy_to_legacy): ...this. |
| (irange::copy_legacy_to_multi_range): ...and this. |
| (irange::copy_legacy_range): Remove. |
| * value-range.h: Remove copoy_legacy_range. |
| Add copy_legacy_to_multi_range and copy_to_legacy. |
| |
| 2020-10-20 Tobias Burnus <tobias@codesourcery.com> |
| |
| * doc/invoke.texi (NVPTX options): Use @item not @itemx. |
| |
| 2020-10-20 Richard Biener <rguenther@suse.de> |
| |
| * tree-cfg.c (reinstall_phi_args): Remove. |
| (gimple_split_edge): Remove PHIs around the edge redirection |
| to avoid touching them at all. |
| |
| 2020-10-20 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-loop.c (vectorizable_reduction): Use the correct |
| loops latch edge for the PHI arg lookup. |
| |
| 2020-10-20 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.md (andneghi3): Allow general operand for |
| op1 and update output assembler template. |
| |
| 2020-10-20 Tobias Burnus <tobias@codesourcery.com> |
| |
| * collect-utils.c (collect_execute, fork_execute): Add at-file suffix |
| argument. |
| * collect-utils.h (collect_execute, fork_execute): Update prototype. |
| * collect2.c (maybe_run_lto_and_relink, do_link, main, do_dsymutil): |
| Update calls by passing NULL. |
| * config/i386/intelmic-mkoffload.c (compile_for_target, |
| generate_host_descr_file, prepare_target_image, main): Likewise. |
| * config/gcn/mkoffload.c (compile_native, main): Pass at-file suffix. |
| * config/nvptx/mkoffload.c (compile_native, main): Likewise. |
| * lto-wrapper.c (compile_offload_image): Likewise. |
| |
| 2020-10-20 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op.cc (operator_rshift::op1_range): Special case |
| shifting by zero. |
| |
| 2020-10-20 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97496 |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): Guard extern |
| promotion with not in pattern. |
| |
| 2020-10-20 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| * config/s390/s390.c (s390_expand_vec_strlen): Add alignment |
| for memory access inside loop. |
| |
| 2020-10-19 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97360 |
| * gimple-range.h (range_compatible_p): New. |
| * gimple-range-gori.cc (is_gimple_logical_p): Use range_compatible_p. |
| (range_is_either_true_or_false): Ditto. |
| (gori_compute::outgoing_edge_range_p): Cast result to the correct |
| type if necessary. |
| (logical_stmt_cache::cacheable_p): Use range_compatible_p. |
| * gimple-range.cc (gimple_ranger::calc_stmt): Check range_compatible_p |
| before casting the range. |
| (gimple_ranger::range_on_exit): Use range_compatible_p. |
| (gimple_ranger::range_on_edge): Ditto. |
| |
| 2020-10-19 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/97456 |
| * tree-complex.c (set_component_ssa_name): Do not replace ignored decl |
| default definitions with new component vars. Reorder if conditions. |
| |
| 2020-10-19 David Edelsohn <dje.gcc@gmail.com> |
| |
| * config/rs6000/vsx.md (vextract_fp_from_shorth): Fix vals_be. |
| (vextract_fp_from_shortl) Same. |
| |
| 2020-10-19 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97488 |
| * range-op.cc (operator_lshift::op1_range): Handle large right shifts. |
| |
| 2020-10-19 Martin Liska <mliska@suse.cz> |
| |
| * ipa-modref.c (compute_parm_map): Clear vector. |
| |
| 2020-10-19 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97486 |
| * tree-vect-slp.c (vect_slp_function): Split after stmts |
| ending a BB. |
| |
| 2020-10-19 Jonathan Wakely <jwakely@redhat.com> |
| |
| * doc/invoke.texi (OPptimize Options): Add missing closing |
| parenthesis. |
| |
| 2020-10-19 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97467 |
| * range-op.cc (operator_lshift::op1_range): Handle shifts by 0. |
| |
| 2020-10-19 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97466 |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove |
| spurious assert, re-indent. |
| |
| 2020-10-19 Li Jia He <helijia@gcc.gnu.org> |
| |
| PR tree-optimization/66552 |
| * match.pd (x << (n % C) -> x << (n & C-1)): New simplification. |
| |
| 2020-10-19 Richard Biener <rguenther@suse.de> |
| |
| * tree-cfg.c (verify_gimple_comparison): Drop special-case |
| for pointer comparison. |
| |
| 2020-10-16 Andrew MacLeod <amacleod@redhat.com> |
| |
| * vr-values.c (dump_all_value_ranges): Only dump names which are |
| still active. |
| |
| 2020-10-16 Andrew MacLeod <amacleod@redhat.com> |
| |
| * range-op.cc (pointer_plus_operator::wi_fold): Make pointer_plus |
| [0, 0] + const return a [const, const] range. |
| |
| 2020-10-16 Andrew MacLeod <amacleod@redhat.com> |
| |
| * gimple-ssa-evrp.c (hybrid_folder::value_on_edge): Call |
| evrp_folder::value_of_expr directly. |
| (hybrid_folder::value_of_stmt): Ditto. |
| |
| 2020-10-16 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97462 |
| * range-op.cc (operator_lshift::op1_range): Don't trap on negative |
| shifts. |
| |
| 2020-10-16 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks.h (VX_CRTBEGIN_SPEC): Likewise. |
| |
| 2020-10-16 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks/_vxworks-versions.h: Only include |
| version.h if _WRS_VXWORKS_MAJOR is not defined. |
| Provide a default _WRS_VXWORKS_MINOR (0). |
| |
| 2020-10-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| PR target/97327 |
| * config/arm/arm.c (fp_bitlist): Add isa_bit_mve_float to FP bits array. |
| |
| 2020-10-16 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): For BB |
| vectorization swap operands only if it helps, demote mismatches to |
| external. |
| |
| 2020-10-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| PR target/97291 |
| * config/arm/arm-builtins.c (arm_strsbwbs_qualifiers): Modify array. |
| (arm_strsbwbu_qualifiers): Likewise. |
| (arm_strsbwbs_p_qualifiers): Likewise. |
| (arm_strsbwbu_p_qualifiers): Likewise. |
| * config/arm/arm_mve.h (__arm_vstrdq_scatter_base_wb_s64): Modify |
| function definition. |
| (__arm_vstrdq_scatter_base_wb_u64): Likewise. |
| (__arm_vstrdq_scatter_base_wb_p_s64): Likewise. |
| (__arm_vstrdq_scatter_base_wb_p_u64): Likewise. |
| (__arm_vstrwq_scatter_base_wb_p_s32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_p_u32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_s32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_u32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_f32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_p_f32): Likewise. |
| * config/arm/arm_mve_builtins.def (vstrwq_scatter_base_wb_add_u): Remove |
| expansion for the builtin. |
| (vstrwq_scatter_base_wb_add_s): Likewise. |
| (vstrwq_scatter_base_wb_add_f): Likewise. |
| (vstrdq_scatter_base_wb_add_u): Likewise. |
| (vstrdq_scatter_base_wb_add_s): Likewise. |
| (vstrwq_scatter_base_wb_p_add_u): Likewise. |
| (vstrwq_scatter_base_wb_p_add_s): Likewise. |
| (vstrwq_scatter_base_wb_p_add_f): Likewise. |
| (vstrdq_scatter_base_wb_p_add_u): Likewise. |
| (vstrdq_scatter_base_wb_p_add_s): Likewise. |
| * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Remove |
| expand. |
| (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Rename pattern to ... |
| (mve_vstrwq_scatter_base_wb_<supf>v4si): This. |
| (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Remove expand. |
| (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Rename pattern to ... |
| (mve_vstrwq_scatter_base_wb_p_<supf>v4si): This. |
| (mve_vstrwq_scatter_base_wb_fv4sf): Remove expand. |
| (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise. |
| (mve_vstrwq_scatter_base_wb_fv4sf_insn): Rename pattern to ... |
| (mve_vstrwq_scatter_base_wb_fv4sf): This. |
| (mve_vstrwq_scatter_base_wb_p_fv4sf): Remove expand. |
| (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise. |
| (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Rename pattern to ... |
| (mve_vstrwq_scatter_base_wb_p_fv4sf): This. |
| (mve_vstrdq_scatter_base_wb_<supf>v2di): Remove expand. |
| (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Rename pattern to ... |
| (mve_vstrdq_scatter_base_wb_<supf>v2di): This. |
| (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Remove expand. |
| (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Rename pattern to ... |
| (mve_vstrdq_scatter_base_wb_p_<supf>v2di): This. |
| |
| 2020-10-16 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/multilib-generator (IMPLIED_EXT): New. |
| (arch_canonicalize): Update comment and handle implied extensions. |
| |
| 2020-10-16 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): First analyze |
| all operands and fill in the def_stmts and ops entries. |
| (vect_def_types_match): New helper. |
| |
| 2020-10-16 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/97404 |
| * ipa-prop.c (struct ipa_vr_ggc_hash_traits): |
| Compare types of VRP as we can merge ranges of different types. |
| |
| 2020-10-16 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97428 |
| * tree-vect-slp.c (vect_analyze_slp_instance): Split store |
| groups also for loop vectorization. |
| |
| 2020-10-15 Tom de Vries <tdevries@suse.de> |
| |
| PR target/97436 |
| * config/nvptx/nvptx.opt (m32): Comment out. |
| * doc/invoke.texi (NVPTX options): Remove -m32. |
| |
| 2020-10-15 Jan Hubicka <hubicka@ucw.cz> |
| Richard Biener <rguenther@suse.de> |
| |
| * attr-fnspec.h: Fix toplevel comment. |
| |
| 2020-10-15 Richard Biener <rguenther@suse.de> |
| |
| * tree-pretty-print.c (dump_mem_ref): Print constant offset |
| also for TARGET_MEM_REF. |
| |
| 2020-10-15 Jan Hubicka <jh@suse.cz> |
| |
| * symtab.c (symtab_node::binds_to_current_def_p): Also accept symbols |
| defined in other partition. |
| |
| 2020-10-15 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-loop.c (vectorizable_live_operation): Adjust |
| dominance query. |
| |
| 2020-10-15 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97482 |
| * tree-data-ref.c (split_constant_offset_1): Handle |
| trivial conversions better. |
| * fold-const.c (convert_to_ptrofftype_loc): Elide conversion |
| if the offset is already ptrofftype_p. |
| |
| 2020-10-15 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/97295 |
| * profile-count.c (profile_count::to_frequency): Move part of |
| gcc_assert to STATIC_ASSERT. |
| * regs.h (REG_FREQ_FROM_BB): Do not use count.to_frequency for |
| a function that does not have count_max initialized. |
| |
| 2020-10-15 Jakub Jelinek <jakub@redhat.com> |
| |
| * params.opt (-param-ipa-jump-function-lookups=): Add full stop at |
| the end of the parameter description. |
| |
| 2020-10-15 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.c (riscv_cpu_tables): New. |
| (riscv_arch_str): Return empty string if current_subset_list |
| is NULL. |
| (riscv_find_cpu): New. |
| (riscv_handle_option): Verify option value of -mcpu. |
| (riscv_expand_arch): Using std::string. |
| (riscv_default_mtune): New. |
| (riscv_expand_arch_from_cpu): Ditto. |
| * config/riscv/riscv-cores.def: New. |
| * config/riscv/riscv-protos.h (riscv_find_cpu): New. |
| (riscv_cpu_info): New. |
| * config/riscv/riscv.c (riscv_tune_info): Rename ... |
| (riscv_tune_param): ... to this. |
| (riscv_cpu_info): Rename ... |
| (riscv_tune_info): ... to this. |
| (tune_info): Rename ... |
| (tune_param): ... to this. |
| (rocket_tune_info): Update data type name. |
| (sifive_7_tune_info): Ditto. |
| (optimize_size_tune_info): Ditto. |
| (riscv_cpu_info_table): Rename ... |
| (riscv_tune_info_table): ... to this. |
| (riscv_parse_cpu): Rename ... |
| (riscv_parse_tune): ... to this, and translate valid -mcpu option to |
| -mtune option. |
| (riscv_rtx_costs): Rename tune_info to tune_param. |
| (riscv_class_max_nregs): Ditto. |
| (riscv_memory_move_cost): Ditto. |
| (riscv_init_machine_status): Use value of -mcpu if -mtune is not |
| given, and rename tune_info to tune_param. |
| * config/riscv/riscv.h (riscv_expand_arch_from_cpu): New. |
| (riscv_default_mtune): Ditto. |
| (EXTRA_SPEC_FUNCTIONS): Add riscv_expand_arch_from_cpu and |
| riscv_default_mtune. |
| (OPTION_DEFAULT_SPECS): Handle default value of -march/-mabi. |
| (DRIVER_SELF_SPECS): Expand -march from -mcpu if -march is not |
| given. |
| * config/riscv/riscv.opt (-mcpu): New option. |
| * config/riscv/t-riscv ($(common_out_file)): Add |
| riscv-cores.def to dependency. |
| * doc/invoke.texi (RISC-V Option): Add -mcpu, and update the |
| description of default value for -mtune and -march. |
| |
| 2020-10-15 Hongyu Wang <hongyu.wang@intel.com> |
| |
| * common/config/i386/cpuinfo.h (get_available_features): |
| Detect HRESET. |
| * common/config/i386/i386-common.c (OPTION_MASK_ISA2_HRESET_SET, |
| OPTION_MASK_ISA2_HRESET_UNSET): New macros. |
| (ix86_handle_option): Handle -mhreset. |
| * common/config/i386/i386-cpuinfo.h (enum processor_features): |
| Add FEATURE_HRESET. |
| * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY |
| for hreset. |
| * config.gcc: Add hresetintrin.h |
| * config/i386/hresetintrin.h: New header file. |
| * config/i386/x86gprintrin.h: Include hresetintrin.h. |
| * config/i386/cpuid.h (bit_HRESET): New. |
| * config/i386/i386-builtin.def: Add new builtin. |
| * config/i386/i386-expand.c (ix86_expand_builtin): |
| Handle new builtin. |
| * config/i386/i386-c.c (ix86_target_macros_internal): Define |
| __HRESET__. |
| * config/i386/i386-options.c (isa2_opts): Add -mhreset. |
| (ix86_valid_target_attribute_inner_p): Handle hreset. |
| * config/i386/i386.h (TARGET_HRESET, TARGET_HRESET_P, |
| PTA_HRESET): New. |
| (PTA_ALDERLAKE): Add PTA_HRESET. |
| * config/i386/i386.opt: Add option -mhreset. |
| * config/i386/i386.md (UNSPECV_HRESET): New unspec. |
| (hreset): New define_insn. |
| * doc/invoke.texi: Document -mhreset. |
| * doc/extend.texi: Document hreset. |
| |
| 2020-10-15 Hongtao Liu <hongtao.liu@intel.com> |
| |
| * common/config/i386/cpuinfo.h (get_available_features): |
| Detect UINTR. |
| * common/config/i386/i386-common.c (OPTION_MASK_ISA2_UINTR_SET |
| OPTION_MASK_ISA2_UINTR_UNSET): New. |
| (ix86_handle_option): Handle -muintr. |
| * common/config/i386/i386-cpuinfo.h (enum processor_features): |
| Add FEATURE_UINTR. |
| * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY |
| for uintr. |
| * config.gcc: Add uintrintrin.h to extra_headers. |
| * config/i386/uintrintrin.h: New. |
| * config/i386/cpuid.h (bit_UINTR): New. |
| * config/i386/i386-builtin-types.def: Add new types. |
| * config/i386/i386-builtin.def: Add new builtins. |
| * config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins): Add |
| __builtin_ia32_testui. |
| * config/i386/i386-builtins.h (ix86_builtins): Add |
| IX86_BUILTIN_TESTUI. |
| * config/i386/i386-c.c (ix86_target_macros_internal): Define |
| __UINTR__. |
| * config/i386/i386-expand.c (ix86_expand_special_args_builtin): |
| Handle UINT8_FTYPE_VOID. |
| (ix86_expand_builtin): Handle IX86_BUILTIN_TESTUI. |
| * config/i386/i386-options.c (isa2_opts): Add -muintr. |
| (ix86_valid_target_attribute_inner_p): Handle UINTR. |
| (ix86_option_override_internal): Add TARGET_64BIT check for UINTR. |
| * config/i386/i386.h (TARGET_UINTR, TARGET_UINTR_P, PTA_UINTR): New. |
| (PTA_SAPPHIRRAPIDS): Add PTA_UINTR. |
| * config/i386/i386.opt: Add -muintr. |
| * config/i386/i386.md |
| (define_int_iterator UINTR_UNSPECV): New. |
| (define_int_attr uintr_unspecv): New. |
| (uintr_<uintr_unspecv>, uintr_senduipi, testui): |
| New define_insn patterns. |
| * config/i386/x86gprintrin.h: Include uintrintrin.h |
| * doc/invoke.texi: Document -muintr. |
| * doc/extend.texi: Document uintr. |
| |
| 2020-10-14 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97391 |
| * builtins.c (gimple_parm_array_size): Peel off one less layer |
| of array types. |
| |
| 2020-10-14 Martin Sebor <msebor@redhat.com> |
| |
| PR c/97413 |
| * attribs.c (init_attr_rdwr_indices): Unwrap extra list layer. |
| |
| 2020-10-14 Sunil K Pandey <skpgkp2@gmail.com> |
| |
| PR target/95483 |
| * config/i386/avx2intrin.h (_mm_broadcastsi128_si256): New intrinsics. |
| (_mm_broadcastsd_pd): Ditto. |
| * config/i386/avx512bwintrin.h (_mm512_loadu_epi16): New intrinsics. |
| (_mm512_storeu_epi16): Ditto. |
| (_mm512_loadu_epi8): Ditto. |
| (_mm512_storeu_epi8): Ditto. |
| * config/i386/avx512dqintrin.h (_mm_reduce_round_sd): New intrinsics. |
| (_mm_mask_reduce_round_sd): Ditto. |
| (_mm_maskz_reduce_round_sd): Ditto. |
| (_mm_reduce_round_ss): Ditto. |
| (_mm_mask_reduce_round_ss): Ditto. |
| (_mm_maskz_reduce_round_ss): Ditto. |
| (_mm512_reduce_round_pd): Ditto. |
| (_mm512_mask_reduce_round_pd): Ditto. |
| (_mm512_maskz_reduce_round_pd): Ditto. |
| (_mm512_reduce_round_ps): Ditto. |
| (_mm512_mask_reduce_round_ps): Ditto. |
| (_mm512_maskz_reduce_round_ps): Ditto. |
| * config/i386/avx512erintrin.h |
| (_mm_mask_rcp28_round_sd): New intrinsics. |
| (_mm_maskz_rcp28_round_sd): Ditto. |
| (_mm_mask_rcp28_round_ss): Ditto. |
| (_mm_maskz_rcp28_round_ss): Ditto. |
| (_mm_mask_rsqrt28_round_sd): Ditto. |
| (_mm_maskz_rsqrt28_round_sd): Ditto. |
| (_mm_mask_rsqrt28_round_ss): Ditto. |
| (_mm_maskz_rsqrt28_round_ss): Ditto. |
| (_mm_mask_rcp28_sd): Ditto. |
| (_mm_maskz_rcp28_sd): Ditto. |
| (_mm_mask_rcp28_ss): Ditto. |
| (_mm_maskz_rcp28_ss): Ditto. |
| (_mm_mask_rsqrt28_sd): Ditto. |
| (_mm_maskz_rsqrt28_sd): Ditto. |
| (_mm_mask_rsqrt28_ss): Ditto. |
| (_mm_maskz_rsqrt28_ss): Ditto. |
| * config/i386/avx512fintrin.h (_mm_mask_sqrt_sd): New intrinsics. |
| (_mm_maskz_sqrt_sd): Ditto. |
| (_mm_mask_sqrt_ss): Ditto. |
| (_mm_maskz_sqrt_ss): Ditto. |
| (_mm_mask_scalef_sd): Ditto. |
| (_mm_maskz_scalef_sd): Ditto. |
| (_mm_mask_scalef_ss): Ditto. |
| (_mm_maskz_scalef_ss): Ditto. |
| (_mm_mask_cvt_roundsd_ss): Ditto. |
| (_mm_maskz_cvt_roundsd_ss): Ditto. |
| (_mm_mask_cvt_roundss_sd): Ditto. |
| (_mm_maskz_cvt_roundss_sd): Ditto. |
| (_mm_mask_cvtss_sd): Ditto. |
| (_mm_maskz_cvtss_sd): Ditto. |
| (_mm_mask_cvtsd_ss): Ditto. |
| (_mm_maskz_cvtsd_ss): Ditto. |
| (_mm512_cvtsi512_si32): Ditto. |
| (_mm_cvtsd_i32): Ditto. |
| (_mm_cvtss_i32): Ditto. |
| (_mm_cvti32_sd): Ditto. |
| (_mm_cvti32_ss): Ditto. |
| (_mm_cvtsd_i64): Ditto. |
| (_mm_cvtss_i64): Ditto. |
| (_mm_cvti64_sd): Ditto. |
| (_mm_cvti64_ss): Ditto. |
| * config/i386/avx512vlbwintrin.h (_mm256_storeu_epi8): New intrinsics. |
| (_mm_storeu_epi8): Ditto. |
| (_mm256_loadu_epi16): Ditto. |
| (_mm_loadu_epi16): Ditto. |
| (_mm256_loadu_epi8): Ditto. |
| (_mm_loadu_epi8): Ditto. |
| (_mm256_storeu_epi16): Ditto. |
| (_mm_storeu_epi16): Ditto. |
| * config/i386/avx512vlintrin.h (_mm256_load_epi64): New intrinsics. |
| (_mm_load_epi64): Ditto. |
| (_mm256_load_epi32): Ditto. |
| (_mm_load_epi32): Ditto. |
| (_mm256_store_epi32): Ditto. |
| (_mm_store_epi32): Ditto. |
| (_mm256_loadu_epi64): Ditto. |
| (_mm_loadu_epi64): Ditto. |
| (_mm256_loadu_epi32): Ditto. |
| (_mm_loadu_epi32): Ditto. |
| (_mm256_mask_cvt_roundps_ph): Ditto. |
| (_mm256_maskz_cvt_roundps_ph): Ditto. |
| (_mm_mask_cvt_roundps_ph): Ditto. |
| (_mm_maskz_cvt_roundps_ph): Ditto. |
| * config/i386/avxintrin.h (_mm256_cvtsi256_si32): New intrinsics. |
| * config/i386/emmintrin.h (_mm_loadu_si32): New intrinsics. |
| (_mm_loadu_si16): Ditto. |
| (_mm_storeu_si32): Ditto. |
| (_mm_storeu_si16): Ditto. |
| * config/i386/i386-builtin-types.def |
| (V8DF_FTYPE_V8DF_INT_V8DF_UQI_INT): Add new type. |
| (V16SF_FTYPE_V16SF_INT_V16SF_UHI_INT): Ditto. |
| (V4SF_FTYPE_V4SF_V2DF_V4SF_UQI_INT): Ditto. |
| (V2DF_FTYPE_V2DF_V4SF_V2DF_UQI_INT): Ditto. |
| * config/i386/i386-builtin.def |
| (__builtin_ia32_cvtsd2ss_mask_round): New builtin. |
| (__builtin_ia32_cvtss2sd_mask_round): Ditto. |
| (__builtin_ia32_rcp28sd_mask_round): Ditto. |
| (__builtin_ia32_rcp28ss_mask_round): Ditto. |
| (__builtin_ia32_rsqrt28sd_mask_round): Ditto. |
| (__builtin_ia32_rsqrt28ss_mask_round): Ditto. |
| (__builtin_ia32_reducepd512_mask_round): Ditto. |
| (__builtin_ia32_reduceps512_mask_round): Ditto. |
| (__builtin_ia32_reducesd_mask_round): Ditto. |
| (__builtin_ia32_reducess_mask_round): Ditto. |
| * config/i386/i386-expand.c |
| (ix86_expand_round_builtin): Expand round builtin for new type. |
| (V8DF_FTYPE_V8DF_INT_V8DF_UQI_INT) |
| (V16SF_FTYPE_V16SF_INT_V16SF_UHI_INT) |
| (V4SF_FTYPE_V4SF_V2DF_V4SF_UQI_INT) |
| (V2DF_FTYPE_V2DF_V4SF_V2DF_UQI_INT) |
| * config/i386/mmintrin.h () |
| Define datatype __m32 and __m16. |
| Define datatype __m32_u and __m16_u. |
| * config/i386/sse.md: Adjust pattern. |
| (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>): Adjust. |
| (reduces<mode><mask_scalar_name><round_saeonly_scalar_name>): Ditto. |
| (sse2_cvtsd2ss<mask_name><round_name>): Ditto. |
| (sse2_cvtss2sd<mask_name><round_saeonly_name>): Ditto. |
| (avx512er_vmrcp28<mode><mask_name><round_saeonly_name>): Ditto. |
| (avx512er_vmrsqrt28<mode><mask_name><round_saeonly_name>): Ditto. |
| |
| 2020-10-14 Olivier Hainque <hainque@adacore.com> |
| |
| * config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Fix |
| the VX_CPU selection for -mcpu=xscale on arm-vxworks. |
| |
| 2020-10-14 Olivier Hainque <hainque@adacore.com> |
| |
| * config/rs6000/vxworks.h (TARGET_OS_CPP_BUILTINS): Accommodate |
| expectations from different versions of VxWorks, for 32 or 64bit |
| configurations. |
| |
| 2020-10-14 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks.h: #undef CPLUSPLUS_CPP_SPEC. |
| |
| 2020-10-14 Olivier Hainque <hainque@adacore.com> |
| |
| * config/t-vxworks: Adjust the VxWorks alternative LIMITS_H guard |
| for glimits.h, make it both closer to the previous one and easier to |
| search for. |
| |
| 2020-10-14 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/97387 |
| * config/i386/i386.md (CC_CCC): New mode iterator. |
| (*setcc_qi_addqi3_cconly_overflow_1_<mode>): New |
| define_insn_and_split. |
| * config/i386/i386.c (ix86_cc_mode): Return CCCmode |
| for *setcc_qi_addqi3_cconly_overflow_1_<mode> pattern operands. |
| (ix86_rtx_costs): Return true and *total = 0; |
| for *setcc_qi_addqi3_cconly_overflow_1_<mode> pattern. Use op0 and |
| op1 temporaries to simplify COMPARE checks. |
| |
| 2020-10-14 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97396 |
| * gimple-range.cc (gimple_ranger::range_of_phi): Do not call |
| range_of_ssa_name_with_loop_info with the loop tree root. |
| |
| 2020-10-14 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): Split out |
| test for compatible operand types. |
| |
| 2020-10-14 Olivier Hainque <hainque@adacore.com> |
| |
| * config/vxworks.c (vxworks_override_options): Guard pic checks with |
| flag_pic > 0 instead of just flag_pic. |
| |
| 2020-10-14 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-fnsummary.c (remap_edge_summaries): Make offset_map HOST_WIDE_INT. |
| (remap_freqcounting_predicate): Likewise. |
| (ipa_merge_fn_summary_after_inlining): Likewise. |
| * ipa-predicate.c (predicate::remap_after_inlining): Likewise |
| * ipa-predicate.h (remap_after_inlining): Update. |
| |
| 2020-10-14 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (compute_parm_map): Handle POINTER_PLUS_EXPR in |
| PASSTHROUGH. |
| |
| 2020-10-14 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): Move |
| check for duplicate/interleave of variable size constants |
| to a place done once and early. |
| (vect_build_slp_tree_2): Adjust heuristics when to build |
| a BB SLP node from scalars. |
| |
| 2020-10-14 Tom de Vries <tdevries@suse.de> |
| |
| * tracer.c (cached_can_duplicate_bb_p, analyze_bb): Use |
| can_duplicate_block_p. |
| (can_duplicate_insn_p, can_duplicate_bb_no_insn_iter_p) |
| (can_duplicate_bb_p): Move and merge ... |
| * tree-cfg.c (gimple_can_duplicate_bb_p): ... here. |
| |
| 2020-10-14 Jan Hubicka <hubicka@ucw.cz> |
| |
| * doc/invoke.texi: (ipa-jump-function-lookups): Document param. |
| * ipa-modref.c (merge_call_side_effects): Use |
| unadjusted_ptr_and_unit_offset. |
| * ipa-prop.c (unadjusted_ptr_and_unit_offset): New function. |
| * ipa-prop.h (unadjusted_ptr_and_unit_offset): Declare. |
| * params.opt: (-param-ipa-jump-function-lookups): New. |
| |
| 2020-10-14 Jan Hubicka <jh@suse.cz> |
| |
| PR bootstrap/97350 |
| * ipa-modref.c (ignore_edge): Do not ignore inlined edes. |
| (ipa_merge_modref_summary_after_inlining): Improve debug output and |
| fix parameter of ignore_stores_p. |
| |
| 2020-10-14 Kito Cheng <kito.cheng@sifive.com> |
| |
| PR target/96759 |
| * expr.c (expand_assignment): Handle misaligned stores with PARALLEL |
| value. |
| |
| 2020-10-13 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/97386 |
| * combine.c (simplify_shift_const_1): Don't optimize nested ROTATEs if |
| they have different modes. |
| |
| 2020-10-13 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97379 |
| * gimple-range-edge.cc (outgoing_range::calc_switch_ranges): Do |
| not save hash slot across calls to hash_table<>::get_or_insert. |
| |
| 2020-10-13 Tobias Burnus <tobias@codesourcery.com> |
| |
| * lto-wrapper.c (find_crtoffloadtable): Fix last commit |
| by adding NULL as last argument to concat. |
| |
| 2020-10-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64.c (neoversen2_tunings): Define. |
| * config/aarch64/aarch64-cores.def (neoverse-n2): Use it. |
| |
| 2020-10-13 Tobias Burnus <tobias@codesourcery.com> |
| |
| * lto-wrapper.c (find_crtoffloadtable): With -save-temps, |
| use non-temp file name utilizing the dump prefix. |
| (run_gcc): Update call. |
| |
| 2020-10-13 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97382 |
| * tree-vectorizer.h (_stmt_vec_info::same_align_refs): Remove. |
| (STMT_VINFO_SAME_ALIGN_REFS): Likewise. |
| * tree-vectorizer.c (vec_info::new_stmt_vec_info): Do not |
| allocate STMT_VINFO_SAME_ALIGN_REFS. |
| (vec_info::free_stmt_vec_info): Do not release |
| STMT_VINFO_SAME_ALIGN_REFS. |
| * tree-vect-data-refs.c (vect_analyze_data_ref_dependences): |
| Do not compute self and read-read dependences. |
| (vect_dr_aligned_if_related_peeled_dr_is): New helper. |
| (vect_dr_aligned_if_peeled_dr_is): Likewise. |
| (vect_update_misalignment_for_peel): Use it instead of |
| iterating over STMT_VINFO_SAME_ALIGN_REFS. |
| (dr_align_group_sort_cmp): New function. |
| (vect_enhance_data_refs_alignment): Count the number of |
| same aligned refs here and elide uses of STMT_VINFO_SAME_ALIGN_REFS. |
| (vect_find_same_alignment_drs): Remove. |
| (vect_analyze_data_refs_alignment): Do not call it. |
| * vec.h (auto_vec<T, 0>::auto_vec): Adjust CTOR to take |
| a vec<>&&, assert it isn't using auto storage. |
| (auto_vec& operator=): Apply a similar change. |
| |
| 2020-10-13 Tobias Burnus <tobias@codesourcery.com> |
| |
| * config/nvptx/mkoffload.c (main): Add missing fclose (in). |
| |
| 2020-10-13 Zhiheng Xie <xiezhiheng@huawei.com> |
| Nannan Zheng <zhengnannan@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for mul/mla/mls intrinsics. |
| |
| 2020-10-13 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-low.c (add_taskreg_looptemp_clauses): For triangular loops |
| with non-constant number of iterations add another 4 _looptemp_ |
| clauses before the (optional) one for lastprivate. |
| (lower_omp_for_lastprivate): Skip those clauses when looking for |
| the lastprivate clause. |
| (lower_omp_for): For triangular loops with non-constant number of |
| iterations add another 4 _looptemp_ clauses. |
| * omp-expand.c (expand_omp_for_init_counts): For triangular loops |
| with non-constant number of iterations set counts[0], |
| fd->first_inner_iterations, fd->factor and fd->adjn1 from the newly |
| added _looptemp_ clauses. |
| (expand_omp_for_init_vars): Initialize the newly added _looptemp_ |
| clauses. |
| (find_lastprivate_looptemp): New function. |
| (expand_omp_for_static_nochunk, expand_omp_for_static_chunk, |
| expand_omp_taskloop_for_outer): Use it instead of manually skipping |
| _looptemp_ clauses. |
| |
| 2020-10-13 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/97389 |
| * ipa-modref.c (dump_lto_records): Fix formating of dump file. |
| (modref_summary::dump): Do not check loads to be non-null. |
| (modref_summary_lto::dump): Do not check loads to be non-null. |
| (merge_call_side_effects): Improve debug output. |
| (analyze_call): Crash when cur_summary->loads is NULL. |
| (analyze_function): Update. |
| (modref_summaries::insert): Insert only into summaries, not |
| optimization_summaries. |
| (modref_summaries::duplicate): Likewise; crash when load or sotres |
| are NULL. |
| (modref_summaries_lto::duplicate): Crash when loads or stores are NULL. |
| (write_modref_records): param_index is signed. |
| (read_modref_records): param_index is signed. |
| (modref_write): Crash when loads or stores are NULL. |
| (read_section): Compensate previous change. |
| (pass_modref::execute): Do not check optimization_summaries t be |
| non-NULL. |
| (ignore_edge): Fix. |
| (compute_parm_map): Fix formating. |
| (modref_propagate_in_scc): Do not expect loads/stores to be NULL. |
| |
| 2020-10-12 Alexandre Oliva <oliva@adacore.com> |
| |
| * builtins.c (mathfn_built_in_type): Use CFN_ enumerators. |
| |
| 2020-10-12 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97381 |
| * gimple-range-gori.cc (gori_compute::compute_operand2_range): If a range cannot be |
| calculated through operand 2, return false. |
| |
| 2020-10-12 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97378 |
| * range-op.cc (operator_trunc_mod::wi_fold): Return VARYING for mod by zero. |
| |
| 2020-10-12 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/invoke.texi: Document -Wanalyzer-write-to-const and |
| -Wanalyzer-write-to-string-literal. |
| |
| 2020-10-12 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97342 |
| PR middle-end/97023 |
| PR middle-end/96384 |
| * builtins.c (access_ref::access_ref): Initialize new member. Use |
| new enum. |
| (access_ref::size_remaining): Define new member function. |
| (inform_access): Handle expressions referencing objects. |
| (gimple_call_alloc_size): Call get_size_range instead of get_range. |
| (gimple_call_return_array): New function. |
| (get_range): Rename... |
| (get_offset_range): ...to this. Improve detection of ranges from |
| types of expressions. |
| (gimple_call_return_array): Adjust calls to get_range per above. |
| (compute_objsize): Same. Set maximum size or offset instead of |
| failing for unknown objects and handle more kinds of expressions. |
| (compute_objsize): Call access_ref::size_remaining. |
| (compute_objsize): Have transitional wrapper fail for pointers |
| into unknown objects. |
| (expand_builtin_strncmp): Call access_ref::size_remaining and |
| handle new cases. |
| * builtins.h (access_ref::size_remaining): Declare new member function. |
| (access_ref::set_max_size_range): Define new member function. |
| (access_ref::add_ofset, access_ref::add_max_ofset): Same. |
| (access_ref::add_base0): New data member. |
| * calls.c (get_size_range): Change argument type. Handle new |
| condition. |
| * calls.h (get_size_range): Adjust signature. |
| (enum size_range_flags): Define new type. |
| * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Correct |
| argument to get_size_range. |
| * tree-ssa-strlen.c (get_range): Handle anti-ranges. |
| (maybe_warn_overflow): Check DECL_P before assuming it's one. |
| |
| 2020-10-12 Martin Sebor <msebor@redhat.com> |
| |
| PR c++/96511 |
| PR middle-end/96384 |
| * builtins.c (get_range): Return full range of type when neither |
| value nor its range is available. Fail for ranges inverted due |
| to the signedness of offsets. |
| (compute_objsize): Handle more special array members. Handle |
| POINTER_PLUS_EXPR and VIEW_CONVERT_EXPR that come up in front end |
| code. |
| (access_ref::offset_bounded): Define new member function. |
| * builtins.h (access_ref::eval): New data member. |
| (access_ref::offset_bounded): New member function. |
| (access_ref::offset_zero): New member function. |
| (compute_objsize): Declare a new overload. |
| * gimple-array-bounds.cc (array_bounds_checker::check_array_ref): Use |
| enum special_array_member. |
| * tree.c (component_ref_size): Use special_array_member. |
| * tree.h (special_array_member): Define a new type. |
| (component_ref_size): Change signature. |
| |
| 2020-10-12 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-modref.c (modref_summaries): Remove field IPA. |
| (class modref_summary_lto): New global variable. |
| (class modref_summaries_lto): New. |
| (modref_summary::modref_summary): Remove loads_lto and stores_lto. |
| (modref_summary::~modref_summary): Remove loads_lto and stores_lto. |
| (modref_summary::useful_p): Do not use lto_useful. |
| (modref_records_lto): New typedef. |
| (struct modref_summary_lto): New type. |
| (modref_summary_lto::modref_summary_lto): New member function. |
| (modref_summary_lto::~modref_summary_lto): New member function. |
| (modref_summary_lto::useful_p): New member function. |
| (modref_summary::dump): Do not handle lto. |
| (modref_summary_lto::dump): New member function. |
| (get_modref_function_summary): Use optimization_summary. |
| (merge_call_side_effects): Use optimization_summary. |
| (analyze_call): Use optimization_summary. |
| (struct summary_ptrs): New struture. |
| (analyze_load): Update to handle separate lto and non-lto summaries. |
| (analyze_store): Likewise. |
| (analyze_stmt): Likewise. |
| (remove_summary): Break out from ... |
| (analyze_function): ... here; update to handle seprated summaries. |
| (modref_summaries::insert): Do not handle lto summary. |
| (modref_summaries_lto::insert): New member function. |
| (modref_summaries::duplicate): Do not handle lto summary. |
| (modref_summaries_lto::duplicate): New member function. |
| (read_modref_records): Expect nolto_ret or lto_ret to be NULL> |
| (modref_write): Write lto summary. |
| (read_section): Handle separated summaries. |
| (modref_read): Initialize separated summaries. |
| (modref_transform): Handle separated summaries. |
| (pass_modref::execute): Turn summary to optimization_summary; handle |
| separate summaries. |
| (ignore_edge): Handle separate summaries. |
| (ipa_merge_modref_summary_after_inlining): Likewise. |
| (collapse_loads): Likewise. |
| (modref_propagate_in_scc): Likewise. |
| (pass_ipa_modref::execute): Likewise. |
| (ipa_modref_c_finalize): Likewise. |
| * ipa-modref.h (modref_records_lto): Remove typedef. |
| (struct modref_summary): Remove stores_lto, loads_lto and finished |
| fields; remove lto_useful_p member function. |
| |
| 2020-10-12 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-data-refs.c (vect_slp_analyze_instance_dependence): |
| Use SLP_TREE_REPRESENTATIVE. |
| * tree-vectorizer.h (_slp_tree::vertex): New member used |
| for graphds interfacing. |
| * tree-vect-slp.c (vect_build_slp_tree_2): Allocate space |
| for PHI SLP children. |
| (vect_analyze_slp_backedges): New function filling in SLP |
| node children for PHIs that correspond to backedge values. |
| (vect_analyze_slp): Call vect_analyze_slp_backedges for the |
| graph. |
| (vect_slp_analyze_node_operations): Deal with a cyclic graph. |
| (vect_schedule_slp_instance): Likewise. |
| (vect_schedule_slp): Likewise. |
| (slp_copy_subtree): Remove. |
| (vect_slp_rearrange_stmts): Likewise. |
| (vect_attempt_slp_rearrange_stmts): Likewise. |
| (vect_slp_build_vertices): New functions. |
| (vect_slp_permute): Likewise. |
| (vect_slp_perms_eq): Likewise. |
| (vect_optimize_slp): Remove special code to elide |
| permutations with SLP reductions. Implement generic |
| permute optimization. |
| |
| 2020-10-12 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/arm.c (arm_preferred_simd_mode): Use E_FOOmode |
| instead of FOOmode. |
| |
| 2020-10-12 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/97079 |
| * internal-fn.c (internal_fn_stored_value_index): Handle also |
| .MASK_STORE_LANES. |
| * tree-vect-patterns.c (vect_recog_over_widening_pattern): Bail |
| out for unsupported TREE_TYPE. |
| |
| 2020-10-12 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_bb_partition_graph_r): Use visited |
| hash-map. |
| (vect_bb_partition_graph): Likewise. |
| |
| 2020-10-12 Duan bo <duanbo3@huawei.com> |
| |
| PR target/96757 |
| * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Add |
| the identification and handling of the dropped situation in the |
| cond expression processing phase. |
| |
| 2020-10-12 Tobias Burnus <tobias@codesourcery.com> |
| |
| * doc/invoke.texi (nvptx's -misa): Update default to sm_35. |
| |
| 2020-10-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/97349 |
| * config/aarch64/arm_neon.h (vdupq_n_p8, vdupq_n_p16, |
| vdupq_n_p64, vdupq_n_s8, vdupq_n_s16, vdupq_n_u8, vdupq_n_u16): |
| Fix argument type. |
| |
| 2020-10-12 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * config/s390/s390-protos.h (s390_build_signbit_mask): New |
| function. |
| * config/s390/s390.c (s390_contiguous_bitmask_vector_p): |
| Bitcast the argument to an integral mode. |
| (s390_expand_vec_init): Do not call |
| s390_contiguous_bitmask_vector_p with a scalar argument. |
| (s390_build_signbit_mask): New function. |
| * config/s390/vector.md (copysign<mode>3): Use bitwise |
| operations. |
| |
| 2020-10-12 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97371 |
| * range-op.cc (operator_rshift::op1_range): Ignore shifts larger than |
| or equal to type precision. |
| |
| 2020-10-12 Martin Liska <mliska@suse.cz> |
| |
| * ipa-modref.c (merge_call_side_effects): Clear modref_parm_map |
| fields in the vector. |
| |
| 2020-10-12 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_analyze_slp_instance): Set matches to true |
| after successful discovery but forced split. |
| |
| 2020-10-12 Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.opt (-msoft-stack-reserve-local): Rename to ... |
| (-msoft-stack-reserve-local=): ... this. |
| |
| 2020-10-12 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97357 |
| * tree-ssa-loop-split.c (ssa_semi_invariant_p): Abnormal |
| SSA names are not semi invariant. |
| |
| 2020-10-11 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.c (darwin_globalize_label): Make a subset of |
| metadate symbols global. |
| (darwin_label_is_anonymous_local_objc_name): Make a subset of |
| metadata symbols linker-visible. |
| (darwin_override_options): Track more target OS versions, make |
| the next_runtime version track this (unless it's set to 0 for |
| GNU runtime). |
| |
| 2020-10-11 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.c (darwin_globalize_label): Add protocol |
| meta-data labels to the set that are global. |
| (darwin_label_is_anonymous_local_objc_name): Arrange for meta- |
| data start labels to be linker-visible. |
| |
| 2020-10-11 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.c (darwin_objc2_section): Allow for |
| values > 1 to represent the next runtime. |
| (darwin_objc1_section): Likewise. |
| * config/darwin.h (NEXT_OBJC_RUNTIME): Set the default |
| next runtime value to be 10.5.8. |
| |
| 2020-10-10 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (modref_transform): Fix parameter map computation. |
| |
| 2020-10-10 Tom de Vries <tdevries@suse.de> |
| |
| PR target/97318 |
| * config/nvptx/nvptx.c (nvptx_replace_dot): New function. |
| (write_fn_proto, write_fn_proto_from_insn, nvptx_output_call_insn): |
| Use nvptx_replace_dot. |
| |
| 2020-10-10 Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.c (write_fn_proto_1): New function, factored out |
| of ... |
| (write_fn_proto): ... here. Return void. |
| |
| 2020-10-10 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (remap_arguments): Check range in map access. |
| |
| 2020-10-10 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (modref_transform): Use reserve instead of safe_grow. |
| |
| 2020-10-10 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (modref_transform): Check that summaries are allocated. |
| |
| 2020-10-10 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref-tree.h (struct modref_tree): Revert prevoius change. |
| * ipa-modref.c (analyze_function): Dump original summary. |
| (modref_read): Only set IPA if streaming summary (not optimization |
| summary). |
| (remap_arguments): New function. |
| (modref_transform): New function. |
| (compute_parm_map): Fix offset calculation. |
| (ipa_merge_modref_summary_after_inlining): Do not merge stores when |
| they can be ignored. |
| |
| 2020-10-10 Jan Hubicka <jh@suse.cz> |
| |
| * tree-ssa-alias.c (ref_maybe_used_by_call_p_1): Improve debug dumps. |
| (call_may_clobber_ref_p_1): Improve debug dumps. |
| |
| 2020-10-10 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.c (output_objc_section_asm_op): Avoid extra |
| objective-c section switches unless the linker needs them. |
| |
| 2020-10-10 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin-sections.def (objc2_data_section): New. |
| (objc2_ivar_section): New. |
| * config/darwin.c (darwin_objc2_section): Act on Protocol and |
| ivar refs. |
| |
| 2020-10-10 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin-sections.def (objc2_class_names_section, |
| objc2_method_names_section, objc2_method_types_section): New |
| * config/darwin.c (output_objc_section_asm_op): Output new |
| sections. (darwin_objc2_section): Select new sections where |
| used. |
| |
| 2020-10-10 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.c (darwin_emit_local_bss): Amend section names to |
| match system tools. (darwin_output_aligned_bss): Likewise. |
| |
| 2020-10-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97359 |
| * gimple-range-gori.cc (logical_stmt_cache::cacheable_p): Only |
| handle ANDs and ORs. |
| (gori_compute_cache::cache_stmt): Adjust comment. |
| |
| 2020-10-09 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR rtl-optimization/97313 |
| * lra-constraints.c (match_reload): Don't keep strict_low_part in |
| reloads for non-registers. |
| |
| 2020-10-09 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/97148 |
| * config.gcc (extra_headers): Add x86gprintrin.h. |
| * config/i386/adxintrin.h: Check _X86GPRINTRIN_H_INCLUDED for |
| <x86gprintrin.h>. |
| * config/i386/bmi2intrin.h: Likewise. |
| * config/i386/bmiintrin.h: Likewise. |
| * config/i386/cetintrin.h: Likewise. |
| * config/i386/cldemoteintrin.h: Likewise. |
| * config/i386/clflushoptintrin.h: Likewise. |
| * config/i386/clwbintrin.h: Likewise. |
| * config/i386/enqcmdintrin.h: Likewise. |
| * config/i386/fxsrintrin.h: Likewise. |
| * config/i386/ia32intrin.h: Likewise. |
| * config/i386/lwpintrin.h: Likewise. |
| * config/i386/lzcntintrin.h: Likewise. |
| * config/i386/movdirintrin.h: Likewise. |
| * config/i386/pconfigintrin.h: Likewise. |
| * config/i386/pkuintrin.h: Likewise. |
| * config/i386/rdseedintrin.h: Likewise. |
| * config/i386/rtmintrin.h: Likewise. |
| * config/i386/serializeintrin.h: Likewise. |
| * config/i386/tbmintrin.h: Likewise. |
| * config/i386/tsxldtrkintrin.h: Likewise. |
| * config/i386/waitpkgintrin.h: Likewise. |
| * config/i386/wbnoinvdintrin.h: Likewise. |
| * config/i386/xsavecintrin.h: Likewise. |
| * config/i386/xsaveintrin.h: Likewise. |
| * config/i386/xsaveoptintrin.h: Likewise. |
| * config/i386/xsavesintrin.h: Likewise. |
| * config/i386/xtestintrin.h: Likewise. |
| * config/i386/immintrin.h: Include <x86gprintrin.h> instead of |
| <fxsrintrin.h>, <xsaveintrin.h>, <xsaveoptintrin.h>, |
| <xsavesintrin.h>, <xsavecintrin.h>, <lzcntintrin.h>, |
| <bmiintrin.h>, <bmi2intrin.h>, <xtestintrin.h>, <cetintrin.h>, |
| <movdirintrin.h>, <sgxintrin.h, <pconfigintrin.h>, |
| <waitpkgintrin.h>, <cldemoteintrin.h>, <enqcmdintrin.h>, |
| <serializeintrin.h>, <tsxldtrkintrin.h>, <adxintrin.h>, |
| <clwbintrin.h>, <clflushoptintrin.h>, <wbnoinvdintrin.h> and |
| <pkuintrin.h>. |
| (_wbinvd): Moved to config/i386/x86gprintrin.h. |
| (_rdrand16_step): Likewise. |
| (_rdrand32_step): Likewise. |
| (_rdpid_u32): Likewise. |
| (_readfsbase_u32): Likewise. |
| (_readfsbase_u64): Likewise. |
| (_readgsbase_u32): Likewise. |
| (_readgsbase_u64): Likewise. |
| (_writefsbase_u32): Likewise. |
| (_writefsbase_u64): Likewise. |
| (_writegsbase_u32): Likewise. |
| (_writegsbase_u64): Likewise. |
| (_rdrand64_step): Likewise. |
| (_ptwrite64): Likewise. |
| (_ptwrite32): Likewise. |
| * config/i386/x86gprintrin.h: New file. |
| * config/i386/x86intrin.h: Include <x86gprintrin.h>. Don't |
| include <ia32intrin.h>, <lwpintrin.h>, <tbmintrin.h>, |
| <popcntintrin.h>, <mwaitxintrin.h> and <clzerointrin.h>. |
| |
| 2020-10-09 Tom de Vries <tdevries@suse.de> |
| |
| PR target/97348 |
| * config/nvptx/nvptx.h (ASM_SPEC): Also pass -m to nvptx-as if |
| default is used. |
| * config/nvptx/nvptx.opt (misa): Init with PTX_ISA_SM35. |
| |
| 2020-10-09 Richard Biener <rguenther@suse.de> |
| |
| * doc/sourcebuild.texi (vect_masked_load): Document. |
| |
| 2020-10-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97334 |
| * tree-vect-slp.c (vect_build_slp_tree_1): Do not fatally |
| fail lanes other than zero when BB vectorizing. |
| |
| 2020-10-09 Jan Hubicka <jh@suse.cz> |
| |
| PR ipa/97292 |
| PR ipa/97335 |
| * ipa-modref-tree.h (copy_from): Drop summary in a |
| clone. |
| |
| 2020-10-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97347 |
| * tree-vect-slp.c (vect_create_constant_vectors): Use |
| edge insertion when inserting on the fallthru edge, |
| appropriately insert at the start of BBs when inserting |
| after PHIs. |
| |
| 2020-10-09 Andrew MacLeod <amacleod@redhat.com> |
| |
| PR tree-optimization/97317 |
| * range-op.cc (operator_cast::op1_range): Handle casts where the precision |
| of the RHS is only 1 greater than the precision of the LHS. |
| |
| 2020-10-09 Richard Biener <rguenther@suse.de> |
| |
| * cgraphunit.c (expand_all_functions): Free tp_first_run_order. |
| * ipa-modref.c (pass_ipa_modref::execute): Free order. |
| * tree-ssa-loop-niter.c (estimate_numbers_of_iterations): Free |
| loop body. |
| * tree-vect-data-refs.c (vect_find_stmt_data_reference): Free |
| data references upon failure. |
| * tree-vect-loop.c (update_epilogue_loop_vinfo): Free BBs |
| array of the original loop. |
| * tree-vect-slp.c (vect_slp_bbs): Use an auto_vec for |
| dataref_groups to release its memory. |
| |
| 2020-10-09 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94801 |
| PR target/97312 |
| * vr-values.c (vr_values::extract_range_basic) <CASE_CFN_CLZ, |
| CASE_CFN_CTZ>: When stmt is not an internal-fn call or |
| C?Z_DEFINED_VALUE_AT_ZERO is not 2, assume argument is not zero |
| and thus use [0, prec-1] range unless it can be further improved. |
| For CTZ, don't update maxi from upper bound if it was previously prec. |
| * gimple-range.cc (gimple_ranger::range_of_builtin_call) <CASE_CFN_CLZ, |
| CASE_CFN_CTZ>: Likewise. |
| |
| 2020-10-09 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/97325 |
| * match.pd (FFS(nonzero) -> CTZ(nonzero) + 1): Cast argument to |
| corresponding unsigned type. |
| |
| 2020-10-09 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_create_constant_vectors): Properly insert |
| after PHIs. |
| |
| 2020-10-08 Alexandre Oliva <oliva@adacore.com> |
| |
| * builtins.c (mathfn_built_in_type): New. |
| * builtins.h (mathfn_built_in_type): Declare. |
| * tree-ssa-math-opts.c (execute_cse_sincos_1): Use it to |
| obtain the type expected by the intrinsic. |
| |
| 2020-10-08 Will Schmidt <will_schmidt@vnet.ibm.com> |
| |
| * config/rs6000/rs6000-builtin.def (BU_P10_MISC_2): Rename |
| to BU_P10_POWERPC64_MISC_2. |
| CFUGED, CNTLZDM, CNTTZDM, PDEPD, PEXTD): Call renamed macro. |
| |
| 2020-10-08 Jan Hubicka <jh@suse.cz> |
| |
| * tree-nrv.c (dest_safe_for_nrv_p): Disable tbaa in |
| call_may_clobber_ref_p and ref_maybe_used_by_stmt_p. |
| * tree-tailcall.c (find_tail_calls): Likewise. |
| * tree-ssa-alias.c (call_may_clobber_ref_p): Add tbaa_p parameter. |
| * tree-ssa-alias.h (call_may_clobber_ref_p): Update prototype. |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): Pass data->tbaa_p |
| to call_may_clobber_ref_p_1. |
| |
| 2020-10-08 Mark Wielaard <mark@klomp.org> |
| |
| * dwarf2out.c (dwarf2out_finish): Emit .file 0 entry when |
| generating DWARF5 .debug_line table through gas. |
| |
| 2020-10-08 John Henning <john.henning@oracle.com> |
| |
| PR other/97309 |
| * doc/invoke.texi: Improve documentation of |
| -fallow-store-data-races. |
| |
| 2020-10-08 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| PR target/96914 |
| * config/arm/arm_mve.h (__arm_vcvtnq_u32_f32): New. |
| |
| 2020-10-08 Martin Liska <mliska@suse.cz> |
| Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (_bb_vec_info::const_iterator): Remove. |
| (_bb_vec_info::const_reverse_iterator): Likewise. |
| (_bb_vec_info::region_stmts): Likewise. |
| (_bb_vec_info::reverse_region_stmts): Likewise. |
| (_bb_vec_info::_bb_vec_info): Adjust. |
| (_bb_vec_info::bb): Remove. |
| (_bb_vec_info::region_begin): Remove. |
| (_bb_vec_info::region_end): Remove. |
| (_bb_vec_info::bbs): New vector of BBs. |
| (vect_slp_function): Declare. |
| * tree-vect-patterns.c (vect_determine_precisions): Use |
| regular stmt iteration. |
| (vect_pattern_recog): Likewise. |
| * tree-vect-slp.c: Include cfganal.h, tree-eh.h and tree-cfg.h. |
| (vect_build_slp_tree_1): Properly refuse to vectorize |
| volatile and throwing stmts. |
| (vect_build_slp_tree_2): Pass group-size down to |
| get_vectype_for_scalar_type. |
| (_bb_vec_info::_bb_vec_info): Use regular stmt iteration, |
| adjust for changed region specification. |
| (_bb_vec_info::~_bb_vec_info): Likewise. |
| (vect_slp_check_for_constructors): Likewise. |
| (vect_slp_region): Likewise. |
| (vect_slp_bbs): New worker operating on a vector of BBs. |
| (vect_slp_bb): Wrap it. |
| (vect_slp_function): New function splitting the function |
| into multi-BB regions. |
| (vect_create_constant_vectors): Handle the case of inserting |
| after a throwing def. |
| (vect_schedule_slp_instance): Adjust. |
| * tree-vectorizer.c (vec_info::remove_stmt): Simplify again. |
| (vec_info::insert_seq_on_entry): Adjust. |
| (pass_slp_vectorize::execute): Also init PHIs. Call |
| vect_slp_function. |
| |
| 2020-10-08 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97330 |
| * tree-ssa-sink.c (statement_sink_location): Avoid skipping |
| PHIs when they dominate the insert location. |
| |
| 2020-10-08 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (get_access): Fix handling of offsets. |
| * tree-ssa-alias.c (modref_may_conflict): Watch for overflows. |
| |
| 2020-10-08 Martin Liska <mliska@suse.cz> |
| |
| * dbgcnt.def (DEBUG_COUNTER): Add ipa_mod_ref debug counter. |
| * tree-ssa-alias.c (modref_may_conflict): Handle the counter. |
| |
| 2020-10-08 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.c (try_vectorize_loop_1): Do not dump |
| "basic block vectorized". |
| (pass_slp_vectorize::execute): Likewise. |
| * tree-vect-slp.c (vect_analyze_slp_instance): Avoid |
| re-analyzing split single stmts. |
| |
| 2020-10-08 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| PR target/96914 |
| * config/arm/arm_mve.h (vqrdmlashq_n_u8, vqrdmlashq_n_u16) |
| (vqrdmlashq_n_u32, vqrdmlahq_n_u8, vqrdmlahq_n_u16) |
| (vqrdmlahq_n_u32, vqdmlahq_n_u8, vqdmlahq_n_u16, vqdmlahq_n_u32) |
| (vmlaldavaxq_p_u16, vmlaldavaxq_p_u32): Remove. |
| * config/arm/arm_mve_builtins.def (vqrdmlashq_n_u, vqrdmlahq_n_u) |
| (vqdmlahq_n_u, vmlaldavaxq_p_u): Remove. |
| * config/arm/unspecs.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U) |
| (VQRDMLASHQ_N_U) |
| (VMLALDAVAXQ_P_U): Remove unspecs. |
| * config/arm/iterators.md (VQDMLAHQ_N_U, VQRDMLAHQ_N_U) |
| (VQRDMLASHQ_N_U, VMLALDAVAXQ_P_U): Remove attributes. |
| (VQDMLAHQ_N, VQRDMLAHQ_N, VQRDMLASHQ_N, VMLALDAVAXQ_P): Remove |
| unsigned variants from iterators. |
| * config/arm/mve.md (mve_vqdmlahq_n_<supf><mode>) |
| (mve_vqrdmlahq_n_<supf><mode>) |
| (mve_vqrdmlashq_n_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>): |
| Update comment. |
| |
| 2020-10-08 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| PR target/96914 |
| * config/arm/arm_mve.h (vqdmlashq, vqdmlashq_m): Define. |
| * config/arm/arm_mve_builtins.def (vqdmlashq_n_s) |
| (vqdmlashq_m_n_s,): New. |
| * config/arm/unspecs.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New |
| unspecs. |
| * config/arm/iterators.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New |
| attributes. |
| (VQDMLASHQ_N): New iterator. |
| * config/arm/mve.md (mve_vqdmlashq_n_, mve_vqdmlashq_m_n_s): New |
| patterns. |
| |
| 2020-10-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/97322 |
| * config/arm/arm.c (arm_expand_divmod_libfunc): Pass mode instead of |
| GET_MODE (op0) or GET_MODE (op1) to emit_library_call_value. |
| |
| 2020-10-08 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97325 |
| * gimple-range.cc (gimple_ranger::range_of_builtin_call): Handle |
| negative numbers in __builtin_ffs and __builtin_popcount. |
| |
| 2020-10-08 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97315 |
| * range-op.cc (value_range_with_overflow): Change any |
| non-overflow calculation in which both bounds are |
| overflow/underflow to be undefined. |
| |
| 2020-10-08 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/97315 |
| * gimple-ssa-evrp.c (hybrid_folder::choose_value): Removes the |
| trap and instead annotates the listing. |
| |
| 2020-10-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR sanitizer/97294 |
| * tree-cfg.c (move_block_to_fn): Call notice_special_calls on |
| call stmts being moved into dest_cfun. |
| * omp-low.c (lower_rec_input_clauses): Set cfun->calls_alloca when |
| adding __builtin_alloca_with_align call without gimplification. |
| |
| 2020-10-07 Aldy Hernandez <aldyh@redhat.com> |
| |
| * common.opt (-fevrp-mode): Rename and move... |
| * params.opt (--param=evrp-mode): ...here. |
| * gimple-range.h (DEBUG_RANGE_CACHE): Use param_evrp_mode instead |
| of flag_evrp_mode. |
| * gimple-ssa-evrp.c (rvrp_folder): Same. |
| (hybrid_folder): Same. |
| (execute_early_vrp): Same. |
| |
| 2020-10-07 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97307 |
| * tree-ssa-sink.c (statement_sink_location): Change heuristic |
| for not skipping stores to look for virtual definitions |
| rather than uses. |
| |
| 2020-10-07 Andrew MacLeod <amacleod@redhat.com> |
| |
| * value-range.h (irange_allocator::allocate): Allocate in two hunks |
| instead of using the variably-sized trailing array approach. |
| |
| 2020-10-07 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/invoke.texi (-fdiagnostics-plain-output): Add |
| -fdiagnostics-path-format=separate-events to list of |
| options injected by -fdiagnostics-plain-output. |
| * opts-common.c (decode_cmdline_options_to_array): Likewise. |
| |
| 2020-10-07 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/96394 |
| * ipa-prop.c (update_indirect_edges_after_inlining): Do not add |
| resolved speculation edges to vector of new direct edges even in |
| presence of multiple speculative direct edges for a single call. |
| |
| 2020-10-07 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.md (unspec): Add UNSPEC_ADDPTR. |
| (addptrdi3): Add SGPR alternative. |
| |
| 2020-10-07 Mark Wielaard <mark@klomp.org> |
| |
| * dwarf2out.c (add_filepath_AT_string): New function. |
| (asm_outputs_debug_line_str): Likewise. |
| (add_filename_attribute): Likewise. |
| (add_comp_dir_attribute): Call add_filepath_AT_string. |
| (gen_compile_unit_die): Call add_filename_attribute for name. |
| (init_sections_and_labels): Init debug_line_str_section when |
| asm_outputs_debug_line_str return true. |
| (dwarf2out_early_finish): Remove DW_AT_name and DW_AT_comp_dir |
| hack and call add_filename_attribute for the remap_debug_filename. |
| |
| 2020-10-07 Jakub Jelinek <jakub@redhat.com> |
| |
| * configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG, |
| HAVE_AS_WORKING_DWARF_4_FLAG): New tests. |
| * gcc.c (ASM_DEBUG_DWARF_OPTION): Define. |
| (ASM_DEBUG_SPEC): Use ASM_DEBUG_DWARF_OPTION instead of |
| "--gdwarf2". Use %{cond:opt1;:opt2} style. |
| (ASM_DEBUG_OPTION_DWARF_OPT): Define. |
| (ASM_DEBUG_OPTION_SPEC): Define. |
| (asm_debug_option): New variable. |
| (asm_options): Add "%(asm_debug_option)". |
| (static_specs): Add asm_debug_option entry. |
| (static_spec_functions): Add dwarf-version-gt. |
| (debug_level_greater_than_spec_func): New function. |
| * config/darwin.h (ASM_DEBUG_OPTION_SPEC): Define. |
| * config/darwin9.h (ASM_DEBUG_OPTION_SPEC): Redefine. |
| * config.in: Regenerated. |
| * configure: Regenerated. |
| |
| 2020-10-07 Jakub Jelinek <jakub@redhat.com> |
| |
| PR bootstrap/97305 |
| * optc-save-gen.awk: Don't declare mask variable if explicit_mask |
| array is not present. |
| |
| 2020-10-07 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-expand.c (expand_omp_simd): Don't emit MIN_EXPR and PLUS_EXPR |
| at the end of entry_bb and innermost init_bb, instead force arguments |
| for MIN_EXPR into temporaries in both cases and jump to a new bb that |
| performs MIN_EXPR and PLUS_EXPR. |
| |
| 2020-10-07 Tom de Vries <tdevries@suse.de> |
| |
| * tree-ssa-loop-ch.c (ch_base::copy_headers): Add missing NULL test |
| for dump_file. |
| |
| 2020-10-06 Andrew MacLeod <amacleod@redhat.com> |
| |
| * flag-types.h (enum evrp_mode): New enumerated type EVRP_MODE_*. |
| * common.opt (fevrp-mode): New undocumented flag. |
| * gimple-ssa-evrp.c: Include gimple-range.h |
| (class rvrp_folder): EVRP folding using ranger exclusively. |
| (rvrp_folder::rvrp_folder): New. |
| (rvrp_folder::~rvrp_folder): New. |
| (rvrp_folder::value_of_expr): New. Use rangers value_of_expr. |
| (rvrp_folder::value_on_edge): New. Use rangers value_on_edge. |
| (rvrp_folder::value_of_Stmt): New. Use rangers value_of_stmt. |
| (rvrp_folder::fold_stmt): New. Call the simplifier. |
| (class hybrid_folder): EVRP folding using both engines. |
| (hybrid_folder::hybrid_folder): New. |
| (hybrid_folder::~hybrid_folder): New. |
| (hybrid_folder::fold_stmt): New. Simplify with one engne, then the |
| other. |
| (hybrid_folder::value_of_expr): New. Use both value routines. |
| (hybrid_folder::value_on_edge): New. Use both value routines. |
| (hybrid_folder::value_of_stmt): New. Use both value routines. |
| (hybrid_folder::choose_value): New. Choose between range_analzyer and |
| rangers values. |
| (execute_early_vrp): Choose a folder based on flag_evrp_mode. |
| * vr-values.c (simplify_using_ranges::fold_cond): Try range_of_stmt |
| first to see if it returns a value. |
| (simplify_using_ranges::simplify_switch_using_ranges): Return true if |
| any changes were made to the switch. |
| |
| 2020-10-06 Andrew MacLeod <amacleod@redhat.com> |
| |
| * Makefile.in (OBJS): Add gimple-range*.o. |
| * gimple-range.h: New file. |
| * gimple-range.cc: New file. |
| * gimple-range-cache.h: New file. |
| * gimple-range-cache.cc: New file. |
| * gimple-range-edge.h: New file. |
| * gimple-range-edge.cc: New file. |
| * gimple-range-gori.h: New file. |
| * gimple-range-gori.cc: New file. |
| |
| 2020-10-06 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/arm/arm.c (arm_preferred_simd_mode): Enable MVE SIMD modes. |
| |
| 2020-10-06 Tom de Vries <tdevries@suse.de> |
| |
| PR middle-end/90861 |
| * gimplify.c (gimplify_bind_expr): Handle lookup in |
| oacc_declare_returns using key with decl-expr. |
| |
| 2020-10-06 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/iterators.md (MVE_types): Move mode iterator from mve.md to |
| iterators.md. |
| (MVE_VLD_ST): Likewise. |
| (MVE_0): Likewise. |
| (MVE_1): Likewise. |
| (MVE_3): Likewise. |
| (MVE_2): Likewise. |
| (MVE_5): Likewise. |
| (MVE_6): Likewise. |
| (MVE_CNVT): Move mode attribute iterator from mve.md to iterators.md. |
| (MVE_LANES): Likewise. |
| (MVE_constraint): Likewise. |
| (MVE_constraint1): Likewise. |
| (MVE_constraint2): Likewise. |
| (MVE_constraint3): Likewise. |
| (MVE_pred): Likewise. |
| (MVE_pred1): Likewise. |
| (MVE_pred2): Likewise. |
| (MVE_pred3): Likewise. |
| (MVE_B_ELEM): Likewise. |
| (MVE_H_ELEM): Likewise. |
| (V_sz_elem1): Likewise. |
| (V_extr_elem): Likewise. |
| (earlyclobber_32): Likewise. |
| (supf): Move int attribute from mve.md to iterators.md. |
| (mode1): Likewise. |
| (VCVTQ_TO_F): Move int iterator from mve.md to iterators.md. |
| (VMVNQ_N): Likewise. |
| (VREV64Q): Likewise. |
| (VCVTQ_FROM_F): Likewise. |
| (VREV16Q): Likewise. |
| (VCVTAQ): Likewise. |
| (VMVNQ): Likewise. |
| (VDUPQ_N): Likewise. |
| (VCLZQ): Likewise. |
| (VADDVQ): Likewise. |
| (VREV32Q): Likewise. |
| (VMOVLBQ): Likewise. |
| (VMOVLTQ): Likewise. |
| (VCVTPQ): Likewise. |
| (VCVTNQ): Likewise. |
| (VCVTMQ): Likewise. |
| (VADDLVQ): Likewise. |
| (VCTPQ): Likewise. |
| (VCTPQ_M): Likewise. |
| (VCVTQ_N_TO_F): Likewise. |
| (VCREATEQ): Likewise. |
| (VSHRQ_N): Likewise. |
| (VCVTQ_N_FROM_F): Likewise. |
| (VADDLVQ_P): Likewise. |
| (VCMPNEQ): Likewise. |
| (VSHLQ): Likewise. |
| (VABDQ): Likewise. |
| (VADDQ_N): Likewise. |
| (VADDVAQ): Likewise. |
| (VADDVQ_P): Likewise. |
| (VANDQ): Likewise. |
| (VBICQ): Likewise. |
| (VBRSRQ_N): Likewise. |
| (VCADDQ_ROT270): Likewise. |
| (VCADDQ_ROT90): Likewise. |
| (VCMPEQQ): Likewise. |
| (VCMPEQQ_N): Likewise. |
| (VCMPNEQ_N): Likewise. |
| (VEORQ): Likewise. |
| (VHADDQ): Likewise. |
| (VHADDQ_N): Likewise. |
| (VHSUBQ): Likewise. |
| (VHSUBQ_N): Likewise. |
| (VMAXQ): Likewise. |
| (VMAXVQ): Likewise. |
| (VMINQ): Likewise. |
| (VMINVQ): Likewise. |
| (VMLADAVQ): Likewise. |
| (VMULHQ): Likewise. |
| (VMULLBQ_INT): Likewise. |
| (VMULLTQ_INT): Likewise. |
| (VMULQ): Likewise. |
| (VMULQ_N): Likewise. |
| (VORNQ): Likewise. |
| (VORRQ): Likewise. |
| (VQADDQ): Likewise. |
| (VQADDQ_N): Likewise. |
| (VQRSHLQ): Likewise. |
| (VQRSHLQ_N): Likewise. |
| (VQSHLQ): Likewise. |
| (VQSHLQ_N): Likewise. |
| (VQSHLQ_R): Likewise. |
| (VQSUBQ): Likewise. |
| (VQSUBQ_N): Likewise. |
| (VRHADDQ): Likewise. |
| (VRMULHQ): Likewise. |
| (VRSHLQ): Likewise. |
| (VRSHLQ_N): Likewise. |
| (VRSHRQ_N): Likewise. |
| (VSHLQ_N): Likewise. |
| (VSHLQ_R): Likewise. |
| (VSUBQ): Likewise. |
| (VSUBQ_N): Likewise. |
| (VADDLVAQ): Likewise. |
| (VBICQ_N): Likewise. |
| (VMLALDAVQ): Likewise. |
| (VMLALDAVXQ): Likewise. |
| (VMOVNBQ): Likewise. |
| (VMOVNTQ): Likewise. |
| (VORRQ_N): Likewise. |
| (VQMOVNBQ): Likewise. |
| (VQMOVNTQ): Likewise. |
| (VSHLLBQ_N): Likewise. |
| (VSHLLTQ_N): Likewise. |
| (VRMLALDAVHQ): Likewise. |
| (VBICQ_M_N): Likewise. |
| (VCVTAQ_M): Likewise. |
| (VCVTQ_M_TO_F): Likewise. |
| (VQRSHRNBQ_N): Likewise. |
| (VABAVQ): Likewise. |
| (VSHLCQ): Likewise. |
| (VRMLALDAVHAQ): Likewise. |
| (VADDVAQ_P): Likewise. |
| (VCLZQ_M): Likewise. |
| (VCMPEQQ_M_N): Likewise. |
| (VCMPEQQ_M): Likewise. |
| (VCMPNEQ_M_N): Likewise. |
| (VCMPNEQ_M): Likewise. |
| (VDUPQ_M_N): Likewise. |
| (VMAXVQ_P): Likewise. |
| (VMINVQ_P): Likewise. |
| (VMLADAVAQ): Likewise. |
| (VMLADAVQ_P): Likewise. |
| (VMLAQ_N): Likewise. |
| (VMLASQ_N): Likewise. |
| (VMVNQ_M): Likewise. |
| (VPSELQ): Likewise. |
| (VQDMLAHQ_N): Likewise. |
| (VQRDMLAHQ_N): Likewise. |
| (VQRDMLASHQ_N): Likewise. |
| (VQRSHLQ_M_N): Likewise. |
| (VQSHLQ_M_R): Likewise. |
| (VREV64Q_M): Likewise. |
| (VRSHLQ_M_N): Likewise. |
| (VSHLQ_M_R): Likewise. |
| (VSLIQ_N): Likewise. |
| (VSRIQ_N): Likewise. |
| (VMLALDAVQ_P): Likewise. |
| (VQMOVNBQ_M): Likewise. |
| (VMOVLTQ_M): Likewise. |
| (VMOVNBQ_M): Likewise. |
| (VRSHRNTQ_N): Likewise. |
| (VORRQ_M_N): Likewise. |
| (VREV32Q_M): Likewise. |
| (VREV16Q_M): Likewise. |
| (VQRSHRNTQ_N): Likewise. |
| (VMOVNTQ_M): Likewise. |
| (VMOVLBQ_M): Likewise. |
| (VMLALDAVAQ): Likewise. |
| (VQSHRNBQ_N): Likewise. |
| (VSHRNBQ_N): Likewise. |
| (VRSHRNBQ_N): Likewise. |
| (VMLALDAVXQ_P): Likewise. |
| (VQMOVNTQ_M): Likewise. |
| (VMVNQ_M_N): Likewise. |
| (VQSHRNTQ_N): Likewise. |
| (VMLALDAVAXQ): Likewise. |
| (VSHRNTQ_N): Likewise. |
| (VCVTMQ_M): Likewise. |
| (VCVTNQ_M): Likewise. |
| (VCVTPQ_M): Likewise. |
| (VCVTQ_M_N_FROM_F): Likewise. |
| (VCVTQ_M_FROM_F): Likewise. |
| (VRMLALDAVHQ_P): Likewise. |
| (VADDLVAQ_P): Likewise. |
| (VABAVQ_P): Likewise. |
| (VSHLQ_M): Likewise. |
| (VSRIQ_M_N): Likewise. |
| (VSUBQ_M): Likewise. |
| (VCVTQ_M_N_TO_F): Likewise. |
| (VHSUBQ_M): Likewise. |
| (VSLIQ_M_N): Likewise. |
| (VRSHLQ_M): Likewise. |
| (VMINQ_M): Likewise. |
| (VMULLBQ_INT_M): Likewise. |
| (VMULHQ_M): Likewise. |
| (VMULQ_M): Likewise. |
| (VHSUBQ_M_N): Likewise. |
| (VHADDQ_M_N): Likewise. |
| (VORRQ_M): Likewise. |
| (VRMULHQ_M): Likewise. |
| (VQADDQ_M): Likewise. |
| (VRSHRQ_M_N): Likewise. |
| (VQSUBQ_M_N): Likewise. |
| (VADDQ_M): Likewise. |
| (VORNQ_M): Likewise. |
| (VRHADDQ_M): Likewise. |
| (VQSHLQ_M): Likewise. |
| (VANDQ_M): Likewise. |
| (VBICQ_M): Likewise. |
| (VSHLQ_M_N): Likewise. |
| (VCADDQ_ROT270_M): Likewise. |
| (VQRSHLQ_M): Likewise. |
| (VQADDQ_M_N): Likewise. |
| (VADDQ_M_N): Likewise. |
| (VMAXQ_M): Likewise. |
| (VQSUBQ_M): Likewise. |
| (VMLASQ_M_N): Likewise. |
| (VMLADAVAQ_P): Likewise. |
| (VBRSRQ_M_N): Likewise. |
| (VMULQ_M_N): Likewise. |
| (VCADDQ_ROT90_M): Likewise. |
| (VMULLTQ_INT_M): Likewise. |
| (VEORQ_M): Likewise. |
| (VSHRQ_M_N): Likewise. |
| (VSUBQ_M_N): Likewise. |
| (VHADDQ_M): Likewise. |
| (VABDQ_M): Likewise. |
| (VMLAQ_M_N): Likewise. |
| (VQSHLQ_M_N): Likewise. |
| (VMLALDAVAQ_P): Likewise. |
| (VMLALDAVAXQ_P): Likewise. |
| (VQRSHRNBQ_M_N): Likewise. |
| (VQRSHRNTQ_M_N): Likewise. |
| (VQSHRNBQ_M_N): Likewise. |
| (VQSHRNTQ_M_N): Likewise. |
| (VRSHRNBQ_M_N): Likewise. |
| (VRSHRNTQ_M_N): Likewise. |
| (VSHLLBQ_M_N): Likewise. |
| (VSHLLTQ_M_N): Likewise. |
| (VSHRNBQ_M_N): Likewise. |
| (VSHRNTQ_M_N): Likewise. |
| (VSTRWSBQ): Likewise. |
| (VSTRBSOQ): Likewise. |
| (VSTRBQ): Likewise. |
| (VLDRBGOQ): Likewise. |
| (VLDRBQ): Likewise. |
| (VLDRWGBQ): Likewise. |
| (VLD1Q): Likewise. |
| (VLDRHGOQ): Likewise. |
| (VLDRHGSOQ): Likewise. |
| (VLDRHQ): Likewise. |
| (VLDRWQ): Likewise. |
| (VLDRDGBQ): Likewise. |
| (VLDRDGOQ): Likewise. |
| (VLDRDGSOQ): Likewise. |
| (VLDRWGOQ): Likewise. |
| (VLDRWGSOQ): Likewise. |
| (VST1Q): Likewise. |
| (VSTRHSOQ): Likewise. |
| (VSTRHSSOQ): Likewise. |
| (VSTRHQ): Likewise. |
| (VSTRWQ): Likewise. |
| (VSTRDSBQ): Likewise. |
| (VSTRDSOQ): Likewise. |
| (VSTRDSSOQ): Likewise. |
| (VSTRWSOQ): Likewise. |
| (VSTRWSSOQ): Likewise. |
| (VSTRWSBWBQ): Likewise. |
| (VLDRWGBWBQ): Likewise. |
| (VSTRDSBWBQ): Likewise. |
| (VLDRDGBWBQ): Likewise. |
| (VADCIQ): Likewise. |
| (VADCIQ_M): Likewise. |
| (VSBCQ): Likewise. |
| (VSBCQ_M): Likewise. |
| (VSBCIQ): Likewise. |
| (VSBCIQ_M): Likewise. |
| (VADCQ): Likewise. |
| (VADCQ_M): Likewise. |
| (UQRSHLLQ): Likewise. |
| (SQRSHRLQ): Likewise. |
| (VSHLCQ_M): Likewise. |
| * config/arm/mve.md (MVE_types): Move mode iterator to iterators.md from mve.md. |
| (MVE_VLD_ST): Likewise. |
| (MVE_0): Likewise. |
| (MVE_1): Likewise. |
| (MVE_3): Likewise. |
| (MVE_2): Likewise. |
| (MVE_5): Likewise. |
| (MVE_6): Likewise. |
| (MVE_CNVT): Move mode attribute iterator to iterators.md from mve.md. |
| (MVE_LANES): Likewise. |
| (MVE_constraint): Likewise. |
| (MVE_constraint1): Likewise. |
| (MVE_constraint2): Likewise. |
| (MVE_constraint3): Likewise. |
| (MVE_pred): Likewise. |
| (MVE_pred1): Likewise. |
| (MVE_pred2): Likewise. |
| (MVE_pred3): Likewise. |
| (MVE_B_ELEM): Likewise. |
| (MVE_H_ELEM): Likewise. |
| (V_sz_elem1): Likewise. |
| (V_extr_elem): Likewise. |
| (earlyclobber_32): Likewise. |
| (supf): Move int attribute to iterators.md from mve.md. |
| (mode1): Likewise. |
| (VCVTQ_TO_F): Move int iterator to iterators.md from mve.md. |
| (VMVNQ_N): Likewise. |
| (VREV64Q): Likewise. |
| (VCVTQ_FROM_F): Likewise. |
| (VREV16Q): Likewise. |
| (VCVTAQ): Likewise. |
| (VMVNQ): Likewise. |
| (VDUPQ_N): Likewise. |
| (VCLZQ): Likewise. |
| (VADDVQ): Likewise. |
| (VREV32Q): Likewise. |
| (VMOVLBQ): Likewise. |
| (VMOVLTQ): Likewise. |
| (VCVTPQ): Likewise. |
| (VCVTNQ): Likewise. |
| (VCVTMQ): Likewise. |
| (VADDLVQ): Likewise. |
| (VCTPQ): Likewise. |
| (VCTPQ_M): Likewise. |
| (VCVTQ_N_TO_F): Likewise. |
| (VCREATEQ): Likewise. |
| (VSHRQ_N): Likewise. |
| (VCVTQ_N_FROM_F): Likewise. |
| (VADDLVQ_P): Likewise. |
| (VCMPNEQ): Likewise. |
| (VSHLQ): Likewise. |
| (VABDQ): Likewise. |
| (VADDQ_N): Likewise. |
| (VADDVAQ): Likewise. |
| (VADDVQ_P): Likewise. |
| (VANDQ): Likewise. |
| (VBICQ): Likewise. |
| (VBRSRQ_N): Likewise. |
| (VCADDQ_ROT270): Likewise. |
| (VCADDQ_ROT90): Likewise. |
| (VCMPEQQ): Likewise. |
| (VCMPEQQ_N): Likewise. |
| (VCMPNEQ_N): Likewise. |
| (VEORQ): Likewise. |
| (VHADDQ): Likewise. |
| (VHADDQ_N): Likewise. |
| (VHSUBQ): Likewise. |
| (VHSUBQ_N): Likewise. |
| (VMAXQ): Likewise. |
| (VMAXVQ): Likewise. |
| (VMINQ): Likewise. |
| (VMINVQ): Likewise. |
| (VMLADAVQ): Likewise. |
| (VMULHQ): Likewise. |
| (VMULLBQ_INT): Likewise. |
| (VMULLTQ_INT): Likewise. |
| (VMULQ): Likewise. |
| (VMULQ_N): Likewise. |
| (VORNQ): Likewise. |
| (VORRQ): Likewise. |
| (VQADDQ): Likewise. |
| (VQADDQ_N): Likewise. |
| (VQRSHLQ): Likewise. |
| (VQRSHLQ_N): Likewise. |
| (VQSHLQ): Likewise. |
| (VQSHLQ_N): Likewise. |
| (VQSHLQ_R): Likewise. |
| (VQSUBQ): Likewise. |
| (VQSUBQ_N): Likewise. |
| (VRHADDQ): Likewise. |
| (VRMULHQ): Likewise. |
| (VRSHLQ): Likewise. |
| (VRSHLQ_N): Likewise. |
| (VRSHRQ_N): Likewise. |
| (VSHLQ_N): Likewise. |
| (VSHLQ_R): Likewise. |
| (VSUBQ): Likewise. |
| (VSUBQ_N): Likewise. |
| (VADDLVAQ): Likewise. |
| (VBICQ_N): Likewise. |
| (VMLALDAVQ): Likewise. |
| (VMLALDAVXQ): Likewise. |
| (VMOVNBQ): Likewise. |
| (VMOVNTQ): Likewise. |
| (VORRQ_N): Likewise. |
| (VQMOVNBQ): Likewise. |
| (VQMOVNTQ): Likewise. |
| (VSHLLBQ_N): Likewise. |
| (VSHLLTQ_N): Likewise. |
| (VRMLALDAVHQ): Likewise. |
| (VBICQ_M_N): Likewise. |
| (VCVTAQ_M): Likewise. |
| (VCVTQ_M_TO_F): Likewise. |
| (VQRSHRNBQ_N): Likewise. |
| (VABAVQ): Likewise. |
| (VSHLCQ): Likewise. |
| (VRMLALDAVHAQ): Likewise. |
| (VADDVAQ_P): Likewise. |
| (VCLZQ_M): Likewise. |
| (VCMPEQQ_M_N): Likewise. |
| (VCMPEQQ_M): Likewise. |
| (VCMPNEQ_M_N): Likewise. |
| (VCMPNEQ_M): Likewise. |
| (VDUPQ_M_N): Likewise. |
| (VMAXVQ_P): Likewise. |
| (VMINVQ_P): Likewise. |
| (VMLADAVAQ): Likewise. |
| (VMLADAVQ_P): Likewise. |
| (VMLAQ_N): Likewise. |
| (VMLASQ_N): Likewise. |
| (VMVNQ_M): Likewise. |
| (VPSELQ): Likewise. |
| (VQDMLAHQ_N): Likewise. |
| (VQRDMLAHQ_N): Likewise. |
| (VQRDMLASHQ_N): Likewise. |
| (VQRSHLQ_M_N): Likewise. |
| (VQSHLQ_M_R): Likewise. |
| (VREV64Q_M): Likewise. |
| (VRSHLQ_M_N): Likewise. |
| (VSHLQ_M_R): Likewise. |
| (VSLIQ_N): Likewise. |
| (VSRIQ_N): Likewise. |
| (VMLALDAVQ_P): Likewise. |
| (VQMOVNBQ_M): Likewise. |
| (VMOVLTQ_M): Likewise. |
| (VMOVNBQ_M): Likewise. |
| (VRSHRNTQ_N): Likewise. |
| (VORRQ_M_N): Likewise. |
| (VREV32Q_M): Likewise. |
| (VREV16Q_M): Likewise. |
| (VQRSHRNTQ_N): Likewise. |
| (VMOVNTQ_M): Likewise. |
| (VMOVLBQ_M): Likewise. |
| (VMLALDAVAQ): Likewise. |
| (VQSHRNBQ_N): Likewise. |
| (VSHRNBQ_N): Likewise. |
| (VRSHRNBQ_N): Likewise. |
| (VMLALDAVXQ_P): Likewise. |
| (VQMOVNTQ_M): Likewise. |
| (VMVNQ_M_N): Likewise. |
| (VQSHRNTQ_N): Likewise. |
| (VMLALDAVAXQ): Likewise. |
| (VSHRNTQ_N): Likewise. |
| (VCVTMQ_M): Likewise. |
| (VCVTNQ_M): Likewise. |
| (VCVTPQ_M): Likewise. |
| (VCVTQ_M_N_FROM_F): Likewise. |
| (VCVTQ_M_FROM_F): Likewise. |
| (VRMLALDAVHQ_P): Likewise. |
| (VADDLVAQ_P): Likewise. |
| (VABAVQ_P): Likewise. |
| (VSHLQ_M): Likewise. |
| (VSRIQ_M_N): Likewise. |
| (VSUBQ_M): Likewise. |
| (VCVTQ_M_N_TO_F): Likewise. |
| (VHSUBQ_M): Likewise. |
| (VSLIQ_M_N): Likewise. |
| (VRSHLQ_M): Likewise. |
| (VMINQ_M): Likewise. |
| (VMULLBQ_INT_M): Likewise. |
| (VMULHQ_M): Likewise. |
| (VMULQ_M): Likewise. |
| (VHSUBQ_M_N): Likewise. |
| (VHADDQ_M_N): Likewise. |
| (VORRQ_M): Likewise. |
| (VRMULHQ_M): Likewise. |
| (VQADDQ_M): Likewise. |
| (VRSHRQ_M_N): Likewise. |
| (VQSUBQ_M_N): Likewise. |
| (VADDQ_M): Likewise. |
| (VORNQ_M): Likewise. |
| (VRHADDQ_M): Likewise. |
| (VQSHLQ_M): Likewise. |
| (VANDQ_M): Likewise. |
| (VBICQ_M): Likewise. |
| (VSHLQ_M_N): Likewise. |
| (VCADDQ_ROT270_M): Likewise. |
| (VQRSHLQ_M): Likewise. |
| (VQADDQ_M_N): Likewise. |
| (VADDQ_M_N): Likewise. |
| (VMAXQ_M): Likewise. |
| (VQSUBQ_M): Likewise. |
| (VMLASQ_M_N): Likewise. |
| (VMLADAVAQ_P): Likewise. |
| (VBRSRQ_M_N): Likewise. |
| (VMULQ_M_N): Likewise. |
| (VCADDQ_ROT90_M): Likewise. |
| (VMULLTQ_INT_M): Likewise. |
| (VEORQ_M): Likewise. |
| (VSHRQ_M_N): Likewise. |
| (VSUBQ_M_N): Likewise. |
| (VHADDQ_M): Likewise. |
| (VABDQ_M): Likewise. |
| (VMLAQ_M_N): Likewise. |
| (VQSHLQ_M_N): Likewise. |
| (VMLALDAVAQ_P): Likewise. |
| (VMLALDAVAXQ_P): Likewise. |
| (VQRSHRNBQ_M_N): Likewise. |
| (VQRSHRNTQ_M_N): Likewise. |
| (VQSHRNBQ_M_N): Likewise. |
| (VQSHRNTQ_M_N): Likewise. |
| (VRSHRNBQ_M_N): Likewise. |
| (VRSHRNTQ_M_N): Likewise. |
| (VSHLLBQ_M_N): Likewise. |
| (VSHLLTQ_M_N): Likewise. |
| (VSHRNBQ_M_N): Likewise. |
| (VSHRNTQ_M_N): Likewise. |
| (VSTRWSBQ): Likewise. |
| (VSTRBSOQ): Likewise. |
| (VSTRBQ): Likewise. |
| (VLDRBGOQ): Likewise. |
| (VLDRBQ): Likewise. |
| (VLDRWGBQ): Likewise. |
| (VLD1Q): Likewise. |
| (VLDRHGOQ): Likewise. |
| (VLDRHGSOQ): Likewise. |
| (VLDRHQ): Likewise. |
| (VLDRWQ): Likewise. |
| (VLDRDGBQ): Likewise. |
| (VLDRDGOQ): Likewise. |
| (VLDRDGSOQ): Likewise. |
| (VLDRWGOQ): Likewise. |
| (VLDRWGSOQ): Likewise. |
| (VST1Q): Likewise. |
| (VSTRHSOQ): Likewise. |
| (VSTRHSSOQ): Likewise. |
| (VSTRHQ): Likewise. |
| (VSTRWQ): Likewise. |
| (VSTRDSBQ): Likewise. |
| (VSTRDSOQ): Likewise. |
| (VSTRDSSOQ): Likewise. |
| (VSTRWSOQ): Likewise. |
| (VSTRWSSOQ): Likewise. |
| (VSTRWSBWBQ): Likewise. |
| (VLDRWGBWBQ): Likewise. |
| (VSTRDSBWBQ): Likewise. |
| (VLDRDGBWBQ): Likewise. |
| (VADCIQ): Likewise. |
| (VADCIQ_M): Likewise. |
| (VSBCQ): Likewise. |
| (VSBCQ_M): Likewise. |
| (VSBCIQ): Likewise. |
| (VSBCIQ_M): Likewise. |
| (VADCQ): Likewise. |
| (VADCQ_M): Likewise. |
| (UQRSHLLQ): Likewise. |
| (SQRSHRLQ): Likewise. |
| (VSHLCQ_M): Likewise. |
| (define_c_enum "unspec"): Move MVE enumerator to unspecs.md from mve.md. |
| * config/arm/unspecs.md (define_c_enum "unspec"): Move MVE enumerator from |
| mve.md to unspecs.md. |
| |
| 2020-10-06 Martin Liska <mliska@suse.cz> |
| |
| * common.opt: Remove -fdbg-cnt-list from deferred options. |
| * dbgcnt.c (dbg_cnt_set_limit_by_index): Make a copy |
| to original_limits. |
| (dbg_cnt_list_all_counters): Print also current counter value |
| and print to stderr. |
| * opts-global.c (handle_common_deferred_options): Do not handle |
| -fdbg-cnt-list. |
| * opts.c (common_handle_option): Likewise. |
| * toplev.c (finalize): Handle it after compilation here. |
| |
| 2020-10-06 Martin Liska <mliska@suse.cz> |
| |
| * dbgcnt.c (dbg_cnt): Report also upper limit. |
| |
| 2020-10-06 Tom de Vries <tdevries@suse.de> |
| |
| * tracer.c (count_insns): Rename to ... |
| (analyze_bb): ... this. |
| (cache_can_duplicate_bb_p, cached_can_duplicate_bb_p): New function. |
| (ignore_bb_p): Use cached_can_duplicate_bb_p. |
| (tail_duplicate): Call cache_can_duplicate_bb_p. |
| |
| 2020-10-06 Tom de Vries <tdevries@suse.de> |
| |
| * tracer.c (can_duplicate_insn_p, can_duplicate_bb_no_insn_iter_p) |
| (can_duplicate_bb_p): New function, factored out of ... |
| (ignore_bb_p): ... here. |
| |
| 2020-10-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/97282 |
| * tree-ssa-math-opts.c (divmod_candidate_p): Don't return false for |
| constant op2 if it is not a power of two and the type has precision |
| larger than HOST_BITS_PER_WIDE_INT or BITS_PER_WORD. |
| * internal-fn.c (contains_call_div_mod): New function. |
| (expand_DIVMOD): If last argument is a constant, try to expand it as |
| TRUNC_DIV_EXPR followed by TRUNC_MOD_EXPR, but if the sequence |
| contains any calls or {,U}{DIV,MOD} rtxes, throw it away and use |
| divmod optab or divmod libfunc. |
| |
| 2020-10-06 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.h (irange_allocator::allocate): Increase |
| newir storage by one. |
| |
| 2020-10-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/97289 |
| * omp-offload.c (omp_discover_declare_target_tgt_fn_r): Only follow |
| node->alias_target if it is a FUNCTION_DECL. |
| |
| 2020-10-06 Joe Ramsay <joe.ramsay@arm.com> |
| |
| * config/arm/arm-cpus.in: |
| (ALL_FPU_INTERNAL): Remove vfp_base. |
| (VFPv2): Remove vfp_base. |
| (MVE): Remove vfp_base. |
| (vfp_base): Redefine as implied bit dependent on MVE or FP |
| (cortex-m55): Add flags to disable MVE, MVE FP, FP and DSP extensions. |
| * config/arm/arm.c (arm_configure_build_target): Add implied bits to ISA. |
| * config/arm/parsecpu.awk: |
| (gen_isa): Print implied bits and their dependencies to ISA header. |
| (gen_data): Add parsing for implied feature bits. |
| |
| 2020-10-06 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * doc/invoke.texi: Add z15/arch13 to the list of documented |
| -march/-mtune options. |
| |
| 2020-10-05 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.cc (irange::legacy_intersect): Only handle |
| legacy ranges. |
| (irange::legacy_union): Same. |
| (irange::union_): When unioning legacy with non-legacy, |
| first convert to legacy and do everything in legacy mode. |
| (irange::intersect): Same, but for intersect. |
| * range-op.cc (range_tests): Adjust for above changes. |
| |
| 2020-10-05 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op.cc (operator_div::wi_fold): Return varying for |
| division by zero. |
| (class operator_rshift): Move class up. |
| (operator_abs::wi_fold): Return [-MIN,-MIN] for ABS([-MIN,-MIN]). |
| (operator_tests): Adjust tests. |
| |
| 2020-10-05 Tom de Vries <tdevries@suse.de> |
| |
| * tracer.c (ignore_bb_p): Ignore GOMP_SIMT_XCHG_*. |
| |
| 2020-10-05 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/arm/arm-cpus.in (neoverse-v1): Add missing vendor and |
| part numbers. |
| |
| 2020-10-05 Tom de Vries <tdevries@suse.de> |
| |
| * tracer.c (ignore_bb_p): Remove incorrect suggestion. |
| |
| 2020-10-05 Jakub Jelinek <jakub@redhat.com> |
| |
| * opth-gen.awk: Don't emit explicit_mask array if n_target_explicit |
| is equal to n_target_explicit_mask. |
| * optc-save-gen.awk: Compute has_target_explicit_mask and if false, |
| don't emit code iterating over explicit_mask array elements. Stream |
| also explicit_mask_* target members. |
| |
| 2020-10-05 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimple-ssa-store-merging.c |
| (imm_store_chain_info::output_merged_store): Use ~0U instead of ~0 in |
| unsigned int array initializer. |
| |
| 2020-10-05 Tom de Vries <tdevries@suse.de> |
| |
| PR fortran/95654 |
| * tracer.c (ignore_bb_p): Ignore GOMP_SIMT_ENTER_ALLOC, |
| GOMP_SIMT_VOTE_ANY and GOMP_SIMT_EXIT. |
| |
| 2020-10-03 Jakub Jelinek <jakub@redhat.com> |
| |
| * opth-gen.awk: For variables referenced in Mask and InverseMask, |
| don't use the explicit_mask bitmask array, but add separate |
| explicit_mask_* members with the same types as the variables. |
| * optc-save-gen.awk: Save, restore, compare and hash the separate |
| explicit_mask_* members. |
| |
| 2020-10-03 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-modref-tree.c (test_insert_search_collapse): Update andling |
| of accesses. |
| (test_merge): Likewise. |
| * ipa-modref-tree.h (struct modref_access_node): Add offset, size, |
| max_size, parm_offset and parm_offset_known. |
| (modref_access_node::useful_p): Constify. |
| (modref_access_node::range_info_useful_p): New predicate. |
| (modref_access_node::operator==): New. |
| (struct modref_parm_map): New structure. |
| (modref_tree::merge): Update for racking parameters) |
| * ipa-modref.c (dump_access): Dump new fields. |
| (get_access): Fill in new fields. |
| (merge_call_side_effects): Update handling of parm map. |
| (write_modref_records): Stream new fields. |
| (read_modref_records): Stream new fields. |
| (compute_parm_map): Update for new parm map. |
| (ipa_merge_modref_summary_after_inlining): Update. |
| (modref_propagate_in_scc): Update. |
| * tree-ssa-alias.c (modref_may_conflict): Handle known ranges. |
| |
| 2020-10-03 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR other/97280 |
| * doc/extend.texi: Replace roudnevenl with roundevenl |
| |
| 2020-10-02 David Edelsohn <dje.gcc@gmail.com> |
| Andrew MacLeod <amacleod@redhat.com> |
| |
| * config/rs6000/rs6000.c: Include ssa.h. Reorder some headers. |
| * config/rs6000/rs6000-call.c: Same. |
| |
| 2020-10-02 Martin Jambor <mjambor@suse.cz> |
| |
| * params.opt (ipa-cp-large-unit-insns): New parameter. |
| * ipa-cp.c (get_max_overall_size): Use the new parameter. |
| |
| 2020-10-02 Martin Jambor <mjambor@suse.cz> |
| |
| * ipa-cp.c (estimate_local_effects): Add overeall_size to dumped |
| string. |
| (decide_about_value): Add dumping new overall_size. |
| |
| 2020-10-02 Martin Jambor <mjambor@suse.cz> |
| |
| * ipa-fnsummary.h (ipa_freqcounting_predicate): New type. |
| (ipa_fn_summary): Change the type of loop_iterations and loop_strides |
| to vectors of ipa_freqcounting_predicate. |
| (ipa_fn_summary::ipa_fn_summary): Construct the new vectors. |
| (ipa_call_estimates): New fields loops_with_known_iterations and |
| loops_with_known_strides. |
| * ipa-cp.c (hint_time_bonus): Multiply param_ipa_cp_loop_hint_bonus |
| with the expected frequencies of loops with known iteration count or |
| stride. |
| * ipa-fnsummary.c (add_freqcounting_predicate): New function. |
| (ipa_fn_summary::~ipa_fn_summary): Release the new vectors instead of |
| just two predicates. |
| (remap_hint_predicate_after_duplication): Replace with function |
| remap_freqcounting_preds_after_dup. |
| (ipa_fn_summary_t::duplicate): Use it or duplicate new vectors. |
| (ipa_dump_fn_summary): Dump the new vectors. |
| (analyze_function_body): Compute the loop property vectors. |
| (ipa_call_context::estimate_size_and_time): Calculate also |
| loops_with_known_iterations and loops_with_known_strides. Adjusted |
| dumping accordinly. |
| (remap_hint_predicate): Replace with function |
| remap_freqcounting_predicate. |
| (ipa_merge_fn_summary_after_inlining): Use it. |
| (inline_read_section): Stream loopcounting vectors instead of two |
| simple predicates. |
| (ipa_fn_summary_write): Likewise. |
| * params.opt (ipa-max-loop-predicates): New parameter. |
| * doc/invoke.texi (ipa-max-loop-predicates): Document new param. |
| |
| 2020-10-02 Martin Jambor <mjambor@suse.cz> |
| |
| * ipa-inline-analysis.c (do_estimate_edge_time): Adjusted to use |
| ipa_call_estimates. |
| (do_estimate_edge_size): Likewise. |
| (do_estimate_edge_hints): Likewise. |
| * ipa-fnsummary.h (struct ipa_call_estimates): New type. |
| (ipa_call_context::estimate_size_and_time): Adjusted declaration. |
| (estimate_ipcp_clone_size_and_time): Likewise. |
| * ipa-cp.c (hint_time_bonus): Changed the type of the second argument |
| to ipa_call_estimates. |
| (perform_estimation_of_a_value): Adjusted to use ipa_call_estimates. |
| (estimate_local_effects): Likewise. |
| * ipa-fnsummary.c (ipa_call_context::estimate_size_and_time): Adjusted |
| to return estimates in a single ipa_call_estimates parameter. |
| (estimate_ipcp_clone_size_and_time): Likewise. |
| |
| 2020-10-02 Martin Jambor <mjambor@suse.cz> |
| |
| * ipa-fnsummary.h (ipa_cached_call_context): New forward declaration |
| and class. |
| (class ipa_call_context): Make friend ipa_cached_call_context. Moved |
| methods duplicate_from and release to it too. |
| * ipa-fnsummary.c (ipa_call_context::duplicate_from): Moved to class |
| ipa_cached_call_context. |
| (ipa_call_context::release): Likewise, removed the parameter. |
| * ipa-inline-analysis.c (node_context_cache_entry): Change the type of |
| ctx to ipa_cached_call_context. |
| (do_estimate_edge_time): Remove parameter from the call to |
| ipa_cached_call_context::release. |
| |
| 2020-10-02 Martin Jambor <mjambor@suse.cz> |
| |
| * ipa-prop.h (ipa_auto_call_arg_values): New type. |
| (class ipa_call_arg_values): Likewise. |
| (ipa_get_indirect_edge_target): Replaced vector arguments with |
| ipa_call_arg_values in declaration. Added an overload for |
| ipa_auto_call_arg_values. |
| * ipa-fnsummary.h (ipa_call_context): Removed members m_known_vals, |
| m_known_contexts, m_known_aggs, duplicate_from, release and equal_to, |
| new members m_avals, store_to_cache and equivalent_to_p. Adjusted |
| construcotr arguments. |
| (estimate_ipcp_clone_size_and_time): Replaced vector arguments |
| with ipa_auto_call_arg_values in declaration. |
| (evaluate_properties_for_edge): Likewise. |
| * ipa-cp.c (ipa_get_indirect_edge_target): Adjusted to work on |
| ipa_call_arg_values rather than on separate vectors. Added an |
| overload for ipa_auto_call_arg_values. |
| (devirtualization_time_bonus): Adjusted to work on |
| ipa_auto_call_arg_values rather than on separate vectors. |
| (gather_context_independent_values): Adjusted to work on |
| ipa_auto_call_arg_values rather than on separate vectors. |
| (perform_estimation_of_a_value): Likewise. |
| (estimate_local_effects): Likewise. |
| (modify_known_vectors_with_val): Adjusted both variants to work on |
| ipa_auto_call_arg_values and rename them to |
| copy_known_vectors_add_val. |
| (decide_about_value): Adjusted to work on ipa_call_arg_values rather |
| than on separate vectors. |
| (decide_whether_version_node): Likewise. |
| * ipa-fnsummary.c (evaluate_conditions_for_known_args): Likewise. |
| (evaluate_properties_for_edge): Likewise. |
| (ipa_fn_summary_t::duplicate): Likewise. |
| (estimate_edge_devirt_benefit): Adjusted to work on |
| ipa_call_arg_values rather than on separate vectors. |
| (estimate_edge_size_and_time): Likewise. |
| (estimate_calls_size_and_time_1): Likewise. |
| (summarize_calls_size_and_time): Adjusted calls to |
| estimate_edge_size_and_time. |
| (estimate_calls_size_and_time): Adjusted to work on |
| ipa_call_arg_values rather than on separate vectors. |
| (ipa_call_context::ipa_call_context): Construct from a pointer to |
| ipa_auto_call_arg_values instead of inividual vectors. |
| (ipa_call_context::duplicate_from): Adjusted to access vectors within |
| m_avals. |
| (ipa_call_context::release): Likewise. |
| (ipa_call_context::equal_to): Likewise. |
| (ipa_call_context::estimate_size_and_time): Adjusted to work on |
| ipa_call_arg_values rather than on separate vectors. |
| (estimate_ipcp_clone_size_and_time): Adjusted to work with |
| ipa_auto_call_arg_values rather than on separate vectors. |
| (ipa_merge_fn_summary_after_inlining): Likewise. Adjusted call to |
| estimate_edge_size_and_time. |
| (ipa_update_overall_fn_summary): Adjusted call to |
| estimate_edge_size_and_time. |
| * ipa-inline-analysis.c (do_estimate_edge_time): Adjusted to work with |
| ipa_auto_call_arg_values rather than with separate vectors. |
| (do_estimate_edge_size): Likewise. |
| (do_estimate_edge_hints): Likewise. |
| * ipa-prop.c (ipa_auto_call_arg_values::~ipa_auto_call_arg_values): |
| New destructor. |
| |
| 2020-10-02 Joe Ramsay <joe.ramsay@arm.com> |
| |
| * config/arm/arm_mve.h (__arm_vmaxnmavq): Remove coercion of scalar |
| argument. |
| (__arm_vmaxnmvq): Likewise. |
| (__arm_vminnmavq): Likewise. |
| (__arm_vminnmvq): Likewise. |
| (__arm_vmaxnmavq_p): Likewise. |
| (__arm_vmaxnmvq_p): Likewise (and delete duplicate definition). |
| (__arm_vminnmavq_p): Likewise. |
| (__arm_vminnmvq_p): Likewise. |
| (__arm_vmaxavq): Likewise. |
| (__arm_vmaxavq_p): Likewise. |
| (__arm_vmaxvq): Likewise. |
| (__arm_vmaxvq_p): Likewise. |
| (__arm_vminavq): Likewise. |
| (__arm_vminavq_p): Likewise. |
| (__arm_vminvq): Likewise. |
| (__arm_vminvq_p): Likewise. |
| |
| 2020-10-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64.c (neoversev1_tunings): Define. |
| * config/aarch64/aarch64-cores.def (zeus): Use it. |
| (neoverse-v1): Likewise. |
| |
| 2020-10-02 Jan Hubicka <hubicka@ucw.cz> |
| |
| * attr-fnspec.h: Update documentation. |
| (attr_fnsec::return_desc_size): Set to 2 |
| (attr_fnsec::arg_desc_size): Set to 2 |
| * builtin-attrs.def (STR1): Update fnspec. |
| * internal-fn.def (UBSAN_NULL): Update fnspec. |
| (UBSAN_VPTR): Update fnspec. |
| (UBSAN_PTR): Update fnspec. |
| (ASAN_CHECK): Update fnspec. |
| (GOACC_DIM_SIZE): Remove fnspec. |
| (GOACC_DIM_POS): Remove fnspec. |
| * tree-ssa-alias.c (attr_fnspec::verify): Update verification. |
| |
| 2020-10-02 Jan Hubicka <jh@suse.cz> |
| |
| * attr-fnspec.h: New file. |
| * calls.c (decl_return_flags): Use attr_fnspec. |
| * gimple.c (gimple_call_arg_flags): Use attr_fnspec. |
| (gimple_call_return_flags): Use attr_fnspec. |
| * tree-into-ssa.c (pass_build_ssa::execute): Use attr_fnspec. |
| * tree-ssa-alias.c (attr_fnspec::verify): New member fuction. |
| |
| 2020-10-02 Jan Hubicka <jh@suse.cz> |
| |
| * tree-ssa-alias.c (ao_ref_init_from_ptr_and_range): Break out from ... |
| (ao_ref_init_from_ptr_and_size): ... here. |
| |
| 2020-10-02 Jan Hubicka <hubicka@ucw.cz> |
| |
| * data-streamer-in.c (streamer_read_poly_int64): New function. |
| * data-streamer-out.c (streamer_write_poly_int64): New function. |
| * data-streamer.h (streamer_write_poly_int64): Declare. |
| (streamer_read_poly_int64): Declare. |
| |
| 2020-10-02 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (aarch64_sve_pred_dominates_p): |
| Delete. |
| * config/aarch64/aarch64.c (aarch64_sve_pred_dominates_p): Likewise. |
| * config/aarch64/aarch64-sve.md: Add banner comment describing |
| how merging predicated FP operations are represented. |
| (*cond_<SVE_COND_FP_UNARY:optab><mode>_2): Split into... |
| (*cond_<SVE_COND_FP_UNARY:optab><mode>_2_relaxed): ...this and... |
| (*cond_<SVE_COND_FP_UNARY:optab><mode>_2_strict): ...this. |
| (*cond_<SVE_COND_FP_UNARY:optab><mode>_any): Split into... |
| (*cond_<SVE_COND_FP_UNARY:optab><mode>_any_relaxed): ...this and... |
| (*cond_<SVE_COND_FP_UNARY:optab><mode>_any_strict): ...this. |
| (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2): Split into... |
| (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2_relaxed): ...this and... |
| (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2_strict): ...this. |
| (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any): Split into... |
| (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any_relaxed): ...this |
| and... |
| (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_any_strict): ...this. |
| (*cond_<SVE_COND_FP_BINARY:optab><mode>_2): Split into... |
| (*cond_<SVE_COND_FP_BINARY:optab><mode>_2_relaxed): ...this and... |
| (*cond_<SVE_COND_FP_BINARY:optab><mode>_2_strict): ...this. |
| (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_2_const): Split into... |
| (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_2_const_relaxed): ...this |
| and... |
| (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_2_const_strict): ...this. |
| (*cond_<SVE_COND_FP_BINARY:optab><mode>_3): Split into... |
| (*cond_<SVE_COND_FP_BINARY:optab><mode>_3_relaxed): ...this and... |
| (*cond_<SVE_COND_FP_BINARY:optab><mode>_3_strict): ...this. |
| (*cond_<SVE_COND_FP_BINARY:optab><mode>_any): Split into... |
| (*cond_<SVE_COND_FP_BINARY:optab><mode>_any_relaxed): ...this and... |
| (*cond_<SVE_COND_FP_BINARY:optab><mode>_any_strict): ...this. |
| (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_any_const): Split into... |
| (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_any_const_relaxed): ...this |
| and... |
| (*cond_<SVE_COND_FP_BINARY_I1:optab><mode>_any_const_strict): ...this. |
| (*cond_add<mode>_2_const): Split into... |
| (*cond_add<mode>_2_const_relaxed): ...this and... |
| (*cond_add<mode>_2_const_strict): ...this. |
| (*cond_add<mode>_any_const): Split into... |
| (*cond_add<mode>_any_const_relaxed): ...this and... |
| (*cond_add<mode>_any_const_strict): ...this. |
| (*cond_<SVE_COND_FCADD:optab><mode>_2): Split into... |
| (*cond_<SVE_COND_FCADD:optab><mode>_2_relaxed): ...this and... |
| (*cond_<SVE_COND_FCADD:optab><mode>_2_strict): ...this. |
| (*cond_<SVE_COND_FCADD:optab><mode>_any): Split into... |
| (*cond_<SVE_COND_FCADD:optab><mode>_any_relaxed): ...this and... |
| (*cond_<SVE_COND_FCADD:optab><mode>_any_strict): ...this. |
| (*cond_sub<mode>_3_const): Split into... |
| (*cond_sub<mode>_3_const_relaxed): ...this and... |
| (*cond_sub<mode>_3_const_strict): ...this. |
| (*aarch64_pred_abd<mode>): Split into... |
| (*aarch64_pred_abd<mode>_relaxed): ...this and... |
| (*aarch64_pred_abd<mode>_strict): ...this. |
| (*aarch64_cond_abd<mode>_2): Split into... |
| (*aarch64_cond_abd<mode>_2_relaxed): ...this and... |
| (*aarch64_cond_abd<mode>_2_strict): ...this. |
| (*aarch64_cond_abd<mode>_3): Split into... |
| (*aarch64_cond_abd<mode>_3_relaxed): ...this and... |
| (*aarch64_cond_abd<mode>_3_strict): ...this. |
| (*aarch64_cond_abd<mode>_any): Split into... |
| (*aarch64_cond_abd<mode>_any_relaxed): ...this and... |
| (*aarch64_cond_abd<mode>_any_strict): ...this. |
| (*cond_<SVE_COND_FP_TERNARY:optab><mode>_2): Split into... |
| (*cond_<SVE_COND_FP_TERNARY:optab><mode>_2_relaxed): ...this and... |
| (*cond_<SVE_COND_FP_TERNARY:optab><mode>_2_strict): ...this. |
| (*cond_<SVE_COND_FP_TERNARY:optab><mode>_4): Split into... |
| (*cond_<SVE_COND_FP_TERNARY:optab><mode>_4_relaxed): ...this and... |
| (*cond_<SVE_COND_FP_TERNARY:optab><mode>_4_strict): ...this. |
| (*cond_<SVE_COND_FP_TERNARY:optab><mode>_any): Split into... |
| (*cond_<SVE_COND_FP_TERNARY:optab><mode>_any_relaxed): ...this and... |
| (*cond_<SVE_COND_FP_TERNARY:optab><mode>_any_strict): ...this. |
| (*cond_<SVE_COND_FCMLA:optab><mode>_4): Split into... |
| (*cond_<SVE_COND_FCMLA:optab><mode>_4_relaxed): ...this and... |
| (*cond_<SVE_COND_FCMLA:optab><mode>_4_strict): ...this. |
| (*cond_<SVE_COND_FCMLA:optab><mode>_any): Split into... |
| (*cond_<SVE_COND_FCMLA:optab><mode>_any_relaxed): ...this and... |
| (*cond_<SVE_COND_FCMLA:optab><mode>_any_strict): ...this. |
| (*aarch64_pred_fac<cmp_op><mode>): Split into... |
| (*aarch64_pred_fac<cmp_op><mode>_relaxed): ...this and... |
| (*aarch64_pred_fac<cmp_op><mode>_strict): ...this. |
| (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>): Split |
| into... |
| (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed): |
| ...this and... |
| (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict): |
| ...this. |
| (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>): Split |
| into... |
| (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed): |
| ...this and... |
| (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict): |
| ...this. |
| * config/aarch64/aarch64-sve2.md |
| (*cond_<SVE2_COND_FP_UNARY_LONG:optab><mode>): Split into... |
| (*cond_<SVE2_COND_FP_UNARY_LONG:optab><mode>_relaxed): ...this and... |
| (*cond_<SVE2_COND_FP_UNARY_LONG:optab><mode>_strict): ...this. |
| (*cond_<SVE2_COND_FP_UNARY_NARROWB:optab><mode>_any): Split into... |
| (*cond_<SVE2_COND_FP_UNARY_NARROWB:optab><mode>_any_relaxed): ...this |
| and... |
| (*cond_<SVE2_COND_FP_UNARY_NARROWB:optab><mode>_any_strict): ...this. |
| (*cond_<SVE2_COND_INT_UNARY_FP:optab><mode>): Split into... |
| (*cond_<SVE2_COND_INT_UNARY_FP:optab><mode>_relaxed): ...this and... |
| (*cond_<SVE2_COND_INT_UNARY_FP:optab><mode>_strict): ...this. |
| |
| 2020-10-02 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/arm/neon.md (*sub<VDQ:mode>3_neon): Use the new mode macros |
| for the insn condition. |
| (sub<VH:mode>3, *mul<VDQW:mode>3_neon): Likewise. |
| (mul<VDQW:mode>3add<VDQW:mode>_neon): Likewise. |
| (mul<VH:mode>3add<VH:mode>_neon): Likewise. |
| (mul<VDQW:mode>3neg<VDQW:mode>add<VDQW:mode>_neon): Likewise. |
| (fma<VCVTF:mode>4, fma<VH:mode>4, *fmsub<VCVTF:mode>4): Likewise. |
| (quad_halves_<code>v4sf, reduc_plus_scal_<VD:mode>): Likewise. |
| (reduc_plus_scal_<VQ:mode>, reduc_smin_scal_<VD:mode>): Likewise. |
| (reduc_smin_scal_<VQ:mode>, reduc_smax_scal_<VD:mode>): Likewise. |
| (reduc_smax_scal_<VQ:mode>, mul<VH:mode>3): Likewise. |
| (neon_vabd<VF:mode>_2, neon_vabd<VF:mode>_3): Likewise. |
| (fma<VH:mode>4_intrinsic): Delete. |
| (neon_vadd<VCVTF:mode>): Use the new mode macros to decide which |
| form of instruction to generate. |
| (neon_vmla<VDQW:mode>, neon_vmls<VDQW:mode>): Likewise. |
| (neon_vsub<VCVTF:mode>): Likewise. |
| (neon_vfma<VH:mode>): Generate the main fma<mode>4 form instead |
| of using fma<mode>4_intrinsic. |
| |
| 2020-10-02 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/97193 |
| * coverage.c (coverage_init): GCDA note files should not be |
| mangled and should end in output directory. |
| |
| 2020-10-02 Jason Merril <jason@redhat.com> |
| |
| * gimple.h (gimple_call_operator_delete_p): Rename from |
| gimple_call_replaceable_operator_delete_p. |
| * gimple.c (gimple_call_operator_delete_p): Likewise. |
| * tree.h (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): Remove. |
| * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1): Adjust. |
| (propagate_necessity): Likewise. |
| (eliminate_unnecessary_stmts): Likewise. |
| * tree-ssa-structalias.c (find_func_aliases_for_call): Likewise. |
| |
| 2020-10-02 Richard Biener <rguenther@suse.de> |
| |
| * gimple.h (GF_CALL_FROM_NEW_OR_DELETE): New call flag. |
| (gimple_call_set_from_new_or_delete): New. |
| (gimple_call_from_new_or_delete): Likewise. |
| * gimple.c (gimple_build_call_from_tree): Set |
| GF_CALL_FROM_NEW_OR_DELETE appropriately. |
| * ipa-icf-gimple.c (func_checker::compare_gimple_call): |
| Compare gimple_call_from_new_or_delete. |
| * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1): Make |
| sure to only consider new/delete calls from new or delete |
| expressions. |
| (propagate_necessity): Likewise. |
| (eliminate_unnecessary_stmts): Likewise. |
| * tree-ssa-structalias.c (find_func_aliases_for_call): |
| Likewise. |
| |
| 2020-10-02 Jason Merril <jason@redhat.com> |
| |
| * tree.h (CALL_FROM_NEW_OR_DELETE_P): Move from cp-tree.h. |
| * tree-core.h: Document new usage of protected_flag. |
| |
| 2020-10-02 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.h (irange::fits_p): New. |
| |
| 2020-10-01 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000.c (rs6000_legitimize_address): Use |
| gen_int_mode for high part of address constant. |
| |
| 2020-10-01 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000.c (rs6000_linux64_override_options): |
| Formatting. Correct setting of TARGET_NO_FP_IN_TOC and |
| TARGET_NO_SUM_IN_TOC. |
| |
| 2020-10-01 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/freebsd64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Use |
| rs6000_linux64_override_options. |
| * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Break |
| out to.. |
| * config/rs6000/rs6000.c (rs6000_linux64_override_options): ..this, |
| new function. Tweak non-biarch test and clearing of |
| profile_kernel to work with freebsd64.h. |
| |
| 2020-10-01 Martin Liska <mliska@suse.cz> |
| |
| * config/rs6000/rs6000-call.c: Include value-range.h. |
| * config/rs6000/rs6000.c: Likewise. |
| |
| 2020-10-01 Tom de Vries <tdevries@suse.de> |
| |
| PR target/80845 |
| * config/nvptx/nvptx.md (define_insn "truncsi<QHIM>2"): Emit mov.u32 |
| instead of cvt.u32.u32. |
| |
| 2020-10-01 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/96528 |
| PR target/97288 |
| * config/arm/arm-protos.h (arm_expand_vector_compare): Declare. |
| (arm_expand_vcond): Likewise. |
| * config/arm/arm.c (arm_expand_vector_compare): New function. |
| (arm_expand_vcond): Likewise. |
| * config/arm/neon.md (vec_cmp<VDQW:mode><v_cmp_result>): New pattern. |
| (vec_cmpu<VDQW:mode><VDQW:mode>): Likewise. |
| (vcond<VDQW:mode><VDQW:mode>): Require operand 5 to be a register |
| or zero. Use arm_expand_vcond. |
| (vcond<V_cvtto><V32:mode>): New pattern. |
| (vcondu<VDQIW:mode><VDQIW:mode>): Generalize to... |
| (vcondu<VDQW:mode><v_cmp_result): ...this. Require operand 5 |
| to be a register or zero. Use arm_expand_vcond. |
| (vcond_mask_<VDQW:mode><v_cmp_result>): New pattern. |
| (neon_vc<cmp_op><mode>, neon_vc<cmp_op><mode>_insn): Add "@" marker. |
| (neon_vbsl<mode>): Likewise. |
| (neon_vc<cmp_op>u<mode>): Reexpress as... |
| (@neon_vc<code><mode>): ...this. |
| |
| 2020-10-01 Michael Davidsaver <mdavidsaver@gmail.com> |
| |
| * config/i386/t-rtems: Change from mtune to march when building |
| multilibs. The mtune argument tunes or optimizes for a specific |
| CPU model but does not ensure the generated code is appropriate |
| for the CPU model. Prior to this patch, i386 compatible code |
| was always generated but tuned for later models. |
| |
| 2020-10-01 Aldy Hernandez <aldyh@redhat.com> |
| |
| * builtins.c (compute_objsize): Replace vr_values with range_query. |
| (get_range): Same. |
| (gimple_call_alloc_size): Same. |
| * builtins.h (class vr_values): Remove. |
| (gimple_call_alloc_size): Replace vr_values with range_query. |
| * gimple-ssa-sprintf.c (get_int_range): Same. |
| (struct directive): Pass gimple context to fmtfunc callback. |
| (directive::set_width): Replace inline with out-of-line version. |
| (directive::set_precision): Same. |
| (format_none): New gimple argument. |
| (format_percent): New gimple argument. |
| (format_integer): New gimple argument. |
| (format_floating): New gimple argument. |
| (get_string_length): Use range_query API. |
| (format_character): New gimple argument. |
| (format_string): New gimple argument. |
| (format_plain): New gimple argument. |
| (format_directive): New gimple argument. |
| (parse_directive): Replace vr_values with range_query. |
| (compute_format_length): Same. |
| (handle_printf_call): Same. Adjust for range_query API. |
| * tree-ssa-strlen.c (get_range): Same. |
| (compare_nonzero_chars): Same. |
| (get_addr_stridx) Replace vr_values with range_query. |
| (get_stridx): Same. |
| (dump_strlen_info): Same. |
| (get_range_strlen_dynamic): Adjust for range_query API. |
| (set_strlen_range): Same |
| (maybe_warn_overflow): Replace vr_values with range_query. |
| (handle_builtin_strcpy): Same. |
| (maybe_diag_stxncpy_trunc): Add FIXME comment. |
| (handle_builtin_memcpy): Replace vr_values with range_query. |
| (handle_builtin_memset): Same. |
| (get_len_or_size): Same. |
| (strxcmp_eqz_result): Same. |
| (handle_builtin_string_cmp): Same. |
| (count_nonzero_bytes_addr): Same, plus adjust for range_query API. |
| (count_nonzero_bytes): Replace vr_values with range_query. |
| (handle_store): Same. |
| (strlen_check_and_optimize_call): Same. |
| (handle_integral_assign): Same. |
| (check_and_optimize_stmt): Same. |
| * tree-ssa-strlen.h (class vr_values): Remove. |
| (get_range): Replace vr_values with range_query. |
| (get_range_strlen_dynamic): Same. |
| (handle_printf_call): Same. |
| |
| 2020-10-01 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-loop-versioning.cc (lv_dom_walker::before_dom_children): |
| Pass m_range_analyzer instead of get_vr_values. |
| (loop_versioning::name_prop::get_value): Rename to... |
| (loop_versioning::name_prop::value_of_expr): ...this. |
| * gimple-ssa-evrp-analyze.c (evrp_range_analyzer::evrp_range_analyzer): |
| Adjust for evrp_range_analyzer |
| inheriting from vr_values. |
| (evrp_range_analyzer::try_find_new_range): Same. |
| (evrp_range_analyzer::record_ranges_from_incoming_edge): Same. |
| (evrp_range_analyzer::record_ranges_from_phis): Same. |
| (evrp_range_analyzer::record_ranges_from_stmt): Same. |
| (evrp_range_analyzer::push_value_range): Same. |
| (evrp_range_analyzer::pop_value_range): Same. |
| * gimple-ssa-evrp-analyze.h (class evrp_range_analyzer): Inherit from |
| vr_values. Adjust accordingly. |
| * gimple-ssa-evrp.c: Adjust for evrp_range_analyzer inheriting from |
| vr_values. |
| (evrp_folder::value_of_evrp): Rename from get_value. |
| * tree-ssa-ccp.c (class ccp_folder): Rename get_value to |
| value_of_expr. |
| (ccp_folder::get_value): Rename to... |
| (ccp_folder::value_of_expr): ...this. |
| * tree-ssa-copy.c (class copy_folder): Rename get_value to |
| value_of_expr. |
| (copy_folder::get_value): Rename to... |
| (copy_folder::value_of_expr): ...this. |
| * tree-ssa-dom.c (dom_opt_dom_walker::after_dom_children): Adjust |
| for evrp_range_analyzer inheriting from vr_values. |
| (dom_opt_dom_walker::optimize_stmt): Same. |
| * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in): |
| Call value_of_* instead of get_value. |
| (substitute_and_fold_engine::replace_phi_args_in): Same. |
| (substitute_and_fold_engine::propagate_into_phi_args): Same. |
| (substitute_and_fold_dom_walker::before_dom_children): Same. |
| * tree-ssa-propagate.h: Include value-query.h. |
| (class substitute_and_fold_engine): Inherit from value_query. |
| * tree-ssa-strlen.c (strlen_dom_walker::before_dom_children): |
| Adjust for evrp_range_analyzer inheriting from vr_values. |
| * tree-ssa-threadedge.c (record_temporary_equivalences_from_phis): |
| Same. |
| * tree-vrp.c (class vrp_folder): Same. |
| (vrp_folder::get_value): Rename to value_of_expr. |
| * vr-values.c (vr_values::get_lattice_entry): Adjust for |
| vr_values inheriting from range_query. |
| (vr_values::range_of_expr): New. |
| (vr_values::value_of_expr): New. |
| (vr_values::value_on_edge): New. |
| (vr_values::value_of_stmt): New. |
| (simplify_using_ranges::op_with_boolean_value_range_p): Call |
| get_value_range through query. |
| (check_for_binary_op_overflow): Rename store to query. |
| (vr_values::vr_values): Remove vrp_value_range_pool. |
| (vr_values::~vr_values): Same. |
| (simplify_using_ranges::get_vr_for_comparison): Call get_value_range |
| through query. |
| (simplify_using_ranges::compare_names): Same. |
| (simplify_using_ranges::vrp_evaluate_conditional): Same. |
| (simplify_using_ranges::vrp_visit_cond_stmt): Same. |
| (simplify_using_ranges::simplify_abs_using_ranges): Same. |
| (simplify_using_ranges::simplify_cond_using_ranges_1): Same. |
| (simplify_cond_using_ranges_2): Same. |
| (simplify_using_ranges::simplify_switch_using_ranges): Same. |
| (simplify_using_ranges::two_valued_val_range_p): Same. |
| (simplify_using_ranges::simplify_using_ranges): Rename store to query. |
| (simplify_using_ranges::simplify): Assert that we have a query. |
| * vr-values.h (class range_query): Remove. |
| (class simplify_using_ranges): Remove inheritance of range_query. |
| (class vr_values): Add virtuals for range_of_expr, value_of_expr, |
| value_on_edge, value_of_stmt, and get_value_range. |
| Call range_query allocator instead of using vrp_value_range_pool. |
| Remove vrp_value_range_pool. |
| (simplify_using_ranges::get_value_range): Remove. |
| |
| 2020-10-01 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97236 |
| * tree-vect-stmts.c (get_group_load_store_type): Keep |
| VMAT_ELEMENTWISE for single-element vectors. |
| |
| 2020-10-01 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (compute_parm_map): Be ready for callee_pi to be NULL. |
| |
| 2020-10-01 Jan Hubicka <jh@suse.cz> |
| |
| PR ipa/97244 |
| * ipa-fnsummary.c (pass_free_fnsummary::execute): Free |
| also indirect inlining datastructure. |
| * ipa-modref.c (pass_ipa_modref::execute): Do not free them here. |
| * ipa-prop.c (ipa_free_all_node_params): Do not crash when info does |
| not exist. |
| (ipa_unregister_cgraph_hooks): Likewise. |
| |
| 2020-10-01 Jan Hubicka <jh@suse.cz> |
| |
| * internal-fn.c (DEF_INTERNAL_FN): Fix handling of fnspec |
| |
| 2020-10-01 Aldy Hernandez <aldyh@redhat.com> |
| |
| * Makefile.in: Add value-query.o. |
| * value-query.cc: New file. |
| * value-query.h: New file. |
| |
| 2020-10-01 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/arm/arm-cpus.in: Fix ordering, move Neoverse N2 down. |
| * config/arm/arm-tables.opt: Regenerate. |
| * config/arm/arm-tune.md: Regenerate. |
| |
| 2020-10-01 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/s390/s390.c (s390_atomic_assign_expand_fenv): Use |
| TARGET_EXPR instead of MODIFY_EXPR for the first assignments to |
| fenv_var and old_fpc. Formatting fixes. |
| |
| 2020-10-01 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-patterns.c (vect_recog_bool_pattern): Also handle |
| VIEW_CONVERT_EXPR. |
| |
| 2020-10-01 Florian Weimer <fweimer@redhat.com> |
| |
| PR target/97250 |
| * config/i386/i386.h (PTA_NO_TUNE, PTA_X86_64_BASELINE) |
| (PTA_X86_64_V2, PTA_X86_64_V3, PTA_X86_64_V4): New. |
| * common/config/i386/i386-common.c (processor_alias_table): |
| Add "x86-64-v2", "x86-64-v3", "x86-64-v4". |
| * config/i386/i386-options.c (ix86_option_override_internal): |
| Handle new PTA_NO_TUNE processor table entries. |
| * doc/invoke.texi (x86 Options): Document new -march values. |
| |
| 2020-10-01 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/ppc-asm.h: Support __PCREL__ code. |
| |
| 2020-10-01 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Don't |
| set -mcmodel=small for -mno-minimal-toc when pcrel. |
| |
| 2020-09-30 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97189 |
| * attribs.c (attr_access::array_as_string): Avoid assuming a VLA |
| access specification string contains a closing bracket. |
| |
| 2020-09-30 Martin Sebor <msebor@redhat.com> |
| |
| PR c/97206 |
| * attribs.c (attr_access::array_as_string): Avoid modifying a shared |
| type in place and use build_type_attribute_qual_variant instead. |
| |
| 2020-09-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| * config/arm/arm-cpus.in: Add Cortex-A78 and Cortex-A78AE cores. |
| * config/arm/arm-tables.opt: Regenerate. |
| * config/arm/arm-tune.md: Regenerate. |
| * doc/invoke.texi: Update docs. |
| |
| 2020-09-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| * config/aarch64/aarch64-cores.def: Add Cortex-A78 and Cortex-A78AE cores. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * doc/invoke.texi: Add -mtune=cortex-a78 and -mtune=cortex-a78ae. |
| |
| 2020-09-30 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| PR target/96795 |
| * config/arm/arm_mve.h (__ARM_mve_coerce2): Define. |
| (__arm_vaddq): Correct the scalar argument. |
| (__arm_vaddq_m): Likewise. |
| (__arm_vaddq_x): Likewise. |
| (__arm_vcmpeqq_m): Likewise. |
| (__arm_vcmpeqq): Likewise. |
| (__arm_vcmpgeq_m): Likewise. |
| (__arm_vcmpgeq): Likewise. |
| (__arm_vcmpgtq_m): Likewise. |
| (__arm_vcmpgtq): Likewise. |
| (__arm_vcmpleq_m): Likewise. |
| (__arm_vcmpleq): Likewise. |
| (__arm_vcmpltq_m): Likewise. |
| (__arm_vcmpltq): Likewise. |
| (__arm_vcmpneq_m): Likewise. |
| (__arm_vcmpneq): Likewise. |
| (__arm_vfmaq_m): Likewise. |
| (__arm_vfmaq): Likewise. |
| (__arm_vfmasq_m): Likewise. |
| (__arm_vfmasq): Likewise. |
| (__arm_vmaxnmavq): Likewise. |
| (__arm_vmaxnmavq_p): Likewise. |
| (__arm_vmaxnmvq): Likewise. |
| (__arm_vmaxnmvq_p): Likewise. |
| (__arm_vminnmavq): Likewise. |
| (__arm_vminnmavq_p): Likewise. |
| (__arm_vminnmvq): Likewise. |
| (__arm_vminnmvq_p): Likewise. |
| (__arm_vmulq_m): Likewise. |
| (__arm_vmulq): Likewise. |
| (__arm_vmulq_x): Likewise. |
| (__arm_vsetq_lane): Likewise. |
| (__arm_vsubq_m): Likewise. |
| (__arm_vsubq): Likewise. |
| (__arm_vsubq_x): Likewise. |
| |
| 2020-09-30 Joel Hutton <joel.hutton@arm.com> |
| |
| PR target/96837 |
| * tree-vect-slp.c (vect_analyze_slp): Do not call |
| vect_attempt_slp_rearrange_stmts for vector constructors. |
| |
| 2020-09-30 Tamar Christina <tamar.christina@arm.com> |
| |
| * tree-vectorizer.h (SLP_TREE_REF_COUNT): New. |
| * tree-vect-slp.c (_slp_tree::_slp_tree, _slp_tree::~_slp_tree, |
| vect_free_slp_tree, vect_build_slp_tree, vect_print_slp_tree, |
| slp_copy_subtree, vect_attempt_slp_rearrange_stmts): Use it. |
| |
| 2020-09-30 Tobias Burnus <tobias@codesourcery.com> |
| |
| * omp-offload.c (omp_discover_implicit_declare_target): Also |
| handled nested functions. |
| |
| 2020-09-30 Tobias Burnus <tobias@codesourcery.com> |
| Tom de Vries <tdevries@suse.de> |
| |
| * builtins.c (expand_builtin_cexpi, fold_builtin_sincos): Update |
| targetm.libc_has_function call. |
| * builtins.def (DEF_C94_BUILTIN, DEF_C99_BUILTIN, DEF_C11_BUILTIN): |
| (DEF_C2X_BUILTIN, DEF_C99_COMPL_BUILTIN, DEF_C99_C90RES_BUILTIN): |
| Same. |
| * config/darwin-protos.h (darwin_libc_has_function): Update prototype. |
| * config/darwin.c (darwin_libc_has_function): Add arg. |
| * config/linux-protos.h (linux_libc_has_function): Update prototype. |
| * config/linux.c (linux_libc_has_function): Add arg. |
| * config/i386/i386.c (ix86_libc_has_function): Update |
| targetm.libc_has_function call. |
| * config/nvptx/nvptx.c (nvptx_libc_has_function): New function. |
| (TARGET_LIBC_HAS_FUNCTION): Redefine to nvptx_libc_has_function. |
| * convert.c (convert_to_integer_1): Update targetm.libc_has_function |
| call. |
| * match.pd: Same. |
| * target.def (libc_has_function): Add arg. |
| * doc/tm.texi: Regenerate. |
| * targhooks.c (default_libc_has_function, gnu_libc_has_function) |
| (no_c99_libc_has_function): Add arg. |
| * targhooks.h (default_libc_has_function, no_c99_libc_has_function) |
| (gnu_libc_has_function): Update prototype. |
| * tree-ssa-math-opts.c (pass_cse_sincos::execute): Update |
| targetm.libc_has_function call. |
| |
| 2020-09-30 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/97184 |
| * config/i386/i386.md (UNSPECV_MOVDIRI): Renamed to ... |
| (UNSPEC_MOVDIRI): This. |
| (UNSPECV_MOVDIR64B): Renamed to ... |
| (UNSPEC_MOVDIR64B): This. |
| (movdiri<mode>): Use SET operation. |
| (@movdir64b_<mode>): Likewise. |
| |
| 2020-09-30 Florian Weimer <fweimer@redhat.com> |
| |
| * config/i386/i386-c.c (ix86_target_macros_internal): Define |
| __LAHF_SAHF__ and __MOVBE__ based on ISA flags. |
| |
| 2020-09-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/97150 |
| * config/aarch64/arm_neon.h (vqrshlb_u8): Make second argument |
| signed. |
| (vqrshlh_u16): Likewise. |
| (vqrshls_u32): Likewise. |
| (vqrshld_u64): Likewise. |
| (vqshlb_u8): Likewise. |
| (vqshlh_u16): Likewise. |
| (vqshls_u32): Likewise. |
| (vqshld_u64): Likewise. |
| (vshld_u64): Likewise. |
| |
| 2020-09-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/96313 |
| * config/aarch64/aarch64-simd-builtins.def (sqmovun): Use UNOPUS |
| qualifiers. |
| * config/aarch64/arm_neon.h (vqmovun_s16): Adjust builtin call. |
| Remove unnecessary result cast. |
| (vqmovun_s32): Likewise. |
| (vqmovun_s64): Likewise. |
| (vqmovunh_s16): Likewise. Fix return type. |
| (vqmovuns_s32): Likewise. |
| (vqmovund_s64): Likewise. |
| |
| 2020-09-30 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_split_128bit_move_p): Add a |
| function comment. Tighten check for FP moves. |
| * config/aarch64/aarch64.md (*movti_aarch64): Add a w<-Z alternative. |
| (*movtf_aarch64): Handle r<-Y like r<-r. Remove unnecessary |
| earlyclobber. Change splitter predicate from aarch64_reg_or_imm |
| to nonmemory_operand. |
| |
| 2020-09-30 Alex Coplan <alex.coplan@arm.com> |
| |
| PR target/97251 |
| * config/arm/arm.md (movsf): Relax TARGET_HARD_FLOAT to |
| TARGET_VFP_BASE. |
| (movdf): Likewise. |
| * config/arm/vfp.md (no_literal_pool_df_immediate): Likewise. |
| (no_literal_pool_sf_immediate): Likewise. |
| |
| 2020-09-30 Alan Modra <amodra@gmail.com> |
| |
| * configure.ac (--with-long-double-format): Typo fix. |
| * configure: Regenerate. |
| |
| 2020-09-30 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000.md (@tablejump<mode>_normal): Don't use |
| non-existent operands[]. |
| (@tablejump<mode>_nospec): Likewise. |
| |
| 2020-09-30 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000.md (tablejump): Simplify. |
| (tablejumpsi): Merge this ... |
| (tablejumpdi): ... and this ... |
| (@tablejump<mode>_normal): ... into this. |
| (tablejumpsi_nospec): Merge this ... |
| (tablejumpdi_nospec): ... and this ... |
| (@tablejump<mode>_nospec): ... into this. |
| (*tablejump<mode>_internal1): Delete, rename to ... |
| (@tablejump<mode>_insn_normal): ... this. |
| (*tablejump<mode>_internal1_nospec): Delete, rename to ... |
| (@tablejump<mode>_insn_nospec): ... this. |
| |
| 2020-09-29 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97188 |
| * calls.c (maybe_warn_rdwr_sizes): Simplify warning messages. |
| Correct handling of VLA argumments. |
| |
| 2020-09-29 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/94695 |
| * doc/invoke.texi: Document -Wrange-loop-construct. |
| |
| 2020-09-29 Jim Wilson <jimw@sifive.com> |
| |
| PR bootstrap/97183 |
| * configure.ac (gcc_cv_header_zstd_h): Check ZSTD_VERISON_NUMBER. |
| * configure: Regenerated. |
| |
| 2020-09-29 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| * config/arm/arm-cpus.in: Add Cortex-X1 core. |
| * config/arm/arm-tables.opt: Regenerate. |
| * config/arm/arm-tune.md: Regenerate. |
| * doc/invoke.texi: Update docs. |
| |
| 2020-09-29 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| * config/aarch64/aarch64-cores.def: Add Cortex-X1 Arm core. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * doc/invoke.texi: Add -mtune=cortex-x1 docs. |
| |
| 2020-09-29 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/97247 |
| * config/i386/enqcmdintrin.h: Replace <enqcmdntrin.h> with |
| <enqcmdintrin.h>. Replace _ENQCMDNTRIN_H_INCLUDED with |
| _ENQCMDINTRIN_H_INCLUDED. |
| |
| 2020-09-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97241 |
| * tree-vect-loop.c (vectorizable_reduction): Move finding |
| the SLP node for the reduction stmt to a better place. |
| |
| 2020-09-29 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_analyze_slp): Move SLP reduction |
| re-arrangement and SLP graph load gathering... |
| (vect_optimize_slp): ... here. |
| * tree-vectorizer.h (vec_info::slp_loads): Remove. |
| |
| 2020-09-29 Hongyu Wang <hongyu.wang@intel.com> |
| |
| PR target/97231 |
| * config/i386/amxbf16intrin.h: Add FSF copyright notes. |
| * config/i386/amxint8intrin.h: Ditto. |
| * config/i386/amxtileintrin.h: Ditto. |
| * config/i386/avx512vp2intersectintrin.h: Ditto. |
| * config/i386/avx512vp2intersectvlintrin.h: Ditto. |
| * config/i386/pconfigintrin.h: Ditto. |
| * config/i386/tsxldtrkintrin.h: Ditto. |
| * config/i386/wbnoinvdintrin.h: Ditto. |
| |
| 2020-09-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97238 |
| * tree-ssa-reassoc.c (ovce_extract_ops): Fix typo. |
| |
| 2020-09-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/arm/arm.h (ARM_HAVE_NEON_V8QI_ARITH, ARM_HAVE_NEON_V4HI_ARITH) |
| (ARM_HAVE_NEON_V2SI_ARITH, ARM_HAVE_NEON_V16QI_ARITH): New macros. |
| (ARM_HAVE_NEON_V8HI_ARITH, ARM_HAVE_NEON_V4SI_ARITH): Likewise. |
| (ARM_HAVE_NEON_V2DI_ARITH, ARM_HAVE_NEON_V4HF_ARITH): Likewise. |
| (ARM_HAVE_NEON_V8HF_ARITH, ARM_HAVE_NEON_V2SF_ARITH): Likewise. |
| (ARM_HAVE_NEON_V4SF_ARITH, ARM_HAVE_V8QI_ARITH, ARM_HAVE_V4HI_ARITH) |
| (ARM_HAVE_V2SI_ARITH, ARM_HAVE_V16QI_ARITH, ARM_HAVE_V8HI_ARITH) |
| (ARM_HAVE_V4SI_ARITH, ARM_HAVE_V2DI_ARITH, ARM_HAVE_V4HF_ARITH) |
| (ARM_HAVE_V2SF_ARITH, ARM_HAVE_V8HF_ARITH, ARM_HAVE_V4SF_ARITH): |
| Likewise. |
| * config/arm/iterators.md (VNIM, VNINOTM): Delete. |
| * config/arm/vec-common.md (add<VNIM:mode>3, addv8hf3) |
| (add<VNINOTM:mode>3): Replace with... |
| (add<VDQ:mode>3): ...this new expander. |
| * config/arm/neon.md (*add<VDQ:mode>3_neon): Use the new |
| ARM_HAVE_NEON_<MODE>_ARITH macros as the C condition. |
| (addv8hf3_neon, addv4hf3, add<VFH:mode>3_fp16): Delete in |
| favor of the above. |
| (neon_vadd<VH:mode>): Use gen_add<mode>3 instead of |
| gen_add<mode>3_fp16. |
| |
| 2020-09-29 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define |
| __riscv_cmodel_medany when PIC mode. |
| |
| 2020-09-29 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/aarch64/aarch64-cores.def: Move neoverse-n2 after saphira. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| |
| 2020-09-29 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/96979 |
| * tree-switch-conversion.c (jump_table_cluster::can_be_handled): |
| Make a fast bail out. |
| (bit_test_cluster::can_be_handled): Likewise here. |
| * tree-switch-conversion.h (get_range): Use wi::to_wide instead |
| of a folding. |
| |
| 2020-09-29 Martin Liska <mliska@suse.cz> |
| |
| Revert: |
| 2020-09-22 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/96979 |
| * doc/invoke.texi: Document new param max-switch-clustering-attempts. |
| * params.opt: Add new parameter. |
| * tree-switch-conversion.c (jump_table_cluster::find_jump_tables): |
| Limit number of attempts. |
| (bit_test_cluster::find_bit_tests): Likewise. |
| |
| 2020-09-28 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.h (class irange): Add irange_allocator friend. |
| (class irange_allocator): New. |
| |
| 2020-09-28 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR middle-end/96390 |
| * omp-offload.c (omp_discover_declare_target_tgt_fn_r): Handle |
| alias nodes. |
| |
| 2020-09-28 Paul A. Clarke <pc@us.ibm.com> |
| |
| * config/rs6000/smmintrin.h (_mm_insert_epi8): New. |
| (_mm_insert_epi32): New. |
| (_mm_insert_epi64): New. |
| |
| 2020-09-28 liuhongt <hongtao.liu@intel.com> |
| |
| * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, |
| OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, |
| OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET, |
| OPTION_MASK_ISA2_AMX_BF16_UNSET, OPTION_MASK_ISA2_XSAVE_UNSET): |
| New marcos. |
| (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. |
| * common/config/i386/i386-cpuinfo.h (processor_types): Add |
| FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. |
| * common/config/i386/cpuinfo.h (XSTATE_TILECFG, |
| XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. |
| (get_available_features): Enable AMX features only if |
| their states are suoorited by OSXSAVE. |
| * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY |
| for amx-tile, amx-int8, amx-bf16. |
| * config.gcc: Add amxtileintrin.h, amxint8intrin.h, |
| amxbf16intrin.h to extra headers. |
| * config/i386/amxbf16intrin.h: New file. |
| * config/i386/amxint8intrin.h: Ditto. |
| * config/i386/amxtileintrin.h: Ditto. |
| * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8): |
| New macro. |
| * config/i386/i386-c.c (ix86_target_macros_internal): Define |
| __AMX_TILE__, __AMX_INT8__, AMX_BF16__. |
| * config/i386/i386-options.c (ix86_target_string): Add |
| -mamx-tile, -mamx-int8, -mamx-bf16. |
| (ix86_option_override_internal): Handle AMX-TILE, |
| AMX-INT8, AMX-BF16. |
| * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P, |
| TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P, |
| PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros. |
| * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16. |
| * config/i386/immintrin.h: Include amxtileintrin.h, |
| amxint8intrin.h, amxbf16intrin.h. |
| * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16. |
| * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16. |
| * doc/sourcebuild.texi ((Effective-Target Keywords, Other |
| hardware attributes): Document amx_int8, amx_tile, amx_bf16. |
| |
| 2020-09-28 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/aarch64-builtins.c |
| (aarch64_general_expand_builtin): Do not alter value on a |
| force_reg returned rtx. |
| |
| 2020-09-28 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * tree-eh.c (lower_try_finally_dup_block): Revert latest change. |
| |
| 2020-09-27 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (modref_summary::useful_p): Fix testing of stores. |
| |
| 2020-09-27 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/97073 |
| * optabs.c (expand_binop, expand_absneg_bit, expand_unop, |
| expand_copysign_bit): Check reg_overlap_mentioned_p between target |
| and operand(s) and if it returns true, force a pseudo as target. |
| |
| 2020-09-27 Xionghu Luo <luoxhu@linux.ibm.com> |
| |
| * gimple-isel.cc (gimple_expand_vec_set_expr): New function. |
| (gimple_expand_vec_cond_exprs): Rename to ... |
| (gimple_expand_vec_exprs): ... this and call |
| gimple_expand_vec_set_expr. |
| * internal-fn.c (vec_set_direct): New define. |
| (expand_vec_set_optab_fn): New function. |
| (direct_vec_set_optab_supported_p): New define. |
| * internal-fn.def (VEC_SET): New DEF_INTERNAL_OPTAB_FN. |
| * optabs.c (can_vec_set_var_idx_p): New function. |
| * optabs.h (can_vec_set_var_idx_p): New declaration. |
| |
| 2020-09-26 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (analyze_stmt): Do not skip clobbers in early pass. |
| * ipa-pure-const.c (analyze_stmt): Update comment. |
| |
| 2020-09-26 David Edelsohn <dje.gcc@gmail.com> |
| Clement Chigot <clement.chigot@atos.com> |
| |
| * collect2.c (visibility_flag): New. |
| (main): Detect -fvisibility. |
| (write_c_file_stat): Push and pop default visibility. |
| |
| 2020-09-26 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-inline-transform.c: Include ipa-modref-tree.h and ipa-modref.h. |
| (inline_call): Call ipa_merge_modref_summary_after_inlining. |
| * ipa-inline.c (ipa_inline): Do not free summaries. |
| * ipa-modref.c (dump_records): Fix formating. |
| (merge_call_side_effects): Break out from ... |
| (analyze_call): ... here; record recursive calls. |
| (analyze_stmt): Add new parameter RECURSIVE_CALLS. |
| (analyze_function): Do iterative dataflow on recursive calls. |
| (compute_parm_map): New function. |
| (ipa_merge_modref_summary_after_inlining): New function. |
| (collapse_loads): New function. |
| (modref_propagate_in_scc): Break out from ... |
| (pass_ipa_modref::execute): ... here; Do iterative dataflow. |
| * ipa-modref.h (ipa_merge_modref_summary_after_inlining): Declare. |
| |
| 2020-09-26 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-expand.c (expand_omp_simd): Help vectorizer for the collapse == 1 |
| and non-composite collapse > 1 case with non-constant innermost loop |
| step by precomputing number of iterations before loop and using an |
| alternate IV from 0 to number of iterations - 1 with step of 1. |
| |
| 2020-09-26 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-fnsummary.c (dump_ipa_call_summary): Dump |
| points_to_local_or_readonly_memory flag. |
| (analyze_function_body): Compute points_to_local_or_readonly_memory |
| flag. |
| (remap_edge_change_prob): Rename to ... |
| (remap_edge_params): ... this one; update |
| points_to_local_or_readonly_memory. |
| (remap_edge_summaries): Update. |
| (read_ipa_call_summary): Stream the new flag. |
| (write_ipa_call_summary): Likewise. |
| * ipa-predicate.h (struct inline_param_summary): Add |
| points_to_local_or_readonly_memory. |
| (inline_param_summary::equal_to): Update. |
| (inline_param_summary::useless_p): Update. |
| |
| 2020-09-26 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-modref-tree.h (modref_ref_node::insert_access): Track if something |
| changed. |
| (modref_base_node::insert_ref): Likewise (and add a new optional |
| argument) |
| (modref_tree::insert): Likewise. |
| (modref_tree::merge): Rewrite |
| |
| 2020-09-25 Jan Hubicka <hubicka@ucw.cz> |
| |
| * doc/invoke.texi: Add -fno-ipa-modref to flags disabled by |
| -flive-patching. |
| * opts.c (control_options_for_live_patching): Disable ipa-modref. |
| |
| 2020-09-25 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-modref.c (analyze_stmt): Fix return value for gimple_clobber. |
| |
| 2020-09-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64-option-extensions.def (rng): Add |
| cpuinfo string. |
| |
| 2020-09-25 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/arm/arm-cpus.in (neoverse-v1): Add FP16. |
| |
| 2020-09-25 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/64636 |
| * value-prof.c (stream_out_histogram_value): Allow negative |
| values for HIST_TYPE_IOR. |
| |
| 2020-09-25 Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.c (nvptx_assemble_integer, nvptx_print_operand): |
| Use gcc_fallthrough (). |
| |
| 2020-09-25 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/96814 |
| * expr.c (store_constructor): Handle VECTOR_BOOLEAN_TYPE_P |
| CTORs correctly. |
| |
| 2020-09-25 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/97207 |
| * vec.h (auto_vec<T>::operator=(auto_vec<T>&&)): Implement. |
| |
| 2020-09-25 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/arm/arm-protos.h (arm_mve_mode_and_operands_type_check): |
| Delete. |
| * config/arm/arm.c (arm_coproc_mem_operand_wb): Use a scale factor |
| of 2 rather than 4 for 16-bit modes. |
| (arm_mve_mode_and_operands_type_check): Delete. |
| * config/arm/constraints.md (Uj): Allow writeback for Neon, |
| but continue to disallow it for MVE. |
| * config/arm/arm.md (*arm32_mov<HFBF:mode>): Add !TARGET_HAVE_MVE. |
| * config/arm/vfp.md (*mov_load_vfp_hf16, *mov_store_vfp_hf16): Fold |
| back into... |
| (*mov<mode>_vfp_<mode>16): ...here but use Uj for the FPR memory |
| constraints. Use for base MVE too. |
| |
| 2020-09-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97199 |
| * tree-if-conv.c (combine_blocks): Remove edges only |
| after looking at virtual PHI args. |
| |
| 2020-09-25 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-low.c (scan_omp_1_stmt): Don't call scan_omp_simd for |
| collapse > 1 loops as simt doesn't support collapsed loops yet. |
| * omp-expand.c (expand_omp_for_init_counts, expand_omp_for_init_vars): |
| Small tweaks to function comment. |
| (expand_omp_simd): Rewritten collapse > 1 support to only attempt |
| to vectorize the innermost loop and emit set of outer loops around it. |
| For non-composite simd with collapse > 1 without broken loop don't |
| even try to compute number of iterations first. Add support for |
| non-rectangular simd loops. |
| (expand_omp_for): Don't sorry_at on non-rectangular simd loops. |
| |
| 2020-09-25 Martin Liska <mliska@suse.cz> |
| |
| * cgraph.c (cgraph_edge::debug): New. |
| * cgraph.h (cgraph_edge::debug): New. |
| |
| 2020-09-25 Martin Liska <mliska@suse.cz> |
| |
| * cgraph.c (cgraph_node::dump): Always print space at the end |
| of a message. Remove one extra space. |
| |
| 2020-09-24 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/arm/arm-cpus.in (neoverse-n2): New. |
| * config/arm/arm-tables.opt: Regenerate. |
| * config/arm/arm-tune.md: Regenerate. |
| * doc/invoke.texi: Document support for Neoverse N2. |
| |
| 2020-09-24 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/aarch64/aarch64-cores.def: Add Neoverse N2. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * doc/invoke.texi: Document AArch64 support for Neoverse N2. |
| |
| 2020-09-24 Richard Biener <rguenther@suse.de> |
| |
| * vec.h (auto_vec<T, 0>::auto_vec (auto_vec &&)): New move CTOR. |
| (auto_vec<T, 0>::operator=(auto_vec &&)): Delete. |
| * hash-table.h (hash_table::expand): Use std::move when expanding. |
| * cfgloop.h (get_loop_exit_edges): Return auto_vec<edge>. |
| * cfgloop.c (get_loop_exit_edges): Adjust. |
| * cfgloopmanip.c (fix_loop_placement): Likewise. |
| * ipa-fnsummary.c (analyze_function_body): Likewise. |
| * ira-build.c (create_loop_tree_nodes): Likewise. |
| (create_loop_tree_node_allocnos): Likewise. |
| (loop_with_complex_edge_p): Likewise. |
| * ira-color.c (ira_loop_edge_freq): Likewise. |
| * loop-unroll.c (analyze_insns_in_loop): Likewise. |
| * predict.c (predict_loops): Likewise. |
| * tree-predcom.c (last_always_executed_block): Likewise. |
| * tree-ssa-loop-ch.c (ch_base::copy_headers): Likewise. |
| * tree-ssa-loop-im.c (store_motion_loop): Likewise. |
| * tree-ssa-loop-ivcanon.c (loop_edge_to_cancel): Likewise. |
| (canonicalize_loop_induction_variables): Likewise. |
| * tree-ssa-loop-manip.c (get_loops_exits): Likewise. |
| * tree-ssa-loop-niter.c (find_loop_niter): Likewise. |
| (finite_loop_p): Likewise. |
| (find_loop_niter_by_eval): Likewise. |
| (estimate_numbers_of_iterations): Likewise. |
| * tree-ssa-loop-prefetch.c (emit_mfence_after_loop): Likewise. |
| (may_use_storent_in_loop_p): Likewise. |
| |
| 2020-09-24 Jan Hubicka <jh@suse.cz> |
| |
| * doc/invoke.texi: Document -fipa-modref, ipa-modref-max-bases, |
| ipa-modref-max-refs, ipa-modref-max-accesses, ipa-modref-max-tests. |
| * ipa-modref-tree.c (test_insert_search_collapse): Update. |
| (test_merge): Update. |
| (gt_ggc_mx): New function. |
| * ipa-modref-tree.h (struct modref_access_node): New structure. |
| (struct modref_ref_node): Add every_access and accesses array. |
| (modref_ref_node::modref_ref_node): Update ctor. |
| (modref_ref_node::search): New member function. |
| (modref_ref_node::collapse): New member function. |
| (modref_ref_node::insert_access): New member function. |
| (modref_base_node::insert_ref): Do not collapse base if ref is 0. |
| (modref_base_node::collapse): Copllapse also refs. |
| (modref_tree): Add accesses. |
| (modref_tree::modref_tree): Initialize max_accesses. |
| (modref_tree::insert): Add access parameter. |
| (modref_tree::cleanup): New member function. |
| (modref_tree::merge): Add parm_map; merge accesses. |
| (modref_tree::copy_from): New member function. |
| (modref_tree::create_ggc): Add max_accesses. |
| * ipa-modref.c (dump_access): New function. |
| (dump_records): Dump accesses. |
| (dump_lto_records): Dump accesses. |
| (get_access): New function. |
| (record_access): Record access. |
| (record_access_lto): Record access. |
| (analyze_call): Compute parm_map. |
| (analyze_function): Update construction of modref records. |
| (modref_summaries::duplicate): Likewise; use copy_from. |
| (write_modref_records): Stream accesses. |
| (read_modref_records): Sream accesses. |
| (pass_ipa_modref::execute): Update call of merge. |
| * params.opt (-param=modref-max-accesses): New. |
| * tree-ssa-alias.c (alias_stats): Add modref_baseptr_tests. |
| (dump_alias_stats): Update. |
| (base_may_alias_with_dereference_p): New function. |
| (modref_may_conflict): Check accesses. |
| (ref_maybe_used_by_call_p_1): Update call to modref_may_conflict. |
| (call_may_clobber_ref_p_1): Update call to modref_may_conflict. |
| |
| 2020-09-24 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/arm/arm.md (*stack_protect_combined_set_insn): For non-PIC, |
| load the address of the canary rather than the address of the |
| constant pool entry that points to it. |
| (*stack_protect_combined_test_insn): Likewise. |
| |
| 2020-09-24 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97085 |
| * match.pd (mask ? { false,..} : { true, ..} -> ~mask): New. |
| |
| 2020-09-24 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-modref-tree.h (modref_base::collapse): Release memory. |
| (modref_tree::create_ggc): New member function. |
| (modref_tree::colapse): Release memory. |
| (modref_tree::~modref_tree): New destructor. |
| * ipa-modref.c (modref_summaries::create_ggc): New function. |
| (analyze_function): Use create_ggc. |
| (modref_summaries::duplicate): Likewise. |
| (read_modref_records): Likewise. |
| (modref_read): Likewise. |
| |
| 2020-09-24 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000.c (rs6000_rtx_costs): Pass mode to |
| reg_or_add_cint_operand and reg_or_sub_cint_operand. |
| |
| 2020-09-24 Alan Modra <amodra@gmail.com> |
| |
| PR target/93012 |
| * config/rs6000/rs6000.c (num_insns_constant_gpr): Count rldimi |
| constants correctly. |
| |
| 2020-09-24 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): |
| Conditionally define __PCREL__. |
| |
| 2020-09-24 Alan Modra <amodra@gmail.com> |
| |
| PR target/97107 |
| * config/rs6000/rs6000-internal.h (struct rs6000_stack): Improve |
| calls_p comment. |
| * config/rs6000/rs6000-logue.c (rs6000_stack_info): Likewise. |
| (rs6000_expand_split_stack_prologue): Emit the prologue for |
| functions that make a sibling call. |
| |
| 2020-09-24 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/analyzer.texi (Analyzer Paths): Add note about |
| -fno-analyzer-feasibility. |
| * doc/invoke.texi (Static Analyzer Options): Add |
| -fno-analyzer-feasibility. |
| |
| 2020-09-24 Paul A. Clarke <pc@us.ibm.com> |
| |
| * doc/extend.texi: Add 'd' for doubleword variant of |
| vector insert instruction. |
| |
| 2020-09-23 Martin Sebor <msebor@redhat.com> |
| |
| * gimple-array-bounds.cc (build_zero_elt_array_type): New function. |
| (array_bounds_checker::check_mem_ref): Call it. |
| |
| 2020-09-23 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/97175 |
| * builtins.c (maybe_warn_for_bound): Handle both DECLs and EXPRESSIONs |
| in pad->dst.ref, same is pad->src.ref. |
| |
| 2020-09-23 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-fnsummary.c (refs_local_or_readonly_memory_p): New function. |
| (points_to_local_or_readonly_memory_p): New function. |
| * ipa-fnsummary.h (refs_local_or_readonly_memory_p): Declare. |
| (points_to_local_or_readonly_memory_p): Declare. |
| * ipa-modref.c (record_access_p): Use refs_local_or_readonly_memory_p. |
| * ipa-pure-const.c (check_op): Likewise. |
| |
| 2020-09-23 Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.md: Don't allow operand containing sum of |
| function ref and const. |
| |
| 2020-09-23 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (aarch64_salt_type): New enum. |
| (aarch64_stack_protect_canary_mem): Declare. |
| * config/aarch64/aarch64.md (UNSPEC_SALT_ADDR): New unspec. |
| (stack_protect_set): Forward to stack_protect_combined_set. |
| (stack_protect_combined_set): New pattern. Use |
| aarch64_stack_protect_canary_mem. |
| (reg_stack_protect_address_<mode>): Add a salt operand. |
| (stack_protect_test): Forward to stack_protect_combined_test. |
| (stack_protect_combined_test): New pattern. Use |
| aarch64_stack_protect_canary_mem. |
| * config/aarch64/aarch64.c (strip_salt): New function. |
| (strip_offset_and_salt): Likewise. |
| (tls_symbolic_operand_type): Use strip_offset_and_salt. |
| (aarch64_stack_protect_canary_mem): New function. |
| (aarch64_cannot_force_const_mem): Use strip_offset_and_salt. |
| (aarch64_classify_address): Likewise. |
| (aarch64_symbolic_address_p): Likewise. |
| (aarch64_print_operand): Likewise. |
| (aarch64_output_addr_const_extra): New function. |
| (aarch64_tls_symbol_p): Use strip_salt. |
| (aarch64_classify_symbol): Likewise. |
| (aarch64_legitimate_pic_operand_p): Use strip_offset_and_salt. |
| (aarch64_legitimate_constant_p): Likewise. |
| (aarch64_mov_operand_p): Use strip_salt. |
| (TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA): Override. |
| |
| 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/71233 |
| * config/aarch64/arm_neon.h (vreinterpretq_f64_p128, |
| vreinterpretq_p128_f64): Define. |
| |
| 2020-09-23 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/arm/arm-cpus.in (neoverse-v1): New. |
| * config/arm/arm-tables.opt: Regenerate. |
| * config/arm/arm-tune.md: Regenerate. |
| * doc/invoke.texi: Document support for Neoverse V1. |
| |
| 2020-09-23 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/aarch64/aarch64-cores.def: Add Neoverse V1. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * doc/invoke.texi: Document support for Neoverse V1. |
| |
| 2020-09-23 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/96453 |
| * gimple-isel.cc (gimple_expand_vec_cond_expr): Remove |
| LT_EXPR -> NE_EXPR verification and also apply it for |
| non-constant masks. |
| |
| 2020-09-23 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-modref.c (modref_summary::lto_useful_p): New member function. |
| (modref_summary::useful_p): New member function. |
| (analyze_function): Drop useless summaries. |
| (modref_write): Skip useless summaries. |
| (pass_ipa_modref::execute): Drop useless summaries. |
| * ipa-modref.h (struct GTY): Declare useful_p and lto_useful_p. |
| * tree-ssa-alias.c (dump_alias_stats): Fix. |
| (modref_may_conflict): Fix stats. |
| |
| 2020-09-23 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/96466 |
| * internal-fn.c (expand_vect_cond_mask_optab_fn): Use |
| appropriate mode for force_reg. |
| * tree.c (build_truth_vector_type_for): Pass VOIDmode to |
| make_vector_type. |
| |
| 2020-09-23 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-vectorizer.h (determine_peel_for_niter): Delete in favor of... |
| (vect_determine_partial_vectors_and_peeling): ...this new function. |
| * tree-vect-loop-manip.c (vect_update_epilogue_niters): New function. |
| Reject using vector epilogue loops for single iterations. Install |
| the constant number of epilogue loop iterations in the associated |
| loop_vinfo. Rely on vect_determine_partial_vectors_and_peeling |
| to do the main part of the test. |
| (vect_do_peeling): Use vect_update_epilogue_niters to handle |
| epilogue loops with a known number of iterations. Skip recomputing |
| the number of iterations later in that case. Otherwise, use |
| vect_determine_partial_vectors_and_peeling to decide whether the |
| epilogue loop needs to use partial vectors or peeling. |
| * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Set the |
| default can_use_partial_vectors_p to false if partial-vector-usage=0. |
| (determine_peel_for_niter): Remove in favor of... |
| (vect_determine_partial_vectors_and_peeling): ...this new function, |
| split out from... |
| (vect_analyze_loop_2): ...here. Reflect the vect_verify_full_masking |
| and vect_verify_loop_lens results in CAN_USE_PARTIAL_VECTORS_P |
| rather than USING_PARTIAL_VECTORS_P. |
| |
| 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/71233 |
| * config/aarch64/aarch64-simd-builtins.def (frintn): Use BUILTIN_VHSDF_HSDF |
| for modes. Remove explicit hf instantiation. |
| * config/aarch64/arm_neon.h (vrndns_f32): Define. |
| |
| 2020-09-23 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97173 |
| * tree-vect-loop.c (vectorizable_live_operation): Extend |
| assert to also conver element conversions. |
| |
| 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/71233 |
| * config/aarch64/arm_neon.h (vtrn1q_p64, vtrn2q_p64, vuzp1q_p64, |
| vuzp2q_p64, vzip1q_p64, vzip2q_p64): Define. |
| |
| 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/71233 |
| * config/aarch64/arm_neon.h (vldrq_p128): Define. |
| |
| 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/71233 |
| * config/aarch64/arm_neon.h (vstrq_p128): Define. |
| |
| 2020-09-23 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97151 |
| * tree-ssa-structalias.c (find_func_aliases_for_call): |
| DECL_IS_REPLACEABLE_OPERATOR_DELETE_P has no effect on |
| arguments. |
| |
| 2020-09-23 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/97162 |
| * alias.c (compare_base_decls): Use DECL_HARD_REGISTER |
| and guard with VAR_P. |
| |
| 2020-09-23 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/97069 |
| * profile.c (branch_prob): Line number must be at least 1. |
| |
| 2020-09-23 Tom de Vries <tdevries@suse.de> |
| |
| PR target/97158 |
| * config/nvptx/nvptx.c (nvptx_output_mov_insn): Handle move from |
| DF subreg to DF reg. |
| |
| 2020-09-23 David Malcolm <dmalcolm@redhat.com> |
| |
| * Makefile.in: Add $(ZLIBINC) to CFLAGS-analyzer/engine.o. |
| |
| 2020-09-22 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref.c (analyze_stmt): Ignore gimple clobber. |
| |
| 2020-09-22 Jan Hubicka <jh@suse.cz> |
| |
| * ipa-modref-tree.c: Add namespace selftest. |
| (modref_tree_c_tests): Rename to ... |
| (ipa_modref_tree_c_tests): ... this. |
| * ipa-modref.c (pass_modref): Remove destructor. |
| (ipa_modref_c_finalize): New function. |
| * ipa-modref.h (ipa_modref_c_finalize): Declare. |
| * selftest-run-tests.c (selftest::run_tests): Call |
| ipa_modref_c_finalize. |
| * selftest.h (ipa_modref_tree_c_tests): Declare. |
| * toplev.c: Include ipa-modref-tree.h and ipa-modref.h |
| (toplev::finalize): Call ipa_modref_c_finalize. |
| |
| 2020-09-22 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/analyzer.texi (Other Debugging Techniques): Mention |
| -fdump-analyzer-json. |
| * doc/invoke.texi (Static Analyzer Options): Add |
| -fdump-analyzer-json. |
| |
| 2020-09-22 David Faust <david.faust@oracle.com> |
| |
| * config/bpf/bpf.md: Add defines for signed div and mod operators. |
| |
| 2020-09-22 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/96979 |
| * doc/invoke.texi: Document new param max-switch-clustering-attempts. |
| * params.opt: Add new parameter. |
| * tree-switch-conversion.c (jump_table_cluster::find_jump_tables): |
| Limit number of attempts. |
| (bit_test_cluster::find_bit_tests): Likewise. |
| |
| 2020-09-22 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| * config/s390/s390.md ("*cmp<mode>_ccs_0", "*cmp<mode>_ccz_0", |
| "*cmp<mode>_ccs_0_fastmath"): Basically change "*cmp<mode>_ccs_0" into |
| "*cmp<mode>_ccz_0" and for fast math add "*cmp<mode>_ccs_0_fastmath". |
| |
| 2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/71233 |
| * config/aarch64/arm_neon.h (vcls_u8, vcls_u16, vcls_u32, |
| vclsq_u8, vclsq_u16, vclsq_u32): Define. |
| |
| 2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/71233 |
| * config/aarch64/arm_neon.h (vceqq_p64, vceqz_p64, vceqzq_p64): Define. |
| |
| 2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| PR target/71233 |
| * config/aarch64/arm_neon.h (vadd_p8, vadd_p16, vadd_p64, vaddq_p8, |
| vaddq_p16, vaddq_p64, vaddq_p128): Define. |
| |
| 2020-09-22 Jakub Jelinek <jakub@redhat.com> |
| |
| * params.opt (--param=modref-max-tests=): Fix typo in help text: |
| perofmed -> performed. |
| * common.opt: Fix typo: incrmeental -> incremental. |
| * ipa-modref.c: Fix typos: recroding -> recording, becaue -> because, |
| analsis -> analysis. |
| (class modref_summaries): Fix typo: betweehn -> between. |
| (analyze_call): Fix typo: calle -> callee. |
| (read_modref_records): Fix typo: expcted -> expected. |
| (pass_ipa_modref::execute): Fix typo: calle -> callee. |
| |
| 2020-09-22 Jakub Jelinek <jakub@redhat.com> |
| |
| * common.opt (-fipa-modref): Add dot at the end of option help. |
| * params.opt (--param=modref-max-tests=): Likewise. |
| |
| 2020-09-21 Marek Polacek <polacek@redhat.com> |
| |
| * doc/invoke.texi: Document -Wctad-maybe-unsupported. |
| |
| 2020-09-21 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97139 |
| * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): Only mark the |
| pattern root, track visited vectorized stmts. |
| |
| 2020-09-21 Jakub Jelinek <jakub@redhat.com> |
| |
| * configure.ac: Use mallinfo mallinfo2 as first operand of |
| gcc_AC_CHECK_DECLS rather than [mallinfo, mallinfo2]. |
| * configure: Regenerated. |
| * config.in: Regenerated. |
| |
| 2020-09-21 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/aarch64-builtins.c |
| (aarch64_general_expand_builtin): Use expand machinery not to |
| alter the value of an rtx returned by force_reg. |
| |
| 2020-09-21 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97135 |
| * tree-ssa-loop-im.c (sm_seq_push_down): Do not ignore |
| self-dependences. |
| |
| 2020-09-21 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/96915 |
| * tree-switch-conversion.c (switch_conversion::expand): Accept |
| also integer constants. |
| |
| 2020-09-21 Martin Liska <mliska@suse.cz> |
| |
| * print-tree.c (print_node): Remove extra space. |
| |
| 2020-09-21 Andrea Corallo <andrea.corallo@arm.com> |
| |
| PR target/96968 |
| * config/aarch64/aarch64-builtins.c |
| (aarch64_expand_fpsr_fpcr_setter): Fix comment nit. |
| (aarch64_expand_fpsr_fpcr_getter): New function, expand these |
| getters using expand_insn machinery. |
| (aarch64_general_expand_builtin): Make use of. |
| |
| 2020-09-21 Martin Liska <mliska@suse.cz> |
| |
| * ggc-common.c (ggc_rlimit_bound): Use ONE_? macro. |
| (ggc_min_expand_heuristic): Likewise. |
| (ggc_min_heapsize_heuristic): Likewise. |
| * ggc-page.c (ggc_collect): Likewise. |
| * system.h (ONE_G): Likewise. |
| |
| 2020-09-21 Martin Liska <mliska@suse.cz> |
| |
| * ggc-common.c (ggc_prune_overhead_list): Use SIZE_AMOUNT. |
| * ggc-page.c (release_pages): Likewise. |
| (ggc_collect): Likewise. |
| (ggc_trim): Likewise. |
| (ggc_grow): Likewise. |
| * timevar.c (timer::print): Likewise. |
| |
| 2020-09-21 Martin Liska <mliska@suse.cz> |
| |
| * config.in: Regenerate. |
| * configure: Likewise. |
| * configure.ac: Detect for mallinfo2. |
| * ggc-common.c (defined): Use it. |
| * system.h: Handle also HAVE_MALLINFO2. |
| |
| 2020-09-20 John David Anglin < danglin@gcc.gnu.org> |
| |
| * config/pa/pa-hpux11.h (LINK_GCC_C_SEQUENCE_SPEC): Delete. |
| * config/pa/pa64-hpux.h (LINK_GCC_C_SEQUENCE_SPEC): Likewise. |
| (ENDFILE_SPEC): Link with libgcc_stub.a and mill.a. |
| * config/pa/pa32-linux.h (ENDFILE_SPEC): Link with libgcc.a. |
| |
| 2020-09-20 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-modref.c (dump_lto_records): Fix ICE. |
| |
| 2020-09-20 David Cepelik <d@dcepelik.cz> |
| Jan Hubicka <hubicka@ucw.cz> |
| |
| * Makefile.in: Add ipa-modref.c and ipa-modref-tree.c. |
| * alias.c: (reference_alias_ptr_type_1): Export. |
| * alias.h (reference_alias_ptr_type_1): Declare. |
| * common.opt (fipa-modref): New. |
| * gengtype.c (open_base_files): Add ipa-modref-tree.h and ipa-modref.h |
| * ipa-modref-tree.c: New file. |
| * ipa-modref-tree.h: New file. |
| * ipa-modref.c: New file. |
| * ipa-modref.h: New file. |
| * lto-section-in.c (lto_section_name): Add ipa_modref. |
| * lto-streamer.h (enum lto_section_type): Add LTO_section_ipa_modref. |
| * opts.c (default_options_table): Enable ipa-modref at -O1+. |
| * params.opt (-param=modref-max-bases, -param=modref-max-refs, |
| -param=modref-max-tests): New params. |
| * passes.def: Schedule pass_modref and pass_ipa_modref. |
| * timevar.def (TV_IPA_MODREF): New timevar. |
| (TV_TREE_MODREF): New timevar. |
| * tree-pass.h (make_pass_modref): Declare. |
| (make_pass_ipa_modref): Declare. |
| * tree-ssa-alias.c (dump_alias_stats): Include ipa-modref-tree.h |
| and ipa-modref.h |
| (alias_stats): Add modref_use_may_alias, modref_use_no_alias, |
| modref_clobber_may_alias, modref_clobber_no_alias, modref_tests. |
| (dump_alias_stats): Dump new stats. |
| (nonoverlapping_array_refs_p): Fix formating. |
| (modref_may_conflict): New function. |
| (ref_maybe_used_by_call_p_1): Use it. |
| (call_may_clobber_ref_p_1): Use it. |
| (call_may_clobber_ref_p): Update. |
| (stmt_may_clobber_ref_p_1): Update. |
| * tree-ssa-alias.h (call_may_clobber_ref_p_1): Update. |
| |
| 2020-09-19 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/82608 |
| PR middle-end/94195 |
| PR c/50584 |
| PR middle-end/84051 |
| * gimple-array-bounds.cc (get_base_decl): New function. |
| (get_ref_size): New function. |
| (trailing_array): New function. |
| (array_bounds_checker::check_array_ref): Call them. Handle arrays |
| declared in function parameters. |
| (array_bounds_checker::check_mem_ref): Same. Handle references to |
| dynamically allocated arrays. |
| |
| 2020-09-19 Martin Sebor <msebor@redhat.com> |
| |
| PR c/50584 |
| * builtins.c (warn_for_access): Add argument. Distinguish between |
| reads and writes. |
| (check_access): Add argument. Distinguish between reads and writes. |
| (gimple_call_alloc_size): Set range even on failure. |
| (gimple_parm_array_size): New function. |
| (compute_objsize): Call it. |
| (check_memop_access): Pass check_access an additional argument. |
| (expand_builtin_memchr, expand_builtin_strcat): Same. |
| (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same. |
| (expand_builtin_stpncpy, check_strncat_sizes): Same. |
| (expand_builtin_strncat, expand_builtin_strncpy): Same. |
| (expand_builtin_memcmp): Same. |
| * builtins.h (compute_objsize): Declare a new overload. |
| (gimple_parm_array_size): Declare. |
| (check_access): Add argument. |
| * calls.c (append_attrname): Simplify. |
| (maybe_warn_rdwr_sizes): Handle internal attribute access. |
| * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Avoid adding |
| quotes. |
| |
| 2020-09-19 Martin Sebor <msebor@redhat.com> |
| |
| * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Handle attribute |
| access internal representation of arrays. |
| |
| 2020-09-19 Martin Sebor <msebor@redhat.com> |
| |
| PR c/50584 |
| * attribs.c (decl_attributes): Also pass decl along with type |
| attributes to handlers. |
| (init_attr_rdwr_indices): Change second argument to attribute chain. |
| Handle internal attribute representation in addition to external. |
| (get_parm_access): New function. |
| (attr_access::to_internal_string): Define new member function. |
| (attr_access::to_external_string): Define new member function. |
| (attr_access::vla_bounds): Define new member function. |
| * attribs.h (struct attr_access): Declare new members. |
| (attr_access::from_mode_char): Define new member function. |
| (get_parm_access): Declare new function. |
| * calls.c (initialize_argument_information): Pass function type |
| attributes to init_attr_rdwr_indices. |
| * doc/invoke.texi (-Warray-parameter, -Wvla-parameter): Document. |
| * tree-pretty-print.c (dump_generic_node): Correct handling of |
| qualifiers. |
| * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Same. |
| * tree.h (access_mode): Add new enumerator. |
| |
| 2020-09-19 Sandra Loosemore <sandra@codesourcery.com> |
| |
| * doc/generic.texi (Basic Statements): Document SWITCH_EXPR here, |
| not SWITCH_STMT. |
| (Statements for C and C++): Rename node to reflect what |
| the introduction already says about sharing between C and C++ |
| front ends. Copy-edit and correct documentation for structured |
| loops and switch. |
| |
| 2020-09-19 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/96861 |
| * config/i386/x86-tune-costs.h (skylake_cost): increase rtx |
| cost of sse_to_integer from 2 to 6. |
| |
| 2020-09-18 Sudi Das <sudi.das@arm.com> |
| Omar Tahir <omar.tahir@arm.com> |
| |
| * config/arm/thumb2.md (*thumb2_csneg): New. |
| (*thumb2_negscc): Don't match if TARGET_COND_ARITH. |
| * config/arm/arm.md (*if_neg_move): Don't match if TARGET_COND_ARITH. |
| |
| 2020-09-18 Sudi Das <sudi.das@arm.com> |
| Omar Tahir <omar.tahir@arm.com> |
| |
| * config/arm/thumb2.md (*thumb2_csinc): New. |
| (*thumb2_cond_arith): Generate CINC where possible. |
| |
| 2020-09-18 Sudi Das <sudi.das@arm.com> |
| Omar Tahir <omar.tahir@arm.com> |
| |
| * config/arm/arm.h (TARGET_COND_ARITH): New macro. |
| * config/arm/arm.c (arm_have_conditional_execution): Return false if |
| TARGET_COND_ARITH before reload. |
| * config/arm/predicates.md (arm_comparison_operation): Returns true if |
| comparing CC_REGNUM with constant zero. |
| * config/arm/thumb2.md (*thumb2_csinv): New. |
| (*thumb2_movcond): Don't match if TARGET_COND_ARITH. |
| |
| 2020-09-18 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR middle-end/91957 |
| * ira.c (ira_setup_eliminable_regset): Skip the special elimination |
| handling of the hard frame pointer if the hard frame pointer is fixed. |
| |
| 2020-09-18 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97081 |
| * tree-vect-patterns.c (vect_recog_rotate_pattern): Use the |
| precision of the shifted operand to determine the mask. |
| |
| 2020-09-18 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (msp430_print_operand): Update comment. |
| Cast to long when printing values formatted as long. |
| Support 'd', 'e', 'f' and 'g' modifiers. |
| Extract operand value with a single operation for all modifiers. |
| * doc/extend.texi (msp430Operandmodifiers): New. |
| |
| 2020-09-18 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (increment_stack): Mark insns which increment |
| the stack as frame_related. |
| (msp430_expand_prologue): Add comments. |
| (msp430_expand_epilogue): Mark insns which decrement |
| the stack as frame_related. |
| Add reg_note to stack pop insns describing position of register |
| variables on the stack. |
| |
| 2020-09-18 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-tree.c (execute_omp_gcn): Delete. |
| (make_pass_omp_gcn): Delete. |
| * config/gcn/t-gcn-hsa (PASSES_EXTRA): Delete. |
| * config/gcn/gcn-passes.def: Removed. |
| |
| 2020-09-18 Alex Coplan <alex.coplan@arm.com> |
| |
| * cfgloop.h (nb_iter_bound): Reword comment describing is_exit. |
| |
| 2020-09-18 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97095 |
| * tree-vect-loop.c (vectorizable_live_operation): Get |
| the SLP vector type from the correct object. |
| |
| 2020-09-18 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97089 |
| * tree-ssa-sccvn.c (visit_nary_op): Do not replace unsigned |
| divisions. |
| |
| 2020-09-18 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97098 |
| * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): Do not |
| recurse to children when all stmts were already visited. |
| |
| 2020-09-17 Sergei Trofimovich <siarheit@google.com> |
| |
| * profile.c (sort_hist_values): Clarify hist format: |
| start with a value, not counter. |
| |
| 2020-09-17 Yeting Kuo <fakepaper56@gmail.com> |
| |
| * config/riscv/riscv.h (CSW_MAX_OFFSET): Fix typo. |
| |
| 2020-09-17 Patrick Palka <ppalka@redhat.com> |
| |
| PR c/80076 |
| * gensupport.c (alter_attrs_for_subst_insn) <case SET_ATTR>: |
| Reduce indentation of misleadingly indented code fragment. |
| * lra-constraints.c (multi_block_pseudo_p): Likewise. |
| * sel-sched-ir.c (merge_fences): Likewise. |
| |
| 2020-09-17 Martin Sebor <msebor@redhat.com> |
| |
| * doc/invoke.texi (-Wuninitialized): Document -Wuninitialized for |
| allocated objects. |
| (-Wmaybe-uninitialized): Same. |
| |
| 2020-09-17 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-sccvn.c (visit_nary_op): Value-number multiplications |
| and divisions to negates of available negated forms. |
| |
| 2020-09-17 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR middle-end/97078 |
| * function.c (use_register_for_decl): Test cfun->tail_call_marked |
| for a parameter here instead of... |
| (assign_parm_setup_reg): ...here. |
| |
| 2020-09-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op.cc (multi_precision_range_tests): Normalize symbolics when copying to a |
| multi-range. |
| * value-range.cc (irange::copy_legacy_range): Add test. |
| |
| 2020-09-17 Jan Hubicka <jh@suse.cz> |
| |
| * cgraph.c (cgraph_node::get_availability): Fix availability of |
| functions in other partitions |
| * varpool.c (varpool_node::get_availability): Likewise. |
| |
| 2020-09-17 Jojo R <jiejie_rong@c-sky.com> |
| |
| * config/csky/csky.opt (msim): New. |
| * doc/invoke.texi (C-SKY Options): Document -msim. |
| * config/csky/csky-elf.h (LIB_SPEC): Add simulator runtime. |
| |
| 2020-09-17 Sergei Trofimovich <siarheit@google.com> |
| |
| * doc/cppenv.texi: Use @code{} instead of @samp{@command{}} |
| around 'date %s'. |
| |
| 2020-09-17 liuhongt <hongtao.liu@intel.com> |
| |
| * common/config/i386/i386-common.c |
| (OPTION_MASK_ISA_AVX_UNSET): Remove OPTION_MASK_ISA_XSAVE_UNSET. |
| (OPTION_MASK_ISA_XSAVE_UNSET): Add OPTION_MASK_ISA_AVX_UNSET. |
| |
| 2020-09-16 Alexandre Oliva <oliva@adacore.com> |
| |
| * config/rs6000/rs6000.c (have_compare_and_set_mask): Use |
| E_*mode in cases. |
| |
| 2020-09-16 Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| * config/rs6000/predicates.md (current_file_function_operand): |
| Remove argument from rs6000_pcrel_p call. |
| * config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall): |
| Likewise. |
| (rs6000_global_entry_point_prologue_needed_p): Likewise. |
| (rs6000_output_function_prologue): Likewise. |
| * config/rs6000/rs6000-protos.h (rs6000_function_pcrel_p): New |
| prototype. |
| (rs6000_pcrel_p): Remove argument. |
| * config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Remove |
| argument from rs6000_pcrel_p call. |
| (rs6000_call_template_1): Likewise. |
| (rs6000_indirect_call_template_1): Likewise. |
| (rs6000_longcall_ref): Likewise. |
| (rs6000_call_aix): Likewise. |
| (rs6000_sibcall_aix): Likewise. |
| (rs6000_function_pcrel_p): Rename from rs6000_pcrel_p. |
| (rs6000_pcrel_p): Rewrite. |
| * config/rs6000/rs6000.md (*pltseq_plt_pcrel<mode>): Remove |
| argument from rs6000_pcrel_p call. |
| (*call_local<mode>): Likewise. |
| (*call_value_local<mode>): Likewise. |
| (*call_nonlocal_aix<mode>): Likewise. |
| (*call_value_nonlocal_aix<mode>): Likewise. |
| (*call_indirect_pcrel<mode>): Likewise. |
| (*call_value_indirect_pcrel<mode>): Likewise. |
| |
| 2020-09-16 Marek Polacek <polacek@redhat.com> |
| |
| PR preprocessor/96935 |
| * input.c (get_substring_ranges_for_loc): Return if start.column |
| is less than 1. |
| |
| 2020-09-16 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/96295 |
| * tree-ssa-uninit.c (maybe_warn_operand): Work harder to avoid |
| warning for objects of empty structs |
| |
| 2020-09-16 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * tree-eh.c (lower_try_finally_dup_block): Backward propagate slocs |
| to stack restore builtin calls. |
| (cleanup_all_empty_eh): Do again a post-order traversal of the EH |
| region tree. |
| |
| 2020-09-16 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * tree-vect-loop.c (vect_need_peeling_or_partial_vectors_p): New |
| function. |
| (vect_analyze_loop_2): Make use of it not to select partial |
| vectors if no peel is required. |
| (determine_peel_for_niter): Move out some logic into |
| 'vect_need_peeling_or_partial_vectors_p'. |
| |
| 2020-09-16 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/97032 |
| * cfgexpand.c (asm_clobber_reg_kind): Set sp_is_clobbered_by_asm |
| to true if the stack pointer is clobbered by asm statement. |
| * emit-rtl.h (rtl_data): Add sp_is_clobbered_by_asm. |
| * config/i386/i386.c (ix86_get_drap_rtx): Set need_drap to true |
| if the stack pointer is clobbered by asm statement. |
| |
| 2020-09-16 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * config/s390/vector.md(*vec_tf_to_v1tf): Use "f" instead of "v" |
| for the source operand. |
| |
| 2020-09-16 Jojo R <jiejie_rong@c-sky.com> |
| |
| * config.gcc (C-SKY): Set use_gcc_stdint=wrap for elf target. |
| |
| 2020-09-16 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (_stmt_vec_info::num_slp_uses): Remove. |
| (STMT_VINFO_NUM_SLP_USES): Likewise. |
| (vect_free_slp_instance): Adjust. |
| (vect_update_shared_vectype): Declare. |
| * tree-vectorizer.c (vec_info::~vec_info): Adjust. |
| * tree-vect-loop.c (vect_analyze_loop_2): Likewise. |
| (vectorizable_live_operation): Use vector type from |
| SLP_TREE_REPRESENTATIVE. |
| (vect_transform_loop): Adjust. |
| * tree-vect-data-refs.c (vect_slp_analyze_node_alignment): |
| Set the shared vector type. |
| * tree-vect-slp.c (vect_free_slp_tree): Remove final_p |
| parameter, remove STMT_VINFO_NUM_SLP_USES updating. |
| (vect_free_slp_instance): Adjust. |
| (vect_create_new_slp_node): Remove STMT_VINFO_NUM_SLP_USES |
| updating. |
| (vect_update_shared_vectype): Always compare with the |
| present vector type, update if NULL. |
| (vect_build_slp_tree_1): Do not update the shared vector |
| type here. |
| (vect_build_slp_tree_2): Adjust. |
| (slp_copy_subtree): Likewise. |
| (vect_attempt_slp_rearrange_stmts): Likewise. |
| (vect_analyze_slp_instance): Likewise. |
| (vect_analyze_slp): Likewise. |
| (vect_slp_analyze_node_operations_1): Update the shared |
| vector type. |
| (vect_slp_analyze_operations): Adjust. |
| (vect_slp_analyze_bb_1): Likewise. |
| |
| 2020-09-16 Jojo R <jiejie_rong@c-sky.com> |
| |
| * config/csky/t-csky-linux (CSKY_MULTILIB_OSDIRNAMES): Use mfloat-abi. |
| (MULTILIB_OPTIONS): Likewise. |
| * config/csky/t-csky-elf (MULTILIB_OPTIONS): Likewise. |
| (MULTILIB_EXCEPTIONS): Likewise. |
| |
| 2020-09-16 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/arm/arm.c (arm_option_restore): Comment out opts argument |
| name to avoid unused parameter warnings. |
| |
| 2020-09-16 Jakub Jelinek <jakub@redhat.com> |
| |
| * optc-save-gen.awk: In cl_optimization_stream_out use |
| bp_pack_var_len_{int,unsigned} instead of bp_pack_value. In |
| cl_optimization_stream_in use bp_unpack_var_len_{int,unsigned} |
| instead of bp_unpack_value. Formatting fix. |
| |
| 2020-09-16 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/97053 |
| * gimple-ssa-store-merging.c (check_no_overlap): Add FIRST_ORDER, |
| START, FIRST_EARLIER and LAST_EARLIER arguments. Return false if |
| any stores between FIRST_EARLIER inclusive and LAST_EARLIER exclusive |
| has order in between FIRST_ORDER and LAST_ORDER and overlaps the to |
| be merged store. |
| (imm_store_chain_info::try_coalesce_bswap): Add FIRST_EARLIER argument. |
| Adjust check_no_overlap caller. |
| (imm_store_chain_info::coalesce_immediate_stores): Add first_earlier |
| and last_earlier variables, adjust them during iterations. Adjust |
| check_no_overlap callers, call check_no_overlap even when extending |
| overlapping stores by extra INTEGER_CST stores. |
| |
| 2020-09-16 Jojo R <jiejie_rong@c-sky.com> |
| |
| * config/csky/csky-linux-elf.h (GLIBC_DYNAMIC_LINKER): Use mfloat-abi. |
| |
| 2020-09-16 Kewen Lin <linkw@linux.ibm.com> |
| |
| PR target/97019 |
| * config/rs6000/rs6000-p8swap.c (find_alignment_op): Adjust to |
| support multiple defintions which are all AND operations with |
| the mask -16B. |
| (recombine_lvx_pattern): Adjust to handle multiple AND operations |
| from find_alignment_op. |
| (recombine_stvx_pattern): Likewise. |
| |
| 2020-09-16 Jojo R <jiejie_rong@c-sky.com> |
| |
| * config/csky/csky.md (CSKY_NPARM_FREGS): New. |
| (call_value_internal_vs/d): New. |
| (untyped_call): New. |
| * config/csky/csky.h (TARGET_SINGLE_FPU): New. |
| (TARGET_DOUBLE_FPU): New. |
| (FUNCTION_VARG_REGNO_P): New. |
| (CSKY_VREG_MODE_P): New. |
| (FUNCTION_VARG_MODE_P): New. |
| (CUMULATIVE_ARGS): Add extra regs info. |
| (INIT_CUMULATIVE_ARGS): Use csky_init_cumulative_args. |
| (FUNCTION_ARG_REGNO_P): Use FUNCTION_VARG_REGNO_P. |
| * config/csky/csky-protos.h (csky_init_cumulative_args): Extern. |
| * config/csky/csky.c (csky_cpu_cpp_builtins): Support TARGET_HARD_FLOAT_ABI. |
| (csky_function_arg): Likewise. |
| (csky_num_arg_regs): Likewise. |
| (csky_function_arg_advance): Likewise. |
| (csky_function_value): Likewise. |
| (csky_libcall_value): Likewise. |
| (csky_function_value_regno_p): Likewise. |
| (csky_arg_partial_bytes): Likewise. |
| (csky_setup_incoming_varargs): Likewise. |
| (csky_init_cumulative_args): New. |
| |
| 2020-09-16 Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| * config/rs6000/rs6000-call.c (altivec_init_builtins): Fix name |
| of __builtin_altivec_xst_len_r. |
| |
| 2020-09-15 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| * rtlanal.c (set_noop_p): Treat subregs of registers in |
| different modes conservatively. |
| |
| 2020-09-15 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): Make swap |
| argument by-value and do not change it. |
| (vect_build_slp_tree_2): Adjust, set swap to NULL after last |
| use. |
| |
| 2020-09-15 Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR tree-optimization/94234 |
| * match.pd (T)(A) +- (T)(B) -> (T)(A +- B): New simplification. |
| |
| 2020-09-15 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| PR rtl-optimization/96475 |
| * bb-reorder.c (duplicate_computed_gotos): If we did anything, run |
| cleanup_cfg. |
| |
| 2020-09-15 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_build_slp_tree_2): Also consider |
| building an operand from scalars when building it did not |
| fail fatally but avoid messing with the upcall splitting |
| of groups. |
| |
| 2020-09-15 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Do not |
| check +D32 for CMSE if -mfloat-abi=soft |
| |
| 2020-09-15 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/96744 |
| * config/i386/x86-tune-costs.h (struct processor_costs): |
| Increase mask <-> integer cost for non AVX512 target to avoid |
| spill gpr to mask. Also retune mask <-> integer and |
| mask_load/store for skylake_cost. |
| |
| 2020-09-15 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/97028 |
| * config/i386/sse.md (mul<mode>3<mask_name>_bcs, |
| <avx512>_div<mode>3<mask_name>_bcst): Use <avx512bcst> instead of |
| <<avx512bcst>>. |
| |
| 2020-09-15 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR fortran/96668 |
| * gimplify.c (gimplify_omp_for): Add 'bool openacc' argument; |
| update omp_finish_clause calls. |
| (gimplify_adjust_omp_clauses_1, gimplify_adjust_omp_clauses, |
| gimplify_expr, gimplify_omp_loop): Update omp_finish_clause |
| and/or gimplify_for calls. |
| * langhooks-def.h (lhd_omp_finish_clause): Add bool openacc arg. |
| * langhooks.c (lhd_omp_finish_clause): Likewise. |
| * langhooks.h (lhd_omp_finish_clause): Likewise. |
| * omp-low.c (scan_sharing_clauses): Keep GOMP_MAP_TO_PSET cause for |
| 'declare target' vars. |
| |
| 2020-09-15 Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR tree-optimization/94234 |
| * genmatch.c (dt_simplify::gen_1): Emit check on final simplification |
| result when "!" is specified on toplevel output expr. |
| * match.pd ((A * C) +- (B * C) -> (A +- B) * C): Allow folding on expr |
| with multi-use operands if final result is a simple gimple value. |
| |
| 2020-09-14 Sergei Trofimovich <siarheit@google.com> |
| |
| * doc/invoke.texi: fix '-fprofile-reproducibility' option |
| spelling in manual. |
| |
| 2020-09-14 Jose E. Marchesi <jose.marchesi@oracle.com> |
| |
| * config/bpf/bpf.md ("nop"): Re-define as `ja 0'. |
| |
| 2020-09-14 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * cgraphunit.c (cgraph_node::expand_thunk): Make sure to set |
| cfun->tail_call_marked when forcing a tail call. |
| * function.c (assign_parm_setup_reg): Always use a register to |
| load a parameter passed by reference if cfun->tail_call_marked. |
| |
| 2020-09-14 Pat Haugen <pthaugen@linux.ibm.com> |
| |
| * config/rs6000/power10.md (power10-mffgpr, power10-mftgpr): Rename to |
| power10-mtvsr/power10-mfvsr. |
| * config/rs6000/power6.md (X2F_power6, power6-mftgpr, power6-mffgpr): |
| Remove. |
| * config/rs6000/power8.md (power8-mffgpr, power8-mftgpr): Rename to |
| power8-mtvsr/power8-mfvsr. |
| * config/rs6000/power9.md (power9-mffgpr, power9-mftgpr): Rename to |
| power9-mtvsr/power9-mfvsr. |
| * config/rs6000/rs6000.c (rs6000_adjust_cost): Remove Power6 |
| TYPE_MFFGPR cases. |
| * config/rs6000/rs6000.md (mffgpr, mftgpr, zero_extendsi<mode>2, |
| extendsi<mode>2, @signbit<mode>2_dm, lfiwax, lfiwzx, *movsi_internal1, |
| movsi_from_sf, *movdi_from_sf_zero_ext, *mov<mode>_internal, |
| movsd_hardfloat, movsf_from_si, *mov<mode>_hardfloat64, p8_mtvsrwz, |
| p8_mtvsrd_df, p8_mtvsrd_sf, p8_mfvsrd_3_<mode>, *movdi_internal64, |
| unpack<mode>_dm): Rename mffgpr/mftgpr to mtvsr/mfvsr. |
| * config/rs6000/vsx.md (vsx_mov<mode>_64bit, vsx_extract_<mode>, |
| vsx_extract_si, *vsx_extract_<mode>_p8): Likewise. |
| |
| 2020-09-14 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/arm/arm.opt (x_arm_arch_string, x_arm_cpu_string, |
| x_arm_tune_string): Remove TargetSave entries. |
| (march=, mcpu=, mtune=): Add Save keyword. |
| * config/arm/arm.c (arm_option_save): Remove. |
| (TARGET_OPTION_SAVE): Don't redefine. |
| (arm_option_restore): Don't restore x_arm_*_string here. |
| |
| 2020-09-14 Jakub Jelinek <jakub@redhat.com> |
| |
| * opt-read.awk: Also initialize extra_target_var_types array. |
| * opth-gen.awk: Emit explicit_mask arrays to struct cl_optimization |
| and cl_target_option. Adjust cl_optimization_save, |
| cl_optimization_restore, cl_target_option_save and |
| cl_target_option_restore declarations. |
| * optc-save-gen.awk: Add opts_set argument to cl_optimization_save, |
| cl_optimization_restore, cl_target_option_save and |
| cl_target_option_restore functions and save or restore opts_set |
| next to the opts values into or from explicit_mask arrays. |
| In cl_target_option_eq and cl_optimization_option_eq compare |
| explicit_mask arrays, in cl_target_option_hash and cl_optimization_hash |
| hash them and in cl_target_option_stream_out, |
| cl_target_option_stream_in, cl_optimization_stream_out and |
| cl_optimization_stream_in stream them. |
| * tree.h (build_optimization_node, build_target_option_node): Add |
| opts_set argument. |
| * tree.c (build_optimization_node): Add opts_set argument, pass it |
| to cl_optimization_save. |
| (build_target_option_node): Add opts_set argument, pass it to |
| cl_target_option_save. |
| * function.c (invoke_set_current_function_hook): Adjust |
| cl_optimization_restore caller. |
| * ipa-inline-transform.c (inline_call): Adjust cl_optimization_restore |
| and build_optimization_node callers. |
| * target.def (TARGET_OPTION_SAVE, TARGET_OPTION_RESTORE): Add opts_set |
| argument. |
| * target-globals.c (save_target_globals_default_opts): Adjust |
| cl_optimization_restore callers. |
| * toplev.c (process_options): Adjust build_optimization_node and |
| cl_optimization_restore callers. |
| (target_reinit): Adjust cl_optimization_restore caller. |
| * tree-streamer-in.c (lto_input_ts_function_decl_tree_pointers): |
| Adjust build_optimization_node and cl_optimization_restore callers. |
| * doc/tm.texi: Updated. |
| * config/aarch64/aarch64.c (aarch64_override_options): Adjust |
| build_target_option_node caller. |
| (aarch64_option_save, aarch64_option_restore): Add opts_set argument. |
| (aarch64_set_current_function): Adjust cl_target_option_restore |
| caller. |
| (aarch64_option_valid_attribute_p): Adjust cl_target_option_save, |
| cl_target_option_restore, cl_optimization_restore, |
| build_optimization_node and build_target_option_node callers. |
| * config/aarch64/aarch64-c.c (aarch64_pragma_target_parse): Adjust |
| cl_target_option_restore and build_target_option_node callers. |
| * config/arm/arm.c (arm_option_save, arm_option_restore): Add |
| opts_set argument. |
| (arm_option_override): Adjust cl_target_option_save, |
| build_optimization_node and build_target_option_node callers. |
| (arm_set_current_function): Adjust cl_target_option_restore caller. |
| (arm_valid_target_attribute_tree): Adjust build_target_option_node |
| caller. |
| (add_attribute): Formatting fix. |
| (arm_valid_target_attribute_p): Adjust cl_optimization_restore, |
| cl_target_option_restore, arm_valid_target_attribute_tree and |
| build_optimization_node callers. |
| * config/arm/arm-c.c (arm_pragma_target_parse): Adjust |
| cl_target_option_restore callers. |
| * config/csky/csky.c (csky_option_override): Adjust |
| build_target_option_node and cl_target_option_save callers. |
| * config/gcn/gcn.c (gcn_fixup_accel_lto_options): Adjust |
| build_optimization_node and cl_optimization_restore callers. |
| * config/i386/i386-builtins.c (get_builtin_code_for_version): |
| Adjust cl_target_option_save and cl_target_option_restore |
| callers. |
| * config/i386/i386-c.c (ix86_pragma_target_parse): Adjust |
| build_target_option_node and cl_target_option_restore callers. |
| * config/i386/i386-options.c (ix86_function_specific_save, |
| ix86_function_specific_restore): Add opts_set arguments. |
| (ix86_valid_target_attribute_tree): Adjust build_target_option_node |
| caller. |
| (ix86_valid_target_attribute_p): Adjust build_optimization_node, |
| cl_optimization_restore, cl_target_option_restore, |
| ix86_valid_target_attribute_tree and build_optimization_node callers. |
| (ix86_option_override_internal): Adjust build_target_option_node |
| caller. |
| (ix86_reset_previous_fndecl, ix86_set_current_function): Adjust |
| cl_target_option_restore callers. |
| * config/i386/i386-options.h (ix86_function_specific_save, |
| ix86_function_specific_restore): Add opts_set argument. |
| * config/nios2/nios2.c (nios2_option_override): Adjust |
| build_target_option_node caller. |
| (nios2_option_save, nios2_option_restore): Add opts_set argument. |
| (nios2_valid_target_attribute_tree): Adjust build_target_option_node |
| caller. |
| (nios2_valid_target_attribute_p): Adjust build_optimization_node, |
| cl_optimization_restore, cl_target_option_save and |
| cl_target_option_restore callers. |
| (nios2_set_current_function, nios2_pragma_target_parse): Adjust |
| cl_target_option_restore callers. |
| * config/pru/pru.c (pru_option_override): Adjust |
| build_target_option_node caller. |
| (pru_set_current_function): Adjust cl_target_option_restore |
| callers. |
| * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust |
| cl_target_option_save caller. |
| (rs6000_option_override_internal): Adjust build_target_option_node |
| caller. |
| (rs6000_valid_attribute_p): Adjust build_optimization_node, |
| cl_optimization_restore, cl_target_option_save, |
| cl_target_option_restore and build_target_option_node callers. |
| (rs6000_pragma_target_parse): Adjust cl_target_option_restore and |
| build_target_option_node callers. |
| (rs6000_activate_target_options): Adjust cl_target_option_restore |
| callers. |
| (rs6000_function_specific_save, rs6000_function_specific_restore): |
| Add opts_set argument. |
| * config/s390/s390.c (s390_function_specific_restore): Likewise. |
| (s390_option_override_internal): Adjust s390_function_specific_restore |
| caller. |
| (s390_option_override, s390_valid_target_attribute_tree): Adjust |
| build_target_option_node caller. |
| (s390_valid_target_attribute_p): Adjust build_optimization_node, |
| cl_optimization_restore and cl_target_option_restore callers. |
| (s390_activate_target_options): Adjust cl_target_option_restore |
| caller. |
| * config/s390/s390-c.c (s390_cpu_cpp_builtins): Adjust |
| cl_target_option_save caller. |
| (s390_pragma_target_parse): Adjust build_target_option_node and |
| cl_target_option_restore callers. |
| |
| 2020-09-13 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASHIFTRT, LSHIFTRT]: |
| Provide accurate costs for DImode shifts of integer constants. |
| |
| 2020-09-12 Roger Sayle <roger@nextmovesoftware.com> |
| John David Anglin <danglin@gcc.gnu.org> |
| |
| * config/pa/pa.md (shrpsi4_1, shrpsi4_2): New define_insns split |
| out from previous shrpsi4 providing two commutitive variants using |
| plus_xor_ior_operator as a predicate. |
| (shrpdi4_1, shrpdi4_2, shrpdi_3, shrpdi_4): Likewise DImode versions |
| where _1 and _2 take register shifts, and _3 and _4 for integers. |
| (rotlsi3_internal): Name this anonymous instruction. |
| (rotrdi3): New DImode insn copied from rotrsi3. |
| (rotldi3): New DImode expander copied from rotlsi3. |
| (rotldi4_internal): New DImode insn copied from rotsi3_internal. |
| |
| 2020-09-11 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_maybe_emit_maxc_minc): Rename |
| from rs6000_emit_p9_fp_minmax. Change return type to bool. Add |
| comments to document NaN/signed zero behavior. |
| (rs6000_maybe_emit_fp_cmove): Rename from rs6000_emit_p9_fp_cmove. |
| (have_compare_and_set_mask): New helper function. |
| (rs6000_emit_cmove): Update calls to new names and the new helper |
| function. |
| |
| 2020-09-11 Nathan Sidwell <nathan@acm.org> |
| |
| * config/i386/sse.md (mov<mode>): Fix operand indices. |
| |
| 2020-09-11 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/96903 |
| * builtins.c (compute_objsize): Remove incorrect offset adjustment. |
| (compute_objsize): Adjust offset range here instead. |
| |
| 2020-09-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97020 |
| * tree-vect-slp.c (vect_slp_analyze_operations): Apply |
| SLP costs when doing loop vectorization. |
| |
| 2020-09-11 Tom de Vries <tdevries@suse.de> |
| |
| PR target/96964 |
| * config/nvptx/nvptx.md (define_expand "atomic_test_and_set"): New |
| expansion. |
| |
| 2020-09-11 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align TImode registers. |
| * config/gcn/gcn.md: Assert that TImode registers do not early clobber. |
| |
| 2020-09-11 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (_slp_instance::location): New method. |
| (vect_schedule_slp): Adjust prototype. |
| * tree-vectorizer.c (vec_info::remove_stmt): Adjust |
| the BB region begin if we removed the stmt it points to. |
| * tree-vect-loop.c (vect_transform_loop): Adjust. |
| * tree-vect-slp.c (_slp_instance::location): Implement. |
| (vect_analyze_slp_instance): For BB vectorization set |
| vect_location to that of the instance. |
| (vect_slp_analyze_operations): Likewise. |
| (vect_bb_vectorization_profitable_p): Remove wrapper. |
| (vect_slp_analyze_bb_1): Remove cost check here. |
| (vect_slp_region): Cost check and code generate subgraphs separately, |
| report optimized locations and missed optimizations due to |
| profitability for each of them. |
| (vect_schedule_slp): Get the vector of SLP graph entries to |
| vectorize as argument. |
| |
| 2020-09-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/97013 |
| * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove duplicate dumping. |
| |
| 2020-09-11 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_build_slp_tree_1): Check vector |
| types for all lanes are compatible. |
| (vect_analyze_slp_instance): Appropriately check for stores. |
| (vect_schedule_slp): Likewise. |
| |
| 2020-09-11 Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.c (nvptx_assemble_value): Fix undefined |
| behaviour. |
| |
| 2020-09-11 Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.c (nvptx_assemble_value): Handle negative |
| __int128. |
| |
| 2020-09-11 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Change default. |
| |
| 2020-09-10 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000-protos.h (rs6000_emit_cmove): Change return |
| type to bool. |
| (rs6000_emit_int_cmove): Change return type to bool. |
| * config/rs6000/rs6000.c (rs6000_emit_cmove): Change return type |
| to bool. |
| (rs6000_emit_int_cmove): Change return type to bool. |
| |
| 2020-09-10 Tom de Vries <tdevries@suse.de> |
| |
| PR target/97004 |
| * config/nvptx/nvptx.c (nvptx_assemble_value): Handle shift by |
| number of bits in shift operand. |
| |
| 2020-09-10 Jakub Jelinek <jakub@redhat.com> |
| |
| * lto-streamer-out.c (collect_block_tree_leafs): Recurse on |
| root rather than BLOCK_SUBBLOCKS (root). |
| |
| 2020-09-10 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/aarch64/aarch64-cores.def: Add Cortex-R82. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * doc/invoke.texi: Add entry for Cortex-R82. |
| |
| 2020-09-10 Alex Coplan <alex.coplan@arm.com> |
| |
| * common/config/aarch64/aarch64-common.c |
| (aarch64_get_extension_string_for_isa_flags): Don't force +crc for |
| Armv8-R. |
| * config/aarch64/aarch64-arches.def: Add entry for Armv8-R. |
| * config/aarch64/aarch64-c.c (aarch64_define_unconditional_macros): Set |
| __ARM_ARCH_PROFILE correctly for Armv8-R. |
| * config/aarch64/aarch64.h (AARCH64_FL_V8_R): New. |
| (AARCH64_FL_FOR_ARCH8_R): New. |
| (AARCH64_ISA_V8_R): New. |
| * doc/invoke.texi: Add Armv8-R to architecture table. |
| |
| 2020-09-10 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/arm/arm.c (arm_override_options_after_change_1): Add opts_set |
| argument, test opts_set->x_str_align_functions rather than |
| opts->x_str_align_functions. |
| (arm_override_options_after_change, arm_option_override_internal, |
| arm_set_current_function): Adjust callers. |
| |
| 2020-09-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/96939 |
| * config/arm/arm.c (arm_override_options_after_change): Don't call |
| arm_configure_build_target here. |
| (arm_set_current_function): Call arm_override_options_after_change_1 |
| at the end. |
| |
| 2020-09-10 Pat Haugen <pthaugen@linux.ibm.com> |
| |
| * config/rs6000/rs6000.md |
| (lfiwzx, floatunssi<mode>2_lfiwzx, p8_mtvsrwz, p8_mtvsrd_sf): Fix insn |
| type. |
| * config/rs6000/vsx.md |
| (vsx_concat_<mode>, vsx_splat_<mode>_reg, vsx_splat_v4sf): Likewise. |
| |
| 2020-09-10 Jonathan Yong <10walls@gmail.com> |
| |
| * config.host: Adjust plugin name for Windows. |
| |
| 2020-09-10 Tom de Vries <tdevries@suse.de> |
| |
| PR tree-optimization/97000 |
| * tree-cfgcleanup.c (cleanup_call_ctrl_altering_flag): Don't clear |
| flag for IFN_UNIQUE. |
| |
| 2020-09-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/93865 |
| * lto-streamer.h (struct output_block): Add emit_pwd member. |
| * lto-streamer-out.c: Include toplev.h. |
| (clear_line_info): Set emit_pwd. |
| (lto_output_location_1): Encode the ob->current_file != xloc.file |
| bit directly into the location number. If changing file, emit |
| additionally a bit whether pwd is emitted and emit it before the |
| first relative pathname since clear_line_info. |
| (output_function, output_constructor): Don't call clear_line_info |
| here. |
| * lto-streamer-in.c (struct string_pair_map): New type. |
| (struct string_pair_map_hasher): New type. |
| (string_pair_map_hasher::hash): New method. |
| (string_pair_map_hasher::equal): New method. |
| (path_name_pair_hash_table, string_pair_map_allocator): New variables. |
| (relative_path_prefix, canon_relative_path_prefix, |
| canon_relative_file_name): New functions. |
| (canon_file_name): Add relative_prefix argument, if non-NULL |
| and string is a relative path, return canon_relative_file_name. |
| (lto_location_cache::input_location_and_block): Decode file change |
| bit from the location number. If changing file, unpack bit whether |
| pwd is streamed and stream in pwd. Adjust canon_file_name caller. |
| (lto_free_file_name_hash): Delete path_name_pair_hash_table |
| and string_pair_map_allocator. |
| |
| 2020-09-10 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96043 |
| * tree-vectorizer.h (_slp_instance::cost_vec): New. |
| (_slp_instance::subgraph_entries): Likewise. |
| (BB_VINFO_TARGET_COST_DATA): Remove. |
| * tree-vect-slp.c (vect_free_slp_instance): Free |
| cost_vec and subgraph_entries. |
| (vect_analyze_slp_instance): Initialize them. |
| (vect_slp_analyze_operations): Defer passing costs to |
| the target, instead record them in the SLP graph entry. |
| (get_ultimate_leader): New helper for graph partitioning. |
| (vect_bb_partition_graph_r): Likewise. |
| (vect_bb_partition_graph): New function to partition the |
| SLP graph into independently costable parts. |
| (vect_bb_vectorization_profitable_p): Adjust to work on |
| a subgraph. |
| (vect_bb_vectorization_profitable_p): New wrapper, |
| discarding non-profitable vectorization of subgraphs. |
| (vect_slp_analyze_bb_1): Call vect_bb_partition_graph before |
| costing. |
| |
| 2020-09-09 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/94355 |
| * doc/invoke.texi: Document -Wanalyzer-mismatching-deallocation. |
| |
| 2020-09-09 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| PR rtl-optimization/96475 |
| * bb-reorder.c (maybe_duplicate_computed_goto): Remove single_pred_p |
| micro-optimization. |
| |
| 2020-09-09 Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Fix Wformat |
| warning. |
| |
| 2020-09-09 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do |
| nothing when the permutation doesn't permute. |
| |
| 2020-09-09 Tom de Vries <tdevries@suse.de> |
| |
| PR target/96991 |
| * config/nvptx/nvptx.c (write_fn_proto): Fix boolean type check. |
| |
| 2020-09-09 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-stmts.c (vectorizable_comparison): Allow |
| STMT_VINFO_LIVE_P stmts. |
| |
| 2020-09-09 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-stmts.c (vectorizable_condition): Allow |
| STMT_VINFO_LIVE_P stmts. |
| |
| 2020-09-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96978 |
| * tree-vect-stmts.c (vectorizable_condition): Do not |
| look at STMT_VINFO_LIVE_P for BB vectorization. |
| (vectorizable_comparison): Likewise. |
| |
| 2020-09-09 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/96955 |
| * config/i386/i386.md (get_thread_pointer<mode>): New |
| expander. |
| |
| 2020-09-08 Julian Brown <julian@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (scatter<mode>_insn_1offset_ds<exec_scatter>): |
| Add waitcnt. |
| * config/gcn/gcn.md (*mov<mode>_insn, *movti_insn): Add waitcnt to |
| ds_write alternatives. |
| |
| 2020-09-08 Julian Brown <julian@codesourcery.com> |
| |
| * config/gcn/mkoffload.c (process_asm): Initialise regcount. Update |
| scanning for SGPR/VGPR usage for HSACO v3. |
| |
| 2020-09-08 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/96967 |
| * tree-vrp.c (find_case_label_range): Cast label range to |
| type of switch operand. |
| |
| 2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (msp430_file_end): Fix jumbled |
| HAVE_AS_MSPABI_ATTRIBUTE and HAVE_AS_GNU_ATTRIBUTE checks. |
| * configure: Regenerate. |
| * configure.ac: Use ".mspabi_attribute 4,2" to check for assembler |
| support for this object attribute directive. |
| |
| 2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * common/config/msp430/msp430-common.c (msp430_handle_option): Remove |
| OPT_mcpu_ handling. |
| Set target_cpu value to new enum values when parsing certain -mmcu= |
| values. |
| * config/msp430/msp430-opts.h (enum msp430_cpu_types): New. |
| * config/msp430/msp430.c (msp430_option_override): Handle new |
| target_cpu enum values. |
| Set target_cpu using extracted value for given MCU when -mcpu= |
| option is not passed by the user. |
| * config/msp430/msp430.opt: Handle -mcpu= values using enums. |
| |
| 2020-09-07 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/96796 |
| * lra-constraints.c (in_class_p): Add a default-false |
| allow_all_reload_class_changes_p parameter. Do not treat |
| reload moves specially when the parameter is true. |
| (get_reload_reg): Try to narrow the class of an existing OP_OUT |
| reload if we're reloading a reload pseudo in a reload instruction. |
| |
| 2020-09-07 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * tree-vect-loop.c (vect_estimate_min_profitable_iters): Revert |
| dead-code removal introduced by 09fa6acd8d9 + add a comment to |
| clarify. |
| |
| 2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * doc/rtl.texi (subreg): Fix documentation to state there is a known |
| number of undefined bits in regs and subregs of MODE_PARTIAL_INT modes. |
| |
| 2020-09-07 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (msp430_option_override): Don't set the |
| ISA to 430 when the MCU is unrecognized. |
| |
| 2020-09-07 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.c (darwin_libc_has_function): Report sincos |
| available from 10.9. |
| |
| 2020-09-07 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/aarch64/aarch64.md (*adds_mul_imm_<mode>): Delete. |
| (*subs_mul_imm_<mode>): Delete. |
| (*adds_<optab><mode>_multp2): Delete. |
| (*subs_<optab><mode>_multp2): Delete. |
| (*add_mul_imm_<mode>): Delete. |
| (*add_<optab><ALLX:mode>_mult_<GPI:mode>): Delete. |
| (*add_<optab><SHORT:mode>_mult_si_uxtw): Delete. |
| (*add_<optab><mode>_multp2): Delete. |
| (*add_<optab>si_multp2_uxtw): Delete. |
| (*add_uxt<mode>_multp2): Delete. |
| (*add_uxtsi_multp2_uxtw): Delete. |
| (*sub_mul_imm_<mode>): Delete. |
| (*sub_mul_imm_si_uxtw): Delete. |
| (*sub_<optab><mode>_multp2): Delete. |
| (*sub_<optab>si_multp2_uxtw): Delete. |
| (*sub_uxt<mode>_multp2): Delete. |
| (*sub_uxtsi_multp2_uxtw): Delete. |
| (*neg_mul_imm_<mode>2): Delete. |
| (*neg_mul_imm_si2_uxtw): Delete. |
| * config/aarch64/predicates.md (aarch64_pwr_imm3): Delete. |
| (aarch64_pwr_2_si): Delete. |
| (aarch64_pwr_2_di): Delete. |
| |
| 2020-09-07 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/aarch64/aarch64.md |
| (*adds_<optab><ALLX:mode>_<GPI:mode>): Ensure extended operand |
| agrees with width of extension specifier. |
| (*subs_<optab><ALLX:mode>_<GPI:mode>): Likewise. |
| (*adds_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise. |
| (*subs_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise. |
| (*add_<optab><ALLX:mode>_<GPI:mode>): Likewise. |
| (*add_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise. |
| (*add_uxt<mode>_shift2): Likewise. |
| (*sub_<optab><ALLX:mode>_<GPI:mode>): Likewise. |
| (*sub_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise. |
| (*sub_uxt<mode>_shift2): Likewise. |
| (*cmp_swp_<optab><ALLX:mode>_reg<GPI:mode>): Likewise. |
| (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise. |
| |
| 2020-09-07 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_analyze_slp_instance): Dump |
| stmts we start SLP analysis from, failure and splitting. |
| (vect_schedule_slp): Dump SLP graph entry and root stmt |
| we are about to emit code for. |
| |
| 2020-09-07 Martin Storsjö <martin@martin.st> |
| |
| * dwarf2out.c (file_name_acquire): Make a strchr return value |
| pointer to const. |
| |
| 2020-09-07 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/94235 |
| * lto-streamer-out.c (output_cfg): Also stream goto_locus for edges. |
| Use bp_pack_var_len_unsigned instead of streamer_write_uhwi to stream |
| e->dest->index and e->flags. |
| (output_function): Call output_cfg before output_ssa_name, rather than |
| after streaming all bbs. |
| * lto-streamer-in.c (input_cfg): Stream in goto_locus for edges. |
| Use bp_unpack_var_len_unsigned instead of streamer_read_uhwi to stream |
| in dest_index and edge_flags. |
| |
| 2020-09-07 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vectorizable_live_operation): Adjust. |
| * tree-vect-loop.c (vectorizable_live_operation): Vectorize |
| live lanes out of basic-block vectorization nodes. |
| * tree-vect-slp.c (vect_bb_slp_mark_live_stmts): New function. |
| (vect_slp_analyze_operations): Analyze live lanes and their |
| vectorization possibility after the whole SLP graph is final. |
| (vect_bb_slp_scalar_cost): Adjust for vectorized live lanes. |
| * tree-vect-stmts.c (can_vectorize_live_stmts): Adjust. |
| (vect_transform_stmt): Call can_vectorize_live_stmts also for |
| basic-block vectorization. |
| |
| 2020-09-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96698 |
| PR tree-optimization/96920 |
| * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): Remove. |
| (loop_vec_info::reduc_latch_slp_defs): Likewise. |
| * tree-vect-stmts.c (vect_transform_stmt): Remove vectorized |
| cycle PHI latch code. |
| * tree-vect-loop.c (maybe_set_vectorized_backedge_value): New |
| helper to set vectorized cycle PHI latch values. |
| (vect_transform_loop): Walk over all PHIs again after |
| vectorizing them, calling maybe_set_vectorized_backedge_value. |
| Call maybe_set_vectorized_backedge_value for each vectorized |
| stmt. Remove delayed update code. |
| * tree-vect-slp.c (vect_analyze_slp_instance): Initialize |
| SLP instance reduc_phis member. |
| (vect_schedule_slp): Set vectorized cycle PHI latch values. |
| |
| 2020-09-04 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * tree-vect-loop.c (vect_estimate_min_profitable_iters): Remove |
| dead code as LOOP_VINFO_USING_PARTIAL_VECTORS_P (loop_vinfo) is |
| always verified. |
| |
| 2020-09-04 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| PR target/96769 |
| * config/arm/thumb1.md: Move movsi splitter for |
| arm_disable_literal_pool after the other movsi splitters. |
| |
| 2020-09-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * range-op.cc (range_operator::fold_range): Rename widest_irange |
| to int_range_max. |
| (operator_div::wi_fold): Same. |
| (operator_lshift::op1_range): Same. |
| (operator_rshift::op1_range): Same. |
| (operator_cast::fold_range): Same. |
| (operator_cast::op1_range): Same. |
| (operator_bitwise_and::remove_impossible_ranges): Same. |
| (operator_bitwise_and::op1_range): Same. |
| (operator_abs::op1_range): Same. |
| (range_cast): Same. |
| (widest_irange_tests): Same. |
| (range3_tests): Rename irange3 to int_range3. |
| (int_range_max_tests): Rename from widest_irange_tests. |
| Rename widest_irange to int_range_max. |
| (operator_tests): Rename widest_irange to int_range_max. |
| (range_tests): Same. |
| * tree-vrp.c (find_case_label_range): Same. |
| * value-range.cc (irange::irange_intersect): Same. |
| (irange::invert): Same. |
| * value-range.h: Same. |
| |
| 2020-09-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96931 |
| * tree-cfgcleanup.c (cleanup_call_ctrl_altering_flag): If |
| there's a fallthru edge and no abnormal edge the call is |
| no longer control-altering. |
| (cleanup_control_flow_bb): Pass down the BB to |
| cleanup_call_ctrl_altering_flag. |
| |
| 2020-09-04 Jakub Jelinek <jakub@redhat.com> |
| |
| * lto-streamer.h (stream_input_location_now): Remove declaration. |
| * lto-streamer-in.c (stream_input_location_now): Remove. |
| (input_eh_region, input_struct_function_base): Use |
| stream_input_location instead of stream_input_location_now. |
| |
| 2020-09-04 Jakub Jelinek <jakub@redhat.com> |
| |
| * lto-streamer.h (struct output_block): Add reset_locus member. |
| * lto-streamer-out.c (clear_line_info): Set reset_locus to true. |
| (lto_output_location_1): If reset_locus, clear it and ensure |
| current_{file,line,col} is different from xloc members. |
| |
| 2020-09-04 David Faust <david.faust@oracle.com> |
| |
| * config/bpf/bpf.h (ASM_SPEC): Pass -mxbpf to gas, if specified. |
| * config/bpf/bpf.c (bpf_output_call): Support indirect calls in xBPF. |
| |
| 2020-09-03 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/96820 |
| * tree-sra.c (create_access): Disqualify candidates with accesses |
| beyond the end of the original aggregate. |
| (maybe_add_sra_candidate): Check that candidate type size fits |
| signed uhwi for the sake of consistency. |
| |
| 2020-09-03 Will Schmidt <will_schmidt@vnet.ibm.com> |
| |
| * config/rs6000/rs6000-call.c (rs6000_init_builtin): Update V2DI_type_node |
| and unsigned_V2DI_type_node definitions. |
| |
| 2020-09-03 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/96901 |
| * tree.h (struct decl_tree_traits): New type. |
| (decl_tree_map): New typedef. |
| |
| 2020-09-03 Jakub Jelinek <jakub@redhat.com> |
| |
| PR lto/94311 |
| * gimple.h (gimple_location_ptr, gimple_phi_arg_location_ptr): New |
| functions. |
| * streamer-hooks.h (struct streamer_hooks): Add |
| output_location_and_block callback. Fix up formatting for |
| output_location. |
| (stream_output_location_and_block): Define. |
| * lto-streamer.h (class lto_location_cache): Fix comment typo. Add |
| current_block member. |
| (lto_location_cache::input_location_and_block): New method. |
| (lto_location_cache::lto_location_cache): Initialize current_block. |
| (lto_location_cache::cached_location): Add block member. |
| (struct output_block): Add current_block member. |
| (lto_output_location): Formatting fix. |
| (lto_output_location_and_block): Declare. |
| * lto-streamer.c (lto_streamer_hooks_init): Initialize |
| streamer_hooks.output_location_and_block. |
| * lto-streamer-in.c (lto_location_cache::cmp_loc): Also compare |
| block members. |
| (lto_location_cache::apply_location_cache): Handle blocks. |
| (lto_location_cache::accept_location_cache, |
| lto_location_cache::revert_location_cache): Fix up function comments. |
| (lto_location_cache::input_location_and_block): New method. |
| (lto_location_cache::input_location): Implement using |
| input_location_and_block. |
| (input_function): Invoke apply_location_cache after streaming in all |
| bbs. |
| * lto-streamer-out.c (clear_line_info): Set current_block. |
| (lto_output_location_1): New function, moved from lto_output_location, |
| added block handling. |
| (lto_output_location): Implement using lto_output_location_1. |
| (lto_output_location_and_block): New function. |
| * gimple-streamer-in.c (input_phi): Use input_location_and_block |
| to input and cache both location and block. |
| (input_gimple_stmt): Likewise. |
| * gimple-streamer-out.c (output_phi): Use |
| stream_output_location_and_block. |
| (output_gimple_stmt): Likewise. |
| |
| 2020-09-03 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-generic.c (tree_vec_extract): Remove odd |
| special-casing of boolean vectors. |
| * fold-const.c (fold_ternary_loc): Handle boolean vector |
| type BIT_FIELD_REFs. |
| |
| 2020-09-03 Hongtao Liu <hongtao.liu@intel.com> |
| |
| PR target/87767 |
| * config/i386/i386-features.c |
| (replace_constant_pool_with_broadcast): New function. |
| (constant_pool_broadcast): Ditto. |
| (class pass_constant_pool_broadcast): New pass. |
| (make_pass_constant_pool_broadcast): Ditto. |
| (remove_partial_avx_dependency): Call |
| replace_constant_pool_with_broadcast under TARGET_AVX512F, it |
| would save compile time when both pass rpad and cpb are |
| available. |
| (remove_partial_avx_dependency_gate): New function. |
| (class pass_remove_partial_avx_dependency::gate): Call |
| remove_partial_avx_dependency_gate. |
| * config/i386/i386-passes.def: Insert new pass after combine. |
| * config/i386/i386-protos.h |
| (make_pass_constant_pool_broadcast): Declare. |
| * config/i386/sse.md (*avx512dq_mul<mode>3<mask_name>_bcst): |
| New define_insn. |
| (*avx512f_mul<mode>3<mask_name>_bcst): Ditto. |
| * config/i386/avx512fintrin.h (_mm512_set1_ps, |
| _mm512_set1_pd,_mm512_set1_epi32, _mm512_set1_epi64): Adjusted. |
| |
| 2020-09-02 Jonathan Wakely <jwakely@redhat.com> |
| |
| PR c++/60304 |
| * ginclude/stdbool.h (bool, false, true): Never define for C++. |
| |
| 2020-09-02 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * doc/invoke.texi (MSP430 options): Fix -mlarge description to |
| indicate size_t is a 20-bit type. |
| |
| 2020-09-02 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * config/pa/pa.c (hppa_rtx_costs) [ASHIFT, ASHIFTRT, LSHIFTRT]: |
| Provide accurate costs for shifts of integer constants. |
| |
| 2020-09-02 Jose E. Marchesi <jose.marchesi@oracle.com> |
| |
| * config/bpf/bpf.c (bpf_asm_named_section): Delete. |
| (TARGET_ASM_NAMED_SECTION): Likewise. |
| |
| 2020-09-02 Jose E. Marchesi <jemarch@gnu.org> |
| |
| * config.gcc: Use elfos.h in bpf-*-* targets. |
| * config/bpf/bpf.h (MAX_OFILE_ALIGNMENT): Remove definition. |
| (COMMON_ASM_OP): Likewise. |
| (INIT_SECTION_ASM_OP): Likewise. |
| (FINI_SECTION_ASM_OP): Likewise. |
| (ASM_OUTPUT_SKIP): Likewise. |
| (ASM_OUTPUT_ALIGNED_COMMON): Likewise. |
| (ASM_OUTPUT_ALIGNED_LOCAL): Likewise. |
| |
| 2020-09-01 Martin Sebor <msebor@redhat.com> |
| |
| * builtins.c (compute_objsize): Only replace the upper bound |
| of a POINTER_PLUS offset when it's less than the lower bound. |
| |
| 2020-09-01 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR target/96808 |
| * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Do not |
| reuse accumulator memory reference for source and destination accesses. |
| |
| 2020-09-01 Martin Liska <mliska@suse.cz> |
| |
| * cfgrtl.c (rtl_create_basic_block): Use default value for |
| growth vector function. |
| * gimple.c (gimple_set_bb): Likewise. |
| * symbol-summary.h: Likewise. |
| * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise. |
| (build_gimple_cfg): Likewise. |
| (create_bb): Likewise. |
| (move_block_to_fn): Likewise. |
| |
| 2020-09-01 Martin Liska <mliska@suse.cz> |
| |
| * vec.h (vec_safe_grow): Change default of exact to false. |
| (vec_safe_grow_cleared): Likewise. |
| |
| 2020-09-01 Roger Sayle <roger@nextmovesoftware.com> |
| |
| PR middle-end/90597 |
| * targhooks.c (default_vector_alignment): Return at least the |
| GET_MODE_ALIGNMENT for the type's mode. |
| |
| 2020-09-01 Richard Biener <rguenther@suse.de> |
| |
| PR rtl-optimization/96812 |
| * tree-ssa-address.c (copy_ref_info): Also copy dependence info. |
| * cfgrtl.h (duplicate_insn_chain): Adjust prototype. |
| * cfgrtl.c (duplicate_insn_chain): Remap dependence info |
| if requested. |
| (cfg_layout_duplicate_bb): Make sure we remap dependence info. |
| * modulo-sched.c (duplicate_insns_of_cycles): Remap dependence |
| info. |
| (generate_prolog_epilog): Adjust. |
| * config/c6x/c6x.c (hwloop_optimize): Remap dependence info. |
| |
| 2020-09-01 Kewen Lin <linkw@gcc.gnu.org> |
| |
| * doc/sourcebuild.texi (has_arch_pwr5, has_arch_pwr6, has_arch_pwr7, |
| has_arch_pwr8, has_arch_pwr9): Document. |
| |
| 2020-08-31 Carl Love <cel@us.ibm.com> |
| |
| PR target/85830 |
| * config/rs6000/altivec.h (vec_popcntb, vec_popcnth, vec_popcntw, |
| vec_popcntd): Remove defines. |
| |
| 2020-08-31 Marek Polacek <polacek@redhat.com> |
| Jason Merrill <jason@redhat.com> |
| |
| PR c++/93529 |
| * tree.c (build_constructor_from_vec): New. |
| * tree.h (build_constructor_from_vec): Declare. |
| |
| 2020-08-31 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/96818 |
| * tree-vrp.c (find_case_label_range): Cast label range to |
| type of switch operand. |
| |
| 2020-08-31 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/96551 |
| * config/i386/sse.md (vec_unpacku_float_hi_v16si): For vector |
| compare to integer mask, don't use gen_rtx_LT, use |
| ix86_expand_mask_vec_cmp instead. |
| (vec_unpacku_float_hi_v16si): Ditto. |
| |
| 2020-08-31 Jakub Jelinek <jakub@redhat.com> |
| |
| * tree-cfg.c (verify_gimple_switch): If the first non-default case |
| label has CASE_HIGH, verify it has the same type as CASE_LOW. |
| |
| 2020-08-31 Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR ipa/96806 |
| * ipa-cp.c (decide_about_value): Use safe_add to avoid cost addition |
| overflow. |
| |
| 2020-08-31 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/54201 |
| * varasm.c: Include alloc-pool.h. |
| (output_constant_pool_contents): Emit desc->mark < 0 entries as |
| aliases. |
| (struct constant_descriptor_rtx_data): New type. |
| (constant_descriptor_rtx_data_cmp): New function. |
| (struct const_rtx_data_hasher): New type. |
| (const_rtx_data_hasher::hash, const_rtx_data_hasher::equal): New |
| methods. |
| (optimize_constant_pool): New function. |
| (output_shared_constant_pool): Call it if TARGET_SUPPORTS_ALIASES. |
| |
| 2020-08-31 Kewen Lin <linkw@gcc.gnu.org> |
| |
| * doc/sourcebuild.texi (vect_len_load_store, |
| vect_partial_vectors_usage_1, vect_partial_vectors_usage_2, |
| vect_partial_vectors): Document. |
| |
| 2020-08-30 Martin Sebor <msebor@redhat.com> |
| |
| * builtins.c (access_ref::access_ref): Call get_size_range instead |
| of get_range. |
| |
| 2020-08-30 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/i386/sse.md (ssse3_pshufbv8qi): Use gen_int_mode instead of |
| GEN_INT, and ix86_build_const_vector instead of gen_rtvec and |
| gen_rtx_CONT_VECTOR. |
| |
| 2020-08-29 Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| * config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove. |
| * config/rs6000/rs6000-call.c (rs6000_expand_builtin): Remove |
| all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE. |
| |
| 2020-08-28 Martin Sebor <msebor@redhat.com> |
| |
| * attribs.c (init_attr_rdwr_indices): Use global access_mode. |
| * attribs.h (struct attr_access): Same. |
| * builtins.c (fold_builtin_strlen): Add argument. |
| (compute_objsize): Declare. |
| (get_range): Declare. |
| (check_read_access): New function. |
| (access_ref::access_ref): Define ctor. |
| (warn_string_no_nul): Add arguments. Handle -Wstrintop-overread. |
| (check_nul_terminated_array): Handle source strings of different |
| ranges of sizes. |
| (expand_builtin_strlen): Remove warning code, call check_read_access |
| instead. Declare locals closer to their initialization. |
| (expand_builtin_strnlen): Same. |
| (maybe_warn_for_bound): New function. |
| (warn_for_access): Remove argument. Handle -Wstrintop-overread. |
| (inform_access): Change argument type. |
| (get_size_range): New function. |
| (check_access): Remove unused arguments. Add new arguments. Handle |
| -Wstrintop-overread. Move warning code to helpers and call them. |
| Call check_nul_terminated_array. |
| (check_memop_access): Remove unnecessary and provide additional |
| arguments in calls. |
| (expand_builtin_memchr): Call check_read_access. |
| (expand_builtin_strcat): Remove unnecessary and provide additional |
| arguments in calls. |
| (expand_builtin_strcpy): Same. |
| (expand_builtin_strcpy_args): Same. Avoid testing no-warning bit. |
| (expand_builtin_stpcpy_1): Remove unnecessary and provide additional |
| arguments in calls. |
| (expand_builtin_stpncpy): Same. |
| (check_strncat_sizes): Same. |
| (expand_builtin_strncat): Remove unnecessary and provide additional |
| arguments in calls. Adjust comments. |
| (expand_builtin_strncpy): Remove unnecessary and provide additional |
| arguments in calls. |
| (expand_builtin_memcmp): Remove warning code. Call check_access. |
| (expand_builtin_strcmp): Call check_access instead of |
| check_nul_terminated_array. |
| (expand_builtin_strncmp): Handle -Wstrintop-overread. |
| (expand_builtin_fork_or_exec): Call check_access instead of |
| check_nul_terminated_array. |
| (expand_builtin): Same. |
| (fold_builtin_1): Pass additional argument. |
| (fold_builtin_n): Same. |
| (fold_builtin_strpbrk): Remove calls to check_nul_terminated_array. |
| (expand_builtin_memory_chk): Add comments. |
| (maybe_emit_chk_warning): Remove unnecessary and provide additional |
| arguments in calls. |
| (maybe_emit_sprintf_chk_warning): Same. Adjust comments. |
| * builtins.h (warn_string_no_nul): Add arguments. |
| (struct access_ref): Add member and ctor argument. |
| (struct access_data): Add members and ctor. |
| (check_access): Adjust signature. |
| * calls.c (maybe_warn_nonstring_arg): Return an indication of |
| whether a warning was issued. Issue -Wstrintop-overread instead |
| of -Wstringop-overflow. |
| (append_attrname): Adjust to naming changes. |
| (maybe_warn_rdwr_sizes): Same. Remove unnecessary and provide |
| additional arguments in calls. |
| * calls.h (maybe_warn_nonstring_arg): Return bool. |
| * doc/invoke.texi (-Wstringop-overread): Document new option. |
| * gimple-fold.c (gimple_fold_builtin_strcpy): Provide an additional |
| argument in call. |
| (gimple_fold_builtin_stpcpy): Same. |
| * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Adjust to naming |
| changes. |
| * tree.h (enum access_mode): New type. |
| |
| 2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_call_aix): Remove test for r12. |
| (rs6000_sibcall_aix): Likewise. |
| |
| 2020-08-28 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-tree.c (gcn_goacc_get_worker_red_decl): Add "true" |
| parameter to vec_safe_grow_cleared. |
| |
| 2020-08-28 Martin Sebor <msebor@redhat.com> |
| |
| * ggc-common.c (gt_pch_save): Add argument to a call. |
| |
| 2020-08-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| PR target/96357 |
| * config/aarch64/aarch64-sve.md |
| (cond_sub<mode>_relaxed_const): Updated and renamed from |
| cond_sub<mode>_any_const pattern. |
| (cond_sub<mode>_strict_const): New pattern. |
| |
| 2020-08-28 Wei Wentao <weiwt.fnst@cn.fujitsu.com> |
| |
| * doc/rtl.texi: Fix typo. |
| |
| 2020-08-28 Uros Bizjak <ubizjak@gmail.com> |
| |
| PR target/96744 |
| * config/i386/i386-expand.c (split_double_mode): Also handle |
| E_P2HImode and E_P2QImode. |
| * config/i386/sse.md (MASK_DWI): New define_mode_iterator. |
| (mov<mode>): New expander for P2HI,P2QI. |
| (*mov<mode>_internal): New define_insn_and_split to split |
| movement of P2QI/P2HI to 2 movqi/movhi patterns after reload. |
| |
| 2020-08-28 liuhongt <hongtao.liu@intel.com> |
| |
| * common/config/i386/i386-common.c (ix86_handle_option): Set |
| AVX512DQ when AVX512VP2INTERSECT exists. |
| |
| 2020-08-27 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/65146 |
| * config/i386/i386.c (iamcu_alignment): Don't decrease alignment |
| for TYPE_ATOMIC types. |
| (ix86_local_alignment): Likewise. |
| (ix86_minimum_alignment): Likewise. |
| (x86_field_alignment): Likewise, and emit a -Wpsabi diagnostic |
| for it. |
| |
| 2020-08-27 Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| PR target/96787 |
| * config/rs6000/rs6000.c (rs6000_sibcall_aix): Support |
| indirect call for ELFv2. |
| |
| 2020-08-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96522 |
| * tree-ssa-address.c (copy_ref_info): Reset flow-sensitive |
| info of the copied points-to. Transfer bigger alignment |
| via the access type. |
| * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt): |
| Reset all flow-sensitive info. |
| |
| 2020-08-27 Martin Liska <mliska@suse.cz> |
| |
| * alias.c (init_alias_analysis): Set exact argument of a vector |
| growth function to true. |
| * calls.c (internal_arg_pointer_based_exp_scan): Likewise. |
| * cfgbuild.c (find_many_sub_basic_blocks): Likewise. |
| * cfgexpand.c (expand_asm_stmt): Likewise. |
| * cfgrtl.c (rtl_create_basic_block): Likewise. |
| * combine.c (combine_split_insns): Likewise. |
| (combine_instructions): Likewise. |
| * config/aarch64/aarch64-sve-builtins.cc (function_expander::add_output_operand): Likewise. |
| (function_expander::add_input_operand): Likewise. |
| (function_expander::add_integer_operand): Likewise. |
| (function_expander::add_address_operand): Likewise. |
| (function_expander::add_fixed_operand): Likewise. |
| * df-core.c (df_worklist_dataflow_doublequeue): Likewise. |
| * dwarf2cfi.c (update_row_reg_save): Likewise. |
| * early-remat.c (early_remat::init_block_info): Likewise. |
| (early_remat::finalize_candidate_indices): Likewise. |
| * except.c (sjlj_build_landing_pads): Likewise. |
| * final.c (compute_alignments): Likewise. |
| (grow_label_align): Likewise. |
| * function.c (temp_slots_at_level): Likewise. |
| * fwprop.c (build_single_def_use_links): Likewise. |
| (update_uses): Likewise. |
| * gcc.c (insert_wrapper): Likewise. |
| * genautomata.c (create_state_ainsn_table): Likewise. |
| (add_vect): Likewise. |
| (output_dead_lock_vect): Likewise. |
| * genmatch.c (capture_info::capture_info): Likewise. |
| (parser::finish_match_operand): Likewise. |
| * genrecog.c (optimize_subroutine_group): Likewise. |
| (merge_pattern_info::merge_pattern_info): Likewise. |
| (merge_into_decision): Likewise. |
| (print_subroutine_start): Likewise. |
| (main): Likewise. |
| * gimple-loop-versioning.cc (loop_versioning::loop_versioning): Likewise. |
| * gimple.c (gimple_set_bb): Likewise. |
| * graphite-isl-ast-to-gimple.c (translate_isl_ast_node_user): Likewise. |
| * haifa-sched.c (sched_extend_luids): Likewise. |
| (extend_h_i_d): Likewise. |
| * insn-addr.h (insn_addresses_new): Likewise. |
| * ipa-cp.c (gather_context_independent_values): Likewise. |
| (find_more_contexts_for_caller_subset): Likewise. |
| * ipa-devirt.c (final_warning_record::grow_type_warnings): Likewise. |
| (ipa_odr_read_section): Likewise. |
| * ipa-fnsummary.c (evaluate_properties_for_edge): Likewise. |
| (ipa_fn_summary_t::duplicate): Likewise. |
| (analyze_function_body): Likewise. |
| (ipa_merge_fn_summary_after_inlining): Likewise. |
| (read_ipa_call_summary): Likewise. |
| * ipa-icf.c (sem_function::bb_dict_test): Likewise. |
| * ipa-prop.c (ipa_alloc_node_params): Likewise. |
| (parm_bb_aa_status_for_bb): Likewise. |
| (ipa_compute_jump_functions_for_edge): Likewise. |
| (ipa_analyze_node): Likewise. |
| (update_jump_functions_after_inlining): Likewise. |
| (ipa_read_edge_info): Likewise. |
| (read_ipcp_transformation_info): Likewise. |
| (ipcp_transform_function): Likewise. |
| * ipa-reference.c (ipa_reference_write_optimization_summary): Likewise. |
| * ipa-split.c (execute_split_functions): Likewise. |
| * ira.c (find_moveable_pseudos): Likewise. |
| * lower-subreg.c (decompose_multiword_subregs): Likewise. |
| * lto-streamer-in.c (input_eh_regions): Likewise. |
| (input_cfg): Likewise. |
| (input_struct_function_base): Likewise. |
| (input_function): Likewise. |
| * modulo-sched.c (set_node_sched_params): Likewise. |
| (extend_node_sched_params): Likewise. |
| (schedule_reg_moves): Likewise. |
| * omp-general.c (omp_construct_simd_compare): Likewise. |
| * passes.c (pass_manager::create_pass_tab): Likewise. |
| (enable_disable_pass): Likewise. |
| * predict.c (determine_unlikely_bbs): Likewise. |
| * profile.c (compute_branch_probabilities): Likewise. |
| * read-rtl-function.c (function_reader::parse_block): Likewise. |
| * read-rtl.c (rtx_reader::read_rtx_code): Likewise. |
| * reg-stack.c (stack_regs_mentioned): Likewise. |
| * regrename.c (regrename_init): Likewise. |
| * rtlanal.c (T>::add_single_to_queue): Likewise. |
| * sched-deps.c (init_deps_data_vector): Likewise. |
| * sel-sched-ir.c (sel_extend_global_bb_info): Likewise. |
| (extend_region_bb_info): Likewise. |
| (extend_insn_data): Likewise. |
| * symtab.c (symtab_node::create_reference): Likewise. |
| * tracer.c (tail_duplicate): Likewise. |
| * trans-mem.c (tm_region_init): Likewise. |
| (get_bb_regions_instrumented): Likewise. |
| * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise. |
| (build_gimple_cfg): Likewise. |
| (create_bb): Likewise. |
| (move_block_to_fn): Likewise. |
| * tree-complex.c (tree_lower_complex): Likewise. |
| * tree-if-conv.c (predicate_rhs_code): Likewise. |
| * tree-inline.c (copy_bb): Likewise. |
| * tree-into-ssa.c (get_ssa_name_ann): Likewise. |
| (mark_phi_for_rewrite): Likewise. |
| * tree-object-size.c (compute_builtin_object_size): Likewise. |
| (init_object_sizes): Likewise. |
| * tree-predcom.c (initialize_root_vars_store_elim_1): Likewise. |
| (initialize_root_vars_store_elim_2): Likewise. |
| (prepare_initializers_chain_store_elim): Likewise. |
| * tree-ssa-address.c (addr_for_mem_ref): Likewise. |
| (multiplier_allowed_in_address_p): Likewise. |
| * tree-ssa-coalesce.c (ssa_conflicts_new): Likewise. |
| * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise. |
| * tree-ssa-loop-ivopts.c (addr_offset_valid_p): Likewise. |
| (get_address_cost_ainc): Likewise. |
| * tree-ssa-loop-niter.c (discover_iteration_bound_by_body_walk): Likewise. |
| * tree-ssa-pre.c (add_to_value): Likewise. |
| (phi_translate_1): Likewise. |
| (do_pre_regular_insertion): Likewise. |
| (do_pre_partial_partial_insertion): Likewise. |
| (init_pre): Likewise. |
| * tree-ssa-propagate.c (ssa_prop_init): Likewise. |
| (update_call_from_tree): Likewise. |
| * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Likewise. |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): Likewise. |
| (vn_reference_lookup_pieces): Likewise. |
| (eliminate_dom_walker::eliminate_push_avail): Likewise. |
| * tree-ssa-strlen.c (set_strinfo): Likewise. |
| (get_stridx_plus_constant): Likewise. |
| (zero_length_string): Likewise. |
| (find_equal_ptrs): Likewise. |
| (printf_strlen_execute): Likewise. |
| * tree-ssa-threadedge.c (set_ssa_name_value): Likewise. |
| * tree-ssanames.c (make_ssa_name_fn): Likewise. |
| * tree-streamer-in.c (streamer_read_tree_bitfields): Likewise. |
| * tree-vect-loop.c (vect_record_loop_mask): Likewise. |
| (vect_get_loop_mask): Likewise. |
| (vect_record_loop_len): Likewise. |
| (vect_get_loop_len): Likewise. |
| * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise. |
| * tree-vect-slp.c (vect_slp_convert_to_external): Likewise. |
| (vect_bb_slp_scalar_cost): Likewise. |
| (vect_bb_vectorization_profitable_p): Likewise. |
| (vectorizable_slp_permutation): Likewise. |
| * tree-vect-stmts.c (vectorizable_call): Likewise. |
| (vectorizable_simd_clone_call): Likewise. |
| (scan_store_can_perm_p): Likewise. |
| (vectorizable_store): Likewise. |
| * expr.c: Likewise. |
| * vec.c (test_safe_grow_cleared): Likewise. |
| * vec.h (vec_safe_grow): Likewise. |
| (vec_safe_grow_cleared): Likewise. |
| (vl_ptr>::safe_grow): Likewise. |
| (vl_ptr>::safe_grow_cleared): Likewise. |
| * config/c6x/c6x.c (insn_set_clock): Likewise. |
| |
| 2020-08-27 Richard Biener <rguenther@suse.de> |
| |
| * tree-pretty-print.c (dump_mem_ref): Handle TARGET_MEM_REFs. |
| (dump_generic_node): Use dump_mem_ref also for TARGET_MEM_REF. |
| |
| 2020-08-27 Alex Coplan <alex.coplan@arm.com> |
| |
| * lra-constraints.c (canonicalize_reload_addr): New. |
| (curr_insn_transform): Use canonicalize_reload_addr to ensure we |
| generate canonical RTL for an address reload. |
| |
| 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for rounding intrinsics. |
| |
| 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for min/max intrinsics. |
| |
| 2020-08-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96579 |
| * tree-ssa-reassoc.c (linearize_expr_tree): If we expand |
| rhs via special ops make sure to swap operands. |
| |
| 2020-08-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96565 |
| * tree-ssa-dse.c (dse_classify_store): Remove defs with |
| no uses from further processing. |
| |
| 2020-08-26 Göran Uddeborg <goeran@uddeborg.se> |
| |
| PR gcov-profile/96285 |
| * common.opt, doc/invoke.texi: Clarify wording of |
| -fprofile-exclude-files and adjust -fprofile-filter-files to |
| match. |
| |
| 2020-08-26 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/96802 |
| * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p): |
| Reject target("no-general-regs-only"). |
| |
| 2020-08-26 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/constraints.md (K): Change unused constraint to |
| constraint to a const_int between 1 and 19. |
| (P): New constraint. |
| * config/msp430/msp430-protos.h (msp430x_logical_shift_right): Remove. |
| (msp430_expand_shift): New. |
| (msp430_output_asm_shift_insns): New. |
| * config/msp430/msp430.c (msp430_rtx_costs): Remove shift costs. |
| (CSH): Remove. |
| (msp430_expand_helper): Remove hard-coded generation of some inline |
| shift insns. |
| (use_helper_for_const_shift): New. |
| (msp430_expand_shift): New. |
| (msp430_output_asm_shift_insns): New. |
| (msp430_print_operand): Add new 'W' operand selector. |
| (msp430x_logical_shift_right): Remove. |
| * config/msp430/msp430.md (HPSI): New define_mode_iterator. |
| (HDI): Likewise. |
| (any_shift): New define_code_iterator. |
| (shift_insn): New define_code_attr. |
| Adjust unnamed insn patterns searched for by combine. |
| (ashlhi3): Remove. |
| (slli_1): Remove. |
| (430x_shift_left): Remove. |
| (slll_1): Remove. |
| (slll_2): Remove. |
| (ashlsi3): Remove. |
| (ashldi3): Remove. |
| (ashrhi3): Remove. |
| (srai_1): Remove. |
| (430x_arithmetic_shift_right): Remove. |
| (srap_1): Remove. |
| (srap_2): Remove. |
| (sral_1): Remove. |
| (sral_2): Remove. |
| (ashrsi3): Remove. |
| (ashrdi3): Remove. |
| (lshrhi3): Remove. |
| (srli_1): Remove. |
| (430x_logical_shift_right): Remove. |
| (srlp_1): Remove. |
| (srll_1): Remove. |
| (srll_2x): Remove. |
| (lshrsi3): Remove. |
| (lshrdi3): Remove. |
| (<shift_insn><mode>3): New define_expand. |
| (<shift_insn>hi3_430): New define_insn. |
| (<shift_insn>si3_const): Likewise. |
| (ashl<mode>3_430x): Likewise. |
| (ashr<mode>3_430x): Likewise. |
| (lshr<mode>3_430x): Likewise. |
| (*bitbranch<mode>4_z): Replace renamed predicate msp430_bitpos with |
| const_0_to_15_operand. |
| * config/msp430/msp430.opt: New option -mmax-inline-shift=. |
| * config/msp430/predicates.md (const_1_to_8_operand): New predicate. |
| (const_0_to_15_operand): Rename msp430_bitpos predicate. |
| (const_1_to_19_operand): New predicate. |
| * doc/invoke.texi: Document -mmax-inline-shift=. |
| |
| 2020-08-26 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Abstract code out to... |
| * tree-vrp.c (find_case_label_range): ...here. Rewrite for to use irange |
| API. |
| (simplify_stmt_for_jump_threading): Call find_case_label_range instead of |
| duplicating the code in simplify_stmt_for_jump_threading. |
| * tree-vrp.h (find_case_label_range): New prototype. |
| |
| 2020-08-26 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96698 |
| * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): New. |
| (loop_vec_info::reduc_latch_slp_defs): Likewise. |
| * tree-vect-stmts.c (vect_transform_stmt): Only record |
| stmts to update PHI latches from, perform the update ... |
| * tree-vect-loop.c (vect_transform_loop): ... here after |
| vectorizing those PHIs. |
| (info_for_reduction): Properly handle non-reduction PHIs. |
| |
| 2020-08-26 Martin Liska <mliska@suse.cz> |
| |
| * cgraphunit.c (process_symver_attribute): Match only symver |
| TREE_PURPOSE. |
| |
| 2020-08-26 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96783 |
| * tree-vect-stmts.c (get_group_load_store_type): Use |
| VMAT_ELEMENTWISE for negative strides when we cannot |
| use VMAT_STRIDED_SLP. |
| |
| 2020-08-26 Martin Liska <mliska@suse.cz> |
| |
| * doc/invoke.texi: Document how are pie and pic options merged. |
| |
| 2020-08-26 Zhiheng Xie <xiezhiheng@huawei.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG |
| for add/sub arithmetic intrinsics. |
| |
| 2020-08-26 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/96729 |
| * dwarf2out.c (dwarf2out_next_real_insn): Adjust function comment. |
| (dwarf2out_var_location): Look for next_note only if next_real is |
| non-NULL, in that case look for the first non-deleted |
| NOTE_INSN_VAR_LOCATION between loc_note and next_real, if any. |
| |
| 2020-08-26 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| * config/tilepro/gen-mul-tables.cc (main): Define IN_TARGET_CODE to 1 |
| in the target file. |
| |
| 2020-08-26 Martin Liska <mliska@suse.cz> |
| |
| * cgraphunit.c (process_symver_attribute): Allow multiple |
| symver attributes for one symbol. |
| * doc/extend.texi: Document the change. |
| |
| 2020-08-25 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95863 |
| * config/i386/i386.h (CTZ_DEFINED_VALUE_AT_ZERO): Return 0/2. |
| (CLZ_DEFINED_VALUE_AT_ZERO): Likewise. |
| |
| 2020-08-25 Roger Sayle <roger@nextmovesoftware.com> |
| |
| PR middle-end/87256 |
| * config/pa/pa.c (hppa_rtx_costs_shadd_p): New helper function |
| to check for coefficients supported by shNadd and shladd,l. |
| (hppa_rtx_costs): Rewrite to avoid using estimates based upon |
| FACTOR and enable recursing deeper into RTL expressions. |
| |
| 2020-08-25 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * config/pa/pa.md (ashldi3): Additionally, on !TARGET_64BIT |
| generate a two instruction shd/zdep sequence when shifting |
| registers by suitable constants. |
| (shd_internal): New define_expand to provide gen_shd_internal. |
| |
| 2020-08-25 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Rename |
| __ARM_FEATURE_SVE_VECTOR_OPERATIONS to |
| __ARM_FEATURE_SVE_VECTOR_OPERATORS. |
| |
| 2020-08-25 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins.cc (add_sve_type_attribute): |
| Take the ACLE name of the type as a parameter and add it as fourth |
| argument to the "SVE type" attribute. |
| (register_builtin_types): Update call accordingly. |
| (register_tuple_type): Likewise. Construct the name of the type |
| earlier in order to do this. |
| (get_arm_sve_vector_bits_attributes): New function. |
| (handle_arm_sve_vector_bits_attribute): Report a more sensible |
| error message if the attribute is applied to an SVE tuple type. |
| Don't allow the attribute to be applied to an existing fixed-length |
| SVE type. Mangle the new type as __SVE_VLS<type, vector-bits>. |
| Add a dummy TYPE_DECL to the new type. |
| |
| 2020-08-25 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins.cc (DEF_SVE_TYPE): Add a |
| leading "u" to each mangled name. |
| |
| 2020-08-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96548 |
| PR tree-optimization/96760 |
| * tree-ssa-loop-im.c (tree_ssa_lim): Recompute RPO after |
| store-motion. |
| |
| 2020-08-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96722 |
| * gimple.c (infer_nonnull_range): Formatting fix. |
| (infer_nonnull_range_by_dereference): Return false for clobber stmts. |
| |
| 2020-08-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96758 |
| * tree-ssa-strlen.c (handle_builtin_string_cmp): If both cstlen1 |
| and cstlen2 are set, set cmpsiz to their minimum, otherwise use the |
| one that is set. If bound is used and smaller than cmpsiz, set cmpsiz |
| to bound. If both cstlen1 and cstlen2 are set, perform the optimization. |
| |
| 2020-08-25 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/96730 |
| * tree-sra.c (create_access): Disqualify any aggregate with negative |
| offset access. |
| (build_ref_for_model): Add assert that offset is non-negative. |
| |
| 2020-08-25 Wei Wentao <weiwt.fnst@cn.fujitsu.com> |
| |
| * rtl.def: Fix typo in comment. |
| |
| 2020-08-25 Roger Sayle <roger@nextmovesoftware.com> |
| |
| PR tree-optimization/21137 |
| * fold-const.c (fold_binary_loc) [NE_EXPR/EQ_EXPR]: Call |
| STRIP_NOPS when checking whether to simplify ((x>>C1)&C2) != 0. |
| |
| 2020-08-25 Andrew Pinski <apinski@marvell.com> |
| |
| PR middle-end/64242 |
| * config/mips/mips.md (builtin_longjmp): Restore the frame |
| pointer and stack pointer and gp. |
| |
| 2020-08-25 Richard Biener <rguenther@suse.de> |
| |
| PR debug/96690 |
| * dwarf2out.c (reference_to_unused): Make FUNCTION_DECL |
| processing more consistent with respect to |
| symtab->global_info_ready. |
| (tree_add_const_value_attribute): Unconditionally call |
| rtl_for_decl_init to do all mangling early but throw |
| away the result if early_dwarf. |
| |
| 2020-08-25 Hongtao Liu <hongtao.liu@intel.com> |
| |
| PR target/96755 |
| * config/i386/sse.md: Correct the mode of NOT operands to |
| SImode. |
| |
| 2020-08-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96715 |
| * match.pd (copysign(x,-x) -> -x): New simplification. |
| |
| 2020-08-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/95450 |
| * fold-const.c (native_interpret_real): For MODE_COMPOSITE_P modes |
| punt if the to be returned REAL_CST does not encode to the bitwise |
| same representation. |
| |
| 2020-08-24 Gerald Pfeifer <gerald@pfeifer.com> |
| |
| * doc/install.texi (Configuration): Switch valgrind.com to https. |
| |
| 2020-08-24 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| PR target/94538 |
| PR target/94538 |
| * config/arm/thumb1.md: Disable set-constant splitter when |
| TARGET_HAVE_MOVT. |
| (thumb1_movsi_insn): Fix -mpure-code |
| alternative. |
| |
| 2020-08-24 Martin Liska <mliska@suse.cz> |
| |
| * tree-vect-data-refs.c (dr_group_sort_cmp): Work on |
| data_ref_pair. |
| (vect_analyze_data_ref_accesses): Work on groups. |
| (vect_find_stmt_data_reference): Add group_id argument and fill |
| up dataref_groups vector. |
| * tree-vect-loop.c (vect_get_datarefs_in_loop): Pass new |
| arguments. |
| (vect_analyze_loop_2): Likewise. |
| * tree-vect-slp.c (vect_slp_analyze_bb_1): Pass argument. |
| (vect_slp_bb_region): Likewise. |
| (vect_slp_region): Likewise. |
| (vect_slp_bb):Work on the entire BB. |
| * tree-vectorizer.h (vect_analyze_data_ref_accesses): Add new |
| argument. |
| (vect_find_stmt_data_reference): Likewise. |
| |
| 2020-08-24 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/96597 |
| * tree-ssa-sccvn.c (vn_reference_lookup_call): Add missing |
| initialization of ::punned. |
| (vn_reference_insert): Use consistently false instead of 0. |
| (vn_reference_insert_pieces): Likewise. |
| |
| 2020-08-24 Hans-Peter Nilsson <hp@axis.com> |
| |
| PR target/93372 |
| * reorg.c (fill_slots_from_thread): Allow trial insns that clobber |
| TARGET_FLAGS_REGNUM as delay-slot fillers. |
| |
| 2020-08-23 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/96744 |
| * config/i386/i386-options.c (IX86_ATTR_IX86_YES): New. |
| (IX86_ATTR_IX86_NO): Likewise. |
| (ix86_opt_type): Add ix86_opt_ix86_yes and ix86_opt_ix86_no. |
| (ix86_valid_target_attribute_inner_p): Handle general-regs-only, |
| ix86_opt_ix86_yes and ix86_opt_ix86_no. |
| (ix86_option_override_internal): Check opts->x_ix86_target_flags |
| instead of opts->x_ix86_target_flags. |
| * doc/extend.texi: Document target("general-regs-only") function |
| attribute. |
| |
| 2020-08-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/extend.texi: Update links to Arm docs. |
| * doc/invoke.texi: Likewise. |
| |
| 2020-08-21 Hongtao Liu <hongtao.liu@intel.com> |
| |
| PR target/96262 |
| * config/i386/i386-expand.c |
| (ix86_expand_vec_shift_qihi_constant): Refine. |
| |
| 2020-08-21 Alex Coplan <alex.coplan@arm.com> |
| |
| PR jit/63854 |
| * gcc.c (set_static_spec): New. |
| (set_static_spec_owned): New. |
| (set_static_spec_shared): New. |
| (driver::maybe_putenv_COLLECT_LTO_WRAPPER): Use |
| set_static_spec_owned() to take ownership of lto_wrapper_file |
| such that it gets freed in driver::finalize. |
| (driver::maybe_run_linker): Use set_static_spec_shared() to |
| ensure that we don't try and free() the static string "ld", |
| also ensuring that any previously-allocated string in |
| linker_name_spec is freed. Likewise with argv0. |
| (driver::finalize): Use set_static_spec_shared() when resetting |
| specs that previously had allocated strings; remove if(0) |
| around call to free(). |
| |
| 2020-08-21 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org> |
| |
| * emit-rtl.c (try_split): Call copy_frame_info_to_split_insn |
| to split certain RTX_FRAME_RELATED_P insns. |
| * recog.c (copy_frame_info_to_split_insn): New function. |
| (peep2_attempt): Split copying of frame related info of |
| RTX_FRAME_RELATED_P insns into above function and call it. |
| * recog.h (copy_frame_info_to_split_insn): Declare it. |
| |
| 2020-08-21 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/88808 |
| * config/i386/i386.c (ix86_preferred_reload_class): Allow |
| QImode data go into mask registers. |
| * config/i386/i386.md: (*movhi_internal): Adjust constraints |
| for mask registers. |
| (*movqi_internal): Ditto. |
| (*anddi_1): Support mask register operations |
| (*and<mode>_1): Ditto. |
| (*andqi_1): Ditto. |
| (*andn<mode>_1): Ditto. |
| (*<code><mode>_1): Ditto. |
| (*<code>qi_1): Ditto. |
| (*one_cmpl<mode>2_1): Ditto. |
| (*one_cmplsi2_1_zext): Ditto. |
| (*one_cmplqi2_1): Ditto. |
| (define_peephole2): Move constant 0/-1 directly into mask |
| registers. |
| * config/i386/predicates.md (mask_reg_operand): New predicate. |
| * config/i386/sse.md (define_split): Add post-reload splitters |
| that would convert "generic" patterns to mask patterns. |
| (*knotsi_1_zext): New define_insn. |
| |
| 2020-08-21 liuhongt <hongtao.liu@intel.com> |
| |
| * config/i386/x86-tune-costs.h (skylake_cost): Adjust cost |
| model. |
| |
| 2020-08-21 liuhongt <hongtao.liu@intel.com> |
| |
| * config/i386/i386.c (inline_secondary_memory_needed): |
| No memory is needed between mask regs and gpr. |
| (ix86_hard_regno_mode_ok): Add condition TARGET_AVX512F for |
| mask regno. |
| * config/i386/i386.h (enum reg_class): Add INT_MASK_REGS. |
| (REG_CLASS_NAMES): Ditto. |
| (REG_CLASS_CONTENTS): Ditto. |
| * config/i386/i386.md: Exclude mask register in |
| define_peephole2 which is avaiable only for gpr. |
| |
| 2020-08-21 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/71453 |
| * config/i386/i386.h (struct processor_costs): Add member |
| mask_to_integer, integer_to_mask, mask_load[3], mask_store[3], |
| mask_move. |
| * config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost, |
| i386_cost, pentium_cost, lakemont_cost, pentiumpro_cost, |
| geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost, |
| bdver_cost, znver1_cost, znver2_cost, skylake_cost, |
| btver1_cost, btver2_cost, pentium4_cost, nocona_cost, |
| atom_cost, slm_cost, intel_cost, generic_cost, core_cost): |
| Initialize mask_load[3], mask_store[3], mask_move, |
| integer_to_mask, mask_to_integer for all target costs. |
| * config/i386/i386.c (ix86_register_move_cost): Using cost |
| model of mask registers. |
| (inline_memory_move_cost): Ditto. |
| (ix86_register_move_cost): Ditto. |
| |
| 2020-08-20 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| * config/vxworks.h (VXWORKS_ADDITIONAL_CPP_SPEC): Don't include |
| VxWorks header files if -fself-test is used. |
| (STARTFILE_PREFIX_SPEC): Avoid using VSB_DIR if -fself-test is used. |
| |
| 2020-08-20 Joe Ramsay <Joe.Ramsay@arm.com> |
| |
| PR target/96683 |
| * config/arm/mve.md (mve_vst1q_f<mode>): Require MVE memory operand for |
| destination. |
| (mve_vst1q_<supf><mode>): Likewise. |
| |
| 2020-08-19 2020-08-19 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/rs6000-builtin.def (BU_P10V_0, BU_P10V_1, |
| BU_P10V_2, BU_P10V_3): Rename BU_P10V_VSX_0, BU_P10V_VSX_1, |
| BU_P10V_VSX_2, BU_P10V_VSX_3 respectively. |
| (BU_P10V_4): Remove. |
| (BU_P10V_AV_0, BU_P10V_AV_1, BU_P10V_AV_2, BU_P10V_AV_3, BU_P10V_AV_4): |
| New definitions for Power 10 Altivec macros. |
| (VSTRIBR, VSTRIHR, VSTRIBL, VSTRIHL, VSTRIBR_P, VSTRIHR_P, |
| VSTRIBL_P, VSTRIHL_P, MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, |
| VEXPANDMB, VEXPANDMH, VEXPANDMW, VEXPANDMD, VEXPANDMQ, VEXTRACTMB, |
| VEXTRACTMH, VEXTRACTMW, VEXTRACTMD, VEXTRACTMQ): Replace macro |
| expansion BU_P10V_1 with BU_P10V_AV_1. |
| (VCLRLB, VCLRRB, VCFUGED, VCLZDM, VCTZDM, VPDEPD, VPEXTD, VGNB, |
| VCNTMBB, VCNTMBH, VCNTMBW, VCNTMBD): Replace macro expansion |
| BU_P10V_2 with BU_P10V_AV_2. |
| (VEXTRACTBL, VEXTRACTHL, VEXTRACTWL, VEXTRACTDL, VEXTRACTBR, VEXTRACTHR, |
| VEXTRACTWR, VEXTRACTDR, VINSERTGPRBL, VINSERTGPRHL, VINSERTGPRWL, |
| VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, VINSERTGPRBR, |
| VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, VINSERTVPRHR, |
| VINSERTVPRWR, VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4SI, VREPLACE_ELT_V2DF, |
| VREPLACE_ELT_V4SF, VREPLACE_ELT_V2DI, VREPLACE_ELT_UV2DI, VREPLACE_UN_V4SI, |
| VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI, |
| VREPLACE_UN_V2DF, VSLDB_V16QI, VSLDB_V8HI, VSLDB_V4SI, VSLDB_V2DI, |
| VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, VSRDB_V2DI): Replace macro expansion |
| BU_P10V_3 with BU_P10V_AV_3. |
| (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, VXXSPLTID): Replace macro expansion |
| BU_P10V_1 with BU_P10V_AV_1. |
| (XXGENPCVM_V16QI, XXGENPCVM_V8HI, XXGENPCVM_V4SI, XXGENPCVM_V2DI): |
| Replace macro expansion BU_P10V_2 with BU_P10V_VSX_2. |
| (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF, VXXBLEND_V16QI, VXXBLEND_V8HI, |
| VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): Replace macor |
| expansion BU_P10V_3 with BU_P10V_VSX_3. |
| (XXEVAL, VXXPERMX): Replace macro expansion BU_P10V_4 with BU_P10V_VSX_4. |
| (XVCVBF16SP, XVCVSPBF16): Replace macro expansion BU_VSX_1 with |
| BU_P10V_VSX_1. Also change MISC to CONST. |
| * config/rs6000/rs6000-c.c: (P10_BUILTIN_VXXPERMX): Replace with |
| P10V_BUILTIN_VXXPERMX. |
| (P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRRB, |
| P10_BUILTIN_VGNB, P10_BUILTIN_XXEVAL, P10_BUILTIN_VXXPERMX, |
| P10_BUILTIN_VEXTRACTBL, P10_BUILTIN_VEXTRACTHL, P10_BUILTIN_VEXTRACTWL, |
| P10_BUILTIN_VEXTRACTDL, P10_BUILTIN_VINSERTGPRHL, |
| P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL, |
| P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL, |
| P10_BUILTIN_VEXTRACTBR, P10_BUILTIN_VEXTRACTHR, |
| P10_BUILTIN_VEXTRACTWR, P10_BUILTIN_VEXTRACTDR, |
| P10_BUILTIN_VINSERTGPRBR, P10_BUILTIN_VINSERTGPRHR, |
| P10_BUILTIN_VINSERTGPRWR, P10_BUILTIN_VINSERTGPRDR, |
| P10_BUILTIN_VINSERTVPRBR, P10_BUILTIN_VINSERTVPRHR, |
| P10_BUILTIN_VINSERTVPRWR, P10_BUILTIN_VREPLACE_ELT_UV4SI, |
| P10_BUILTIN_VREPLACE_ELT_V4SI, P10_BUILTIN_VREPLACE_ELT_UV2DI, |
| P10_BUILTIN_VREPLACE_ELT_V2DI, P10_BUILTIN_VREPLACE_ELT_V2DF, |
| P10_BUILTIN_VREPLACE_UN_UV4SI, P10_BUILTIN_VREPLACE_UN_V4SI, |
| P10_BUILTIN_VREPLACE_UN_V4SF, P10_BUILTIN_VREPLACE_UN_UV2DI, |
| P10_BUILTIN_VREPLACE_UN_V2DI, P10_BUILTIN_VREPLACE_UN_V2DF, |
| P10_BUILTIN_VSLDB_V16QI, P10_BUILTIN_VSLDB_V16QI, |
| P10_BUILTIN_VSLDB_V8HI, P10_BUILTIN_VSLDB_V4SI, |
| P10_BUILTIN_VSLDB_V2DI, P10_BUILTIN_VXXSPLTIW_V4SI, |
| P10_BUILTIN_VXXSPLTIW_V4SF, P10_BUILTIN_VXXSPLTID, |
| P10_BUILTIN_VXXSPLTI32DX_V4SI, P10_BUILTIN_VXXSPLTI32DX_V4SF, |
| P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI, |
| P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI, |
| P10_BUILTIN_VXXBLEND_V4SF, P10_BUILTIN_VXXBLEND_V2DF, |
| P10_BUILTIN_VSRDB_V16QI, P10_BUILTIN_VSRDB_V8HI, |
| P10_BUILTIN_VSRDB_V4SI, P10_BUILTIN_VSRDB_V2DI, |
| P10_BUILTIN_VSTRIBL, P10_BUILTIN_VSTRIHL, |
| P10_BUILTIN_VSTRIBL_P, P10_BUILTIN_VSTRIHL_P, |
| P10_BUILTIN_VSTRIBR, P10_BUILTIN_VSTRIHR, |
| P10_BUILTIN_VSTRIBR_P, P10_BUILTIN_VSTRIHR_P, |
| P10_BUILTIN_MTVSRBM, P10_BUILTIN_MTVSRHM, |
| P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM, |
| P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, |
| P10_BUILTIN_VCNTMBH, P10_BUILTIN_VCNTMBW, |
| P10_BUILTIN_VCNTMBD, P10_BUILTIN_VEXPANDMB, |
| P10_BUILTIN_VEXPANDMH, P10_BUILTIN_VEXPANDMW, |
| P10_BUILTIN_VEXPANDMD, P10_BUILTIN_VEXPANDMQ, |
| P10_BUILTIN_VEXTRACTMB, P10_BUILTIN_VEXTRACTMH, |
| P10_BUILTIN_VEXTRACTMW, P10_BUILTIN_VEXTRACTMD, |
| P10_BUILTIN_VEXTRACTMQ, P10_BUILTIN_XVTLSBB_ZEROS, |
| P10_BUILTIN_XVTLSBB_ONES): Replace with |
| P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRRB, |
| P10V_BUILTIN_VGNB, P10V_BUILTIN_XXEVAL, P10V_BUILTIN_VXXPERMX, |
| P10V_BUILTIN_VEXTRACTBL, P10V_BUILTIN_VEXTRACTHL, P10V_BUILTIN_VEXTRACTWL, |
| P10V_BUILTIN_VEXTRACTDL, P10V_BUILTIN_VINSERTGPRHL, |
| P10V_BUILTIN_VINSERTGPRWL, P10V_BUILTIN_VINSERTGPRDL, |
| P10V_BUILTIN_VINSERTVPRBL,P10V_BUILTIN_VINSERTVPRHL, |
| P10V_BUILTIN_VEXTRACTBR, P10V_BUILTIN_VEXTRACTHR |
| P10V_BUILTIN_VEXTRACTWR, P10V_BUILTIN_VEXTRACTDR, |
| P10V_BUILTIN_VINSERTGPRBR, P10V_BUILTIN_VINSERTGPRHR, |
| P10V_BUILTIN_VINSERTGPRWR, P10V_BUILTIN_VINSERTGPRDR, |
| P10V_BUILTIN_VINSERTVPRBR, P10V_BUILTIN_VINSERTVPRHR, |
| P10V_BUILTIN_VINSERTVPRWR, P10V_BUILTIN_VREPLACE_ELT_UV4SI, |
| P10V_BUILTIN_VREPLACE_ELT_V4SI, P10V_BUILTIN_VREPLACE_ELT_UV2DI, |
| P10V_BUILTIN_VREPLACE_ELT_V2DI, P10V_BUILTIN_VREPLACE_ELT_V2DF, |
| P10V_BUILTIN_VREPLACE_UN_UV4SI, P10V_BUILTIN_VREPLACE_UN_V4SI, |
| P10V_BUILTIN_VREPLACE_UN_V4SF, P10V_BUILTIN_VREPLACE_UN_UV2DI, |
| P10V_BUILTIN_VREPLACE_UN_V2DI, P10V_BUILTIN_VREPLACE_UN_V2DF, |
| P10V_BUILTIN_VSLDB_V16QI, P10V_BUILTIN_VSLDB_V16QI, |
| P10V_BUILTIN_VSLDB_V8HI, P10V_BUILTIN_VSLDB_V4SI, |
| P10V_BUILTIN_VSLDB_V2DI, P10V_BUILTIN_VXXSPLTIW_V4SI, |
| P10V_BUILTIN_VXXSPLTIW_V4SF, P10V_BUILTIN_VXXSPLTID, |
| P10V_BUILTIN_VXXSPLTI32DX_V4SI, P10V_BUILTIN_VXXSPLTI32DX_V4SF, |
| P10V_BUILTIN_VXXBLEND_V16QI, P10V_BUILTIN_VXXBLEND_V8HI, |
| P10V_BUILTIN_VXXBLEND_V4SI, P10V_BUILTIN_VXXBLEND_V2DI, |
| P10V_BUILTIN_VXXBLEND_V4SF, P10V_BUILTIN_VXXBLEND_V2DF, |
| P10V_BUILTIN_VSRDB_V16QI, P10V_BUILTIN_VSRDB_V8HI, |
| P10V_BUILTIN_VSRDB_V4SI, P10V_BUILTIN_VSRDB_V2DI, |
| P10V_BUILTIN_VSTRIBL, P10V_BUILTIN_VSTRIHL, |
| P10V_BUILTIN_VSTRIBL_P, P10V_BUILTIN_VSTRIHL_P, |
| P10V_BUILTIN_VSTRIBR, P10V_BUILTIN_VSTRIHR, |
| P10V_BUILTIN_VSTRIBR_P, P10V_BUILTIN_VSTRIHR_P, |
| P10V_BUILTIN_MTVSRBM, P10V_BUILTIN_MTVSRHM, |
| P10V_BUILTIN_MTVSRWM, P10V_BUILTIN_MTVSRDM, |
| P10V_BUILTIN_MTVSRQM, P10V_BUILTIN_VCNTMBB, |
| P10V_BUILTIN_VCNTMBH, P10V_BUILTIN_VCNTMBW, |
| P10V_BUILTIN_VCNTMBD, P10V_BUILTIN_VEXPANDMB, |
| P10V_BUILTIN_VEXPANDMH, P10V_BUILTIN_VEXPANDMW, |
| P10V_BUILTIN_VEXPANDMD, P10V_BUILTIN_VEXPANDMQ, |
| P10V_BUILTIN_VEXTRACTMB, P10V_BUILTIN_VEXTRACTMH, |
| P10V_BUILTIN_VEXTRACTMW, P10V_BUILTIN_VEXTRACTMD, |
| P10V_BUILTIN_VEXTRACTMQ, P10V_BUILTIN_XVTLSBB_ZEROS, |
| P10V_BUILTIN_XVTLSBB_ONES respectively. |
| * config/rs6000/rs6000-call.c: Ditto above, change P10_BUILTIN_name to |
| P10V_BUILTIN_name. |
| (P10_BUILTIN_XVCVSPBF16, P10_BUILTIN_XVCVBF16SP): Change to |
| P10V_BUILTIN_XVCVSPBF16, P10V_BUILTIN_XVCVBF16SP respectively. |
| |
| 2020-08-19 Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| * config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall): |
| Sibcalls are always legal when the caller doesn't preserve r2. |
| |
| 2020-08-19 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-expand.c (ix86_expand_builtin) |
| [case IX86_BUILTIN_ENQCMD, case IX86_BUILTIN_ENQCMDS]: |
| Rewrite expansion to use code_for_enqcmd. |
| [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]: |
| Rewrite expansion to use code_for_wrss. |
| [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]: |
| Rewrite expansion to use code_for_wrss. |
| |
| 2020-08-19 Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR tree-optimization/94234 |
| * match.pd ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New |
| simplification. |
| |
| 2020-08-19 H.J. Lu <hjl.tools@gmail.com> |
| |
| * common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket |
| Lake and Alder Lake. |
| |
| 2020-08-19 Peixin Qiao <qiaopeixin@huawei.com> |
| |
| * config/aarch64/aarch64.c (aarch64_init_cumulative_args): Remove |
| "fndecl && TREE_PUBLIC (fndecl)" check since it prevents the funtion |
| type check when calling via a function pointer or when calling a static |
| function. |
| |
| 2020-08-19 Kewen Lin <linkw@linux.ibm.com> |
| |
| * opts-global.c (decode_options): Call target_option_override_hook |
| before it prints for --help=*. |
| |
| 2020-08-18 Peter Bergner <bergner@linux.ibm.com> |
| |
| * config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to |
| xvcvbf16spn. |
| * config/rs6000/rs6000-call.c (builtin_function_type): Likewise. |
| * config/rs6000/vsx.md: Likewise. |
| * doc/extend.texi: Likewise. |
| |
| 2020-08-18 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| * config/rs6000/rs6000-string.c (gen_lxvl_stxvl_move): |
| Helper function. |
| (expand_block_move): Add lxvl/stxvl, vector pair, and |
| unaligned VSX. |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Default value for -mblock-ops-vector-pair. |
| * config/rs6000/rs6000.opt: Add -mblock-ops-vector-pair. |
| |
| 2020-08-18 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.c (check_for_binary_op_overflow): Change type of store |
| to range_query. |
| (vr_values::adjust_range_with_scev): Abstract most of the code... |
| (range_of_var_in_loop): ...here. Remove value_range_equiv uses. |
| (simplify_using_ranges::simplify_using_ranges): Change type of store |
| to range_query. |
| * vr-values.h (class range_query): New. |
| (class simplify_using_ranges): Use range_query. |
| (class vr_values): Add OVERRIDE to get_value_range. |
| (range_of_var_in_loop): New. |
| |
| 2020-08-18 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/96665 |
| PR middle-end/78257 |
| * expr.c (convert_to_bytes): Replace statically allocated buffer with |
| a dynamically allocated one of sufficient size. |
| |
| 2020-08-18 Martin Sebor <msebor@redhat.com> |
| |
| PR tree-optimization/96670 |
| PR middle-end/78257 |
| * gimple-fold.c (gimple_fold_builtin_memchr): Call byte_representation |
| to get it, not string_constant. |
| |
| 2020-08-18 Hu Jiangping <hujiangping@cn.fujitsu.com> |
| |
| * doc/gimple.texi (gimple_debug_begin_stmt_p): Add return type. |
| (gimple_debug_inline_entry_p, gimple_debug_nonbind_marker_p): Likewise. |
| |
| 2020-08-18 Martin Sebor <msebor@redhat.com> |
| |
| * fold-const.c (native_encode_expr): Update comment. |
| |
| 2020-08-18 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/96536 |
| * config/i386/i386.md (restore_stack_nonlocal): Add missing compare |
| RTX. Rewrite expander to use high-level functions in RTL construction. |
| |
| 2020-08-18 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/96562 |
| PR target/93897 |
| * config/i386/i386-expand.c (ix86_expand_pinsr): Don't use |
| pinsr for TImode. |
| (ix86_expand_pextr): Don't use pextr for TImode. |
| |
| 2020-08-17 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-builtin.def (__builtin_ia32_bextri_u32) |
| (__builtin_ia32_bextri_u64): Use CODE_FOR_nothing. |
| * config/i386/i386.md (@tbm_bextri_<mode>): |
| Implement as parametrized name pattern. |
| (@rdrand<mode>): Ditto. |
| (@rdseed<mode>): Ditto. |
| * config/i386/i386-expand.c (ix86_expand_builtin) |
| [case IX86_BUILTIN_BEXTRI32, case IX86_BUILTIN_BEXTRI64]: |
| Update for parameterized name patterns. |
| [case IX86_BUILTIN_RDRAND16_STEP, case IX86_BUILTIN_RDRAND32_STEP] |
| [case IX86_BUILTIN_RDRAND64_STEP]: Ditto. |
| [case IX86_BUILTIN_RDSEED16_STEP, case IX86_BUILTIN_RDSEED32_STEP] |
| [case IX86_BUILTIN_RDSEED64_STEP]: Ditto. |
| |
| 2020-08-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.c (vr_values::get_value_range): Add stmt param. |
| (vr_values::extract_range_from_comparison): Same. |
| (vr_values::extract_range_from_assignment): Pass stmt to |
| extract_range_from_comparison. |
| (vr_values::adjust_range_with_scev): Pass stmt to get_value_range. |
| (simplify_using_ranges::vrp_evaluate_conditional): Add stmt param. |
| Pass stmt to get_value_range. |
| (simplify_using_ranges::vrp_visit_cond_stmt): Pass stmt to |
| get_value_range. |
| (simplify_using_ranges::simplify_abs_using_ranges): Same. |
| (simplify_using_ranges::simplify_div_or_mod_using_ranges): Same. |
| (simplify_using_ranges::simplify_bit_ops_using_ranges): Same. |
| (simplify_using_ranges::simplify_cond_using_ranges_1): Same. |
| (simplify_using_ranges::simplify_switch_using_ranges): Same. |
| (simplify_using_ranges::simplify_float_conversion_using_ranges): Same. |
| * vr-values.h (class vr_values): Add stmt arg to |
| vrp_evaluate_conditional_warnv_with_ops. |
| Add stmt arg to extract_range_from_comparison and get_value_range. |
| (simplify_using_ranges::get_value_range): Add stmt arg. |
| |
| 2020-08-17 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/96350 |
| * config/i386/i386.c (ix86_legitimate_constant_p): Return |
| false for ENDBR immediate. |
| (ix86_legitimate_address_p): Ditto. |
| * config/i386/predicates.md |
| (x86_64_immediate_operand): Exclude ENDBR immediate. |
| (x86_64_zext_immediate_operand): Ditto. |
| (x86_64_dwzext_immediate_operand): Ditto. |
| (ix86_endbr_immediate_operand): New predicate. |
| |
| 2020-08-16 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * simplify-rtx.c (simplify_unary_operation_1) [SIGN_EXTEND]: |
| Simplify (sign_extend:M (truncate:N (lshiftrt:M x C))) to |
| (ashiftrt:M x C) when the shift sets the high bits appropriately. |
| |
| 2020-08-14 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/78257 |
| * builtins.c (expand_builtin_memory_copy_args): Rename called function. |
| (expand_builtin_stpcpy_1): Remove argument from call. |
| (expand_builtin_memcmp): Rename called function. |
| (inline_expand_builtin_bytecmp): Same. |
| * expr.c (convert_to_bytes): New function. |
| (constant_byte_string): New function (formerly string_constant). |
| (string_constant): Call constant_byte_string. |
| (byte_representation): New function. |
| * expr.h (byte_representation): Declare. |
| * fold-const-call.c (fold_const_call): Rename called function. |
| * fold-const.c (c_getstr): Remove an argument. |
| (getbyterep): Define a new function. |
| * fold-const.h (c_getstr): Remove an argument. |
| (getbyterep): Declare a new function. |
| * gimple-fold.c (gimple_fold_builtin_memory_op): Rename callee. |
| (gimple_fold_builtin_string_compare): Same. |
| (gimple_fold_builtin_memchr): Same. |
| |
| 2020-08-14 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/analyzer.texi (Overview): Add tip about how to get a |
| gimple dump if the analyzer ICEs. |
| |
| 2020-08-14 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-builtin.def (__builtin_ia32_llwpcb) |
| (__builtin_ia32_slwpcb, __builtin_ia32_lwpval32) |
| (__builtin_ia32_lwpval64, __builtin_ia32_lwpins32) |
| (__builtin_ia32_lwpins64): Use CODE_FOR_nothing. |
| * config/i386/i386.md (@lwp_llwpcb<mode>): |
| Implement as parametrized name pattern. |
| (@lwp_slwpcb<mode>): Ditto. |
| (@lwp_lwpval<mode>): Ditto. |
| (@lwp_lwpins<mode>): Ditto. |
| * config/i386/i386-expand.c (ix86_expand_special_args_builtin) |
| [case VOID_FTYPE_UINT_UINT_UINT, case VOID_FTYPE_UINT64_UINT_UINT] |
| [case UCHAR_FTYPE_UINT_UINT_UINT, case UCHAR_FTYPE_UINT64_UINT_UINT]: |
| Remove. |
| (ix86_expand_builtin) |
| [ case IX86_BUILTIN_LLWPCB, case IX86_BUILTIN_LLWPCB]: |
| Update for parameterized name patterns. |
| [case IX86_BUILTIN_LWPVAL32, case IX86_BUILTIN_LWPVAL64] |
| [case IX86_BUILTIN_LWPINS32, case IX86_BUILTIN_LWPINS64]: Expand here. |
| |
| 2020-08-14 Lewis Hyatt <lhyatt@gmail.com> |
| |
| * common.opt: Add new option -fdiagnostics-plain-output. |
| * doc/invoke.texi: Document it. |
| * opts-common.c (decode_cmdline_options_to_array): Implement it. |
| (decode_cmdline_option): Add missing const qualifier to argv. |
| |
| 2020-08-14 Jakub Jelinek <jakub@redhat.com> |
| Jonathan Wakely <jwakely@redhat.com> |
| Jonathan Wakely <jwakely@redhat.com> |
| |
| * system.h: Include type_traits. |
| * vec.h (vec<T, A, vl_embed>::embedded_size): Use offsetof and asserts |
| on vec_stdlayout, which is conditionally a vec (for standard layout T) |
| and otherwise vec_embedded. |
| |
| 2020-08-14 Jojo R <jiejie_rong@c-sky.com> |
| |
| * config/csky/csky-elf.h (ASM_SPEC): Use mfloat-abi. |
| * config/csky/csky-linux-elf.h (ASM_SPEC): mfloat-abi. |
| |
| 2020-08-13 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/93032 |
| PR analyzer/93938 |
| PR analyzer/94011 |
| PR analyzer/94099 |
| PR analyzer/94399 |
| PR analyzer/94458 |
| PR analyzer/94503 |
| PR analyzer/94640 |
| PR analyzer/94688 |
| PR analyzer/94689 |
| PR analyzer/94839 |
| PR analyzer/95026 |
| PR analyzer/95042 |
| PR analyzer/95240 |
| * Makefile.in (ANALYZER_OBJS): Add analyzer/region.o, |
| analyzer/region-model-impl-calls.o, |
| analyzer/region-model-manager.o, |
| analyzer/region-model-reachability.o, analyzer/store.o, and |
| analyzer/svalue.o. |
| * doc/analyzer.texi: Update for changes to analyzer |
| implementation. |
| * tristate.h (tristate::get_value): New accessor. |
| |
| 2020-08-13 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-builtin.def (CET_NORMAL): Merge to CET BDESC array. |
| (__builtin_ia32_rddspd, __builtin_ia32_rddspq, __builtin_ia32_incsspd) |
| (__builtin_ia32_incsspq, __builtin_ia32_wrssd, __builtin_ia32_wrssq) |
| (__builtin_ia32_wrussd, __builtin_ia32_wrussq): Use CODE_FOR_nothing. |
| * config/i386/i386-builtins.c: Remove handling of CET_NORMAL builtins. |
| * config/i386/i386.md (@rdssp<mode>): Implement as parametrized |
| name pattern. Use SWI48 mode iterator. Introduce input operand |
| and remove explicit XOR zeroing from insn template. |
| (@incssp<mode>): Implement as parametrized name pattern. |
| Use SWI48 mode iterator. |
| (@wrss<mode>): Ditto. |
| (@wruss<mode>): Ditto. |
| (rstorssp): Remove expander. Rename insn pattern from *rstorssp<mode>. |
| Use DImode memory operand. |
| (clrssbsy): Remove expander. Rename insn pattern from *clrssbsy<mode>. |
| Use DImode memory operand. |
| (save_stack_nonlocal): Update for parametrized name patterns. |
| Use cleared register as an argument to gen_rddsp. |
| (restore_stack_nonlocal): Update for parametrized name patterns. |
| * config/i386/i386-expand.c (ix86_expand_builtin): |
| [case IX86_BUILTIN_RDSSPD, case IX86_BUILTIN_RDSSPQ]: Expand here. |
| [case IX86_BUILTIN_INCSSPD, case IX86_BUILTIN_INCSSPQ]: Ditto. |
| [case IX86_BUILTIN_RSTORSSP, case IX86_BUILTIN_CLRSSBSY]: |
| Generate DImode memory operand. |
| [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ] |
| [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]: |
| Update for parameterized name patterns. |
| |
| 2020-08-13 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR target/96506 |
| * config/rs6000/rs6000-call.c (rs6000_promote_function_mode): Disallow |
| MMA types as return values. |
| (rs6000_function_arg): Disallow MMA types as function arguments. |
| |
| 2020-08-13 Richard Sandiford <richard.sandiford@arm.com> |
| |
| Revert: |
| 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com> |
| |
| * config/aarch64/aarch64.c (aarch64_function_value): Add if |
| condition to check ag_mode after entering if condition of |
| aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is |
| set as false by -mgeneral-regs-only, report the diagnostic |
| information of -mgeneral-regs-only imcompatible with the use |
| of fp/simd register(s). |
| |
| 2020-08-13 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/96482 |
| * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Mask m_value |
| with m_mask. |
| |
| 2020-08-13 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimplify.c (gimplify_omp_taskloop_expr): New function. |
| (gimplify_omp_for): Use it. For OMP_FOR_NON_RECTANGULAR |
| loops adjust in outer taskloop the var-outer decls. |
| * omp-expand.c (expand_omp_taskloop_for_inner): Handle non-rectangular |
| loops. |
| (expand_omp_for): Don't reject non-rectangular taskloop. |
| * omp-general.c (omp_extract_for_data): Don't assert that |
| non-rectangular loops have static schedule, instead treat loop->m1 |
| or loop->m2 as if loop->n1 or loop->n2 is non-constant. |
| |
| 2020-08-13 Hongtao Liu <hongtao.liu@intel.com> |
| |
| PR target/96246 |
| * config/i386/sse.md (<avx512>_load<mode>_mask, |
| <avx512>_load<mode>_mask): Extend to generate blendm |
| instructions. |
| (<avx512>_blendm<mode>, <avx512>_blendm<mode>): Change |
| define_insn to define_expand. |
| |
| 2020-08-12 Roger Sayle <roger@nextmovesoftware.com> |
| Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/96558 |
| * config/i386/i386.md (peephole2): Only reorder register clearing |
| instructions to allow use of xor for general registers. |
| |
| 2020-08-12 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/96482 |
| * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Drop value bits |
| for bits that are unknown. |
| (ipcp_bits_lattice::set_to_constant): Likewise. |
| * tree-ssa-ccp.c (get_default_value): Add sanity check that |
| IPA CP bit info has all bits set to zero in bits that |
| are unknown. |
| |
| 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com> |
| |
| * config/aarch64/aarch64.c (aarch64_function_value): Add if |
| condition to check ag_mode after entering if condition of |
| aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is |
| set as false by -mgeneral-regs-only, report the diagnostic |
| information of -mgeneral-regs-only imcompatible with the use |
| of fp/simd register(s). |
| |
| 2020-08-12 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96535 |
| * toplev.c (process_options): Move flag_unroll_loops and |
| flag_cunroll_grow_size handling from here to ... |
| * opts.c (finish_options): ... here. For flag_cunroll_grow_size, |
| don't check for AUTODETECT_VALUE, but instead check |
| opts_set->x_flag_cunroll_grow_size. |
| * common.opt (funroll-completely-grow-size): Default to 0. |
| * config/rs6000/rs6000.c (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE): |
| Redefine. |
| (rs6000_override_options_after_change): New function. |
| (rs6000_option_override_internal): Call it. Move there the |
| flag_cunroll_grow_size, unroll_only_small_loops and |
| flag_rename_registers handling. |
| |
| 2020-08-12 Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Make elt_size an |
| unsigned HOST_WIDE_INT. Print init_frag.remaining using |
| HOST_WIDE_INT_PRINT_UNSIGNED. |
| |
| 2020-08-12 Roger Sayle <roger@nextmovesoftware.com> |
| Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (peephole2): Reduce unnecessary |
| register shuffling produced by register allocation. |
| |
| 2020-08-12 Aldy Hernandez <aldyh@redhat.com> |
| |
| * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use vec<> |
| instead of std::vector<>. |
| (evaluate_properties_for_edge): Same. |
| (ipa_fn_summary_t::duplicate): Same. |
| (estimate_ipcp_clone_size_and_time): Same. |
| * vec.h (<T, A, vl_embed>::embedded_size): Change vec_embedded |
| type to contain a char[]. |
| |
| 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| PR target/96308 |
| * config/s390/s390.c (s390_cannot_force_const_mem): Reject an |
| unary minus for everything not being a numeric constant. |
| (legitimize_tls_address): Move a NEG out of the CONST rtx. |
| |
| 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| PR target/96456 |
| * config/s390/s390.h (TARGET_NONSIGNALING_VECTOR_COMPARE_OK): New |
| macro. |
| * config/s390/vector.md (vcond_comparison_operator): Use new macro |
| for the check. |
| |
| 2020-08-11 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/96539 |
| * expr.c (emit_block_move_hints): Don't copy anything if x and y |
| are the same and neither is MEM_VOLATILE_P. |
| |
| 2020-08-11 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c/96549 |
| * tree.c (get_narrower): Use TREE_TYPE (ret) instead of |
| TREE_TYPE (win) for COMPOUND_EXPRs. |
| |
| 2020-08-11 Jan Hubicka <hubicka@ucw.cz> |
| |
| * predict.c (not_loop_guard_equal_edge_p): New function. |
| (maybe_predict_edge): New function. |
| (predict_paths_for_bb): Use it. |
| (predict_paths_leading_to_edge): Use it. |
| |
| 2020-08-11 Martin Liska <mliska@suse.cz> |
| |
| * dbgcnt.def (DEBUG_COUNTER): Add ipa_cp_bits. |
| * ipa-cp.c (ipcp_store_bits_results): Use it when we store known |
| bits for parameters. |
| |
| 2020-08-10 Marek Polacek <polacek@redhat.com> |
| |
| * doc/sourcebuild.texi: Document dg-ice. |
| |
| 2020-08-10 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * config/i386/i386-expand.c (ix86_expand_int_movcc): Expand |
| signed MIN_EXPR against zero as "x < 0 ? x : 0" instead of |
| "x <= 0 ? x : 0" to enable sign_bit_compare_p optimizations. |
| |
| 2020-08-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| * value-range.h (gt_ggc_mx): Declare inline. |
| (gt_pch_nx): Same. |
| |
| 2020-08-10 Marc Glisse <marc.glisse@inria.fr> |
| |
| PR tree-optimization/95433 |
| * match.pd (X * C1 == C2): Handle wrapping overflow. |
| * expr.c (maybe_optimize_mod_cmp): Qualify call to mod_inv. |
| (mod_inv): Move... |
| * wide-int.cc (mod_inv): ... here. |
| * wide-int.h (mod_inv): Declare it. |
| |
| 2020-08-10 Jan Hubicka <hubicka@ucw.cz> |
| |
| * predict.c (filter_predictions): Document semantics of filter. |
| (equal_edge_p): Rename to ... |
| (not_equal_edge_p): ... this; reverse semantics. |
| (remove_predictions_associated_with_edge): Fix. |
| |
| 2020-08-10 Hongtao Liu <hongtao.liu@intel.com> |
| |
| PR target/96243 |
| * config/i386/i386-expand.c (ix86_expand_sse_cmp): Refine for |
| maskcmp. |
| (ix86_expand_mask_vec_cmp): Change prototype. |
| * config/i386/i386-protos.h (ix86_expand_mask_vec_cmp): Change prototype. |
| * config/i386/i386.c (ix86_print_operand): Remove operand |
| modifier 'I'. |
| * config/i386/sse.md |
| (*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Deleted. |
| (*<avx512>_cmp<mode>3<mask_scalar_merge_name>): Ditto. |
| (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Ditto. |
| (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>, |
| avx512f_maskcmp<mode>3): Ditto. |
| |
| 2020-08-09 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * expmed.c (init_expmed_one_conv): Restore all->reg's mode. |
| (init_expmed_one_mode): Set all->reg to desired mode. |
| |
| 2020-08-08 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR target/96530 |
| * config/rs6000/rs6000.c (rs6000_invalid_conversion): Use canonical |
| types for type comparisons. Refactor code to simplify it. |
| |
| 2020-08-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR fortran/93553 |
| * tree-nested.c (convert_nonlocal_omp_clauses): For |
| OMP_CLAUSE_REDUCTION, OMP_CLAUSE_LASTPRIVATE and OMP_CLAUSE_LINEAR |
| save info->new_local_var_chain around walks of the clause gimple |
| sequences and declare_vars if needed into the sequence. |
| |
| 2020-08-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96424 |
| * omp-expand.c: Include tree-eh.h. |
| (expand_omp_for_init_vars): Handle -fexceptions -fnon-call-exceptions |
| by forcing floating point comparison into a bool temporary. |
| |
| 2020-08-07 Marc Glisse <marc.glisse@inria.fr> |
| |
| * generic-match-head.c (optimize_vectors_before_lowering_p): New |
| function. |
| * gimple-match-head.c (optimize_vectors_before_lowering_p): |
| Likewise. |
| * match.pd ((v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Use it. |
| |
| 2020-08-07 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96514 |
| * tree-if-conv.c (if_convertible_bb_p): If the last stmt |
| is a call that is control-altering, fail. |
| |
| 2020-08-07 Jose E. Marchesi <jose.marchesi@oracle.com> |
| |
| * config/bpf/bpf.md: Remove trailing whitespaces. |
| * config/bpf/constraints.md: Likewise. |
| * config/bpf/predicates.md: Likewise. |
| |
| 2020-08-07 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.md (bswaphi2_reg): Add ISA 3.1 support. |
| (bswapsi2_reg): Add ISA 3.1 support. |
| (bswapdi2): Rename bswapdi2_xxbrd to bswapdi2_brd. |
| (bswapdi2_brd,bswapdi2_xxbrd): Rename. Add ISA 3.1 support. |
| |
| 2020-08-07 Alan Modra <amodra@gmail.com> |
| |
| PR target/96493 |
| * config/rs6000/predicates.md (current_file_function_operand): Don't |
| accept functions that differ in r2 usage. |
| |
| 2020-08-06 Hans-Peter Nilsson <hp@bitrange.com> |
| |
| * config/mmix/mmix.md (MM): New mode_iterator. |
| ("mov<mode>"): New expander to expand for all MM-modes. |
| ("*movqi_expanded", "*movhi_expanded", "*movsi_expanded") |
| ("*movsf_expanded", "*movdf_expanded"): Rename from the |
| corresponding mov<M> named pattern. Add to the condition that |
| either operand must be a register_operand. |
| ("*movdi_expanded"): Similar, but also allow STCO in the condition. |
| |
| 2020-08-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/96191 |
| * config/arm/arm.md (arm_stack_protect_test_insn): Zero out |
| operand 2 after use. |
| * config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise. |
| |
| 2020-08-06 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR target/96446 |
| * config/rs6000/mma.md (*movpxi): Add xxsetaccz generation. |
| Disable split for zero constant source operand. |
| (mma_xxsetaccz): Change to define_expand. Call gen_movpxi. |
| |
| 2020-08-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/96480 |
| * tree-ssa-reassoc.c (suitable_cond_bb): Add TEST_SWAPPED_P argument. |
| If TEST_BB ends in cond and has one edge to *OTHER_BB and another |
| through an empty bb to that block too, if PHI args don't match, retry |
| them through the other path from TEST_BB. |
| (maybe_optimize_range_tests): Adjust callers. Handle such LAST_BB |
| through inversion of the condition. |
| |
| 2020-08-06 Jose E. Marchesi <jose.marchesi@oracle.com> |
| |
| * config/bpf/bpf-helpers.h (KERNEL_HELPER): Define. |
| (KERNEL_VERSION): Remove. |
| * config/bpf/bpf-helpers.def: Delete. |
| * config/bpf/bpf.c (bpf_handle_fndecl_attribute): New function. |
| (bpf_attribute_table): Define. |
| (bpf_helper_names): Delete. |
| (bpf_helper_code): Likewise. |
| (enum bpf_builtins): Adjust to new helpers mechanism. |
| (bpf_output_call): Likewise. |
| (bpf_init_builtins): Likewise. |
| (bpf_init_builtins): Likewise. |
| * doc/extend.texi (BPF Function Attributes): New section. |
| (BPF Kernel Helpers): Delete section. |
| |
| 2020-08-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96491 |
| * tree-ssa-sink.c (sink_common_stores_to_bb): Avoid |
| sinking across abnormal edges. |
| |
| 2020-08-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96483 |
| * tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle |
| POLY_INT_CST. |
| |
| 2020-08-06 Richard Biener <rguenther@suse.de> |
| |
| * graphite-isl-ast-to-gimple.c (ivs_params): Use hash_map instead |
| of std::map. |
| (ivs_params_clear): Adjust. |
| (gcc_expression_from_isl_ast_expr_id): Likewise. |
| (graphite_create_new_loop): Likewise. |
| (add_parameters_to_ivs_params): Likewise. |
| |
| 2020-08-06 Roger Sayle <roger@nextmovesoftware.com> |
| Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (MAXMIN_IMODE): No longer needed. |
| (<maxmin><mode>3): Support SWI248 and general_operand for |
| second operand, when TARGET_CMOVE. |
| (<maxmin><mode>3_1 splitter): Optimize comparisons against |
| 0, 1 and -1 to use "test" instead of "cmp". |
| (*<maxmin>di3_doubleword): Likewise, allow general_operand |
| and enable on TARGET_CMOVE. |
| (peephole2): Convert clearing a register after a flag setting |
| instruction into an xor followed by the original flag setter. |
| |
| 2020-08-06 Gerald Pfeifer <gerald@pfeifer.com> |
| |
| * ipa-fnsummary.c (INCLUDE_VECTOR): Define. |
| Remove direct inclusion of <vector>. |
| |
| 2020-08-06 Kewen Lin <linkw@gcc.gnu.org> |
| |
| * config/rs6000/rs6000.c (rs6000_adjust_vect_cost_per_loop): New |
| function. |
| (rs6000_finish_cost): Call rs6000_adjust_vect_cost_per_loop. |
| * tree-vect-loop.c (vect_estimate_min_profitable_iters): Add cost |
| modeling for vector with length. |
| (vect_rgroup_iv_might_wrap_p): New function, factored out from... |
| * tree-vect-loop-manip.c (vect_set_loop_controls_directly): ...this. |
| Update function comment. |
| * tree-vect-stmts.c (vect_gen_len): Update function comment. |
| * tree-vectorizer.h (vect_rgroup_iv_might_wrap_p): New declare. |
| |
| 2020-08-06 Kewen Lin <linkw@linux.ibm.com> |
| |
| * tree-vectorizer.c (try_vectorize_loop_1): Skip the epilogue loops |
| for dbgcnt check. |
| |
| 2020-08-05 Marc Glisse <marc.glisse@inria.fr> |
| |
| PR tree-optimization/95906 |
| PR target/70314 |
| * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e), |
| (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): New transformations. |
| (op (c ? a : b)): Update to match the new transformations. |
| |
| 2020-08-05 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/96191 |
| * config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the |
| CC register directly, instead of a GPR. Replace the original GPR |
| destination with an extra scratch register. Zero out operand 3 |
| after use. |
| (stack_protect_test): Update accordingly. |
| |
| 2020-08-05 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>) |
| (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf) |
| (store_pair_sw_<SX:mode><SX2:mode>) |
| (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf) |
| (*load_pair_extendsidi2_aarch64) |
| (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand. |
| * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>) |
| (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>) |
| (vec_store_pair<VQ:mode><VQ2:mode>): Likewise. |
| |
| 2020-08-05 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-loop-im.c (invariantness_dom_walker): Remove. |
| (invariantness_dom_walker::before_dom_children): Move to ... |
| (compute_invariantness): ... this function. |
| (move_computations): Inline ... |
| (tree_ssa_lim): ... here, share RPO order and avoid some |
| cfun references. |
| (analyze_memory_references): Remove sorting of location |
| lists, instead assert they are sorted already when checking. |
| (prev_flag_edges): Remove. |
| (execute_sm_if_changed): Pass down and adjust prev edge state. |
| (execute_sm_exit): Likewise. |
| (hoist_memory_references): Likewise. Commit edge insertions |
| of each processed exit. |
| (store_motion_loop): Do not commit edge insertions on all |
| edges in the function. |
| (tree_ssa_lim_initialize): Do not call alloc_aux_for_edges. |
| (tree_ssa_lim_finalize): Do not call free_aux_for_edges. |
| |
| 2020-08-05 Richard Biener <rguenther@suse.de> |
| |
| * genmatch.c (fail_label): New global. |
| (expr::gen_transform): Branch to fail_label instead of |
| returning. Fix indent of call argument checking. |
| (dt_simplify::gen_1): Compute and emit fail_label, branch |
| to it instead of returning early. |
| |
| 2020-08-05 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-expand.c (expand_omp_for): Don't disallow combined non-rectangular |
| loops. |
| |
| 2020-08-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/96459 |
| * omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in |
| for host teams. |
| |
| 2020-08-05 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-expand.c (expand_omp_for_init_counts): Remember |
| first_inner_iterations, factor and n1o from the number of iterations |
| computation in *fd. |
| (expand_omp_for_init_vars): Use more efficient logical iteration number |
| to actual iterator values computation even for non-rectangular loops |
| where number of loop iterations could not be computed at compile time. |
| |
| 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_blendv, vec_permx): Add define. |
| * config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New |
| unspecs. |
| (VM3): New define_mode. |
| (VM3_char): New define_attr. |
| (xxblend_<mode> mode VM3): New define_insn. |
| (xxpermx): New define_expand. |
| (xxpermx_inst): New define_insn. |
| * config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI, |
| VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New |
| BU_P10V_3 definitions. |
| (XXBLEND): New BU_P10_OVERLOAD_3 definition. |
| (XXPERMX): New BU_P10_OVERLOAD_4 definition. |
| * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): |
| (P10_BUILTIN_VXXPERMX): Add if statement. |
| * config/rs6000/rs6000-call.c (P10_BUILTIN_VXXBLEND_V16QI, |
| P10_BUILTIN_VXXBLEND_V8HI, P10_BUILTIN_VXXBLEND_V4SI, |
| P10_BUILTIN_VXXBLEND_V2DI, P10_BUILTIN_VXXBLEND_V4SF, |
| P10_BUILTIN_VXXBLEND_V2DF, P10_BUILTIN_VXXPERMX): Define |
| overloaded arguments. |
| (rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx. |
| (builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type |
| variables, add case statement for P10_BUILTIN_VXXPERMX. |
| (builtin_function_type): Add case statements for |
| P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI, |
| P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI. |
| * doc/extend.texi: Add documentation for vec_blendv and vec_permx. |
| |
| 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins): |
| Add defines. |
| * config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID, |
| UNSPEC_XXSPLTI32DX): New. |
| (vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst, |
| vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn. |
| (vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si, |
| vxxsplti32dx_v4sf.): New define_expands. |
| * config/rs6000/predicates.md (u1bit_cint_operand, |
| s32bit_cint_operand, c32bit_cint_operand): New predicates. |
| * config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, |
| VXXSPLTID): New definitions. |
| (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_P10V_3 |
| definitions. |
| (XXSPLTIW, XXSPLTID): New definitions. |
| (XXSPLTI32DX): Add definitions. |
| * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XXSPLTIW, |
| P10_BUILTIN_VEC_XXSPLTID, P10_BUILTIN_VEC_XXSPLTI32DX): |
| New definitions. |
| * config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern |
| declaration. |
| * config/rs6000/rs6000.c (rs6000_constF32toI32): New function. |
| * doc/extend.texi: Add documentation for vec_splati, |
| vec_splatid, and vec_splati_ins. |
| |
| 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_sldb, vec_srdb): New defines. |
| * config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New. |
| (SLDB_lr): New attribute. |
| (VSHIFT_DBL_LR): New iterator. |
| (vs<SLDB_lr>db_<mode>): New define_insn. |
| * config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI, |
| VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, |
| VSRDB_V2DI): New BU_P10V_3 definitions. |
| (SLDB, SRDB): New BU_P10_OVERLOAD_3 definitions. |
| * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_SLDB, |
| P10_BUILTIN_VEC_SRDB): New definitions. |
| (rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi, |
| CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di, |
| CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si, |
| CODE_FOR_vsrdb_v2di]: Add clauses. |
| * doc/extend.texi: Add description for vec_sldb and vec_srdb. |
| |
| 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/altivec.h: Add define for vec_replace_elt and |
| vec_replace_unaligned. |
| * config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New |
| unspecs. |
| (REPLACE_ELT): New mode iterator. |
| (REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes. |
| (vreplace_un_<mode>, vreplace_elt_<mode>_inst): New. |
| * config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI, |
| VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI, |
| VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI, |
| VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI, |
| VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin |
| entries. |
| * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT, |
| P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions. |
| (rs6000_expand_quaternop_builtin): Add 3rd argument checks for |
| CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf, |
| CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf. |
| (builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI, |
| P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI, |
| P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases. |
| * doc/extend.texi: Add description for vec_replace_elt and |
| vec_replace_unaligned builtins. |
| |
| 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines. |
| * config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL, |
| VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, |
| VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, |
| VINSERTVPRHR, VINSERTVPRWR): New builtins. |
| (INSERTL, INSERTH): New builtins. |
| * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL, |
| P10_BUILTIN_VEC_INSERTH): New overloaded definitions. |
| (P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL, |
| P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL, |
| P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL, |
| P10_BUILTIN_VINSERTVPRWL): Add case entries. |
| * config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL, |
| UNSPEC_INSERTR. |
| (define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>, |
| vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2. |
| (define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>, |
| vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I. |
| * doc/extend.texi: Add documentation for vec_insertl, vec_inserth. |
| |
| 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR) |
| (vextractl<mode>, vextractr<mode>) |
| (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2) |
| (VI2): Move to ... |
| * config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR) |
| (vextractl<mode>, vextractr<mode>) |
| (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2) |
| (VI2): ..here. |
| * doc/extend.texi: Update documentation for vec_extractl. |
| Replace builtin name vec_extractr with vec_extracth. Update |
| description of vec_extracth. |
| |
| 2020-08-04 Jim Wilson <jimw@sifive.com> |
| |
| * doc/invoke.texi (AArch64 Options): Delete duplicate |
| -mstack-protector-guard docs. |
| |
| 2020-08-04 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart) |
| (umulhi3_highpart, umulsi3_highpart): New instructions. |
| |
| 2020-08-04 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete. |
| (R_AMDGPU_ABS32_LO): Delete. |
| (R_AMDGPU_ABS32_HI): Delete. |
| (R_AMDGPU_ABS64): Delete. |
| (R_AMDGPU_REL32): Delete. |
| (R_AMDGPU_REL64): Delete. |
| (R_AMDGPU_ABS32): Delete. |
| (R_AMDGPU_GOTPCREL): Delete. |
| (R_AMDGPU_GOTPCREL32_LO): Delete. |
| (R_AMDGPU_GOTPCREL32_HI): Delete. |
| (R_AMDGPU_REL32_LO): Delete. |
| (R_AMDGPU_REL32_HI): Delete. |
| (reserved): Delete. |
| (R_AMDGPU_RELATIVE64): Delete. |
| |
| 2020-08-04 Omar Tahir <omar.tahir@arm.com> |
| |
| * config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55. |
| |
| 2020-08-04 Hu Jiangping <hujiangping@cn.fujitsu.com> |
| |
| * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete |
| redundant extra_cost variable. |
| |
| 2020-08-04 Zhiheng Xie <xiezhiheng@huawei.com> |
| |
| * config/aarch64/aarch64-builtins.c (aarch64_call_properties): |
| Use FLOAT_MODE_P macro instead of enumerating all floating-point |
| modes and add global flag FLAG_AUTO_FP. |
| |
| 2020-08-04 Jakub Jelinek <jakub@redhat.com> |
| |
| * doc/extend.texi (symver): Add @cindex for symver function attribute. |
| |
| 2020-08-04 Marc Glisse <marc.glisse@inria.fr> |
| |
| PR tree-optimization/95433 |
| * match.pd (X * C1 == C2): New transformation. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-ssa-sprintf.c (get_int_range): Adjust for irange API. |
| (format_integer): Same. |
| (handle_printf_call): Same. |
| |
| 2020-08-04 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.md ("<expander>ti3"): New. |
| |
| 2020-08-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/88240 |
| * tree-ssa-sccvn.h (vn_reference_s::punned): New flag. |
| * tree-ssa-sccvn.c (vn_reference_insert): Initialize punned. |
| (vn_reference_insert_pieces): Likewise. |
| (visit_reference_op_call): Likewise. |
| (visit_reference_op_load): Track whether a ref was punned. |
| * tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist |
| insertion on punned floating point loads. |
| |
| 2020-08-04 Sudakshina Das <sudi.das@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case |
| for E_V4SImode. |
| (aarch64_gen_load_pair): Likewise. |
| (aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy. |
| (aarch64_expand_cpymem): Expand copy_limit to 256bits where |
| appropriate. |
| |
| 2020-08-04 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing |
| clobber. |
| * doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new |
| target supports option. |
| |
| 2020-08-04 Tom de Vries <tdevries@suse.de> |
| |
| PR target/96428 |
| * config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI. |
| |
| 2020-08-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/96426 |
| * tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT |
| call with GIMPLE_NOP if there is no lhs. |
| |
| 2020-08-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/96354 |
| * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG |
| argument. Return false instead of gcc_unreachable if it is true and |
| get_addr_base_and_unit_offset returns NULL. |
| (fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): |
| Call is_gimple_min_invariant dropped from previous patch. |
| |
| 2020-08-04 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-expand.c (expand_omp_for_init_counts): For triangular loops |
| compute number of iterations at runtime more efficiently. |
| (expand_omp_for_init_vars): Adjust immediate dominators. |
| (extract_omp_for_update_vars): Likewise. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.c (simplify_using_ranges::two_valued_val_range_p): |
| Use irange API. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.c (simplify_conversion_using_ranges): Convert to irange API. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.c (test_for_singularity): Use irange API. |
| (simplify_using_ranges::simplify_cond_using_ranges_1): Do not |
| special case VR_RANGE. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust |
| for irange API. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust |
| for irange API. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-ssanames.c (get_range_info): Use irange instead of value_range. |
| * tree-ssanames.h (get_range_info): Same. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * fold-const.c (expr_not_equal_to): Adjust for irange API. |
| |
| 2020-08-04 Aldy Hernandez <aldyh@redhat.com> |
| |
| * builtins.c (determine_block_size): Remove ad-hoc range canonicalization. |
| |
| 2020-08-04 Xionghu Luo <luoxhu@linux.ibm.com> |
| |
| PR rtl-optimization/71309 |
| * dse.c (find_shift_sequence): Use subreg of shifted from high part |
| register to avoid loading from address. |
| |
| 2020-08-03 Jonathan Wakely <jwakely@redhat.com> |
| |
| * doc/cpp.texi (Variadic Macros): Use the exact ... token in |
| code examples. |
| |
| 2020-08-03 Nathan Sidwell <nathan@acm.org> |
| |
| * doc/invoke.texi: Refer to c++20 |
| |
| 2020-08-03 Julian Brown <julian@codesourcery.com> |
| Thomas Schwinge <thomas@codesourcery.com> |
| |
| * gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET |
| without a preceding data-movement mapping. |
| |
| 2020-08-03 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before |
| use. |
| (DEF_MIN_OSX_VERSION): Only define if there's no existing |
| def. |
| |
| 2020-08-03 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.c (IN_TARGET_CODE): Remove. |
| (darwin_mergeable_constant_section): Handle poly-int machine modes. |
| (machopic_select_rtx_section): Likewise. |
| |
| 2020-08-03 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/96430 |
| * range-op.cc (operator_tests): Do not shift by 31 on targets with |
| integer's smaller than 32 bits. |
| |
| 2020-08-03 Martin Jambor <mjambor@suse.cz> |
| |
| * hsa-brig-format.h: Moved to brig/brigfrontend. |
| * hsa-brig.c: Removed. |
| * hsa-builtins.def: Likewise. |
| * hsa-common.c: Likewise. |
| * hsa-common.h: Likewise. |
| * hsa-dump.c: Likewise. |
| * hsa-gen.c: Likewise. |
| * hsa-regalloc.c: Likewise. |
| * ipa-hsa.c: Likewise. |
| * omp-grid.c: Likewise. |
| * omp-grid.h: Likewise. |
| * Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def. |
| (OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o, |
| hsa-dump.o, ipa-hsa.c and omp-grid.o. |
| (GTFILES): Removed hsa-common.c and omp-expand.c. |
| * builtins.def: Remove processing of hsa-builtins.def. |
| (DEF_HSA_BUILTIN): Remove. |
| * common.opt (flag_disable_hsa): Remove. |
| (-Whsa): Ignore. |
| * config.in (ENABLE_HSA): Removed. |
| * configure.ac: Removed handling configuration for hsa offloading. |
| (ENABLE_HSA): Removed. |
| * configure: Regenerated. |
| * doc/install.texi (--enable-offload-targets): Remove hsa from the |
| example. |
| (--with-hsa-runtime): Reword to reference any HSA run-time, not |
| specifically HSA offloading. |
| * doc/invoke.texi (Option Summary): Remove -Whsa. |
| (Warning Options): Likewise. |
| (Optimize Options): Remove hsa-gen-debug-stores. |
| * doc/passes.texi (Regular IPA passes): Remove section on IPA HSA |
| pass. |
| * gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case. |
| * gimple-pretty-print.c (dump_gimple_omp_for): Likewise. |
| (dump_gimple_omp_block): Likewise. |
| (pp_gimple_stmt_1): Likewise. |
| * gimple-walk.c (walk_gimple_stmt): Likewise. |
| * gimple.c (gimple_build_omp_grid_body): Removed function. |
| (gimple_copy): Remove GIMPLE_OMP_GRID_BODY case. |
| * gimple.def (GIMPLE_OMP_GRID_BODY): Removed. |
| * gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY, |
| OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY, |
| GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and |
| GF_OMP_TEAMS_GRID_PHONY. Renumbered GF_OMP_FOR_KIND_SIMD and |
| GF_OMP_TEAMS_HOST. |
| (gimple_build_omp_grid_body): Removed declaration. |
| (gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case. |
| (gimple_omp_for_grid_phony): Removed. |
| (gimple_omp_for_set_grid_phony): Likewise. |
| (gimple_omp_for_grid_intra_group): Likewise. |
| (gimple_omp_for_grid_intra_group): Likewise. |
| (gimple_omp_for_grid_group_iter): Likewise. |
| (gimple_omp_for_set_grid_group_iter): Likewise. |
| (gimple_omp_parallel_grid_phony): Likewise. |
| (gimple_omp_parallel_set_grid_phony): Likewise. |
| (gimple_omp_teams_grid_phony): Likewise. |
| (gimple_omp_teams_set_grid_phony): Likewise. |
| (CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case. |
| * lto-section-in.c (lto_section_name): Removed hsa. |
| * lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa. |
| * lto-wrapper.c (compile_images_for_offload_targets): Remove special |
| handling of hsa. |
| * omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h. |
| (parallel_needs_hsa_kernel_p): Removed. |
| (grid_launch_attributes_trees): Likewise. |
| (grid_launch_attributes_trees): Likewise. |
| (grid_create_kernel_launch_attr_types): Likewise. |
| (grid_insert_store_range_dim): Likewise. |
| (grid_get_kernel_launch_attributes): Likewise. |
| (get_target_arguments): Remove code passing HSA grid sizes. |
| (grid_expand_omp_for_loop): Remove. |
| (grid_arg_decl_map): Likewise. |
| (grid_remap_kernel_arg_accesses): Likewise. |
| (grid_expand_target_grid_body): Likewise. |
| (expand_omp): Remove call to grid_expand_target_grid_body. |
| (omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case. |
| * omp-general.c: Do not include hsa-common.h. |
| (omp_maybe_offloaded): Do not check for HSA offloading. |
| (omp_context_selector_matches): Likewise. |
| * omp-low.c: Do not include hsa-common.h and omp-grid.h. |
| (build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY. |
| (scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_. |
| (scan_omp_parallel): Remove handling of the phoney variant. |
| (check_omp_nesting_restrictions): Remove handling of |
| GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP. |
| (scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY. |
| (lower_omp_for_lastprivate): Remove handling of gridified loops. |
| (lower_omp_for): Remove phony loop handling. |
| (lower_omp_taskreg): Remove phony construct handling. |
| (lower_omp_teams): Likewise. |
| (lower_omp_grid_body): Removed. |
| (lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case. |
| (execute_lower_omp): Do not call omp_grid_gridify_all_targets. |
| * opts.c (common_handle_option): Do not handle hsa when processing |
| OPT_foffload_. |
| * params.opt (hsa-gen-debug-stores): Remove. |
| * passes.def: Remove pass_ipa_hsa and pass_gen_hsail. |
| * timevar.def: Remove TV_IPA_HSA. |
| * toplev.c: Do not include hsa-common.h. |
| (compile_file): Do not call hsa_output_brig. |
| * tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_. |
| (tree_omp_clause): Remove union field dimension. |
| * tree-nested.c (convert_nonlocal_omp_clauses): Remove the |
| OMP_CLAUSE__GRIDDIM_ case. |
| (convert_local_omp_clauses): Likewise. |
| * tree-pass.h (make_pass_gen_hsail): Remove declaration. |
| (make_pass_ipa_hsa): Likewise. |
| * tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY |
| case. |
| * tree.c (omp_clause_num_ops): Remove the element corresponding to |
| OMP_CLAUSE__GRIDDIM_. |
| (omp_clause_code_name): Likewise. |
| (walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case. |
| * tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove. |
| (OMP_CLAUSE__GRIDDIM__SIZE): Likewise. |
| (OMP_CLAUSE__GRIDDIM__GROUP): Likewise. |
| |
| 2020-08-03 Bu Le <bule1@huawei.com> |
| |
| * config/aarch64/aarch64-sve.md (sub<mode>3): Add support for |
| unpacked vectors. |
| |
| 2020-08-03 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option. |
| |
| 2020-08-03 Yunde Zhong <zhongyunde@huawei.com> |
| |
| PR rtl-optimization/95696 |
| * regrename.c (regrename_analyze): New param include_all_block_p |
| with default value TRUE. If set to false, avoid disrupting SMS |
| schedule. |
| * regrename.h (regrename_analyze): Adjust prototype. |
| |
| 2020-08-03 Wei Wentao <weiwt.fnst@cn.fujitsu.com> |
| |
| * doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo. |
| * doc/tm.texi: Regenerate. |
| |
| 2020-08-03 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/invoke.texi: Add missing comma after octeontx2f95mm entry. |
| |
| 2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com> |
| |
| * config/aarch64/aarch64-cores.def (a64fx): New core. |
| * config/aarch64/aarch64-tune.md: Regenerated. |
| * config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New. |
| * doc/invoke.texi: Add a64fx to the list. |
| |
| 2020-08-03 Roger Sayle <roger@nextmovesoftware.com> |
| |
| PR rtl-optimization/61494 |
| * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't |
| simplify x - 0.0 with -fsignaling-nans. |
| |
| 2020-08-03 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * genmatch.c (decision_tree::gen): Emit stub functions for |
| tree code operand counts that have no simplifications. |
| (main): Correct comment typo. |
| |
| 2020-08-03 Jonathan Wakely <jwakely@redhat.com> |
| |
| * gimple-ssa-sprintf.c: Fix typos in comments. |
| |
| 2020-08-03 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/aarch64/driver-aarch64.c (readline): Check return value fgets. |
| |
| 2020-08-03 Richard Biener <rguenther@suse.de> |
| |
| * doc/match-and-simplify.texi: Amend accordingly. |
| |
| 2020-08-03 Richard Biener <rguenther@suse.de> |
| |
| * genmatch.c (parser::gimple): New. |
| (parser::parser): Initialize gimple flag member. |
| (parser::parse_expr): Error on ! operator modifier when |
| not targeting GIMPLE. |
| (main): Pass down gimple flag to parser ctor. |
| |
| 2020-08-03 Aldy Hernandez <aldyh@redhat.com> |
| |
| * Makefile.in (GTFILES): Move value-range.h up. |
| * gengtype-lex.l: Set yylval to handle GTY markers on templates. |
| * ipa-cp.c (initialize_node_lattices): Call value_range |
| constructor. |
| (ipcp_propagate_stage): Use in-place new so value_range construct |
| is called. |
| * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std |
| vec instead of GCC's vec<>. |
| (evaluate_properties_for_edge): Adjust for std vec. |
| (ipa_fn_summary_t::duplicate): Same. |
| (estimate_ipcp_clone_size_and_time): Same. |
| * ipa-prop.c (ipa_get_value_range): Use in-place new for |
| value_range. |
| * ipa-prop.h (struct GTY): Remove class keyword for m_vr. |
| * range-op.cc (empty_range_check): Rename to... |
| (empty_range_varying): ...this and adjust for varying. |
| (undefined_shift_range_check): Adjust for irange. |
| (range_operator::wi_fold): Same. |
| (range_operator::fold_range): Adjust for irange. Special case |
| single pairs for performance. |
| (range_operator::op1_range): Adjust for irange. |
| (range_operator::op2_range): Same. |
| (value_range_from_overflowed_bounds): Same. |
| (value_range_with_overflow): Same. |
| (create_possibly_reversed_range): Same. |
| (range_true): Same. |
| (range_false): Same. |
| (range_true_and_false): Same. |
| (get_bool_state): Adjust for irange and tweak for performance. |
| (operator_equal::fold_range): Adjust for irange. |
| (operator_equal::op1_range): Same. |
| (operator_equal::op2_range): Same. |
| (operator_not_equal::fold_range): Same. |
| (operator_not_equal::op1_range): Same. |
| (operator_not_equal::op2_range): Same. |
| (build_lt): Same. |
| (build_le): Same. |
| (build_gt): Same. |
| (build_ge): Same. |
| (operator_lt::fold_range): Same. |
| (operator_lt::op1_range): Same. |
| (operator_lt::op2_range): Same. |
| (operator_le::fold_range): Same. |
| (operator_le::op1_range): Same. |
| (operator_le::op2_range): Same. |
| (operator_gt::fold_range): Same. |
| (operator_gt::op1_range): Same. |
| (operator_gt::op2_range): Same. |
| (operator_ge::fold_range): Same. |
| (operator_ge::op1_range): Same. |
| (operator_ge::op2_range): Same. |
| (operator_plus::wi_fold): Same. |
| (operator_plus::op1_range): Same. |
| (operator_plus::op2_range): Same. |
| (operator_minus::wi_fold): Same. |
| (operator_minus::op1_range): Same. |
| (operator_minus::op2_range): Same. |
| (operator_min::wi_fold): Same. |
| (operator_max::wi_fold): Same. |
| (cross_product_operator::wi_cross_product): Same. |
| (operator_mult::op1_range): New. |
| (operator_mult::op2_range): New. |
| (operator_mult::wi_fold): Adjust for irange. |
| (operator_div::wi_fold): Same. |
| (operator_exact_divide::op1_range): Same. |
| (operator_lshift::fold_range): Same. |
| (operator_lshift::wi_fold): Same. |
| (operator_lshift::op1_range): New. |
| (operator_rshift::op1_range): New. |
| (operator_rshift::fold_range): Adjust for irange. |
| (operator_rshift::wi_fold): Same. |
| (operator_cast::truncating_cast_p): Abstract out from |
| operator_cast::fold_range. |
| (operator_cast::fold_range): Adjust for irange and tweak for |
| performance. |
| (operator_cast::inside_domain_p): Abstract out from fold_range. |
| (operator_cast::fold_pair): Same. |
| (operator_cast::op1_range): Use abstracted methods above. Adjust |
| for irange and tweak for performance. |
| (operator_logical_and::fold_range): Adjust for irange. |
| (operator_logical_and::op1_range): Same. |
| (operator_logical_and::op2_range): Same. |
| (unsigned_singleton_p): New. |
| (operator_bitwise_and::remove_impossible_ranges): New. |
| (operator_bitwise_and::fold_range): New. |
| (wi_optimize_and_or): Adjust for irange. |
| (operator_bitwise_and::wi_fold): Same. |
| (set_nonzero_range_from_mask): New. |
| (operator_bitwise_and::simple_op1_range_solver): New. |
| (operator_bitwise_and::op1_range): Adjust for irange. |
| (operator_bitwise_and::op2_range): Same. |
| (operator_logical_or::fold_range): Same. |
| (operator_logical_or::op1_range): Same. |
| (operator_logical_or::op2_range): Same. |
| (operator_bitwise_or::wi_fold): Same. |
| (operator_bitwise_or::op1_range): Same. |
| (operator_bitwise_or::op2_range): Same. |
| (operator_bitwise_xor::wi_fold): Same. |
| (operator_bitwise_xor::op1_range): New. |
| (operator_bitwise_xor::op2_range): New. |
| (operator_trunc_mod::wi_fold): Adjust for irange. |
| (operator_logical_not::fold_range): Same. |
| (operator_logical_not::op1_range): Same. |
| (operator_bitwise_not::fold_range): Same. |
| (operator_bitwise_not::op1_range): Same. |
| (operator_cst::fold_range): Same. |
| (operator_identity::fold_range): Same. |
| (operator_identity::op1_range): Same. |
| (class operator_unknown): New. |
| (operator_unknown::fold_range): New. |
| (class operator_abs): Adjust for irange. |
| (operator_abs::wi_fold): Same. |
| (operator_abs::op1_range): Same. |
| (operator_absu::wi_fold): Same. |
| (class operator_negate): Same. |
| (operator_negate::fold_range): Same. |
| (operator_negate::op1_range): Same. |
| (operator_addr_expr::fold_range): Same. |
| (operator_addr_expr::op1_range): Same. |
| (pointer_plus_operator::wi_fold): Same. |
| (pointer_min_max_operator::wi_fold): Same. |
| (pointer_and_operator::wi_fold): Same. |
| (pointer_or_operator::op1_range): New. |
| (pointer_or_operator::op2_range): New. |
| (pointer_or_operator::wi_fold): Adjust for irange. |
| (integral_table::integral_table): Add entries for IMAGPART_EXPR |
| and POINTER_DIFF_EXPR. |
| (range_cast): Adjust for irange. |
| (build_range3): New. |
| (range3_tests): New. |
| (widest_irange_tests): New. |
| (multi_precision_range_tests): New. |
| (operator_tests): New. |
| (range_tests): New. |
| * range-op.h (class range_operator): Adjust for irange. |
| (range_cast): Same. |
| * tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and |
| tweak for performance. |
| (range_fold_binary_expr): Same. |
| (masked_increment): Change to extern. |
| * tree-vrp.h (masked_increment): New. |
| * tree.c (cache_wide_int_in_type_cache): New function abstracted |
| out from wide_int_to_tree_1. |
| (wide_int_to_tree_1): Cache 0, 1, and MAX for pointers. |
| * value-range-equiv.cc (value_range_equiv::deep_copy): Use kind |
| method. |
| (value_range_equiv::move): Same. |
| (value_range_equiv::check): Adjust for irange. |
| (value_range_equiv::intersect): Same. |
| (value_range_equiv::union_): Same. |
| (value_range_equiv::dump): Same. |
| * value-range.cc (irange::operator=): Same. |
| (irange::maybe_anti_range): New. |
| (irange::copy_legacy_range): New. |
| (irange::set_undefined): Adjust for irange. |
| (irange::swap_out_of_order_endpoints): Abstract out from set(). |
| (irange::set_varying): Adjust for irange. |
| (irange::irange_set): New. |
| (irange::irange_set_anti_range): New. |
| (irange::set): Adjust for irange. |
| (value_range::set_nonzero): Move to header file. |
| (value_range::set_zero): Move to header file. |
| (value_range::check): Rename to... |
| (irange::verify_range): ...this. |
| (value_range::num_pairs): Rename to... |
| (irange::legacy_num_pairs): ...this, and adjust for irange. |
| (value_range::lower_bound): Rename to... |
| (irange::legacy_lower_bound): ...this, and adjust for irange. |
| (value_range::upper_bound): Rename to... |
| (irange::legacy_upper_bound): ...this, and adjust for irange. |
| (value_range::equal_p): Rename to... |
| (irange::legacy_equal_p): ...this. |
| (value_range::operator==): Move to header file. |
| (irange::equal_p): New. |
| (irange::symbolic_p): Adjust for irange. |
| (irange::constant_p): Same. |
| (irange::singleton_p): Same. |
| (irange::value_inside_range): Same. |
| (irange::may_contain_p): Same. |
| (irange::contains_p): Same. |
| (irange::normalize_addresses): Same. |
| (irange::normalize_symbolics): Same. |
| (irange::legacy_intersect): Same. |
| (irange::legacy_union): Same. |
| (irange::union_): Same. |
| (irange::intersect): Same. |
| (irange::irange_union): New. |
| (irange::irange_intersect): New. |
| (subtract_one): New. |
| (irange::invert): Adjust for irange. |
| (dump_bound_with_infinite_markers): New. |
| (irange::dump): Adjust for irange. |
| (debug): Add irange versions. |
| (range_has_numeric_bounds_p): Adjust for irange. |
| (vrp_val_max): Move to header file. |
| (vrp_val_min): Move to header file. |
| (DEFINE_INT_RANGE_GC_STUBS): New. |
| (DEFINE_INT_RANGE_INSTANCE): New. |
| * value-range.h (class irange): New. |
| (class int_range): New. |
| (class value_range): Rename to a instantiation of int_range. |
| (irange::legacy_mode_p): New. |
| (value_range::value_range): Remove. |
| (irange::kind): New. |
| (irange::num_pairs): Adjust for irange. |
| (irange::type): Adjust for irange. |
| (irange::tree_lower_bound): New. |
| (irange::tree_upper_bound): New. |
| (irange::type): Adjust for irange. |
| (irange::min): Same. |
| (irange::max): Same. |
| (irange::varying_p): Same. |
| (irange::undefined_p): Same. |
| (irange::zero_p): Same. |
| (irange::nonzero_p): Same. |
| (irange::supports_type_p): Same. |
| (range_includes_zero_p): Same. |
| (gt_ggc_mx): New. |
| (gt_pch_nx): New. |
| (irange::irange): New. |
| (int_range::int_range): New. |
| (int_range::operator=): New. |
| (irange::set): Moved from value-range.cc and adjusted for irange. |
| (irange::set_undefined): Same. |
| (irange::set_varying): Same. |
| (irange::operator==): Same. |
| (irange::lower_bound): Same. |
| (irange::upper_bound): Same. |
| (irange::union_): Same. |
| (irange::intersect): Same. |
| (irange::set_nonzero): Same. |
| (irange::set_zero): Same. |
| (irange::normalize_min_max): New. |
| (vrp_val_max): Move from value-range.cc. |
| (vrp_val_min): Same. |
| * vr-values.c (vr_values::get_lattice_entry): Call value_range |
| constructor. |
| |
| 2020-08-02 Sergei Trofimovich <siarheit@google.com> |
| |
| PR bootstrap/96404 |
| * var-tracking.c (vt_find_locations): Fully initialize |
| all 'in_pending' bits. |
| |
| 2020-08-01 Jan Hubicka <jh@suse.cz> |
| |
| * symtab.c (symtab_node::verify_base): Verify order. |
| (symtab_node::verify_symtab_nodes): Verify order. |
| |
| 2020-08-01 Jan Hubicka <jh@suse.cz> |
| |
| * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%. |
| |
| 2020-08-01 Jojo R <jiejie_rong@c-sky.com> |
| |
| * config/csky/csky_opts.h (float_abi_type): New. |
| * config/csky/csky.h (TARGET_SOFT_FLOAT): New. |
| (TARGET_HARD_FLOAT): New. |
| (TARGET_HARD_FLOAT_ABI): New. |
| (OPTION_DEFAULT_SPECS): Use mfloat-abi. |
| * config/csky/csky.opt (mfloat-abi): New. |
| * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=. |
| |
| 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com> |
| |
| * config/csky/t-csky-linux: Delete big endian CPUs' multilib. |
| |
| 2020-07-31 Roger Sayle <roger@nextmovesoftware.com> |
| Tom de Vries <tdevries@suse.de> |
| |
| PR target/90928 |
| * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement. |
| (TARGET_TRULY_NOOP_TRUNCATION): Define. |
| |
| 2020-07-31 Richard Biener <rguenther@suse.de> |
| |
| PR debug/96383 |
| * langhooks-def.h (lhd_finalize_early_debug): Declare. |
| (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define. |
| (LANG_HOOKS_INITIALIZER): Amend. |
| * langhooks.c: Include cgraph.h and debug.h. |
| (lhd_finalize_early_debug): Default implementation from |
| former code in finalize_compilation_unit. |
| * langhooks.h (lang_hooks::finalize_early_debug): Add. |
| * cgraphunit.c (symbol_table::finalize_compilation_unit): |
| Call the finalize_early_debug langhook. |
| |
| 2020-07-31 Richard Biener <rguenther@suse.de> |
| |
| * genmatch.c (expr::force_leaf): Add and initialize. |
| (expr::gen_transform): Honor force_leaf by passing |
| NULL as sequence argument to maybe_push_res_to_seq. |
| (parser::parse_expr): Allow ! marker on result expression |
| operations. |
| * doc/match-and-simplify.texi: Amend. |
| |
| 2020-07-31 Kewen Lin <linkw@linux.ibm.com> |
| |
| * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch |
| taken costs for prologue and epilogue if they don't exist. |
| (vect_estimate_min_profitable_iters): Likewise. |
| |
| 2020-07-31 Martin Liska <mliska@suse.cz> |
| |
| * cgraph.h: Remove leading empty lines. |
| * cgraphunit.c (enum cgraph_order_sort_kind): Remove |
| ORDER_UNDEFINED. |
| (struct cgraph_order_sort): Add constructors. |
| (cgraph_order_sort::process): New. |
| (cgraph_order_cmp): New. |
| (output_in_order): Simplify and push nodes to vector. |
| |
| 2020-07-31 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/96369 |
| * fold-const.c (fold_range_test): Special-case constant |
| LHS for short-circuiting operations. |
| |
| 2020-07-31 Martin Liska <mliska@suse.cz> |
| |
| * gcov-io.h (GCOV_PREALLOCATED_KVP): New. |
| |
| 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com> |
| |
| * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin): |
| Add new argument ATTRS. |
| (aarch64_call_properties): New function. |
| (aarch64_modifies_global_state_p): Likewise. |
| (aarch64_reads_global_state_p): Likewise. |
| (aarch64_could_trap_p): Likewise. |
| (aarch64_add_attribute): Likewise. |
| (aarch64_get_attributes): Likewise. |
| (aarch64_init_simd_builtins): Add attributes for each built-in function. |
| |
| 2020-07-31 Richard Biener <rguenther@suse.de> |
| |
| PR debug/78288 |
| * var-tracking.c (vt_find_locations): Use |
| rev_post_order_and_mark_dfs_back_seme and separately iterate |
| over toplevel SCCs. |
| |
| 2020-07-31 Richard Biener <rguenther@suse.de> |
| |
| * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust |
| prototype. |
| * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data. |
| (tag_header): New helper. |
| (cmp_edge_dest_pre): Likewise. |
| (rev_post_order_and_mark_dfs_back_seme): Compute SCCs, |
| find SCC exits and perform a DFS walk with extra edges to |
| compute a RPO with adjacent SCC members when requesting an |
| iteration optimized order and populate the toplevel SCC array. |
| * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation |
| of max_rpo and fill it in from SCC extent info instead. |
| |
| 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define. |
| (vec_test_lsbb_all_zeros): New define. |
| * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in |
| handling macro. |
| (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines. |
| (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads. |
| * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS, |
| P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries. |
| * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec. |
| * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define. |
| (xvtlsbbo, xvtlsbbz): New instruction expands. |
| |
| 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com> |
| |
| * config/riscv/riscv-opts.h (stack_protector_guard): New enum. |
| * config/riscv/riscv.c (riscv_option_override): Handle |
| the new options. |
| * config/riscv/riscv.md (stack_protect_set): New pattern to handle |
| flexible stack protector guard settings. |
| (stack_protect_set_<mode>): Ditto. |
| (stack_protect_test): Ditto. |
| (stack_protect_test_<mode>): Ditto. |
| * config/riscv/riscv.opt (mstack-protector-guard=, |
| mstack-protector-guard-reg=, mstack-protector-guard-offset=): New |
| options. |
| * doc/invoke.texi (Option Summary) [RISC-V Options]: |
| Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and |
| -mstack-protector-guard-offset=. |
| (RISC-V Options): Ditto. |
| |
| 2020-07-30 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR bootstrap/96202 |
| * configure: Regenerated. |
| |
| 2020-07-30 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96370 |
| * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation |
| code parameter and use it instead of picking it up from |
| the stmt that is being rewritten. |
| (reassociate_bb): Pass down the operation code. |
| |
| 2020-07-30 Roger Sayle <roger@nextmovesoftware.com> |
| Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate. |
| (VECELEM): New mode attribute for a vector's uppercase element mode. |
| (Vecelem): New mode attribute for a vector's lowercase element mode. |
| (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2) |
| (*vec_set<mode>_3): New instructions. |
| (vec_set<mode>): New expander to generate one of the above insns. |
| (vec_extract<mode><Vecelem>): New instruction. |
| |
| 2020-07-30 Martin Liska <mliska@suse.cz> |
| |
| PR target/95435 |
| * config/i386/x86-tune-costs.h: Use libcall for large sizes for |
| -m32. Start using libcall from 128+ bytes. |
| |
| 2020-07-30 Martin Liska <mliska@suse.cz> |
| |
| * config/i386/x86-tune-costs.h: Change code formatting. |
| |
| 2020-07-29 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * config/nvptx/nvptx.md (recip<mode>2): New instruction. |
| |
| 2020-07-29 Fangrui Song <maskray@google.com> |
| |
| PR debug/95096 |
| * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g. |
| * doc/invoke.texi (-gsplit-dwarf): Update documentation. |
| |
| 2020-07-29 Joe Ramsay <joe.ramsay@arm.com> |
| |
| * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback): |
| Declare prototype. |
| (arm_mve_mode_and_operands_type_check): Declare prototype. |
| * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use |
| _arm_coproc_mem_operand. |
| (arm_coproc_mem_operand_wb): New function to cover full, limited |
| and no writeback. |
| (arm_coproc_mem_operand_no_writeback): New constraint for memory |
| operand with no writeback. |
| (arm_print_operand): Extend 'E' specifier for memory operand |
| that does not support writeback. |
| (arm_mve_mode_and_operands_type_check): New constraint check for |
| MVE memory operands. |
| * config/arm/constraints.md: Add Uj constraint for VFP vldr.16 |
| and vstr.16. |
| * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for |
| vldr.16. |
| (*mov_store_vfp_hf16): New pattern for vstr.16. |
| (*mov<mode>_vfp_<mode>16): Remove MVE moves. |
| |
| 2020-07-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96349 |
| * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the |
| condition runs into a loop PHI with an abnormal entry value give up. |
| |
| 2020-07-29 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.c (vectorize_loops): Reset the SCEV |
| cache if we removed any SIMD UID SSA defs. |
| * gimple-loop-interchange.cc (pass_linterchange::execute): |
| Reset the scev cache if we interchanged a loop. |
| |
| 2020-07-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95679 |
| * tree-ssa-propagate.h |
| (substitute_and_fold_engine::propagate_into_phi_args): Return |
| whether anything changed. |
| * tree-ssa-propagate.c |
| (substitute_and_fold_engine::propagate_into_phi_args): Likewise. |
| (substitute_and_fold_dom_walker::before_dom_children): Update |
| something_changed. |
| |
| 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): |
| Ensure that loop variable npeel_tmp advances in each iteration. |
| |
| 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com> |
| |
| * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1. |
| |
| 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com> |
| |
| * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to |
| default_elf_asm_output_external. |
| |
| 2020-07-28 Sergei Trofimovich <siarheit@google.com> |
| |
| PR ipa/96291 |
| * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider |
| unoptimized callers as undead. |
| |
| 2020-07-28 Roger Sayle <roger@nextmovesoftware.com> |
| Richard Biener <rguenther@suse.de> |
| |
| * match.pd (popcount(x)&1 -> parity(x)): New simplification. |
| (parity(~x) -> parity(x)): New simplification. |
| (parity(x)^parity(y) -> parity(x^y)): New simplification. |
| (parity(x&1) -> x&1): New simplification. |
| (popcount(x) -> x>>C): New simplification. |
| |
| 2020-07-28 Roger Sayle <roger@nextmovesoftware.com> |
| Tom de Vries <tdevries@suse.de> |
| |
| * config/nvptx/nvptx.md (extendqihi2): New instruction. |
| (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode. |
| |
| 2020-07-28 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/96335 |
| * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments, |
| instead of trying to rediscover them in the body. |
| (initialize_argument_information): Adjust caller. |
| |
| 2020-07-28 Kewen Lin <linkw@linux.ibm.com> |
| |
| * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code |
| to determine peel_iters_epilogue to... |
| (vect_get_peel_iters_epilogue): ...this new function. |
| (vect_estimate_min_profitable_iters): Refactor cost calculation on |
| peel_iters_prologue and peel_iters_epilogue. |
| |
| 2020-07-27 Martin Sebor <msebor@redhat.com> |
| |
| PR tree-optimization/84079 |
| * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr): |
| Only allow just-past-the-end references for the most significant |
| array bound. |
| |
| 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com> |
| |
| PR driver/96247 |
| * opts.c (check_alignment_argument): Set the -falign-Name |
| on/off flag on and set the -falign-Name string value null, |
| when the command-line specified argument is zero. |
| |
| 2020-07-27 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/96058 |
| * expr.c (string_constant): Build string_constant only |
| for a type that has same precision as char_type_node |
| and is an integral type. |
| |
| 2020-07-27 Richard Biener <rguenther@suse.de> |
| |
| * var-tracking.c (variable_tracking_main_1): Remove call |
| to mark_dfs_back_edges. |
| |
| 2020-07-27 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/96128 |
| * tree-vect-generic.c (expand_vector_comparison): Do not expand |
| vector comparison with VEC_COND_EXPR. |
| |
| 2020-07-27 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR bootstrap/96203 |
| * common.opt: Add -fcf-protection=check. |
| * flag-types.h (cf_protection_level): Add CF_CHECK. |
| * lto-wrapper.c (merge_and_complain): Issue an error for |
| mismatching -fcf-protection values with -fcf-protection=check. |
| Otherwise, merge -fcf-protection values. |
| * doc/invoke.texi: Document -fcf-protection=check. |
| |
| 2020-07-27 Martin Liska <mliska@suse.cz> |
| |
| PR lto/45375 |
| * symbol-summary.h: Call vec_safe_reserve before grow is called |
| in order to grow to a reasonable size. |
| * vec.h (vec_safe_reserve): Add missing function for vl_ptr |
| type. |
| |
| 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com> |
| |
| * configure.ac (out-of-tree linker .hidden support): Don't turn off |
| for mmix-knuth-mmixware. |
| * configure: Regenerate. |
| |
| 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Set the default value for -mblock-ops-unaligned-vsx. |
| * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx. |
| * doc/invoke.texi: Document -mblock-ops-unaligned-vsx. |
| |
| 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com> |
| |
| * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default |
| with default_asm_output_ident_directive. |
| |
| 2020-07-25 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function. |
| (TARGET_SCALAR_MODE_SUPPORTED_P): New define. |
| |
| 2020-07-24 David Edelsohn <dje.gcc@gmail.com> |
| Clement Chigot <clement.chigot@atos.net> |
| |
| * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for |
| cpu_is_64bit. |
| * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option. |
| (ASM_SPEC32): New. |
| (ASM_SPEC64): New. |
| (ASM_CPU_SPEC): Remove vsx and altivec options. |
| (CPP_SPEC_COMMON): Rename from CPP_SPEC. |
| (CPP_SPEC32): New. |
| (CPP_SPEC64): New. |
| (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON.. |
| (TARGET_DEFAULT): Use 64 bit mask if BIARCH. |
| (LIB_SPEC_COMMON): Rename from LIB_SPEC. |
| (LIB_SPEC32): New. |
| (LIB_SPEC64): New. |
| (LINK_SPEC_COMMON): Rename from LINK_SPEC. |
| (LINK_SPEC32): New. |
| (LINK_SPEC64): New. |
| (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase. |
| (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P. |
| (CPP_SPEC): Same. |
| (CPLUSPLUS_CPP_SPEC): Same. |
| (LIB_SPEC): Same. |
| (LINK_SPEC): Same. |
| (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs. |
| * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH. |
| * config/rs6000/defaultaix64.h: Delete. |
| |
| 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000.opt: Delete -mpower10. |
| |
| 2020-07-24 Alexandre Oliva <oliva@adacore.com> |
| |
| * config/i386/intelmic-mkoffload.c |
| (generate_target_descr_file): Use dumppfx for save_temps |
| files. Pass -dumpbase et al down to the compiler. |
| (generate_target_offloadend_file): Likewise. |
| (generate_host_descr_file): Likewise. |
| (prepare_target_image): Likewise. Move out_obj_filename |
| setting... |
| (main): ... here. Detect -dumpbase, set dumppfx too. |
| |
| 2020-07-24 Alexandre Oliva <oliva@adacore.com> |
| |
| PR driver/96230 |
| * gcc.c (process_command): Adjust and document conditions to |
| reset dumpbase_ext. |
| |
| 2020-07-24 Matthias Klose <doko@ubuntu.com> |
| |
| * config/aarch64/aarch64.c (+aarch64_offload_options, |
| TARGET_OFFLOAD_OPTIONS): New. |
| |
| 2020-07-24 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95750 |
| * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os. |
| |
| 2020-07-23 Roger Sayle <roger@nextmovesoftware.com> |
| |
| PR rtl-optimization/96298 |
| * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't |
| distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b. |
| |
| 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com> |
| |
| PR gcov-profile/96267 |
| * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL. |
| |
| 2020-07-23 Kewen Lin <linkw@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ... |
| (rs6000_adjust_vect_cost_per_stmt): ... here. |
| (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to |
| rs6000_adjust_vect_cost_per_stmt. |
| |
| 2020-07-23 Kewen Lin <linkw@linux.ibm.com> |
| |
| * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle |
| IFN_LEN_LOAD and IFN_LEN_STORE. |
| (get_alias_ptr_type_for_ptr_address): Likewise. |
| |
| 2020-07-23 Kito Cheng <kito.cheng@sifive.com> |
| |
| PR target/96260 |
| * asan.c (asan_shadow_offset_set_p): New. |
| * asan.h (asan_shadow_offset_set_p): Ditto. |
| * toplev.c (process_options): Allow -fsanitize=kernel-address |
| even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when |
| asan stack protection is enabled. |
| |
| 2020-07-22 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR target/96236 |
| * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle |
| little-endian memory ordering. |
| |
| 2020-07-22 Nathan Sidwell <nathan@acm.org> |
| |
| * dumpfile.c (parse_dump_option): Deal with filenames |
| containing '-' |
| |
| 2020-07-22 Nathan Sidwell <nathan@acm.org> |
| |
| * incpath.c (add_path): Avoid multiple strlen calls. |
| |
| 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag |
| is not NULL_RTX before use. |
| |
| 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * expr.c (convert_modes): Allow a constant integer to be converted to |
| any scalar int mode. |
| |
| 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| |
| * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector |
| V2SI, V2SF, V2DI, V2DF load pair and store pair modes. |
| * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp): |
| Change mode parameter to machine_mode. |
| (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to |
| machine_mode. |
| * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp): |
| Change mode parameter to machine_mode. |
| (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode. |
| * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors. |
| |
| 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com> |
| |
| * doc/languages.texi: Fix “then”/“than” typo. |
| |
| 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com> |
| |
| PR target/95237 |
| * config/i386/i386-protos.h (ix86_local_alignment): Add |
| another function parameter may_lower alignment. Default is |
| false. |
| * config/i386/i386.c (ix86_lower_local_decl_alignment): New |
| function. |
| (ix86_local_alignment): Amend ix86_local_alignment to accept |
| another parameter may_lower. If may_lower is true, new align |
| may be lower than incoming alignment. If may_lower is false, |
| new align will be greater or equal to incoming alignment. |
| (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define. |
| * doc/tm.texi: Regenerate. |
| * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New |
| hook. |
| * target.def (lower_local_decl_alignment): New hook. |
| |
| 2020-07-21 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95750 |
| * config/i386/sync.md (mfence_sse2): Enable for |
| TARGET_64BIT and TARGET_SSE2. |
| (mfence_nosse): Always enable. |
| |
| 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps): |
| Remove. |
| * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise. |
| * config/msp430/msp430.md (cbranchhi4_real): Remove special case for |
| msp430_do_not_relax_short_jumps. |
| |
| 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.md: New "extendqipsi2" define_insn. |
| |
| 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and |
| above. |
| |
| 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com> |
| |
| PR rtl-optimization/89310 |
| * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split. |
| |
| 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com> |
| |
| * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total |
| allocated size and set current_function_static_stack_size, if |
| flag_stack_usage_info. |
| |
| 2020-07-20 Sergei Trofimovich <siarheit@google.com> |
| |
| PR target/96190 |
| * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC |
| to get crtendS.o for !no-pie mode. |
| * config/sparc/linux64.h (ENDFILE_SPEC): Ditto. |
| |
| 2020-07-20 Yang Yang <yangyang305@huawei.com> |
| |
| * tree-vect-stmts.c (vectorizable_simd_clone_call): Add |
| VIEW_CONVERT_EXPRs if the arguments types and return type |
| of simd clone function are distinct with the vectype of stmt. |
| |
| 2020-07-20 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95750 |
| * config/i386/i386.h (TARGET_AVOID_MFENCE): |
| Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE. |
| * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE. |
| (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack |
| referred memory in word_mode. |
| (mem_thread_fence): Do not generate mfence_sse2 pattern when |
| TARGET_AVOID_MFENCE is true. |
| (atomic_store<mode>): Update for rename. |
| * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE): |
| Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE. |
| |
| 2020-07-20 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/95189 |
| PR middle-end/95886 |
| * builtins.c (inline_expand_builtin_string_cmp): Rename... |
| (inline_expand_builtin_bytecmp): ...to this. |
| (builtin_memcpy_read_str): Don't expect data to be nul-terminated. |
| (expand_builtin_memory_copy_args): Handle object representations |
| with embedded nul bytes. |
| (expand_builtin_memcmp): Same. |
| (expand_builtin_strcmp): Adjust call to naming change. |
| (expand_builtin_strncmp): Same. |
| * expr.c (string_constant): Create empty strings with nonzero size. |
| * fold-const.c (c_getstr): Rename locals and update comments. |
| * tree.c (build_string): Accept null pointer argument. |
| (build_string_literal): Same. |
| * tree.h (build_string): Provide a default. |
| (build_string_literal): Same. |
| |
| 2020-07-20 Richard Biener <rguenther@suse.de> |
| |
| * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove |
| write-only post array. |
| |
| 2020-07-20 Jakub Jelinek <jakub@redhat.com> |
| |
| PR libstdc++/93121 |
| * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF |
| of a bitfield not aligned on byte boundaries try to |
| fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and |
| adjust it depending on endianity. |
| |
| 2020-07-20 Jakub Jelinek <jakub@redhat.com> |
| |
| PR libstdc++/93121 |
| * fold-const.c (native_encode_initializer): Handle bit-fields. |
| |
| 2020-07-20 Kewen Lin <linkw@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Set param_vect_partial_vector_usage to 0 explicitly. |
| * doc/invoke.texi (vect-partial-vector-usage): Document new option. |
| * optabs-query.c (get_len_load_store_mode): New function. |
| * optabs-query.h (get_len_load_store_mode): New declare. |
| * params.opt (vect-partial-vector-usage): New. |
| * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the |
| handlings for vectorization using length-based partial vectors, call |
| vect_gen_len for length generation, and rename some variables with |
| items instead of scalars. |
| (vect_set_loop_condition_partial_vectors): Add the handlings for |
| vectorization using length-based partial vectors. |
| (vect_do_peeling): Allow remaining eiters less than epilogue vf for |
| LOOP_VINFO_USING_PARTIAL_VECTORS_P. |
| * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init |
| epil_using_partial_vectors_p. |
| (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls |
| for lengths destruction. |
| (vect_verify_loop_lens): New function. |
| (vect_analyze_loop): Add handlings for epilogue of loop when it's |
| marked to use vectorization using partial vectors. |
| (vect_analyze_loop_2): Add the check to allow only one vectorization |
| approach using partial vectorization at the same time. Check param |
| vect-partial-vector-usage for partial vectors decision. Mark |
| LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is |
| considerable to use partial vectors. Call release_vec_loop_controls |
| for lengths destruction. |
| (vect_estimate_min_profitable_iters): Adjust for loop vectorization |
| using length-based partial vectors. |
| (vect_record_loop_mask): Init factor to 1 for vectorization using |
| mask-based partial vectors. |
| (vect_record_loop_len): New function. |
| (vect_get_loop_len): Likewise. |
| * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add |
| checks for vectorization using length-based partial vectors. Factor |
| some code to lambda function get_valid_nvectors. |
| (vectorizable_store): Add handlings when using length-based partial |
| vectors. |
| (vectorizable_load): Likewise. |
| (vect_gen_len): New function. |
| * tree-vectorizer.h (struct rgroup_controls): Add field factor |
| mainly for length-based partial vectors. |
| (vec_loop_lens): New typedef. |
| (_loop_vec_info): Add lens and epil_using_partial_vectors_p. |
| (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro. |
| (LOOP_VINFO_LENS): Likewise. |
| (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise. |
| (vect_record_loop_len): New declare. |
| (vect_get_loop_len): Likewise. |
| (vect_gen_len): Likewise. |
| |
| 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com> |
| |
| * config/mmix/mmix.c (mmix_option_override): Reinstate default |
| integer-emitting targetm.asm_out pseudos when dumping detailed |
| assembly-code. |
| (mmix_assemble_integer): Update comment. |
| |
| 2020-07-19 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95973 |
| PR target/96238 |
| * config/i386/cpuid.h: Add include guard. |
| (__cpuidex): New. |
| |
| 2020-07-18 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95620 |
| * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New. |
| |
| 2020-07-18 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR target/92488 |
| * config/rs6000/dfp.md (trunctdsd2): New define_insn. |
| * config/rs6000/rs6000.md (define_attr "isa"): Add p9. |
| (define_attr "enabled"): Handle p9. |
| |
| 2020-07-17 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * function.c (assign_parm_setup_block): Use the macro |
| TRULY_NOOP_TRUNCATION_MODES_P instead of calling |
| targetm.truly_noop_truncation directly. |
| |
| 2020-07-17 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/96186 |
| PR target/88713 |
| * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ... |
| (VF1_AVX512ER_128_256): This. Drop DF vector modes. |
| (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with |
| VF1_AVX512ER_128_256. |
| |
| 2020-07-17 Tamar Christina <tamar.christina@arm.com> |
| |
| * doc/sourcebuild.texi (dg-set-compiler-env-var, |
| dg-set-target-env-var): Document. |
| |
| 2020-07-17 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO. |
| |
| 2020-07-17 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/aarch64/driver-aarch64.c (host_detect_local_cpu): |
| Add GCC_CPUINFO. |
| |
| 2020-07-17 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/aarch64/driver-aarch64.c (INCLUDE_SET): New. |
| (parse_field): Use std::string. |
| (split_words, readline, find_field): New. |
| (host_detect_local_cpu): Fix truncation issues. |
| |
| 2020-07-17 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining. |
| (ELFOSABI_AMDGPU_HSA): Likewise. |
| (ELFABIVERSION_AMDGPU_HSA): Likewise. |
| (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise. |
| (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise. |
| (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise. |
| (reserved): Delete. |
| |
| 2020-07-17 Andrew Pinski <apinksi@marvell.com> |
| Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com> |
| |
| PR target/93720 |
| * config/aarch64/aarch64.c (aarch64_evpc_ins): New function. |
| (aarch64_expand_vec_perm_const_1): Call it. |
| * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make |
| public, and add a "@" prefix. |
| |
| 2020-07-17 Andrew Pinski <apinksi@marvell.com> |
| Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com> |
| |
| PR target/82199 |
| * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function. |
| (aarch64_expand_vec_perm_const_1): Call it. |
| |
| 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com> |
| |
| * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): |
| Add new field flags. |
| (VAR1): Add new field FLAG in macro. |
| (VAR2): Likewise. |
| (VAR3): Likewise. |
| (VAR4): Likewise. |
| (VAR5): Likewise. |
| (VAR6): Likewise. |
| (VAR7): Likewise. |
| (VAR8): Likewise. |
| (VAR9): Likewise. |
| (VAR10): Likewise. |
| (VAR11): Likewise. |
| (VAR12): Likewise. |
| (VAR13): Likewise. |
| (VAR14): Likewise. |
| (VAR15): Likewise. |
| (VAR16): Likewise. |
| (aarch64_general_fold_builtin): Likewise. |
| (aarch64_general_gimple_fold_builtin): Likewise. |
| * config/aarch64/aarch64-simd-builtins.def: Add default flag for |
| each built-in function. |
| * config/aarch64/geniterators.sh: Add new field in BUILTIN macro. |
| |
| 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| PR target/96127 |
| * config/s390/s390.c (s390_expand_insv): Invoke the movstrict |
| expanders to generate the pattern. |
| * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the |
| '*' to have callable expanders. |
| |
| 2020-07-16 Hans-Peter Nilsson <hp@axis.com> |
| Segher Boessenkool <segher@kernel.crashing.org> |
| |
| PR target/93372 |
| * combine.c (is_just_move): Take an rtx_insn* as argument. Use |
| single_set on it. |
| |
| 2020-07-16 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/96189 |
| * config/i386/sync.md |
| (peephole2 to remove unneded compare after CMPXCHG): |
| New pattern, also handle XOR zeroing and load of -1 by OR. |
| |
| 2020-07-16 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak. |
| (ix86_adjust_stack_and_probe): Delete. |
| (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add |
| PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus |
| a small dope beyond SIZE bytes. |
| (ix86_emit_probe_stack_range): Use local variable. |
| (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe |
| and tidy up the stack checking code. |
| * explow.c (get_stack_check_protect): Fix head comment. |
| (anti_adjust_stack_and_probe_stack_clash): Likewise. |
| (allocate_dynamic_stack_space): Add comment. |
| * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and |
| TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field. |
| |
| 2020-07-16 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/mkoffload.c: Include simple-object.h and elf.h. |
| (EM_AMDGPU): New macro. |
| (ELFOSABI_AMDGPU_HSA): New macro. |
| (ELFABIVERSION_AMDGPU_HSA): New macro. |
| (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro. |
| (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro. |
| (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro. |
| (R_AMDGPU_NONE): New macro. |
| (R_AMDGPU_ABS32_LO): New macro. |
| (R_AMDGPU_ABS32_HI): New macro. |
| (R_AMDGPU_ABS64): New macro. |
| (R_AMDGPU_REL32): New macro. |
| (R_AMDGPU_REL64): New macro. |
| (R_AMDGPU_ABS32): New macro. |
| (R_AMDGPU_GOTPCREL): New macro. |
| (R_AMDGPU_GOTPCREL32_LO): New macro. |
| (R_AMDGPU_GOTPCREL32_HI): New macro. |
| (R_AMDGPU_REL32_LO): New macro. |
| (R_AMDGPU_REL32_HI): New macro. |
| (reserved): New macro. |
| (R_AMDGPU_RELATIVE64): New macro. |
| (gcn_s1_name): Delete global variable. |
| (gcn_s2_name): Delete global variable. |
| (gcn_o_name): Delete global variable. |
| (gcn_cfile_name): Delete global variable. |
| (files_to_cleanup): New global variable. |
| (offload_abi): New global variable. |
| (tool_cleanup): Use files_to_cleanup, not explicit list. |
| (copy_early_debug_info): New function. |
| (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name, |
| gcn_cfile_name. |
| Create files_to_cleanup obstack. |
| Recognize -march options. |
| Copy early debug info from input .o files. |
| |
| 2020-07-16 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * Makefile.in (TAGS): Remove 'params.def'. |
| |
| 2020-07-16 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that |
| targets that return false, indicating SUBREGs shouldn't be |
| used, also need to provide a trunc?i?i2 optab that performs this |
| truncation. |
| * doc/tm.texi: Regenerate. |
| |
| 2020-07-15 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/96189 |
| * config/i386/sync.md |
| (peephole2 to remove unneded compare after CMPXCHG): New pattern. |
| |
| 2020-07-15 Jakub Jelinek <jakub@redhat.com> |
| |
| PR libgomp/96198 |
| * omp-general.h (struct omp_for_data): Rename min_inner_iterations |
| member to first_inner_iterations, adjust comment. |
| * omp-general.c (omp_extract_for_data): Adjust for the above change. |
| Always use n1first and n2first to compute it, rather than depending |
| on single_nonrect_cond_code. Similarly, always compute factor |
| as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2 |
| depending on single_nonrect_cond_code. |
| * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations |
| to first_inner_iterations and min_inner_iterationsd to |
| first_inner_iterationsd. |
| |
| 2020-07-15 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/96174 |
| * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask, |
| _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask, |
| _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask, |
| _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask, |
| _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask, |
| _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask, |
| _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask, |
| _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask, |
| _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask, |
| _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask, |
| _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask, |
| _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask, |
| _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask, |
| _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask, |
| _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask, |
| _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask, |
| _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded |
| section. |
| |
| 2020-07-15 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/96176 |
| * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and |
| tree-outof-ssa.h. |
| (expand_expr_force_mode): If exp is a SSA_NAME with different mode |
| from MODE and get_gimple_for_ssa_name is a cast from MODE, use the |
| cast's rhs. |
| |
| 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook. |
| |
| 2020-07-14 David Edelsohn <dje.gcc@gmail.com> |
| |
| * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64 |
| condition. |
| * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add |
| TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case. |
| |
| 2020-07-14 Lewis Hyatt <lhyatt@gmail.com> |
| |
| PR preprocessor/49973 |
| PR other/86904 |
| * common.opt: Handle -ftabstop here instead of in c-family |
| options. Add -fdiagnostics-column-unit= and |
| -fdiagnostics-column-origin= options. |
| * opts.c (common_handle_option): Handle the new options. |
| * diagnostic-format-json.cc (json_from_expanded_location): Add |
| diagnostic_context argument. Use it to convert column numbers as per |
| the new options. |
| (json_from_location_range): Likewise. |
| (json_from_fixit_hint): Likewise. |
| (json_end_diagnostic): Pass the new context argument to helper |
| functions above. Add "column-origin" field to the output. |
| (test_unknown_location): Add the new context argument to calls to |
| helper functions. |
| (test_bad_endpoints): Likewise. |
| * diagnostic-show-locus.c |
| (exploc_with_display_col::exploc_with_display_col): Support |
| tabstop parameter. |
| (layout_point::layout_point): Make use of class |
| exploc_with_display_col. |
| (layout_range::layout_range): Likewise. |
| (struct line_bounds): Clarify that the units are now always |
| display columns. Rename members accordingly. Add constructor. |
| (layout::print_source_line): Add support for tab expansion. |
| (make_range): Adapt to class layout_range changes. |
| (layout::maybe_add_location_range): Likewise. |
| (layout::layout): Adapt to class exploc_with_display_col changes. |
| (layout::calculate_x_offset_display): Support tabstop parameter. |
| (layout::print_annotation_line): Adapt to struct line_bounds changes. |
| (layout::print_line): Likewise. |
| (line_label::line_label): Add diagnostic_context argument. |
| (get_affected_range): Likewise. |
| (get_printed_columns): Likewise. |
| (layout::print_any_labels): Adapt to struct line_label changes. |
| (class correction): Add m_tabstop member. |
| (correction::correction): Add tabstop argument. |
| (correction::compute_display_cols): Use m_tabstop. |
| (class line_corrections): Add m_context member. |
| (line_corrections::line_corrections): Add diagnostic_context argument. |
| (line_corrections::add_hint): Use m_context to handle tabstops. |
| (layout::print_trailing_fixits): Adapt to class line_corrections |
| changes. |
| (test_layout_x_offset_display_utf8): Support tabstop parameter. |
| (test_layout_x_offset_display_tab): New selftest. |
| (test_one_liner_colorized_utf8): Likewise. |
| (test_tab_expansion): Likewise. |
| (test_diagnostic_show_locus_one_liner_utf8): Call the new tests. |
| (diagnostic_show_locus_c_tests): Likewise. |
| (test_overlapped_fixit_printing): Adapt to helper class and |
| function changes. |
| (test_overlapped_fixit_printing_utf8): Likewise. |
| (test_overlapped_fixit_printing_2): Likewise. |
| * diagnostic.h (enum diagnostics_column_unit): New enum. |
| (struct diagnostic_context): Add members for the new options. |
| (diagnostic_converted_column): Declare. |
| (json_from_expanded_location): Add new context argument. |
| * diagnostic.c (diagnostic_initialize): Initialize new members. |
| (diagnostic_converted_column): New function. |
| (maybe_line_and_column): Be willing to output a column of 0. |
| (diagnostic_get_location_text): Convert column number as per the new |
| options. |
| (diagnostic_report_current_module): Likewise. |
| (assert_location_text): Add origin and column_unit arguments for |
| testing the new functionality. |
| (test_diagnostic_get_location_text): Test the new functionality. |
| * doc/invoke.texi: Document the new options and behavior. |
| * input.h (location_compute_display_column): Add tabstop argument. |
| * input.c (location_compute_display_column): Likewise. |
| (test_cpp_utf8): Add selftests for tab expansion. |
| * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the |
| new context argument to json_from_expanded_location(). |
| |
| 2020-07-14 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/96194 |
| * expr.c (expand_constructor): Don't create temporary for store to |
| volatile MEM if exp has an addressable type. |
| |
| 2020-07-14 Nathan Sidwell <nathan@acm.org> |
| |
| * hash-map.h (hash_map::get): Note it is a pointer to value. |
| * incpath.h (incpath_kind): Align comments. |
| |
| 2020-07-14 Nathan Sidwell <nathan@acm.org> |
| |
| * tree-core.h (tree_decl_with_vis, tree_function_decl): |
| Note additional padding on 64-bits |
| * tree.c (cache_integer_cst): Note why no caching of enum literals. |
| (get_tree_code_name): Robustify error case. |
| |
| 2020-07-14 Nathan Sidwell <nathan@acm.org> |
| |
| * doc/gty.texi: Fic gt_cleare_cache name. |
| * doc/invoke.texi: Remove duplicate opindex Wabi-tag. |
| |
| 2020-07-14 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-general.h (struct omp_for_data): Add adjn1 member. |
| * omp-general.c (omp_extract_for_data): For non-rect loop, punt on |
| count computing if n1, n2 or step are not INTEGER_CST earlier. |
| Narrow the outer iterator range if needed so that non-rect loop |
| has at least one iteration for each outer range iteration. Compute |
| adjn1. |
| * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL |
| instead of the outer loop's n1. |
| |
| 2020-07-14 Matthias Klose <doko@ubuntu.com> |
| |
| PR lto/95604 |
| * lto-wrapper.c (merge_and_complain): Add decoded options as parameter, |
| error on different values for -fcf-protection. |
| (append_compiler_options): Pass -fcf-protection option. |
| (find_and_merge_options): Add decoded options as parameter, |
| pass decoded_options to merge_and_complain. |
| (run_gcc): Pass decoded options to find_and_merge_options. |
| * lto-opts.c (lto_write_options): Pass -fcf-protection option. |
| |
| 2020-07-13 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32 |
| and sibcall_local64. |
| (sibcall_value_local): Similarly. |
| |
| 2020-07-13 Nathan Sidwell <nathan@acm.org> |
| |
| * Makefile.in (distclean): Remove long gone cxxmain.c |
| |
| 2020-07-13 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95443 |
| * config/i386/i386.md (cmpstrnsi): Pass a copy of the string |
| length to cmpstrnqi patterns. |
| |
| 2020-07-13 Jakub Jelinek <jakub@redhat.com> |
| |
| PR ipa/96130 |
| * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux |
| as false predicate. |
| |
| 2020-07-13 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96163 |
| * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts |
| at least after region begin. |
| |
| 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add |
| __ARM_FEATURE_PAC_DEFAULT support. |
| |
| 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| PR target/94891 |
| * doc/extend.texi: Update the text for __builtin_return_address. |
| |
| 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| PR target/94891 |
| * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled): |
| Disable return address signing if __builtin_eh_return is used. |
| |
| 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| PR target/94891 |
| PR target/94791 |
| * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare. |
| * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New. |
| (aarch64_return_addr): Use aarch64_return_addr_rtx. |
| * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise. |
| |
| 2020-07-13 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR middle-end/95114 |
| * tree.h (virtual_method_call_p): Add a default-false parameter |
| that indicates whether the function is being called from dump |
| routines. |
| (obj_type_ref_class): Likewise. |
| * tree.c (virtual_method_call_p): Likewise. |
| * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR |
| type information for the type when the parameter is false. |
| * tree-pretty-print.c (dump_generic_node): Update calls to |
| virtual_method_call_p and obj_type_ref_class accordingly. |
| |
| 2020-07-13 Julian Brown <julian@codesourcery.com> |
| Thomas Schwinge <thomas@codesourcery.com> |
| |
| * gimplify.c (gimplify_scan_omp_clauses): Do not strip |
| GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data |
| directives (see also PR92929). |
| |
| 2020-07-13 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * convert.c (convert_to_integer_1): Narrow integer operations |
| even on targets that require explicit truncation instructions. |
| |
| 2020-07-13 Hans-Peter Nilsson <hp@axis.com> |
| |
| PR target/93372 |
| * config/cris/cris-passes.def: New file. |
| * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def. |
| * config/cris/cris.c: Add infrastructure bits and pass execute |
| function cris_postdbr_cmpelim. |
| * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare. |
| |
| 2020-07-13 Hans-Peter Nilsson <hp@axis.com> |
| |
| * config/cris/t-cris: Remove gt-cris.h-related excessive cargo. |
| |
| 2020-07-13 Hans-Peter Nilsson <hp@axis.com> |
| |
| PR target/93372 |
| * config/cris/cris.md ("*add<mode>3_addi"): New splitter. |
| ("*addi_b_<mode>"): New pattern. |
| ("*addsi3<setnz>"): Remove stale %-related comment. |
| |
| 2020-07-13 Hans-Peter Nilsson <hp@axis.com> |
| |
| * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"): |
| Use match_dup in output template, not match_operand. |
| |
| 2020-07-13 Richard Biener <rguenther@suse.de> |
| |
| * var-tracking.c (bb_heap_node_t): Remove unused typedef. |
| (vt_find_locations): Eliminate visited bitmap in favor of |
| RPO order check. Dump statistics about the number of |
| local BB dataflow computes. |
| |
| 2020-07-13 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94600 |
| * expr.c (expand_constructor): Make a temporary also if we're |
| storing to volatile memory. |
| |
| 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com> |
| |
| * config/rs6000/rs6000.md (rotl_unspec): New |
| define_insn_and_split. |
| |
| 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_expand_vector_init): |
| Move V4SF to V4SI, init vector like V4SI and move to V4SF back. |
| |
| 2020-07-11 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * internal-fn.c (expand_mul_overflow): When checking for signed |
| overflow from a widening multiplication, we access the truncated |
| lowpart RES twice, so keep this value in a pseudo register. |
| |
| 2020-07-11 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/96146 |
| * value-range.cc (value_range::set): Only decompose POLY_INT_CST |
| bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges |
| involving POLY_INT_CSTs. |
| |
| 2020-07-10 David Edelsohn <dje.gcc@gmail.com> |
| |
| PR target/77373 |
| * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only |
| create named section for VAR_DECL or FUNCTION_DECL. |
| |
| 2020-07-10 Joseph Myers <joseph@codesourcery.com> |
| |
| * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH): |
| New macros. |
| |
| 2020-07-10 Alexander Popov <alex.popov@linux.com> |
| |
| * shrink-wrap.c (try_shrink_wrapping): Improve debug output. |
| |
| 2020-07-10 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR middle-end/96151 |
| * expr.c (expand_expr_real_2): When reducing bit fields, |
| clear the target if it has a different mode from the expression. |
| (reduce_to_bit_field_precision): Don't do that here. Instead |
| assert that the target already has the correct mode. |
| |
| 2020-07-10 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/92789 |
| PR target/95726 |
| * config/arm/arm.c (arm_attribute_table): Add |
| "Advanced SIMD type". |
| (arm_comp_type_attributes): Check that the "Advanced SIMD type" |
| attributes are equal. |
| * config/arm/arm-builtins.c: Include stringpool.h and |
| attribs.h. |
| (arm_mangle_builtin_vector_type): Use the mangling recorded |
| in the "Advanced SIMD type" attribute. |
| (arm_init_simd_builtin_types): Add an "Advanced SIMD type" |
| attribute to each Advanced SIMD type, using the mangled type |
| as the attribute's single argument. |
| |
| 2020-07-10 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator. |
| (VSX_MM4): New define_mode_iterator. |
| (vec_mtvsrbmi): New define_insn. |
| (vec_mtvsr_<mode>): New define_insn. |
| (vec_cntmb_<mode>): New define_insn. |
| (vec_extract_<mode>): New define_insn. |
| (vec_expand_<mode>): New define_insn. |
| (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB, |
| UNSPEC_VEXTRACT, UNSPEC_VEXPAND. |
| * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm, |
| vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add |
| defines. |
| * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1. |
| (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm, |
| mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd, |
| vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq. |
| (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd. |
| (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm, |
| mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm. |
| (BU_P10_OVERLOAD_2): Add defition for cntm. |
| * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add |
| checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi, |
| CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di. |
| (altivec_overloaded_builtins): Add overloaded argument entries for |
| P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM, |
| P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM, |
| P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB, |
| P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH, |
| P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD, |
| P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH, |
| P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD, |
| P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB, |
| P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW, |
| P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ. |
| (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM, |
| P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM, |
| P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH, |
| P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD, |
| P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH, |
| P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD, |
| P10_BUILTIN_VEXPANDMQ. |
| * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add |
| entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM, |
| VEXPANDM, VEXTRACTM. |
| |
| 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)> |
| |
| PR target/95581 |
| * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid. |
| (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use |
| v16qi_ftype_pcvoid with correct number of parameters. |
| |
| 2020-07-10 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/96144 |
| * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check |
| TARGET_AVX512VL when enabling FMA. |
| |
| 2020-07-10 Andrea Corallo <andrea.corallo@arm.com> |
| Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Iain Apreotesei <iain.apreotesei@arm.com> |
| |
| * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New |
| prototype. |
| * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define. |
| (arm_invalid_within_doloop): Implement invalid_within_doloop hook. |
| (arm_target_insn_ok_for_lob): New function. |
| * config/arm/arm.h (TARGET_HAVE_LOB): Define macro. |
| * config/arm/thumb2.md (*doloop_end_internal, doloop_begin) |
| (dls_insn): Add new patterns. |
| (doloop_end): Modify to select LR when LOB is available. |
| * config/arm/unspecs.md: Add new unspec. |
| * doc/sourcebuild.texi (arm_v8_1_lob_ok) |
| (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports |
| options. |
| |
| 2020-07-10 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96133 |
| * gimple-fold.c (fold_array_ctor_reference): Do not |
| recurse to folding a CTOR that does not fully cover the |
| asked for object. |
| |
| 2020-07-10 Cui,Lili <lili.cui@intel.com> |
| |
| * common/config/i386/cpuinfo.h |
| (get_intel_cpu): Handle sapphirerapids. |
| * common/config/i386/i386-common.c |
| (processor_names): Add sapphirerapids and alderlake. |
| (processor_alias_table): Add sapphirerapids and alderlake. |
| * common/config/i386/i386-cpuinfo.h |
| (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and |
| INTEL_COREI7_ALDERLAKE. |
| * config.gcc: Add -march=sapphirerapids and alderlake. |
| * config/i386/driver-i386.c |
| (host_detect_local_cpu) Handle sapphirerapids and alderlake. |
| * config/i386/i386-c.c |
| (ix86_target_macros_internal): Handle sapphirerapids and alderlake. |
| * config/i386/i386-options.c |
| (m_SAPPHIRERAPIDS) : Define. |
| (m_ALDERLAKE): Ditto. |
| (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS. |
| (processor_cost_table): Add sapphirerapids and alderlake. |
| (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD, |
| PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK. |
| * config/i386/i386.h |
| (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE. |
| (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and |
| PROCESSOR_ALDERLAKE. |
| (PTA_ENQCMD): New. |
| (PTA_CLDEMOTE): Ditto. |
| (PTA_SERIALIZE): Ditto. |
| (PTA_TSXLDTRK): New. |
| (PTA_SAPPHIRERAPIDS): Ditto. |
| (PTA_ALDERLAKE): Ditto. |
| (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and |
| PROCESSOR_ALDERLAKE. |
| * doc/extend.texi: Add sapphirerapids and alderlake. |
| * doc/invoke.texi: Add sapphirerapids and alderlake. |
| |
| 2020-07-10 Martin Liska <mliska@suse.cz> |
| |
| * dumpfile.c [profile-report]: Add new profile dump. |
| * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report. |
| * passes.c (pass_manager::dump_profile_report): Change stderr |
| to dump_file. |
| |
| 2020-07-10 Kewen Lin <linkw@linux.ibm.com> |
| |
| * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which |
| is adjusted by considering peeled prologue for non |
| vect_use_loop_mask_for_alignment_p cases. |
| |
| 2020-07-09 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR target/96125 |
| * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA |
| specific types __vector_quad and __vector_pair, and initialize the |
| MMA built-ins if TARGET_EXTRA_BUILTINS is set. |
| (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask. |
| Remove now unneeded mask variable. |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the |
| OPTION_MASK_MMA flag for power10 if not already set. |
| |
| 2020-07-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96133 |
| * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p |
| status between stmts. |
| |
| 2020-07-09 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/88713 |
| * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA. |
| * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New. |
| (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256. |
| (rsqrtv16sf2): Removed. |
| |
| 2020-07-09 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove. |
| (vect_slp_analyze_and_verify_instance_alignment): Rename to ... |
| (vect_slp_analyze_instance_alignment): ... this. |
| * tree-vect-data-refs.c (verify_data_ref_alignment): Remove. |
| (vect_verify_datarefs_alignment): Likewise. |
| (vect_enhance_data_refs_alignment): Do not call |
| vect_verify_datarefs_alignment. |
| (vect_slp_analyze_node_alignment): Rename from |
| vect_slp_analyze_and_verify_node_alignment and do not |
| call verify_data_ref_alignment. |
| (vect_slp_analyze_instance_alignment): Rename from |
| vect_slp_analyze_and_verify_instance_alignment. |
| * tree-vect-stmts.c (vectorizable_store): Dump when |
| we vectorize an unaligned access. |
| (vectorizable_load): Likewise. |
| * tree-vect-loop.c (vect_analyze_loop_2): Do not call |
| vect_verify_datarefs_alignment. |
| * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust. |
| |
| 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com> |
| |
| PR tree-optimization/95804 |
| * tree-loop-distribution.c (break_alias_scc_partitions): Force |
| negative post order to reduction partition. |
| |
| 2020-07-09 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-general.h (struct omp_for_data): Add min_inner_iterations |
| and factor members. |
| * omp-general.c (omp_extract_for_data): Initialize them and remember |
| them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there. |
| * omp-expand.c (expand_omp_for_init_counts): Fix up computation of |
| counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST. |
| (expand_omp_for_init_vars): For |
| fd->first_nonrect + 1 == fd->last_nonrect loops with for now |
| INTEGER_CST fd->loop.n2 find quadratic equation roots instead of |
| using fallback method when possible. |
| |
| 2020-07-09 Omar Tahir <omar.tahir@arm.com> |
| |
| * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and |
| last_moveable_pseudo before returning. |
| |
| 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add |
| __ARM_FEATURE_BTI_DEFAULT support. |
| |
| 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm): |
| New declaration. |
| * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new |
| stub registers class. |
| (aarch64_class_max_nregs): Likewise. |
| (aarch64_register_move_cost): Likewise. |
| (aarch64_sls_shared_thunks): Global array to store stub labels. |
| (aarch64_sls_emit_function_stub): New. |
| (aarch64_create_blr_label): New. |
| (aarch64_sls_emit_blr_function_thunks): New. |
| (aarch64_sls_emit_shared_blr_thunks): New. |
| (aarch64_asm_file_end): New. |
| (aarch64_indirect_call_asm): New. |
| (TARGET_ASM_FILE_END): Use aarch64_asm_file_end. |
| (TARGET_ASM_FUNCTION_EPILOGUE): Use |
| aarch64_sls_emit_blr_function_thunks. |
| * config/aarch64/aarch64.h (STB_REGNUM_P): New. |
| (enum reg_class): Add STUB_REGS class. |
| (machine_function): Introduce `call_via` array for |
| function-local stub labels. |
| * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use |
| aarch64_indirect_call_asm to emit code when hardening BLR |
| instructions. |
| * config/aarch64/constraints.md (Ucr): New constraint |
| representing registers for indirect calls. Is GENERAL_REGS |
| usually, and STUB_REGS when hardening BLR instruction against |
| SLS. |
| * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class |
| is also a general register. |
| |
| 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New. |
| * config/aarch64/aarch64.c (aarch64_output_casesi): Emit |
| speculation barrier after BR instruction if needs be. |
| (aarch64_trampoline_init): Handle ptr_mode value & adjust size |
| of code copied. |
| (aarch64_sls_barrier): New. |
| (aarch64_asm_trampoline_template): Add needed barriers. |
| * config/aarch64/aarch64.h (AARCH64_ISA_SB): New. |
| (TARGET_SB): New. |
| (TRAMPOLINE_SIZE): Account for barrier. |
| * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch, |
| simple_return, *do_return, *sibcall_insn, *sibcall_value_insn): |
| Emit barrier if needs be, also account for possible barrier using |
| "sls_length" attribute. |
| (sls_length): New attribute. |
| (length): Determine default using any non-default sls_length |
| value. |
| |
| 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p): |
| New. |
| (aarch64_harden_sls_blr_p): New. |
| * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type): |
| New. |
| (aarch64_harden_sls_retbr_p): New. |
| (aarch64_harden_sls_blr_p): New. |
| (aarch64_validate_sls_mitigation): New. |
| (aarch64_override_options): Parse options for SLS mitigation. |
| * config/aarch64/aarch64.opt (-mharden-sls): New option. |
| * doc/invoke.texi: Document new option. |
| |
| 2020-07-09 Kewen Lin <linkw@linux.ibm.com> |
| |
| * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization |
| with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION |
| or nested-cycle reduction. |
| |
| 2020-07-09 Kewen Lin <linkw@linux.ibm.com> |
| |
| * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string |
| for fully masking to be more common. |
| |
| 2020-07-09 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv.md (get_thread_pointer<mode>): New. |
| (TP_REGNUM): Ditto. |
| * doc/extend.texi (Target Builtins): Add RISC-V built-in section. |
| Document __builtin_thread_pointer. |
| |
| 2020-07-09 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls): |
| Abort if any arguments on stack. |
| |
| 2020-07-08 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if |
| either type has reverse scalar storage order. |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through |
| a memory copy if either type has reverse scalar storage order. |
| |
| 2020-07-08 Tobias Burnus <tobias@codesourcery.com> |
| |
| * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic |
| on to the native compiler, if used. |
| * config/nvptx/mkoffload.c (compile_native, main): Likewise. |
| |
| 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_vmsumudm): New define. |
| * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec. |
| (altivec_vmsumudm): New define_insn. |
| * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3 |
| entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry. |
| * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for |
| ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum. |
| * doc/extend.texi: Add document for vmsumudm behind vmsum. |
| |
| 2020-07-08 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-stmts.c (get_group_load_store_type): Pass |
| in the SLP node and the alignment support scheme output. |
| Set that. |
| (get_load_store_type): Likewise. |
| (vectorizable_store): Adjust. |
| (vectorizable_load): Likewise. |
| |
| 2020-07-08 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR middle-end/95694 |
| * expr.c (expand_expr_real_2): Get the mode from the type rather |
| than the rtx, and assert that it is consistent with the mode of |
| the rtx (where known). Optimize all constant integers, not just |
| those that can be represented in poly_int64. |
| |
| 2020-07-08 Kewen Lin <linkw@linux.ibm.com> |
| |
| * config/rs6000/vsx.md (len_load_v16qi): New define_expand. |
| (len_store_v16qi): Likewise. |
| |
| 2020-07-08 Kewen Lin <linkw@linux.ibm.com> |
| |
| * doc/md.texi (len_load_@var{m}): Document. |
| (len_store_@var{m}): Likewise. |
| * internal-fn.c (len_load_direct): New macro. |
| (len_store_direct): Likewise. |
| (expand_len_load_optab_fn): Likewise. |
| (expand_len_store_optab_fn): Likewise. |
| (direct_len_load_optab_supported_p): Likewise. |
| (direct_len_store_optab_supported_p): Likewise. |
| (expand_mask_load_optab_fn): New macro. Original renamed to ... |
| (expand_partial_load_optab_fn): ... here. Add handlings for |
| len_load_optab. |
| (expand_mask_store_optab_fn): New macro. Original renamed to ... |
| (expand_partial_store_optab_fn): ... here. Add handlings for |
| len_store_optab. |
| (internal_load_fn_p): Handle IFN_LEN_LOAD. |
| (internal_store_fn_p): Handle IFN_LEN_STORE. |
| (internal_fn_stored_value_index): Handle IFN_LEN_STORE. |
| * internal-fn.def (LEN_LOAD): New internal function. |
| (LEN_STORE): Likewise. |
| * optabs.def (len_load_optab, len_store_optab): New optab. |
| |
| 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com> |
| |
| * config/aarch64/aarch64.c (thunderx2t99_regmove_cost, |
| thunderx2t99_vector_cost): Likewise. |
| |
| 2020-07-07 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix |
| group overlap condition to allow negative step DR groups. |
| * tree-vect-stmts.c (get_group_load_store_type): For |
| multi element SLP groups force VMAT_STRIDED_SLP when the step |
| is negative. |
| |
| 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com> |
| |
| * doc/generic.texi: Fix typo. |
| |
| 2020-07-07 Richard Biener <rguenther@suse.de> |
| |
| * lto-streamer-out.c (cmp_symbol_files): Use the computed |
| order map to sort symbols from the same sub-file together. |
| (lto_output): Compute a map of sub-file to an order number |
| it appears in the symbol output array. |
| |
| 2020-07-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96075 |
| * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use |
| TYPE_SIZE_UNIT of the vector component type instead of DR_STEP |
| for the misalignment calculation for negative step. |
| |
| 2020-07-06 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * config/nvptx/nvptx.md (*vadd_addsi4): New instruction. |
| (*vsub_addsi4): New instruction. |
| |
| 2020-07-06 Hans-Peter Nilsson <hp@axis.com> |
| |
| * config/cris/cris.md (movulsr): New peephole2. |
| |
| 2020-07-06 Hans-Peter Nilsson <hp@axis.com> |
| |
| * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"): |
| Correct gcc_assert of overlapping operands. |
| |
| 2020-07-05 Hans-Peter Nilsson <hp@axis.com> |
| |
| * config/cris/cris.c (cris_select_cc_mode): Always return |
| CC_NZmode for matching comparisons. Clarify comments. |
| * config/cris/cris-modes.def: Clarify mode comment. |
| * config/cris/cris.md (plusminus, plusminusumin, plusumin): New |
| code iterators. |
| (addsub, addsubbo, nd): New code iterator attributes. |
| ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code |
| iterator constructs instead of match_operator constructs. |
| ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from |
| "*extop<mode>si<setnz>". |
| ("*add<su>qihi_swap"): Similar from "*addxqihi_swap". |
| ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from |
| "*extop<mode>si<setnz>_swap". |
| |
| 2020-07-05 Hans-Peter Nilsson <hp@axis.com> |
| |
| * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap") |
| ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate. |
| |
| 2020-07-03 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that |
| were initially created for the assignment of a variable-sized |
| object and whose source is now a string constant. |
| * gimple-ssa-store-merging.c (struct merged_store_group): Document |
| STRING_CST for rhs_code field. |
| Add string_concatenation boolean field. |
| (merged_store_group::merged_store_group): Initialize it as well as |
| bit_insertion here. |
| (merged_store_group::do_merge): Set it upon seeing a STRING_CST. |
| Also set bit_insertion here upon seeing a BIT_INSERT_EXPR. |
| (merged_store_group::apply_stores): Clear it for small regions. |
| Do not create a power-of-2-sized buffer if it is still true. |
| And do not set bit_insertion here again. |
| (encode_tree_to_bitpos): Deal with BLKmode for the expression. |
| (merged_store_group::can_be_merged_into): Deal with STRING_CST. |
| (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion |
| to true after changing MEM_REF stores into BIT_INSERT_EXPR stores. |
| (count_multiple_uses): Return 0 for STRING_CST. |
| (split_group): Do not split the group for a string concatenation. |
| (imm_store_chain_info::output_merged_store): Constify and rename |
| some local variables. Build an array type as destination type |
| for a string concatenation, as well as a zero mask, and call |
| build_string to build the source. |
| (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR. |
| (pass_store_merging::process_store): Accept STRING_CST on the RHS. |
| * gimple.h (gimple_call_alloca_for_var_p): New accessor function. |
| * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var. |
| * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY. |
| |
| 2020-07-03 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/96040 |
| * ipa-sra.c (all_callee_accesses_present_p): Do not accept type |
| mismatched accesses. |
| |
| 2020-07-03 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * config/nvptx/nvptx.md (popcount<mode>2): New instructions. |
| (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions. |
| |
| 2020-07-03 Martin Liska <mliska@suse.cz> |
| Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| |
| PR bootstrap/96046 |
| * gcov-dump.c (tag_function): Use gcov_position_t |
| type. |
| |
| 2020-07-03 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96037 |
| * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def. |
| |
| 2020-07-03 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the |
| original non-pattern stmts, look at the pattern stmt |
| vectorization status. |
| |
| 2020-07-03 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New. |
| |
| 2020-07-03 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vec_info::insert_on_entry): New. |
| (vec_info::insert_seq_on_entry): Likewise. |
| * tree-vectorizer.c (vec_info::insert_on_entry): Implement. |
| (vec_info::insert_seq_on_entry): Likewise. |
| * tree-vect-stmts.c (vect_init_vector_1): Use |
| vec_info::insert_on_entry. |
| (vect_finish_stmt_generation): Set modified bit after |
| adjusting VUSE. |
| * tree-vect-slp.c (vect_create_constant_vectors): Simplify |
| by using vec_info::insert_seq_on_entry and bypassing |
| vec_init_vector. |
| (vect_schedule_slp_instance): Deal with all-constant |
| children later. |
| |
| 2020-07-03 Roger Sayle <roger@nextmovesoftware.com> |
| Tom de Vries <tdevries@suse.de> |
| |
| PR target/90932 |
| * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi |
| to access TYPE_SIZE (type). Return at least the mode's alignment. |
| |
| 2020-07-02 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96028 |
| * tree-vect-slp.c (vect_slp_convert_to_external): Make sure |
| we have scalar stmts to use. |
| (vect_slp_analyze_node_operations): When analyzing a child |
| failed try externalizing the parent node. |
| |
| 2020-07-02 Martin Jambor <mjambor@suse.cz> |
| |
| PR debug/95343 |
| * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust |
| argument index if necessary. |
| |
| 2020-07-02 Martin Liska <mliska@suse.cz> |
| |
| PR middle-end/95830 |
| * tree-vect-generic.c (expand_vector_condition): Forward declaration. |
| (expand_vector_comparison): Do not expand a comparison if all |
| uses are consumed by a VEC_COND_EXPR. |
| (expand_vector_operation): Change void return type to bool. |
| (expand_vector_operations_1): Pass dce_ssa_names. |
| |
| 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com> |
| |
| PR bootstrap/95700 |
| * system.h (NULL): Redefine to nullptr. |
| |
| 2020-07-02 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/95857 |
| * tree-cfg.c (group_case_labels_stmt): When removing an unreachable |
| base_bb, remember all forced and non-local labels on it and later |
| treat those as if they have NULL label_to_block. Formatting fix. |
| Fix a comment typo. |
| |
| 2020-07-02 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/96022 |
| * tree-vect-stmts.c (vectorizable_shift): Only use the |
| first vector stmt when extracting the scalar shift amount. |
| * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary |
| nodes with all-scalar children from scalars but not stores. |
| (vect_analyze_slp_instance): Mark the node not failed. |
| |
| 2020-07-02 Felix Yang <felix.yang@huawei.com> |
| |
| PR tree-optimization/95961 |
| * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the |
| number of scalars instead of the number of vectors as an upper bound |
| for the loop saving info about DR in the hash table. Remove unused |
| local variables. |
| |
| 2020-07-02 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with |
| invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid |
| OpenMP non-rectangular loops. Use XALLOCAVEC. |
| |
| 2020-07-02 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/95348 |
| * coverage.c (read_counts_file): Read only COUNTERS that are |
| not all-zero. |
| * gcov-dump.c (tag_function): Change signature from unsigned to |
| signed integer. |
| (tag_blocks): Likewise. |
| (tag_arcs): Likewise. |
| (tag_lines): Likewise. |
| (tag_counters): Likewise. |
| (tag_summary): Likewise. |
| * gcov.c (read_count_file): Read all non-zero counters |
| sensitively. |
| |
| 2020-07-02 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/multilib-generator (arch_canonicalize): Handle |
| multi-letter extension. |
| Using underline as separator between different extensions. |
| |
| 2020-07-01 Pip Cet <pipcet@gmail.com> |
| |
| * spellcheck.c (test_data): Add problematic strings. |
| (test_metric_conditions): Don't test the triangle inequality |
| condition, which our distance function does not satisfy. |
| |
| 2020-07-01 Omar Tahir <omar.tahir@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always |
| generate a BTI instruction. |
| |
| 2020-07-01 Jeff Law <law@redhat.com> |
| |
| PR tree-optimization/94882 |
| * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification. |
| |
| 2020-07-01 Jeff Law <law@redhat.com> |
| |
| * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword. |
| (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise. |
| |
| 2020-07-01 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums |
| for 64bits fpsr/fpcr getter setters builtin variants. |
| (aarch64_init_fpsr_fpcr_builtins): New function. |
| (aarch64_general_init_builtins): Modify to make use of the later. |
| (aarch64_expand_fpsr_fpcr_setter): New function. |
| (aarch64_general_expand_builtin): Modify to make use of the later. |
| * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>) |
| (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and |
| generalizing 'get_fpcr', 'set_fpsr'. |
| * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int |
| iterators. |
| (fpscr_name): New int attribute. |
| * doc/extend.texi (__builtin_aarch64_get_fpcr64) |
| (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64) |
| (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in |
| Functions. |
| |
| 2020-07-01 Martin Liska <mliska@suse.cz> |
| |
| * gcov.c (print_usage): Avoid trailing space for -j option. |
| |
| 2020-07-01 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95839 |
| * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing |
| vectors are not uniform. |
| (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of |
| vector registers. |
| (vect_build_slp_tree_2): For groups of lane extracts |
| from a vector register generate a permute node |
| with a special child representing the pre-existing vector. |
| (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing. |
| (vect_slp_analyze_node_operations): Use SLP_TREE_LANES. |
| (vectorizable_slp_permutation): Do not generate or cost identity |
| permutes. |
| (vect_schedule_slp_instance): Handle pre-existing vector |
| that are function arguments. |
| |
| 2020-07-01 Richard Biener <rguenther@suse.de> |
| |
| * system.h (INCLUDE_ISL): New guarded include. |
| * graphite-dependences.c: Use it. |
| * graphite-isl-ast-to-gimple.c: Likewise. |
| * graphite-optimize-isl.c: Likewise. |
| * graphite-poly.c: Likewise. |
| * graphite-scop-detection.c: Likewise. |
| * graphite-sese-to-poly.c: Likewise. |
| * graphite.c: Likewise. |
| * graphite.h: Drop the includes here. |
| |
| 2020-07-01 Martin Liska <mliska@suse.cz> |
| |
| * gcov.c (print_usage): Shorted option description for -j |
| option. |
| |
| 2020-07-01 Martin Liska <mliska@suse.cz> |
| |
| * doc/gcov.texi: Rename 2 options. |
| * gcov.c (print_usage): Rename -i,--json-format to |
| -j,--json-format and -j,--human-readable to -H,--human-readable. |
| (process_args): Fix up parsing. Document obsolete options and |
| how are they changed. |
| |
| 2020-07-01 Jeff Law <law@redhat.com> |
| |
| * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword. |
| (pa_output_ascii): Likewise. |
| |
| 2020-07-01 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.c (riscv_subset_t): New field |
| added. |
| (riscv_subset_list::parsing_subset_version): Add parameter for |
| indicate explicitly version, and handle explicitly version. |
| (riscv_subset_list::handle_implied_ext): Ditto. |
| (riscv_subset_list::add): Ditto. |
| (riscv_subset_t::riscv_subset_t): Init new field. |
| (riscv_subset_list::to_string): Always output version info if version |
| explicitly specified. |
| (riscv_subset_list::parsing_subset_version): Handle explicitly |
| arch version. |
| (riscv_subset_list::parse_std_ext): Ditto. |
| (riscv_subset_list::parse_multiletter_ext): Ditto. |
| |
| 2020-06-30 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/92789 |
| PR target/95726 |
| * config/aarch64/aarch64.c (aarch64_attribute_table): Add |
| "Advanced SIMD type". |
| (aarch64_comp_type_attributes): Check that the "Advanced SIMD type" |
| attributes are equal. |
| * config/aarch64/aarch64-builtins.c: Include stringpool.h and |
| attribs.h. |
| (aarch64_mangle_builtin_vector_type): Use the mangling recorded |
| in the "Advanced SIMD type" attribute. |
| (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type" |
| attribute to each Advanced SIMD type, using the mangled type |
| as the attribute's single argument. |
| |
| 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| PR target/94743 |
| * config/arm/arm.c (arm_handle_isr_attribute): Warn if |
| -mgeneral-regs-only is not used. |
| |
| 2020-06-30 Yang Yang <yangyang305@huawei.com> |
| |
| PR tree-optimization/95855 |
| * gimple-ssa-split-paths.c (is_feasible_trace): Add extra |
| checks to recognize a missed if-conversion opportunity when |
| judging whether to duplicate a block. |
| |
| 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * doc/extend.texi: Change references to "future architecture" to |
| "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer |
| references to "future" (because the future is now). |
| |
| 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000.md (isa): Rename "fut" to "p10". |
| |
| 2020-06-29 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * simplify-rtx.c (simplify_distributive_operation): New function |
| to un-distribute a binary operation of two binary operations. |
| (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant). |
| (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here |
| when appropriate. |
| (test_scalar_int_ops): New function for unit self-testing |
| scalar integer transformations in simplify-rtx.c. |
| (test_scalar_ops): Call test_scalar_int_ops for each integer mode. |
| (simplify_rtx_c_tests): Call test_scalar_ops. |
| |
| 2020-06-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95916 |
| * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle |
| the case of not vectorized externals. |
| |
| 2020-06-29 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h: Do not include <utility>. |
| |
| 2020-06-29 Martin Liska <mliska@suse.cz> |
| |
| * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb |
| instead of gimple_stmt_iterator::bb. |
| * tree-ssa-math-opts.c (insert_reciprocals): Likewise. |
| * tree-vectorizer.h: Likewise. |
| |
| 2020-06-29 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro. |
| * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype. |
| * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P |
| and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments. |
| (gcn_dwarf_register_number): New function. |
| (gcn_dwarf_register_span): New function. |
| (TARGET_DWARF_REGISTER_SPAN): New hook macro. |
| |
| 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com> |
| |
| PR tree-optimization/95854 |
| * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL |
| if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to |
| unsigned HOST_WIDE_INT. |
| |
| 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| |
| * config/sparc/sparc.c (epilogue_renumber): Remove register. |
| (sparc_print_operand_address): Likewise. |
| (sparc_type_code): Likewise. |
| (set_extends): Likewise. |
| |
| 2020-06-29 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/92860 |
| * optc-save-gen.awk: Add exceptions for arc target. |
| |
| 2020-06-29 Frederik Harwath <frederik@codesourcery.com> |
| |
| * doc/sourcebuild.texi: Describe globbing of the |
| dump file scanning commands "suffix" argument. |
| |
| 2020-06-28 Martin Sebor <msebor@redhat.com> |
| |
| PR c++/86568 |
| * calls.c (maybe_warn_rdwr_sizes): Use location of argument if |
| available. |
| * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust |
| indentation. |
| * tree.c (get_nonnull_args): Consider the this pointer implicitly |
| nonnull. |
| * var-tracking.c (deps_vec): New type. |
| (var_loc_dep_vec): New function. |
| (VAR_LOC_DEP_VEC): Use it. |
| |
| 2020-06-28 Kewen Lin <linkw@linux.ibm.com> |
| |
| * internal-fn.c (direct_mask_load_optab_supported_p): Use |
| convert_optab_supported_p instead of direct_optab_supported_p. |
| (direct_mask_store_optab_supported_p): Likewise. |
| |
| 2020-06-27 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use |
| simplify_using_ranges class. |
| * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges |
| field. Adjust all methods to use new field. |
| * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use |
| simplify_using_ranges class. |
| * tree-vrp.c (class vrp_folder): New simplify_using_ranges |
| field. Adjust all methods to use new field. |
| (simplify_stmt_for_jump_threading): Use simplify_using_ranges class. |
| (vrp_prop::vrp_finalize): New vrp_folder argument. |
| (execute_vrp): Pass folder to vrp_finalize. Use |
| simplify_using_ranges class. |
| Remove cleanup_edges_and_switches call. |
| * vr-values.c (vr_values::op_with_boolean_value_range_p): Change |
| value_range_equiv uses to value_range. |
| (simplify_using_ranges::op_with_boolean_value_range_p): Use |
| simplify_using_ranges class. |
| (check_for_binary_op_overflow): Make static. |
| (vr_values::extract_range_basic): Pass this to |
| check_for_binary_op_overflow. |
| (compare_range_with_value): Change value_range_equiv uses to |
| value_range. |
| (vr_values::vr_values): Initialize simplifier field. |
| Remove uses of to_remove_edges and to_update_switch_stmts. |
| (vr_values::~vr_values): Remove uses of to_remove_edges and |
| to_update_switch_stmts. |
| (vr_values::get_vr_for_comparison): Move to simplify_using_ranges |
| class. |
| (vr_values::compare_name_with_value): Same. |
| (vr_values::compare_names): Same. |
| (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same. |
| (vr_values::vrp_evaluate_conditional): Same. |
| (vr_values::vrp_visit_cond_stmt): Same. |
| (find_case_label_ranges): Change value_range_equiv uses to |
| value_range. |
| (vr_values::extract_range_from_stmt): Use simplify_using_ranges class. |
| (vr_values::simplify_truth_ops_using_ranges): Move to |
| simplify_using_ranges class. |
| (vr_values::simplify_div_or_mod_using_ranges): Same. |
| (vr_values::simplify_min_or_max_using_ranges): Same. |
| (vr_values::simplify_abs_using_ranges): Same. |
| (vr_values::simplify_bit_ops_using_ranges): Same. |
| (test_for_singularity): Change value_range_equiv uses to |
| value_range. |
| (range_fits_type_p): Same. |
| (vr_values::simplify_cond_using_ranges_1): Same. |
| (vr_values::simplify_cond_using_ranges_2): Make extern. |
| (vr_values::fold_cond): Move to simplify_using_ranges class. |
| (vr_values::simplify_switch_using_ranges): Same. |
| (vr_values::cleanup_edges_and_switches): Same. |
| (vr_values::simplify_float_conversion_using_ranges): Same. |
| (vr_values::simplify_internal_call_using_ranges): Same. |
| (vr_values::two_valued_val_range_p): Same. |
| (vr_values::simplify_stmt_using_ranges): Move to... |
| (simplify_using_ranges::simplify): ...here. |
| * vr-values.h (class vr_values): Move all the simplification of |
| statements using ranges methods and code from here... |
| (class simplify_using_ranges): ...to here. |
| (simplify_cond_using_ranges_2): New extern prototype. |
| |
| 2020-06-27 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced |
| member, move outer member. |
| (struct omp_for_data): Add first_nonrect and last_nonrect members. |
| * omp-general.c (omp_extract_for_data): Initialize first_nonrect, |
| last_nonrect and non_rect_referenced members. |
| * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular |
| loops. |
| (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle |
| non-rectangular loops. |
| (extract_omp_for_update_vars): Likewise. |
| (expand_omp_for_generic, expand_omp_for_static_nochunk, |
| expand_omp_for_static_chunk, expand_omp_simd, |
| expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust |
| expand_omp_for_init_vars and extract_omp_for_update_vars callers. |
| (expand_omp_for): Don't sorry on non-composite worksharing-loop or |
| distribute. |
| |
| 2020-06-26 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95655 |
| * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED): |
| Removed. |
| * config/i386/i386.c (ix86_frame_pointer_required): Update |
| comments. |
| |
| 2020-06-26 Yichao Yu <yyc1992@gmail.com> |
| |
| * multiple_target.c (redirect_to_specific_clone): Fix tests |
| to check individual attribute rather than an attribute list. |
| |
| 2020-06-26 Peter Bergner <bergner@linux.ibm.com> |
| |
| * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New. |
| * doc/extend.texi (PowerPC Built-in Functions): Document power10, |
| arch_3_1 and mma. |
| |
| 2020-06-26 Marek Polacek <polacek@redhat.com> |
| |
| * doc/invoke.texi (C Dialect Options): Adjust -std default for C++. |
| * doc/standards.texi (C Language): Correct the default dialect. |
| (C++ Language): Update the default for C++ to gnu++17. |
| |
| 2020-06-26 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * tree-ssa-reassoc.c (dump_range_entry): New function. |
| (debug_range_entry): New debug function. |
| (update_range_test): Invoke dump_range_entry for dumping. |
| (optimize_range_tests_to_bit_test): Merge the entry test in the |
| bit test when possible and lower the profitability threshold. |
| |
| 2020-06-26 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95897 |
| * tree-vectorizer.h (vectorizable_induction): Remove |
| unused gimple_stmt_iterator * parameter. |
| * tree-vect-loop.c (vectorizable_induction): Likewise. |
| (vect_analyze_loop_operations): Adjust. |
| * tree-vect-stmts.c (vect_analyze_stmt): Likewise. |
| (vect_transform_stmt): Likewise. |
| * tree-vect-slp.c (vect_schedule_slp_instance): Adjust |
| for fold-left reductions, clarify existing reduction case. |
| |
| 2020-06-25 Nick Clifton <nickc@redhat.com> |
| |
| * config/m32r/m32r.md (movsicc): Disable pattern. |
| |
| 2020-06-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95839 |
| * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature |
| check on the number of datarefs. |
| |
| 2020-06-25 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/rs6000/rs6000-call.c (mma_init_builtins): Cast |
| the insn_data n_operands value to unsigned. |
| |
| 2020-06-25 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_schedule_slp_instance): Always use |
| vector defs to determine insertion place. |
| |
| 2020-06-25 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95874 |
| * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB. |
| (PTA_ICELAKE_SERVER): Add PTA_CLWB. |
| (PTA_TIGERLAKE): Add PTA_CLWB. |
| |
| 2020-06-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95866 |
| * tree-vect-stmts.c (vectorizable_shift): Reject incompatible |
| vectorized shift operands. For scalar shifts use lane zero |
| of a vectorized shift operand. |
| |
| 2020-06-25 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/95745 |
| PR middle-end/95830 |
| * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead |
| SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always |
| return 0. |
| * tree-vect-generic.c (expand_vector_condition): Remove dead |
| SSA_NAMEs used as the first argument of a VEC_COND_EXPR. |
| |
| 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com> |
| |
| PR target/94954 |
| * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update. |
| * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec. |
| (convert_4f32_8f16): New define_expand |
| * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define |
| and overload. |
| * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New |
| overloaded builtin entry. |
| * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec. |
| (vsx_xvcvsphp): New define_insn. |
| |
| 2020-06-24 Roger Sayle <roger@nextmovesoftware.com> |
| Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0. |
| |
| 2020-06-24 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * simplify-rtx.c (simplify_unary_operation_1): Simplify |
| (parity (parity x)) as (parity x), i.e. PARITY is idempotent. |
| |
| 2020-06-24 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95866 |
| * tree-vect-slp.c (vect_slp_tree_uniform_p): New. |
| (vect_build_slp_tree_2): Properly reset matches[0], |
| ignore uniform constants. |
| |
| 2020-06-24 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95660 |
| * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id. |
| (cpu_indicator_init): Likewise. |
| * config/i386/driver-i386.c (host_detect_local_cpu): Updated. |
| |
| 2020-06-24 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95774 |
| * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake |
| detection with AVX512BF16. |
| |
| 2020-06-24 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95843 |
| * common/config/i386/i386-isas.h: New file. Extracted from |
| gcc/config/i386/i386-builtins.c. |
| (_isa_names_table): Add option. |
| (ISA_NAMES_TABLE_START): New. |
| (ISA_NAMES_TABLE_END): Likewise. |
| (ISA_NAMES_TABLE_ENTRY): Likewise. |
| (isa_names_table): Defined with ISA_NAMES_TABLE_START, |
| ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs |
| from enum processor_features. |
| * config/i386/driver-i386.c: Include |
| "common/config/i386/cpuinfo.h" and |
| "common/config/i386/i386-isas.h". |
| (has_feature): New macro. |
| (host_detect_local_cpu): Call cpu_indicator_init to get CPU |
| features. Use has_feature to detect processor features. Call |
| Call get_intel_cpu to get the newer Intel CPU name. Use |
| isa_names_table to generate command-line options. |
| * config/i386/i386-builtins.c: Include |
| "common/config/i386/i386-isas.h". |
| (_arch_names_table): Removed. |
| (isa_names_table): Likewise. |
| |
| 2020-06-24 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95259 |
| * common/config/i386/cpuinfo.h: New file. |
| (__processor_model): Moved from libgcc/config/i386/cpuinfo.h. |
| (__processor_model2): New. |
| (CHECK___builtin_cpu_is): New. Defined as empty if not defined. |
| (has_cpu_feature): New function. |
| (set_cpu_feature): Likewise. |
| (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use |
| CHECK___builtin_cpu_is. Return AMD CPU name. |
| (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use |
| Use CHECK___builtin_cpu_is. Return Intel CPU name. |
| (get_available_features): Moved from libgcc/config/i386/cpuinfo.c. |
| Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX, |
| FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB, |
| FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B, |
| FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE, |
| FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM, |
| FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B, |
| FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE, |
| FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW, |
| FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED, |
| FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA, |
| FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES, |
| FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC, |
| FEATURE_XSAVEOPT and FEATURE_XSAVES |
| (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c. |
| Also update cpu_model2. |
| * common/config/i386/i386-cpuinfo.h (processor_vendor): Add |
| Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC. |
| (processor_features): Moved from gcc/config/i386/i386-builtins.c. |
| Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP, |
| FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, |
| FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B, |
| FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C, |
| FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT, |
| FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT, |
| FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI, |
| FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG, |
| FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW, |
| FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED, |
| FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA, |
| FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES, |
| FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC, |
| FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX. |
| (SIZE_OF_CPU_FEATURES): New. |
| * config/i386/i386-builtins.c (processor_features): Removed. |
| (isa_names_table): Replace F_XXX with FEATURE_XXX. |
| (fold_builtin_cpu): Change __cpu_features2 to an array. |
| |
| 2020-06-24 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95842 |
| * common/config/i386/i386-common.c (processor_alias_table): Add |
| processor model and priority to each entry. |
| (pta_size): Updated with -6. |
| (num_arch_names): New. |
| * common/config/i386/i386-cpuinfo.h: New file. |
| * config/i386/i386-builtins.c (feature_priority): Removed. |
| (processor_model): Likewise. |
| (_arch_names_table): Likewise. |
| (arch_names_table): Likewise. |
| (_isa_names_table): Replace P_ZERO with P_NONE. |
| (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use |
| processor_alias_table. |
| (fold_builtin_cpu): Replace arch_names_table with |
| processor_alias_table. |
| * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h". |
| (pta): Add model and priority. |
| (num_arch_names): New. |
| |
| 2020-06-24 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp): |
| Declare. |
| * tree-vect-data-refs.c (vect_preserves_scalar_order_p): |
| Simplify for new position of vectorized SLP loads. |
| (vect_slp_analyze_node_dependences): Adjust for it. |
| (vect_slp_analyze_and_verify_node_alignment): Compute alignment |
| for the first stmts dataref. |
| * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New. |
| (vect_schedule_slp_instance): Emit loads before the |
| first scalar stmt. |
| * tree-vect-stmts.c (vectorizable_load): Do what the comment |
| says and use vect_find_first_scalar_stmt_in_slp. |
| |
| 2020-06-24 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95856 |
| * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor |
| region marker -1u. |
| |
| 2020-06-24 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/95810 |
| * fold-const.c (fold_cond_expr_with_comparison): Optimize |
| A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A). |
| |
| 2020-06-24 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-low.c (lower_omp_for): Fix two pastos. |
| |
| 2020-06-24 Martin Liska <mliska@suse.cz> |
| |
| * optc-save-gen.awk: Compare string options in cl_optimization_compare |
| by strcmp. |
| |
| 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| * config.gcc: Identify power10 as a 64-bit processor and as valid |
| for --with-cpu and --with-tune. |
| |
| 2020-06-23 David Edelsohn <dje.gcc@gmail.com> |
| |
| * Makefile.in (LANG_MAKEFRAGS): Same. |
| (tmake_file): Use -include. |
| (xmake_file): Same. |
| |
| 2020-06-23 Michael Meissner <meissner@linux.ibm.com> |
| |
| * REVISION: Delete file meant for a private branch. |
| |
| 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| PR target/95646 |
| * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use |
| 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'. |
| |
| 2020-06-23 Alexandre Oliva <oliva@adacore.com> |
| |
| * collect-utils.h (dumppfx): New. |
| * collect-utils.c (dumppfx): Likewise. |
| * lto-wrapper.c (run_gcc): Set global dumppfx. |
| (compile_offload_image): Pass a -dumpbase on to mkoffload. |
| * config/nvptx/mkoffload.c (ptx_dumpbase): New. |
| (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey |
| save_temps. |
| (compile_native): Pass -dumpbase et al to compiler. |
| * config/gcn/mkoffload.c (gcn_dumpbase): New. |
| (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey |
| save_temps. Pass -dumpbase et al to offload target compiler. |
| (compile_native): Pass -dumpbase et al to compiler. |
| |
| 2020-06-23 Michael Meissner <meissner@linux.ibm.com> |
| |
| * REVISION: New file. |
| |
| 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE. |
| Update comment for ISA 3.1. |
| * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE. |
| * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10 |
| on AIX, and -mpower10 elsewhere. |
| * config/rs6000/future.md: Delete. |
| * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not |
| TARGET_FUTURE. |
| * config/rs6000/power10.md: New file. |
| * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not |
| PPC_PLATFORM_FUTURE. |
| * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_* |
| names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of |
| RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*. |
| Use BU_P10_* instead of BU_FUTURE_*. |
| * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define |
| _ARCH_PWR10 instead of _ARCH_PWR_FUTURE. |
| (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not |
| FUTURE_BUILTIN_VEC_XXEVAL. |
| * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*. |
| Update compiler messages. |
| * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not |
| ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. |
| * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not |
| PROCESSOR_FUTURE. |
| * config/rs6000/rs6000-string.c: Ditto. |
| * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10" |
| instead of "future", reorder it to right after "power9". |
| * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10, |
| not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use |
| RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages. |
| Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER, |
| not ISA_FUTURE_MASKS_SERVER. |
| (rs6000_opt_masks): Use "power10" instead of "future". |
| (rs6000_builtin_mask_names): Ditto. |
| (rs6000_disable_incompatible_switches): Ditto. |
| * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use |
| -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE. |
| Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10, |
| not RS6000_BTM_FUTURE. |
| * config/rs6000/rs6000.md: Use "power10", not "future". Use |
| TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not |
| "future.md". |
| * config/rs6000/rs6000.opt (mfuture): Delete. |
| (mpower10): New. |
| * config/rs6000/t-rs6000: Use "power10.md", not "future.md". |
| * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE. |
| |
| 2020-06-22 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * coretypes.h (first_type): Delete. |
| * recog.h (insn_gen_fn::operator()): Go back to using a decltype. |
| |
| 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item. |
| (arm_mve_hw): Likewise. |
| |
| 2020-06-22 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/95791 |
| * config/i386/i386.c (ix86_dirflag_mode_needed): Skip |
| EXT_REX_SSE_REG_P. |
| |
| 2020-06-22 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95770 |
| * tree-vect-slp.c (vect_schedule_slp_instance): Also consider |
| external defs. |
| |
| 2020-06-22 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments. |
| (gcn_return_in_memory): Return vectors in memory. |
| |
| 2020-06-22 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-general.c (omp_extract_for_data): For triangular loops with |
| all loop invariant expressions constant where the innermost loop is |
| executed at least once compute number of iterations at compile time. |
| |
| 2020-06-22 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call. |
| (DRIVER_SELF_SPECS): New. |
| |
| 2020-06-22 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New. |
| (RISCV_FTYPE_ATYPES0): New. |
| (riscv_builtins): Using RISCV_USI_FTYPE for frflags. |
| * config/riscv/riscv-ftypes.def: Remove VOID argument. |
| |
| 2020-06-21 David Edelsohn <dje.gcc@gmail.com> |
| |
| * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit. |
| * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option. |
| (ASM_SPEC32): New. |
| (ASM_SPEC64): New. |
| (ASM_CPU_SPEC): Remove vsx and altivec options. |
| (CPP_SPEC_COMMON): Rename from CPP_SPEC. |
| (CPP_SPEC32): New. |
| (CPP_SPEC64): New. |
| (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON.. |
| (TARGET_DEFAULT): Only define if not BIARCH. |
| (LIB_SPEC_COMMON): Rename from LIB_SPEC. |
| (LIB_SPEC32): New. |
| (LIB_SPEC64): New. |
| (LINK_SPEC_COMMON): Rename from LINK_SPEC. |
| (LINK_SPEC32): New. |
| (LINK_SPEC64): New. |
| (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase. |
| (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P. |
| (CPP_SPEC): Same. |
| (CPLUSPLUS_CPP_SPEC): Same. |
| (LIB_SPEC): Same. |
| (LINK_SPEC): Same. |
| (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs. |
| * config/rs6000/defaultaix64.h: New file. |
| * config/rs6000/t-aix64: New file. |
| |
| 2020-06-21 Peter Bergner <bergner@linux.ibm.com> |
| |
| * config/rs6000/predicates.md (mma_assemble_input_operand): New. |
| * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3, |
| BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA |
| built-in functions. |
| (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR, |
| PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, |
| PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP, |
| PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN, |
| PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN, |
| PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP, |
| PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4, |
| PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP, |
| XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2, |
| XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER, |
| XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN, |
| XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S, |
| XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP, |
| XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins. |
| * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P. |
| Allow zero constants. |
| (print_operand) <case 'A'>: New output modifier. |
| (rs6000_split_multireg_move): Add support for inserting accumulator |
| priming and depriming instructions. Add support for splitting an |
| assemble accumulator pattern. |
| * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin, |
| rs6000_gimple_fold_mma_builtin): New functions. |
| (RS6000_BUILTIN_M): New macro. |
| (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes. |
| (bdesc_mma): Add new MMA built-in support. |
| (htm_expand_builtin): Use RS6000_BTC_OPND_MASK. |
| (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and |
| RS6000_BTM_MMA. |
| (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute. |
| (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p |
| and rs6000_gimple_fold_mma_builtin. |
| (rs6000_expand_builtin): Call mma_expand_builtin. |
| Use RS6000_BTC_OPND_MASK. |
| (rs6000_init_builtins): Adjust comment. Call mma_init_builtins. |
| (htm_init_builtins): Use RS6000_BTC_OPND_MASK. |
| (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and |
| VSX_BUILTIN_XVCVBF16SP. |
| * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY, |
| RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR, |
| RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines. |
| (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST, |
| RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values. |
| * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant. |
| (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2, |
| UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP, |
| UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP, |
| UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN, |
| UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN, |
| UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER, |
| UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP, |
| UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP, |
| UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN, |
| UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN, |
| UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2, |
| UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S, |
| UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8, |
| UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4, |
| UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP, |
| UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN, |
| UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN, |
| UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN, |
| UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP, |
| UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP, |
| UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER, |
| UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN, |
| UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP, |
| UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8, |
| UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP, |
| UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New. |
| (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8, |
| MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4, |
| MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4, |
| MMA_AVVI4I4I4): New define_int_iterator. |
| (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2, |
| avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4, |
| avvi4i4i4): New define_int_attr. |
| (*movpxi): Add zero constant alternative. |
| (mma_assemble_pair, mma_assemble_acc): New define_expand. |
| (*mma_assemble_acc): New define_insn_and_split. |
| (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>, |
| mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>, |
| mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>, |
| mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn. |
| * config/rs6000/rs6000.md (define_attr "type"): New type mma. |
| * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New. |
| (UNSPEC_VSX_XVCVSPBF16): Likewise. |
| (XVCVBF16): New define_int_iterator. |
| (xvcvbf16): New define_int_attr. |
| (vsx_<xvcvbf16>): New define_insn. |
| * doc/extend.texi: Document the mma built-ins. |
| |
| 2020-06-21 Peter Bergner <bergner@linux.ibm.com> |
| Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/mma.md: New file. |
| * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define |
| __MMA__ for mma. |
| * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support |
| for __vector_pair and __vector_quad types. |
| * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add |
| OPTION_MASK_MMA. |
| (POWERPC_MASKS): Likewise. |
| * config/rs6000/rs6000-modes.def (OI, XI): New integer modes. |
| (POI, PXI): New partial integer modes. |
| * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define. |
| (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P. |
| (rs6000_hard_regno_mode_ok_uncached): Likewise. |
| Add support for POImode being allowed in VSX registers and PXImode |
| being allowed in FP registers. |
| (rs6000_modes_tieable_p): Adjust comment. |
| Add support for POImode and PXImode. |
| (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode |
| XImode, PXImode, V2SImode, V2SFmode and CCFPmode.. |
| (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P. |
| Set up appropriate addr_masks for vector pair and vector quad addresses. |
| (rs6000_init_hard_regno_mode_ok): Add support for vector pair and |
| vector quad registers. Setup reload handlers for POImode and PXImode. |
| (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA. |
| (rs6000_option_override_internal): Error if -mmma is specified |
| without -mcpu=future. |
| (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P. |
| (quad_address_p): Change size test to less than 16 bytes. |
| (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair |
| and vector quad instructions. |
| (avoiding_indexed_address_p): Likewise. |
| (rs6000_emit_move): Disallow POImode and PXImode moves involving |
| constants. |
| (rs6000_preferred_reload_class): Prefer VSX registers for POImode |
| and FP registers for PXImode. |
| (rs6000_split_multireg_move): Support splitting POImode and PXImode |
| move instructions. |
| (rs6000_mangle_type): Adjust comment. Add support for mangling |
| __vector_pair and __vector_quad types. |
| (rs6000_opt_masks): Add entry for mma. |
| (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE. |
| (rs6000_function_value): Use VECTOR_ALIGNMENT_P. |
| (address_to_insn_form): Likewise. |
| (reg_to_non_prefixed): Likewise. |
| (rs6000_invalid_conversion): New function. |
| * config/rs6000/rs6000.h (MASK_MMA): Define. |
| (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled. |
| (VECTOR_ALIGNMENT_P): New helper macro. |
| (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P. |
| (RS6000_BTM_MMA): Define. |
| (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE. |
| (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and |
| RS6000_BTI_vector_quad. |
| (vector_pair_type_node): New. |
| (vector_quad_type_node): New. |
| * config/rs6000/rs6000.md: Include mma.md. |
| (define_mode_iterator RELOAD): Add POI and PXI. |
| * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md. |
| * config/rs6000/rs6000.opt (-mmma): New. |
| * doc/invoke.texi: Document -mmma. |
| |
| 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com> |
| |
| PR tree-optimization/95638 |
| * tree-loop-distribution.c (pg_edge_callback_data): New field. |
| (loop_distribution::break_alias_scc_partitions): Record and restore |
| postorder information. Fix memory leak. |
| |
| 2020-06-19 Tobias Burnus <tobias@codesourcery.com> |
| |
| * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED. |
| (output_file_start): Use const 'char *'. |
| |
| 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com> |
| |
| PR tree-optimization/94880 |
| * match.pd (A | B) - B -> (A & ~B): New simplification. |
| |
| 2020-06-19 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust |
| for lane permutations. |
| |
| 2020-06-19 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95761 |
| * tree-vect-slp.c (vect_schedule_slp_instance): Walk all |
| vectorized stmts for finding the last one. |
| |
| 2020-06-18 Felix Yang <felix.yang@huawei.com> |
| |
| * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call |
| vect_relevant_for_alignment_p to filter out data references in |
| the loop whose alignment is irrelevant when trying loop peeling |
| to force alignment. |
| |
| 2020-06-18 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode |
| iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248 |
| mode iterator for the first operand of ZERO_EXTRACT RTX. |
| Change ext_register_operand predicate to register_operand. |
| Rename from *cmpqi_ext_1. |
| (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2. |
| (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3. |
| (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4. |
| (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX. |
| (*extv<mode>): Use SWI24 mode iterator for the first operand |
| of ZERO_EXTRACT RTX. Change ext_register_operand predicate |
| to register_operand. |
| (*extzv<mode>): Use SWI248 mode iterator for the first operand |
| of ZERO_EXTRACT RTX. Change ext_register_operand predicate |
| to register_operand. |
| (*extzvqi): Use SWI248 mode iterator instead of SImode for |
| ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand |
| of ZERO_EXTRACT RTX. Change ext_register_operand predicate to |
| register_operand. |
| (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode |
| iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248 |
| mode iterator for the first operand of ZERO_EXTRACT RTX. |
| Change ext_register_operand predicate to register_operand. |
| (@insv<mode>_1): Use SWI248 mode iterator for the first operand |
| of ZERO_EXTRACT RTX. Change ext_register_operand predicate to |
| register_operand. |
| (*insvqi_1): Use SWI248 mode iterator instead of SImode |
| for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the |
| first operand of ZERO_EXTRACT RTX. Change ext_register_operand |
| predicate to register_operand. |
| (*insvqi_2): Ditto. |
| (*insvqi_3): Ditto. |
| (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode |
| iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248 |
| mode iterator for the first operand of ZERO_EXTRACT RTX. |
| Change ext_register_operand predicate to register_operand. |
| (addqi_ext_1): New expander. |
| (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode |
| for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first |
| operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate |
| to register_operand. Rename from *addqi_ext_1. |
| (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2. |
| (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX. |
| (udivmodqi4): Ditto. |
| (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX. |
| (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode |
| for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first |
| operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate |
| to register_operand. Rename from *testqi_ext_1. |
| (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2. |
| (andqi_ext_1): New expander. |
| (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode |
| for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first |
| operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate |
| to register_operand. Rename from andqi_ext_1. |
| (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc. |
| (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2. |
| (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1. |
| (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2. |
| (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX. |
| (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode |
| for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first |
| operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate |
| to register_operand. Rename from *xorqi_ext_1_cc. |
| * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT |
| in mode, matching its first operand. |
| (promote_duplicated_reg): Update for renamed insv<mode>_1. |
| * config/i386/predicates.md (ext_register_operand): Remove predicate. |
| |
| 2020-06-18 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/95667 |
| PR middle-end/92814 |
| * builtins.c (compute_objsize): Remove call to |
| compute_builtin_object_size and instead compute conservative sizes |
| directly here. |
| |
| 2020-06-18 Martin Liska <mliska@suse.cz> |
| |
| * coretypes.h (struct iterator_range): New type. |
| * tree-vect-patterns.c (vect_determine_precisions): Use |
| range-based iterator. |
| (vect_pattern_recog): Likewise. |
| * tree-vect-slp.c (_bb_vec_info): Likewise. |
| (_bb_vec_info::~_bb_vec_info): Likewise. |
| (vect_slp_check_for_constructors): Likewise. |
| * tree-vectorizer.h:Add new iterators |
| and functions that use it. |
| |
| 2020-06-18 Martin Liska <mliska@suse.cz> |
| |
| * config/rs6000/rs6000-call.c (fold_build_vec_cmp): |
| Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument |
| of a VEC_COND_EXPR cannot be tcc_comparison and so that |
| a SSA_NAME needs to be created before we use it for the first |
| argument of the VEC_COND_EXPR. |
| (fold_compare_helper): Pass gsi to fold_build_vec_cmp. |
| |
| 2020-06-18 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/95739 |
| * internal-fn.c (expand_vect_cond_optab_fn): Move the result |
| to the target if necessary. |
| (expand_vect_cond_mask_optab_fn): Likewise. |
| |
| 2020-06-18 Martin Liska <mliska@suse.cz> |
| |
| * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with |
| vcond as we check for NULL pointer. |
| |
| 2020-06-18 Tobias Burnus <tobias@codesourcery.com> |
| |
| * gimple-pretty-print.c (dump_binary_rhs): Use braces to |
| silence empty-body warning with gcc_fallthrough. |
| |
| 2020-06-18 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/95699 |
| * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0 |
| as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable |
| declarations to the statements that set them where possible. |
| |
| 2020-06-18 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/95713 |
| * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow |
| scalar mode halfvectype other than vector boolean for |
| VEC_PACK_TRUNC_EXPR. |
| |
| 2020-06-18 Richard Biener <rguenther@suse.de> |
| |
| * varasm.c (assemble_variable): Make sure to not |
| defer output when outputting addressed constants. |
| (output_constant_def_contents): Likewise. |
| (add_constant_to_table): Take and pass on whether to |
| defer output. |
| (output_addressed_constants): Likewise. |
| (output_constant_def): Pass on whether to defer output |
| to add_constant_to_table. |
| (tree_output_constant_def): Defer output of constants. |
| |
| 2020-06-18 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (_slp_tree::two_operators): Remove. |
| (_slp_tree::lane_permutation): New member. |
| (_slp_tree::code): Likewise. |
| (SLP_TREE_TWO_OPERATORS): Remove. |
| (SLP_TREE_LANE_PERMUTATION): New. |
| (SLP_TREE_CODE): Likewise. |
| (vect_stmt_dominates_stmt_p): Declare. |
| * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function. |
| * tree-vect-stmts.c (vect_model_simple_cost): Remove |
| SLP_TREE_TWO_OPERATORS handling. |
| * tree-vect-slp.c (_slp_tree::_slp_tree): Amend. |
| (_slp_tree::~_slp_tree): Likewise. |
| (vect_two_operations_perm_ok_p): Remove. |
| (vect_build_slp_tree_1): Remove verification of two-operator |
| permutation here. |
| (vect_build_slp_tree_2): When we have two different operators |
| build two computation SLP nodes and a blend. |
| (vect_print_slp_tree): Print the lane permutation if it exists. |
| (slp_copy_subtree): Copy it. |
| (vect_slp_rearrange_stmts): Re-arrange it. |
| (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE |
| VEC_PERM_EXPR explicitely. |
| (vect_schedule_slp_instance): Likewise. Remove old |
| SLP_TREE_TWO_OPERATORS code. |
| (vectorizable_slp_permutation): New function. |
| |
| 2020-06-18 Martin Liska <mliska@suse.cz> |
| |
| * tree-vect-generic.c (expand_vector_condition): Check |
| for gassign before inspecting RHS. |
| |
| 2020-06-17 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * gimplify.c (omp_notice_threadprivate_variable) |
| (omp_default_clause, omp_notice_variable): 'inform' after 'error' |
| diagnostic. Adjust all users. |
| |
| 2020-06-17 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl == |
| NULL_TREE' check earlier. |
| |
| 2020-06-17 Forrest Timour <forrest.timour@gmail.com> |
| |
| * doc/extend.texi (attribute access): Fix a typo. |
| |
| 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com> |
| Kaipeng Zhou <zhoukaipeng3@huawei.com> |
| |
| PR tree-optimization/95199 |
| * tree-vect-stmts.c: Eliminate common stmts for bump and offset in |
| strided load/store operations and remove redundant code. |
| |
| 2020-06-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * coretypes.h (first_type): New alias template. |
| * recog.h (insn_gen_fn::operator()): Use it instead of a decltype. |
| Remove spurious “...” and split the function type out into a typedef. |
| |
| 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early |
| for PARALLELs. |
| |
| 2020-06-17 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed |
| in *vectype parameter. |
| (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what |
| vect_build_slp_tree_1 computed. |
| (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE. |
| (vect_slp_analyze_node_operations_1): Use the SLP node vector type. |
| (vect_schedule_slp_instance): Likewise. |
| * tree-vect-stmts.c (vect_is_simple_use): Take the vector type |
| from SLP_TREE_VECTYPE. |
| |
| 2020-06-17 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95717 |
| * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg): |
| Move BB SSA updating before exit/latch PHI current def copying. |
| |
| 2020-06-17 Martin Liska <mliska@suse.cz> |
| |
| * Makefile.in: Add new file. |
| * expr.c (expand_expr_real_2): Add gcc_unreachable as we should |
| not meet this condition. |
| (do_store_flag): Likewise. |
| * gimplify.c (gimplify_expr): Gimplify first argument of |
| VEC_COND_EXPR to be a SSA name. |
| * internal-fn.c (vec_cond_mask_direct): New. |
| (vec_cond_direct): Likewise. |
| (vec_condu_direct): Likewise. |
| (vec_condeq_direct): Likewise. |
| (expand_vect_cond_optab_fn): New. |
| (expand_vec_cond_optab_fn): Likewise. |
| (expand_vec_condu_optab_fn): Likewise. |
| (expand_vec_condeq_optab_fn): Likewise. |
| (expand_vect_cond_mask_optab_fn): Likewise. |
| (expand_vec_cond_mask_optab_fn): Likewise. |
| (direct_vec_cond_mask_optab_supported_p): Likewise. |
| (direct_vec_cond_optab_supported_p): Likewise. |
| (direct_vec_condu_optab_supported_p): Likewise. |
| (direct_vec_condeq_optab_supported_p): Likewise. |
| * internal-fn.def (VCOND): New OPTAB. |
| (VCONDU): Likewise. |
| (VCONDEQ): Likewise. |
| (VCOND_MASK): Likewise. |
| * optabs.c (get_rtx_code): Make it global. |
| (expand_vec_cond_mask_expr): Removed. |
| (expand_vec_cond_expr): Removed. |
| * optabs.h (expand_vec_cond_expr): Likewise. |
| (vector_compare_rtx): Make it global. |
| * passes.def: Add new pass_gimple_isel pass. |
| * tree-cfg.c (verify_gimple_assign_ternary): Add check |
| for VEC_COND_EXPR about first argument. |
| * tree-pass.h (make_pass_gimple_isel): New. |
| * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent |
| propagation of the first argument of a VEC_COND_EXPR. |
| * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as |
| first argument of a VEC_COND_EXPR. |
| (optimize_vec_cond_expr): Likewise. |
| * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME |
| for a first argument of created VEC_COND_EXPR. |
| (expand_vector_condition): Fix coding style. |
| * tree-vect-stmts.c (vectorizable_condition): Gimplify |
| first argument. |
| * gimple-isel.cc: New file. |
| |
| 2020-06-17 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text". |
| (BSS_SECTION_ASM_OP): Use ".bss". |
| (ASM_SPEC): Remove "-mattr=-code-object-v3". |
| (LINK_SPEC): Add "--export-dynamic". |
| * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with |
| PROCESSOR_VEGA10 and PROCESSOR_VEGA20. |
| * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant. |
| (load_image): Remove obsolete relocation handling. |
| Add ".kd" suffix to the symbol names. |
| * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62. |
| (gcn_option_override): Update gcn_isa test. |
| (gcn_kernel_arg_types): Update all the assembler directives. |
| Remove the obsolete options. |
| (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage. |
| (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and |
| PROCESSOR_VEGA20. |
| (output_file_start): Rework assembler file header. |
| (gcn_hsa_declare_function_name): Rework kernel metadata. |
| * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16. |
| * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum. |
| (PROCESSOR_VEGA10): New enum value. |
| (PROCESSOR_VEGA20): New enum value. |
| |
| 2020-06-17 Martin Liska <mliska@suse.cz> |
| |
| * gcov-dump.c (print_version): Collapse lisence header to 2 lines |
| in --version. |
| * gcov-tool.c (print_version): Likewise. |
| * gcov.c (print_version): Likewise. |
| |
| 2020-06-17 liuhongt <hongtao.liu@intel.com> |
| |
| PR target/95524 |
| * config/i386/i386-expand.c |
| (ix86_expand_vec_shift_qihi_constant): New function. |
| * config/i386/i386-protos.h |
| (ix86_expand_vec_shift_qihi_constant): Declare. |
| * config/i386/sse.md (<shift_insn><mode>3): Optimize shift |
| V*QImode by constant. |
| |
| 2020-06-16 Aldy Hernandez <aldyh@redhat.com> |
| |
| PR tree-optimization/95649 |
| * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless |
| value is a constant. |
| |
| 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| * config.in: Regenerate. |
| * config/s390/s390.c (print_operand): Emit vector alignment hints |
| for target z13, if AS accepts them. For other targets the logic |
| stays the same. |
| * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define |
| macro. |
| * configure: Regenerate. |
| * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13. |
| |
| 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic |
| arguments. |
| (__arm_vaddq_m_n_s32): Likewise. |
| (__arm_vaddq_m_n_s16): Likewise. |
| (__arm_vaddq_m_n_u8): Likewise. |
| (__arm_vaddq_m_n_u32): Likewise. |
| (__arm_vaddq_m_n_u16): Likewise. |
| (__arm_vaddq_m): Modify polymorphic variant. |
| |
| 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate |
| and constraint of all the operands. |
| (mve_sqrshrl_sat<supf>_di): Likewise. |
| (mve_uqrshl_si): Likewise. |
| (mve_sqrshr_si): Likewise. |
| (mve_uqshll_di): Likewise. |
| (mve_urshrl_di): Likewise. |
| (mve_uqshl_si): Likewise. |
| (mve_urshr_si): Likewise. |
| (mve_sqshl_si): Likewise. |
| (mve_srshr_si): Likewise. |
| (mve_srshrl_di): Likewise. |
| (mve_sqshll_di): Likewise. |
| * config/arm/predicates.md (arm_low_register_operand): Define. |
| |
| 2020-06-16 Jakub Jelinek <jakub@redhat.com> |
| |
| * tree.h (OMP_FOR_NON_RECTANGULAR): Define. |
| * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered |
| or dist_schedule clause on non-rectangular loops. Handle |
| gimplification of non-rectangular lb/b expressions. When changing |
| iteration variable, adjust also non-rectangular lb/b expressions |
| referencing that. |
| * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer |
| members. |
| (struct omp_for_data): Add non_rect member. |
| * omp-general.c (omp_extract_for_data): Handle non-rectangular |
| loops. Fill in non_rect, m1, m2 and outer. |
| * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions. |
| * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported |
| non-rectangular loop cases and assert for cases that can't be |
| non-rectangular. |
| * tree-pretty-print.c (dump_mem_ref): Formatting fix. |
| (dump_omp_loop_non_rect_expr): New function. |
| (dump_generic_node): Handle non-rectangular OpenMP loops. |
| * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare. |
| * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular |
| OpenMP loops. |
| |
| 2020-06-16 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/95690 |
| * varasm.c (build_constant_desc): Remove set_mem_attributes call. |
| |
| 2020-06-16 Kito Cheng <kito.cheng@sifive.com> |
| |
| PR target/95683 |
| * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove |
| assertion and turn it into a early exit check. |
| |
| 2020-06-15 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare |
| new ENSURE_SINGLE_ACCESS constant and move variables down. If it is |
| true and all elements are zero, then always clear. Return GS_ERROR |
| if a temporary would be created for it and NOTIFY_TEMP_CREATION set. |
| (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but |
| the type is aggregate non-addressable, ask gimplify_init_constructor |
| whether it can generate a single access to the target. |
| |
| 2020-06-15 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar |
| access on the LHS is replaced with a scalar access, propagate the |
| TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access. |
| |
| 2020-06-15 Max Filippov <jcmvbkbc@gmail.com> |
| |
| * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove |
| TARGET_THREADPTR reference. |
| (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use |
| targetm.have_tls instead of TARGET_HAVE_TLS. |
| (xtensa_option_override): Set targetm.have_tls to false in |
| configurations without THREADPTR. |
| |
| 2020-06-15 Max Filippov <jcmvbkbc@gmail.com> |
| |
| * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to |
| assembler/linker. |
| * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto. |
| * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto. |
| * config/xtensa/xtensa.c (xtensa_option_override): Initialize |
| xtensa_windowed_abi if needed. |
| * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New |
| macro. |
| (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi. |
| * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target |
| option variable. |
| (mabi=call0, mabi=windowed): New options. |
| * doc/invoke.texi: Document new -mabi= Xtensa-specific options. |
| |
| 2020-06-15 Max Filippov <jcmvbkbc@gmail.com> |
| |
| * config/xtensa/xtensa.c (xtensa_can_eliminate): New function. |
| (TARGET_CAN_ELIMINATE): New macro. |
| * config/xtensa/xtensa.h |
| (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM) |
| (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros. |
| (HARD_FRAME_POINTER_REGNUM): Define using |
| XTENSA_*_HARD_FRAME_POINTER_REGNUM. |
| (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM |
| by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and |
| XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM. |
| |
| 2020-06-15 Felix Yang <felix.yang@huawei.com> |
| |
| * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename |
| parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS |
| when possible. |
| (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS |
| when possible. |
| * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use |
| LOOP_VINFO_DATAREFS when possible. |
| (update_epilogue_loop_vinfo): Likewise. |
| |
| 2020-06-15 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to |
| unsigned for i. |
| (riscv_gpr_save_operation_p): Change type to unsigned for i and |
| len. |
| |
| 2020-06-15 Hongtao Liu <hongtao.liu@intel.com> |
| |
| PR target/95488 |
| * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New |
| function. |
| * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare. |
| * config/i386/sse.md (mul<mode>3): Drop mask_name since |
| there's no real simd int8 multiplication instruction with |
| mask. Also optimize it under TARGET_AVX512BW. |
| (mulv8qi3): New expander. |
| |
| 2020-06-12 Marco Elver <elver@google.com> |
| |
| * gimplify.c (gimplify_function_tree): Optimize and do not emit |
| IFN_TSAN_FUNC_EXIT in a finally block if we do not need it. |
| * params.opt: Add --param=tsan-instrument-func-entry-exit=. |
| * tsan.c (instrument_memory_accesses): Make |
| fentry_exit_instrument bool depend on new param. |
| |
| 2020-06-12 Felix Yang <felix.yang@huawei.com> |
| |
| PR tree-optimization/95570 |
| * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function. |
| (vect_verify_datarefs_alignment): Call it to filter out data references |
| in the loop whose alignment is irrelevant. |
| (vect_get_peeling_costs_all_drs): Likewise. |
| (vect_peeling_supportable): Likewise. |
| (vect_enhance_data_refs_alignment): Likewise. |
| |
| 2020-06-12 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95633 |
| * tree-vect-stmts.c (vectorizable_condition): Properly |
| guard the vec_else_clause access with EXTRACT_LAST_REDUCTION. |
| |
| 2020-06-12 Martin Liška <mliska@suse.cz> |
| |
| * cgraphunit.c (process_symver_attribute): Wrap weakref keyword. |
| * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new |
| line. |
| * lto-wrapper.c (merge_and_complain): Wrap option names. |
| |
| 2020-06-12 Kewen Lin <linkw@gcc.gnu.org> |
| |
| * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename |
| LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename |
| LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE. |
| (vect_set_loop_condition_masked): Renamed to ... |
| (vect_set_loop_condition_partial_vectors): ... this. Rename |
| LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename |
| vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors. |
| (vect_set_loop_condition_unmasked): Renamed to ... |
| (vect_set_loop_condition_normal): ... this. |
| (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to |
| vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked |
| to vect_set_loop_condition_partial_vectors. |
| (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE |
| to LOOP_VINFO_RGROUP_COMPARE_TYPE. |
| * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored |
| out from ... |
| (vect_analyze_loop_costing): ... this. |
| (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to |
| compare_type. |
| (vect_min_prec_for_max_niters): New, factored out from ... |
| (vect_verify_full_masking): ... this. Rename |
| vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors. |
| Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. |
| Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE. |
| (vectorizable_reduction): Update some dumpings with partial |
| vectors instead of fully-masked. |
| (vectorizable_live_operation): Likewise. |
| (vect_iv_limit_for_full_masking): Renamed to ... |
| (vect_iv_limit_for_partial_vectors): ... this. |
| * tree-vect-stmts.c (check_load_store_masking): Renamed to ... |
| (check_load_store_for_partial_vectors): ... this. Update some |
| dumpings with partial vectors instead of fully-masked. |
| (vectorizable_store): Rename check_load_store_masking to |
| check_load_store_for_partial_vectors. |
| (vectorizable_load): Likewise. |
| * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ... |
| (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this. |
| (LOOP_VINFO_MASK_IV_TYPE): Renamed to ... |
| (LOOP_VINFO_RGROUP_IV_TYPE): ... this. |
| (vect_iv_limit_for_full_masking): Renamed to ... |
| (vect_iv_limit_for_partial_vectors): this. |
| (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type. |
| Rename iv_type to rgroup_iv_type. |
| |
| 2020-06-12 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2) |
| (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6) |
| (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10) |
| (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13) |
| (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete. |
| (insn_gen_fn::operator()): Replace overloaded definitions with |
| a parameter-pack version. |
| |
| 2020-06-12 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR target/93492 |
| * config/i386/i386-features.c (rest_of_insert_endbranch): |
| Renamed to ... |
| (rest_of_insert_endbr_and_patchable_area): Change return type |
| to void. Add need_endbr and patchable_area_size arguments. |
| Don't call timevar_push nor timevar_pop. Replace |
| endbr_queued_at_entrance with insn_queued_at_entrance. Insert |
| UNSPECV_PATCHABLE_AREA for patchable area. |
| (pass_data_insert_endbranch): Renamed to ... |
| (pass_data_insert_endbr_and_patchable_area): This. Change |
| pass name to endbr_and_patchable_area. |
| (pass_insert_endbranch): Renamed to ... |
| (pass_insert_endbr_and_patchable_area): This. Add need_endbr |
| and patchable_area_size;. |
| (pass_insert_endbr_and_patchable_area::gate): Set and check |
| need_endbr and patchable_area_size. |
| (pass_insert_endbr_and_patchable_area::execute): Call |
| timevar_push and timevar_pop. Pass need_endbr and |
| patchable_area_size to rest_of_insert_endbr_and_patchable_area. |
| (make_pass_insert_endbranch): Renamed to ... |
| (make_pass_insert_endbr_and_patchable_area): This. |
| * config/i386/i386-passes.def: Replace pass_insert_endbranch |
| with pass_insert_endbr_and_patchable_area. |
| * config/i386/i386-protos.h (ix86_output_patchable_area): New. |
| (make_pass_insert_endbranch): Renamed to ... |
| (make_pass_insert_endbr_and_patchable_area): This. |
| * config/i386/i386.c (ix86_asm_output_function_label): Set |
| function_label_emitted to true. |
| (ix86_print_patchable_function_entry): New function. |
| (ix86_output_patchable_area): Likewise. |
| (x86_function_profiler): Replace endbr_queued_at_entrance with |
| insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR. |
| Call ix86_output_patchable_area to generate patchable area if |
| needed. |
| (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New. |
| * config/i386/i386.h (queued_insn_type): New. |
| (machine_function): Add function_label_emitted. Replace |
| endbr_queued_at_entrance with insn_queued_at_entrance. |
| * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New. |
| (patchable_area): New. |
| |
| 2020-06-11 Martin Liska <mliska@suse.cz> |
| |
| * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding |
| style. |
| |
| 2020-06-11 Martin Liska <mliska@suse.cz> |
| |
| PR target/95627 |
| * config/rs6000/rs6000.c (rs6000_density_test): Skip debug |
| statements. |
| |
| 2020-06-11 Martin Liska <mliska@suse.cz> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR sanitizer/95634 |
| * asan.c (asan_emit_stack_protection): Fix emission for ilp32 |
| by using Pmode instead of ptr_mode. |
| |
| 2020-06-11 Kewen Lin <linkw@gcc.gnu.org> |
| |
| * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ... |
| (vect_set_loop_control): ... this. |
| (vect_maybe_permute_loop_masks): Rename rgroup_masks related things. |
| (vect_set_loop_masks_directly): Renamed to ... |
| (vect_set_loop_controls_directly): ... this. Also rename some |
| variables with ctrl instead of mask. Rename vect_set_loop_mask to |
| vect_set_loop_control. |
| (vect_set_loop_condition_masked): Rename rgroup_masks related things. |
| Also rename some variables with ctrl instead of mask. |
| * tree-vect-loop.c (release_vec_loop_masks): Renamed to ... |
| (release_vec_loop_controls): ... this. Rename rgroup_masks related |
| things. |
| (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to |
| release_vec_loop_controls. |
| (can_produce_all_loop_masks_p): Rename rgroup_masks related things. |
| (vect_get_max_nscalars_per_iter): Likewise. |
| (vect_estimate_min_profitable_iters): Likewise. |
| (vect_record_loop_mask): Likewise. |
| (vect_get_loop_mask): Likewise. |
| * tree-vectorizer.h (struct rgroup_masks): Renamed to ... |
| (struct rgroup_controls): ... this. Also rename mask_type |
| to type and rename masks to controls. |
| |
| 2020-06-11 Kewen Lin <linkw@gcc.gnu.org> |
| |
| * tree-vect-loop-manip.c (vect_set_loop_condition): Rename |
| LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P. |
| (vect_gen_vector_loop_niters): Likewise. |
| (vect_do_peeling): Likewise. |
| * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename |
| fully_masked_p to using_partial_vectors_p. |
| (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to |
| LOOP_VINFO_USING_PARTIAL_VECTORS_P. |
| (determine_peel_for_niter): Likewise. |
| (vect_estimate_min_profitable_iters): Likewise. |
| (vect_transform_loop): Likewise. |
| * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated. |
| (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro. |
| |
| 2020-06-11 Kewen Lin <linkw@gcc.gnu.org> |
| |
| * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename |
| can_fully_mask_p to can_use_partial_vectors_p. |
| (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to |
| LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p |
| to saved_can_use_partial_vectors_p. |
| (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to |
| LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. |
| (vectorizable_live_operation): Likewise. |
| * tree-vect-stmts.c (permute_vec_elements): Likewise. |
| (check_load_store_masking): Likewise. |
| (vectorizable_operation): Likewise. |
| (vectorizable_store): Likewise. |
| (vectorizable_load): Likewise. |
| (vectorizable_condition): Likewise. |
| * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ... |
| (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this. |
| (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p. |
| |
| 2020-06-11 Martin Liska <mliska@suse.cz> |
| |
| * optc-save-gen.awk: Quote error string. |
| |
| 2020-06-11 Alexandre Oliva <oliva@adacore.com> |
| |
| * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags. |
| |
| 2020-06-11 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove. |
| * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update |
| value. |
| * config/riscv/riscv.c (riscv_output_gpr_save): Remove. |
| * config/riscv/riscv.md (gpr_save): Update output asm pattern. |
| |
| 2020-06-11 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/predicates.md (gpr_save_operation): New. |
| * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New. |
| (riscv_gpr_save_operation_p): Ditto. |
| * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls): |
| Ignore USEs for gpr_save patter. |
| * config/riscv/riscv.c (gpr_save_reg_order): New. |
| (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save. |
| (riscv_gen_gpr_save_insn): New. |
| (riscv_gpr_save_operation_p): Ditto. |
| * config/riscv/riscv.md (S3_REGNUM): New. |
| (S4_REGNUM): Ditto. |
| (S5_REGNUM): Ditto. |
| (S6_REGNUM): Ditto. |
| (S7_REGNUM): Ditto. |
| (S8_REGNUM): Ditto. |
| (S9_REGNUM): Ditto. |
| (S10_REGNUM): Ditto. |
| (S11_REGNUM): Ditto. |
| (gpr_save): Model USEs correctly. |
| |
| 2020-06-10 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/95353 |
| PR middle-end/92939 |
| * builtins.c (inform_access): New function. |
| (check_access): Call it. Add argument. |
| (addr_decl_size): Remove. |
| (get_range): New function. |
| (compute_objsize): New overload. Only use compute_builtin_object_size |
| with raw memory function. |
| (check_memop_access): Pass new argument to compute_objsize and |
| check_access. |
| (expand_builtin_memchr, expand_builtin_strcat): Same. |
| (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same. |
| (expand_builtin_stpncpy, check_strncat_sizes): Same. |
| (expand_builtin_strncat, expand_builtin_strncpy): Same. |
| (expand_builtin_memcmp): Same. |
| * builtins.h (check_nul_terminated_array): Declare extern. |
| (check_access): Add argument. |
| (struct access_ref, struct access_data): New structs. |
| * gimple-ssa-warn-restrict.c (clamp_offset): New helper. |
| (builtin_access::overlap): Call it. |
| * tree-object-size.c (decl_init_size): Declare extern. |
| (addr_object_size): Correct offset computation. |
| * tree-object-size.h (decl_init_size): Declare. |
| * tree-ssa-strlen.c (handle_integral_assign): Remove a call |
| to maybe_warn_overflow when assigning to an SSA_NAME. |
| |
| 2020-06-10 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-loop.c (vect_determine_vectorization_factor): |
| Skip debug stmts. |
| (_loop_vec_info::_loop_vec_info): Likewise. |
| (vect_update_vf_for_slp): Likewise. |
| (vect_analyze_loop_operations): Likewise. |
| (update_epilogue_loop_vinfo): Likewise. |
| * tree-vect-patterns.c (vect_determine_precisions): Likewise. |
| (vect_pattern_recog): Likewise. |
| * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise. |
| (_bb_vec_info::_bb_vec_info): Likewise. |
| * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized): |
| Likewise. |
| |
| 2020-06-10 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95576 |
| * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts. |
| |
| 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com> |
| |
| PR target/95523 |
| * config/aarch64/aarch64-sve-builtins.h |
| (sve_switcher::m_old_maximum_field_alignment): New member. |
| * config/aarch64/aarch64-sve-builtins.cc |
| (sve_switcher::sve_switcher): Save maximum_field_alignment in |
| m_old_maximum_field_alignment and clear maximum_field_alignment. |
| (sve_switcher::~sve_switcher): Restore maximum_field_alignment. |
| |
| 2020-06-10 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector |
| of gimple * stmts. |
| (_stmt_vec_info::vec_stmts): Likewise. |
| (vec_info::stmt_vec_info_ro): New flag. |
| (vect_finish_replace_stmt): Adjust declaration. |
| (vect_finish_stmt_generation): Likewise. |
| (vectorizable_induction): Likewise. |
| (vect_transform_reduction): Likewise. |
| (vectorizable_lc_phi): Likewise. |
| * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not |
| allocate stmt infos for increments. |
| (vect_record_grouped_load_vectors): Adjust. |
| * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise. |
| (vectorize_fold_left_reduction): Likewise. |
| (vect_transform_reduction): Likewise. |
| (vect_transform_cycle_phi): Likewise. |
| (vectorizable_lc_phi): Likewise. |
| (vectorizable_induction): Likewise. |
| (vectorizable_live_operation): Likewise. |
| (vect_transform_loop): Likewise. |
| * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro. |
| * tree-vect-slp.c (vect_get_slp_vect_def): Adjust. |
| (vect_get_slp_defs): Likewise. |
| (vect_transform_slp_perm_load): Likewise. |
| (vect_schedule_slp_instance): Likewise. |
| (vectorize_slp_instance_root_stmt): Likewise. |
| * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise. |
| (vect_finish_stmt_generation_1): Do not allocate a stmt info. |
| (vect_finish_replace_stmt): Do not return anything. |
| (vect_finish_stmt_generation): Likewise. |
| (vect_build_gather_load_calls): Adjust. |
| (vectorizable_bswap): Likewise. |
| (vectorizable_call): Likewise. |
| (vectorizable_simd_clone_call): Likewise. |
| (vect_create_vectorized_demotion_stmts): Likewise. |
| (vectorizable_conversion): Likewise. |
| (vectorizable_assignment): Likewise. |
| (vectorizable_shift): Likewise. |
| (vectorizable_operation): Likewise. |
| (vectorizable_scan_store): Likewise. |
| (vectorizable_store): Likewise. |
| (vectorizable_load): Likewise. |
| (vectorizable_condition): Likewise. |
| (vectorizable_comparison): Likewise. |
| (vect_transform_stmt): Likewise. |
| * tree-vectorizer.c (vec_info::vec_info): Initialize |
| stmt_vec_info_ro. |
| (vec_info::replace_stmt): Copy over stmt UID rather than |
| unsetting/setting a stmt info allocating a new UID. |
| (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro. |
| |
| 2020-06-10 Aldy Hernandez <aldyh@redhat.com> |
| |
| * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value): |
| Add stmt parameter. |
| * gimple-ssa-evrp.c (class evrp_folder): New. |
| (class evrp_dom_walker): Remove. |
| (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker. |
| * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter. |
| * tree-ssa-copy.c (copy_folder::get_value): Same. |
| * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in): |
| Pass stmt to get_value. |
| (substitute_and_fold_engine::replace_phi_args_in): Same. |
| (substitute_and_fold_dom_walker::after_dom_children): Call |
| post_fold_bb. |
| (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New. |
| (substitute_and_fold_dom_walker::propagate_into_phi_args): New. |
| (substitute_and_fold_dom_walker::before_dom_children): Adjust to |
| call virtual functions for folding, pre_folding, and post folding. |
| Call get_value with PHI. Tweak dump. |
| * tree-ssa-propagate.h (class substitute_and_fold_engine): |
| New argument to get_value. |
| New virtual function pre_fold_bb. |
| New virtual function post_fold_bb. |
| New virtual function pre_fold_stmt. |
| New virtual function post_new_stmt. |
| New function propagate_into_phi_args. |
| * tree-vrp.c (vrp_folder::get_value): Add stmt argument. |
| * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump |
| output. |
| (vr_values::fold_cond): New. |
| (vr_values::simplify_cond_using_ranges_1): Call fold_cond. |
| * vr-values.h (class vr_values): Add |
| simplify_cond_using_ranges_when_edge_is_known. |
| |
| 2020-06-10 Martin Liska <mliska@suse.cz> |
| |
| PR sanitizer/94910 |
| * asan.c (asan_emit_stack_protection): Emit |
| also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release |
| a stack frame. |
| |
| 2020-06-10 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul. |
| |
| 2020-06-10 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-data-refs.c (vect_vfa_access_size): Adjust. |
| (vect_record_grouped_load_vectors): Likewise. |
| * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise. |
| (vectorize_fold_left_reduction): Likewise. |
| (vect_transform_reduction): Likewise. |
| (vect_transform_cycle_phi): Likewise. |
| (vectorizable_lc_phi): Likewise. |
| (vectorizable_induction): Likewise. |
| (vectorizable_live_operation): Likewise. |
| (vect_transform_loop): Likewise. |
| * tree-vect-slp.c (vect_get_slp_defs): New function, split out |
| from overload. |
| * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove. |
| (vect_get_vec_def_for_operand): Likewise. |
| (vect_get_vec_def_for_stmt_copy): Likewise. |
| (vect_get_vec_defs_for_stmt_copy): Likewise. |
| (vect_get_vec_defs_for_operand): New function. |
| (vect_get_vec_defs): Likewise. |
| (vect_build_gather_load_calls): Adjust. |
| (vect_get_gather_scatter_ops): Likewise. |
| (vectorizable_bswap): Likewise. |
| (vectorizable_call): Likewise. |
| (vectorizable_simd_clone_call): Likewise. |
| (vect_get_loop_based_defs): Remove. |
| (vect_create_vectorized_demotion_stmts): Adjust. |
| (vectorizable_conversion): Likewise. |
| (vectorizable_assignment): Likewise. |
| (vectorizable_shift): Likewise. |
| (vectorizable_operation): Likewise. |
| (vectorizable_scan_store): Likewise. |
| (vectorizable_store): Likewise. |
| (vectorizable_load): Likewise. |
| (vectorizable_condition): Likewise. |
| (vectorizable_comparison): Likewise. |
| (vect_transform_stmt): Adjust and remove no longer applicable |
| sanity checks. |
| * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize |
| STMT_VINFO_VEC_STMTS. |
| (vec_info::free_stmt_vec_info): Relase it. |
| * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove. |
| (_stmt_vec_info::vec_stmts): Add. |
| (STMT_VINFO_VEC_STMT): Remove. |
| (STMT_VINFO_VEC_STMTS): New. |
| (vect_get_vec_def_for_operand_1): Remove. |
| (vect_get_vec_def_for_operand): Likewise. |
| (vect_get_vec_defs_for_stmt_copy): Likewise. |
| (vect_get_vec_def_for_stmt_copy): Likewise. |
| (vect_get_vec_defs): New overloads. |
| (vect_get_vec_defs_for_operand): New. |
| (vect_get_slp_defs): Declare. |
| |
| 2020-06-10 Qian Chao <qianchao9@huawei.com> |
| |
| PR tree-optimization/95569 |
| * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE. |
| |
| 2020-06-10 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/92860 |
| * optc-save-gen.awk: Generate new function cl_optimization_compare. |
| * opth-gen.awk: Generate declaration of the function. |
| |
| 2020-06-09 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate |
| 'future' PowerPC platform. |
| (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1. |
| (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA. |
| * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and |
| MMA HWCAP2 bits. |
| * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support. |
| (rs6000_clone_map): Add 'future' system target_clones support. |
| |
| 2020-06-09 Michael Kuhn <gcc@ikkoku.de> |
| |
| * Makefile.in (ZSTD_INC): Define. |
| (ZSTD_LIB): Include ZSTD_LDFLAGS. |
| (CFLAGS-lto-compress.o): Add ZSTD_INC. |
| * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for |
| AC_SUBST. |
| * configure: Rebuilt. |
| |
| 2020-06-09 Jason Merrill <jason@redhat.com> |
| |
| PR c++/95552 |
| * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR. |
| |
| 2020-06-09 Marco Elver <elver@google.com> |
| |
| * params.opt: Define --param=tsan-distinguish-volatile=[0,1]. |
| * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new |
| builtin for volatile instrumentation of reads/writes. |
| (BUILT_IN_TSAN_VOLATILE_READ2): Likewise. |
| (BUILT_IN_TSAN_VOLATILE_READ4): Likewise. |
| (BUILT_IN_TSAN_VOLATILE_READ8): Likewise. |
| (BUILT_IN_TSAN_VOLATILE_READ16): Likewise. |
| (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise. |
| (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise. |
| (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise. |
| (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise. |
| (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise. |
| * tsan.c (get_memory_access_decl): Argument if access is |
| volatile. If param tsan-distinguish-volatile is non-zero, and |
| access if volatile, return volatile instrumentation decl. |
| (instrument_expr): Check if access is volatile. |
| |
| 2020-06-09 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-loop.c (vectorizable_induction): Remove dead code. |
| |
| 2020-06-09 Tobias Burnus <tobias@codesourcery.com> |
| |
| * omp-offload.c (add_decls_addresses_to_decl_constructor, |
| omp_finish_file): With in_lto_p, stream out all offload-table |
| items even if the symtab_node does not exist. |
| |
| 2020-06-09 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-stmts.c (vect_transform_stmt): Remove dead code. |
| |
| 2020-06-09 Martin Liska <mliska@suse.cz> |
| |
| * gcov-dump.c (print_usage): Fix spacing for --raw option |
| in --help. |
| |
| 2020-06-09 Martin Liska <mliska@suse.cz> |
| |
| * cif-code.def (ATTRIBUTE_MISMATCH): Rename to... |
| (SANITIZE_ATTRIBUTE_MISMATCH): ...this. |
| * ipa-inline.c (sanitize_attrs_match_for_inline_p): |
| Handle all sanitizer options. |
| (can_inline_edge_p): Use renamed CIF_* enum value. |
| |
| 2020-06-09 Joe Ramsay <joe.ramsay@arm.com> |
| |
| * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for |
| unpacked vectors. |
| (@aarch64_pred_<optab><mode>): Add support for unpacked vectors. |
| (@aarch64_bic<mode>): Enable unpacked BIC. |
| (*bic<mode>3): Enable unpacked BIC. |
| |
| 2020-06-09 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/95365 |
| * doc/gcov.texi: Compile and link one example in 2 steps. |
| |
| 2020-06-09 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/95527 |
| * match.pd (__builtin_ffs (X) cmp CST): New optimizations. |
| |
| 2020-06-09 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate |
| 'future' PowerPC platform. |
| (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1. |
| (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA. |
| * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and |
| MMA HWCAP2 bits. |
| * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support. |
| (rs6000_clone_map): Add 'future' system target_clones support. |
| |
| 2020-06-08 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR lto/94848 |
| PR middle-end/95551 |
| * omp-offload.c (add_decls_addresses_to_decl_constructor, |
| omp_finish_file): Skip removed items. |
| * lto-cgraph.c (output_offload_tables): Likewise; set force_output |
| to this node for variables and functions. |
| |
| 2020-06-08 Jason Merrill <jason@redhat.com> |
| |
| * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4. |
| * configure.ac: Remove AX_CXX_COMPILE_STDCXX. |
| * configure: Regenerate. |
| |
| 2020-06-08 Martin Sebor <msebor@redhat.com> |
| |
| * postreload.c (reload_cse_simplify_operands): Clear first array element |
| before using it. Assert a precondition. |
| |
| 2020-06-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/95528 |
| * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use |
| VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the |
| type is vector boolean. |
| |
| 2020-06-08 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments. |
| |
| 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS |
| instead of VFP_REGS. |
| |
| 2020-06-08 Martin Liska <mliska@suse.cz> |
| |
| * config/rs6000/vector.md: Replace FAIL with gcc_unreachable |
| in all vcond* patterns. |
| |
| 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * common/config/arm/arm-common.c (INCLUDE_ALGORITHM): |
| Define. No longer include <algorithm>. |
| |
| 2020-06-07 Roger Sayle <roger@nextmovesoftware.com> |
| |
| * config/i386/i386.md (paritydi2, paritysi2): Expand reduction |
| via shift and xor to an USPEC PARITY matching a parityhi2_cmp. |
| (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split. |
| (parityhi2, parityqi2): New expanders. |
| (parityhi2_cmp): Implement set parity flag with xorb insn. |
| (parityqi2_cmp): Implement set parity flag with testb insn. |
| New peephole2s to use these insns (UNSPEC PARITY) when appropriate. |
| |
| 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com> |
| |
| PR target/95018 |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Override flag_cunroll_grow_size. |
| |
| 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com> |
| |
| * common.opt (flag_cunroll_grow_size): New flag. |
| * toplev.c (process_options): Set flag_cunroll_grow_size. |
| * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute): |
| Use flag_cunroll_grow_size. |
| |
| 2020-06-06 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR lto/95548 |
| * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int. |
| (ipa_odr_summary_write): Update streaming. |
| (ipa_odr_read_section): Update streaming. |
| |
| 2020-06-06 Alexandre Oliva <oliva@adacore.com> |
| |
| PR driver/95456 |
| * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0). |
| |
| 2020-06-05 Thomas Schwinge <thomas@codesourcery.com> |
| Julian Brown <julian@codesourcery.com> |
| |
| * gimplify.c (gimplify_adjust_omp_clauses): Remove |
| 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives. |
| |
| 2020-06-05 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95539 |
| * tree-vect-data-refs.c |
| (vect_slp_analyze_and_verify_instance_alignment): Use |
| SLP_TREE_REPRESENTATIVE for the data-ref check. |
| * tree-vect-stmts.c (vectorizable_load): Reset stmt_info |
| back to the first scalar stmt rather than the |
| SLP_TREE_REPRESENTATIVE to match previous behavior. |
| |
| 2020-06-05 Felix Yang <felix.yang@huawei.com> |
| |
| PR target/95254 |
| * expr.c (emit_move_insn): Check src and dest of the copy to see |
| if one or both of them are subregs, try to remove the subregs when |
| innermode and outermode are equal in size and the mode change involves |
| an implicit round trip through memory. |
| |
| 2020-06-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/95535 |
| * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New |
| define_insn_and_split patterns. |
| (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New |
| define_insn patterns. |
| |
| 2020-06-05 Jonathan Wakely <jwakely@redhat.com> |
| |
| * alloc-pool.h (object_allocator::remove_raw): New. |
| * tree-ssa-math-opts.c (struct occurrence): Use NSMDI. |
| (occurrence::occurrence): Add. |
| (occurrence::~occurrence): Likewise. |
| (occurrence::new): Likewise. |
| (occurrence::delete): Likewise. |
| (occ_new): Remove. |
| (insert_bb): Use new occurence (...) instead of occ_new. |
| (register_division_in): Likewise. |
| (free_bb): Use delete occ instead of manually removing |
| from the pool. |
| |
| 2020-06-05 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/95493 |
| * cfgexpand.c (expand_debug_expr): Avoid calling |
| set_mem_attributes_minus_bitpos when we were expanding |
| an SSA name. |
| * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove |
| ARRAY_REF special-casing, add CONSTRUCTOR to the set of |
| special-cases we do not want MEM_EXPRs for. Assert |
| we end up with reasonable MEM_EXPRs. |
| |
| 2020-06-05 Lili Cui <lili.cui@intel.com> |
| |
| PR target/95525 |
| * config/i386/i386.h (PTA_WAITPKG): Change bitmask value. |
| |
| 2020-06-04 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/10138 |
| PR middle-end/95136 |
| * attribs.c (init_attr_rdwr_indices): Move function here. |
| * attribs.h (rdwr_access_hash, rdwr_map): Define. |
| (attr_access): Add 'none'. |
| (init_attr_rdwr_indices): Declared function. |
| * builtins.c (warn_for_access)): New function. |
| (check_access): Call it. |
| * builtins.h (checK-access): Add an optional argument. |
| * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h. |
| (init_attr_rdwr_indices): Declare extern. |
| (append_attrname): Handle attr_access::none. |
| (maybe_warn_rdwr_sizes): Same. |
| (initialize_argument_information): Update comments. |
| * doc/extend.texi (attribute access): Document 'none'. |
| * tree-ssa-uninit.c (struct wlimits): New. |
| (maybe_warn_operand): New function. |
| (maybe_warn_pass_by_reference): Same. |
| (warn_uninitialized_vars): Refactor code into maybe_warn_operand. |
| Also call for function calls. |
| (pass_late_warn_uninitialized::execute): Adjust comments. |
| (execute_early_warn_uninitialized): Same. |
| |
| 2020-06-04 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR middle-end/95464 |
| * lra.c (lra_emit_move): Add processing STRICT_LOW_PART. |
| * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output |
| reload if the original insn has it too. |
| |
| 2020-06-04 Richard Biener <rguenther@suse.de> |
| |
| * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr): |
| Ensure that tmp_ha is marked TREE_ADDRESSABLE. |
| |
| 2020-06-04 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/95113 |
| * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call |
| exceptions check to... |
| * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this |
| new function. |
| * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it. |
| * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter |
| fun. |
| |
| 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| PR target/94735 |
| * config/arm/predicates.md (mve_scatter_memory): Define to |
| match (mem (reg)) for scatter store memory. |
| * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify |
| define_insn to define_expand. |
| (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise. |
| (mve_vstrhq_scatter_offset_<supf><mode>): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise. |
| (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_offset_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise. |
| (mve_vstrhq_scatter_offset_fv8hf): Likewise. |
| (mve_vstrhq_scatter_offset_p_fv8hf): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise. |
| (mve_vstrwq_scatter_offset_fv4sf): Likewise. |
| (mve_vstrwq_scatter_offset_p_fv4sf): Likewise. |
| (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_offset_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise. |
| (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter |
| stores. |
| (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise. |
| (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise. |
| (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise. |
| (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise. |
| (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise. |
| (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise. |
| (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise. |
| (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise. |
| (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise. |
| (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise. |
| (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise. |
| (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise. |
| |
| 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic |
| arguments. |
| (__arm_vbicq_n_s16): Likewise. |
| (__arm_vbicq_n_u32): Likewise. |
| (__arm_vbicq_n_s32): Likewise. |
| (__arm_vbicq): Modify polymorphic variant. |
| |
| 2020-06-04 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vect_get_slp_vect_def): Declare. |
| * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it. |
| * tree-vect-stmts.c (vect_transform_stmt): Likewise. |
| (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE. |
| * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single |
| use ... |
| (vect_get_slp_defs): ... here. |
| (vect_get_slp_vect_def): New function. |
| |
| 2020-06-04 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (_slp_tree::lanes): New. |
| (SLP_TREE_LANES): Likewise. |
| * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it. |
| (vectorizable_reduction): Likewise. |
| (vect_transform_cycle_phi): Likewise. |
| (vectorizable_induction): Likewise. |
| (vectorizable_live_operation): Likewise. |
| * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes. |
| (vect_create_new_slp_node): Likewise. |
| (slp_copy_subtree): Copy it. |
| (vect_optimize_slp): Use it. |
| (vect_slp_analyze_node_operations_1): Likewise. |
| (vect_slp_convert_to_external): Likewise. |
| (vect_bb_vectorization_profitable_p): Likewise. |
| * tree-vect-stmts.c (vectorizable_load): Likewise. |
| (get_vectype_for_scalar_type): Likewise. |
| |
| 2020-06-04 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove. |
| (vect_build_slp_tree_2): Simplify building all external op |
| nodes from scalars. |
| (vect_slp_analyze_node_operations): Remove push/pop of |
| STMT_VINFO_DEF_TYPE. |
| (vect_schedule_slp_instance): Likewise. |
| * tree-vect-stmts.c (ect_check_store_rhs): Pass in the |
| stmt_info, use the vect_is_simple_use overload combining |
| SLP and stmt_info analysis. |
| (vect_is_simple_cond): Likewise. |
| (vectorizable_store): Adjust. |
| (vectorizable_condition): Likewise. |
| (vect_is_simple_use): Fully handle invariant SLP nodes |
| here. Amend stmt_info operand extraction with COND_EXPR |
| and masked stores. |
| * tree-vect-loop.c (vectorizable_reduction): Deal with |
| COND_EXPR representation ugliness. |
| |
| 2020-06-04 Hongtao Liu <hongtao.liu@inte.com> |
| |
| PR target/95254 |
| * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>): |
| Refine from *vcvtps2ph_store<mask_name>. |
| (vcvtps2ph256<mask_name>): Refine constraint from vm to v. |
| (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto. |
| (*vcvtps2ph256<merge_mask_name>): New define_insn. |
| (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto. |
| * config/i386/subst.md (merge_mask): New define_subst. |
| (merge_mask_name): New define_subst_attr. |
| (merge_mask_operand3): Ditto. |
| |
| 2020-06-04 Hao Liu <hliu@os.amperecomputing.com> |
| |
| PR tree-optimization/89430 |
| * tree-ssa-phiopt.c |
| (struct name_to_bb): Rename to ref_to_bb; add a new field exp; |
| remove ssa_name_ver, store, offset fields. |
| (struct ssa_names_hasher): Rename to refs_hasher; update functions. |
| (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs. |
| (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs |
| and COMPONENT_REFs. |
| |
| 2020-06-04 Andreas Schwab <schwab@suse.de> |
| |
| PR target/95154 |
| * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external. |
| |
| 2020-06-04 Hongtao.liu <hongtao.liu@intel.com> |
| |
| * config/i386/sse.md (pmov_dst_3_lower): New mode attribute. |
| (trunc<mode><pmov_dst_3_lower>2): Refine from |
| trunc<mode><pmov_dst_3>2. |
| |
| 2020-06-03 Vitor Guidi <vitor.guidi@usp.br> |
| |
| * match.pd (tanh/sinh -> 1/cosh): New simplification. |
| |
| 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| PR target/95347 |
| * config/rs6000/rs6000.c (is_stfs_insn): Rename to |
| is_lfs_stfs_insn and make it recognize lfs as well. |
| (prefixed_store_p): Use is_lfs_stfs_insn(). |
| (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs. |
| |
| 2020-06-03 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and |
| streamer-hooks.h. |
| (odr_enums): New static var. |
| (struct odr_enum_val): New struct. |
| (class odr_enum): New struct. |
| (odr_enum_map): New hashtable. |
| (odr_types_equivalent_p): Drop code testing TYPE_VALUES. |
| (add_type_duplicate): Likewise. |
| (free_odr_warning_data): Do not free TYPE_VALUES. |
| (register_odr_enum): New function. |
| (ipa_odr_summary_write): New function. |
| (ipa_odr_read_section): New function. |
| (ipa_odr_summary_read): New function. |
| (class pass_ipa_odr): New pass. |
| (make_pass_ipa_odr): New function. |
| * ipa-utils.h (register_odr_enum): Declare. |
| * lto-section-in.c: (lto_section_name): Add odr_types section. |
| * lto-streamer.h (enum lto_section_type): Add odr_types section. |
| * passes.def: Add odr_types pass. |
| * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream |
| TYPE_VALUES. |
| (hash_tree): Likewise. |
| * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers): |
| Likewise. |
| * tree-streamer-out.c (write_ts_type_non_common_tree_pointers): |
| Likewise. |
| * timevar.def (TV_IPA_ODR): New timervar. |
| * tree-pass.h (make_pass_ipa_odr): Declare. |
| * tree.c (free_lang_data_in_type): Regiser ODR types. |
| |
| 2020-06-03 Romain Naour <romain.naour@gmail.com> |
| |
| * Makefile.in (SELFTEST_DEPS): Move before including language makefile |
| fragments. |
| |
| 2020-06-03 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95487 |
| * tree-vect-stmts.c (vectorizable_store): Use a truth type |
| for the scatter mask. |
| |
| 2020-06-03 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95495 |
| * tree-vect-slp.c (vect_slp_analyze_node_operations): Use |
| SLP_TREE_REPRESENTATIVE in the shift assertion. |
| |
| 2020-06-03 Tom Tromey <tromey@adacore.com> |
| |
| * spellcheck.c (CASE_COST): New define. |
| (BASE_COST): New define. |
| (get_edit_distance): Recognize case changes. |
| (get_edit_distance_cutoff): Update. |
| (test_edit_distances): Update. |
| (get_old_cutoff): Update. |
| (test_find_closest_string): Add case sensitivity test. |
| |
| 2020-06-03 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over |
| the cost vector to unset the visited flag on stmts. |
| |
| 2020-06-03 Tobias Burnus <tobias@codesourcery.com> |
| |
| * gimplify.c (omp_notice_variable): Use new hook. |
| * langhooks-def.h (lhd_omp_predetermined_mapping): Declare. |
| (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define |
| (LANG_HOOKS_DECLS): Add it. |
| * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr. |
| (lhd_omp_predetermined_mapping): New. |
| * langhooks.h (struct lang_hooks_for_decls): Add new hook. |
| |
| 2020-06-03 Jan Hubicka <jh@suse.cz> |
| |
| * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes; |
| add LTO_first_tree_tag and LTO_first_gimple_tag. |
| (lto_tag_is_tree_code_p): Update. |
| (lto_tag_is_gimple_code_p): Update. |
| (lto_gimple_code_to_tag): Update. |
| (lto_tag_to_gimple_code): Update. |
| (lto_tree_code_to_tag): Update. |
| (lto_tag_to_tree_code): Update. |
| |
| 2020-06-02 Felix Yang <felix.yang@huawei.com> |
| |
| PR target/95459 |
| * config/aarch64/aarch64.c (aarch64_short_vector_p): |
| Leave later code to report an error if SVE is disabled. |
| |
| 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64-cores.def (zeus): Define. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option. |
| |
| 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| PR target/95347 |
| * config/rs6000/rs6000.c (prefixed_store_p): Add special case |
| for stfs. |
| (is_stfs_insn): New helper function. |
| |
| 2020-06-02 Jan Hubicka <jh@suse.cz> |
| |
| * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of |
| references. |
| * lto-streamer-out.c (stream_write_tree_ref): Likewise. |
| |
| 2020-06-02 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-hsa.h (CC1_SPEC): Delete. |
| * config/gcn/gcn.opt (-mlocal-symbol-id): Delete. |
| * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id. |
| |
| 2020-06-02 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR middle-end/95395 |
| * optabs.c (expand_unop): Fix bits/bytes confusion in latest change. |
| * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals. |
| |
| 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| * config/s390/s390.c (print_operand): Emit vector alignment |
| hints for z13. |
| |
| 2020-06-02 Martin Liska <mliska@suse.cz> |
| |
| * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters |
| as they have variable number of counters. |
| * gcov-dump.c (main): Add new option -r. |
| (print_usage): Likewise. |
| (tag_counters): All new raw format. |
| * gcov-io.h (struct gcov_kvp): New. |
| (GCOV_TOPN_VALUES): Remove. |
| (GCOV_TOPN_VALUES_COUNTERS): Likewise. |
| (GCOV_TOPN_MEM_COUNTERS): New. |
| (GCOV_TOPN_DISK_COUNTERS): Likewise. |
| (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise. |
| * ipa-profile.c (ipa_profile_generate_summary): Use |
| GCOV_TOPN_MAXIMUM_TRACKED_VALUES. |
| (ipa_profile_write_edge_summary): Likewise. |
| (ipa_profile_read_edge_summary): Likewise. |
| (ipa_profile): Remove usage of GCOV_TOPN_VALUES. |
| * profile.c (sort_hist_values): Sort variable number |
| of counters. |
| (compute_value_histograms): Special case for TOP N counters |
| that have dynamic number of key-value pairs. |
| * value-prof.c (dump_histogram_value): Dump variable number |
| of key-value pairs. |
| (stream_in_histogram_value): Stream in variable number |
| of key-value pairs for TOP N counter. |
| (get_nth_most_common_value): Deal with variable number |
| of key-value pairs. |
| (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES |
| for loop iteration. |
| (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS |
| to n_counters. |
| * doc/gcov-dump.texi: Document new -r option. |
| |
| 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| PR target/95420 |
| * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a. |
| |
| 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com> |
| |
| * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn |
| returns (const_int 0) for the destination, then emit nothing. |
| |
| 2020-06-01 Jan Hubicka <hubicka@ucw.cz> |
| |
| * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref, |
| LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref, |
| LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref, |
| LTO_const_decl_ref, LTO_imported_decl_ref, |
| LTO_translation_unit_decl_ref, LTO_global_decl_ref and |
| LTO_namelist_decl_ref; add LTO_global_stream_ref. |
| * lto-streamer-in.c (lto_input_tree_ref): Simplify. |
| (lto_input_scc): Update. |
| (lto_input_tree_1): Update. |
| * lto-streamer-out.c (lto_indexable_tree_ref): Simlify. |
| * lto-streamer.c (lto_tag_name): Update. |
| |
| 2020-06-01 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref. |
| (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref. |
| * lto-cgraph.c (lto_output_node): Likewise. |
| (lto_output_varpool_node): Likewise. |
| (output_offload_tables): Likewise. |
| (input_node): Likewise. |
| (input_varpool_node): Likewise. |
| (input_offload_tables): Likewise. |
| * lto-streamer-in.c (lto_input_tree_ref): Declare. |
| (lto_input_var_decl_ref): Declare. |
| (lto_input_fn_decl_ref): Declare. |
| * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream. |
| (lto_output_var_decl_index): Rename to .. |
| (lto_output_var_decl_ref): ... this. |
| (lto_output_fn_decl_index): Rename to ... |
| (lto_output_fn_decl_ref): ... this. |
| * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams. |
| (DEFINE_DECL_STREAM_FUNCS): Remove. |
| (lto_output_var_decl_index): Remove. |
| (lto_output_fn_decl_index): Remove. |
| (lto_output_var_decl_ref): Declare. |
| (lto_output_fn_decl_ref): Declare. |
| (lto_input_var_decl_ref): Declare. |
| (lto_input_fn_decl_ref): Declare. |
| |
| 2020-06-01 Feng Xue <fxue@os.amperecomputing.com> |
| |
| * cgraphclones.c (materialize_all_clones): Adjust replace map dump. |
| * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not |
| dump infomation if there is no adjusted parameter. |
| * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string. |
| |
| 2020-06-01 Aldy Hernandez <aldyh@redhat.com> |
| |
| * Makefile.in (gimple-array-bounds.o): New. |
| * tree-vrp.c: Move array bounds code... |
| * gimple-array-bounds.cc: ...here... |
| * gimple-array-bounds.h: ...and here. |
| |
| 2020-06-01 Aldy Hernandez <aldyh@redhat.com> |
| |
| * Makefile.in (OBJS): Add value-range-equiv.o. |
| * tree-vrp.c (*value_range_equiv*): Move to... |
| * value-range-equiv.cc: ...here. |
| * tree-vrp.h (class value_range_equiv): Move to... |
| * value-range-equiv.h: ...here. |
| * vr-values.h: Include value-range-equiv.h. |
| |
| 2020-06-01 Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR ipa/93429 |
| * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate |
| lattice for simple pass-through by-ref argument. |
| |
| 2020-05-31 Jeff Law <law@redhat.com> |
| |
| * lra.c (add_auto_inc_notes): Remove function. |
| * reload1.c (add_auto_inc_notes): Similarly. Move into... |
| * rtlanal.c (add_auto_inc_notes): New function. |
| * rtl.h (add_auto_inc_notes): Add prototype. |
| * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns |
| as needed. |
| |
| 2020-05-31 Jan Hubicka <jh@suse.cz> |
| |
| * lto-section-out.c (lto_output_decl_index): Remove. |
| (lto_output_field_decl_index): Move to lto-streamer-out.c |
| (lto_output_fn_decl_index): Move to lto-streamer-out.c |
| (lto_output_namespace_decl_index): Remove. |
| (lto_output_var_decl_index): Remove. |
| (lto_output_type_decl_index): Remove. |
| (lto_output_type_ref_index): Remove. |
| * lto-streamer-out.c (output_type_ref): Remove. |
| (lto_get_index): New function. |
| (lto_output_tree_ref): Remove. |
| (lto_indexable_tree_ref): New function. |
| (lto_output_var_decl_index): Move here from lto-section-out.c; simplify. |
| (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify. |
| (stream_write_tree_ref): Update. |
| (lto_output_tree): Update. |
| * lto-streamer.h (lto_output_decl_index): Remove prototype. |
| (lto_output_field_decl_index): Remove prototype. |
| (lto_output_namespace_decl_index): Remove prototype. |
| (lto_output_type_decl_index): Remove prototype. |
| (lto_output_type_ref_index): Remove prototype. |
| (lto_output_var_decl_index): Move. |
| (lto_output_fn_decl_index): Move |
| |
| 2020-05-31 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/95052 |
| * expr.c (store_expr): For shortedned_string_cst, ensure temp has |
| BLKmode. |
| |
| 2020-05-31 Jeff Law <law@redhat.com> |
| |
| * config/h8300/jumpcall.md (brabs, brabc): Disable patterns. |
| |
| 2020-05-31 Jim Wilson <jimw@sifive.com> |
| |
| * config/riscv/riscv.md (zero_extendsidi2_shifted): New. |
| |
| 2020-05-30 Jonathan Yong <10walls@gmail.com> |
| |
| * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32 |
| after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure |
| import library, but also contains some functions that invoke |
| others in KERNEL32.DLL. |
| |
| 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form. |
| (altivec_vmrglw_direct): Ditto. |
| (altivec_vperm_<mode>_direct): Ditto. |
| (altivec_vperm_v8hiv16qi): Ditto. |
| (*altivec_vperm_<mode>_uns_internal): Ditto. |
| (*altivec_vpermr_<mode>_internal): Ditto. |
| (vperm_v8hiv4si): Ditto. |
| (vperm_v16qiv8hi): Ditto. |
| |
| 2020-05-29 Jan Hubicka <jh@suse.cz> |
| |
| * lto-streamer-in.c (streamer_read_chain): Move here from |
| tree-streamer-in.c. |
| (stream_read_tree_ref): New. |
| (lto_input_tree_1): Simplify. |
| * lto-streamer-out.c (stream_write_tree_ref): New. |
| (lto_write_tree_1): Simplify. |
| (lto_output_tree_1): Simplify. |
| (DFS::DFS_write_tree): Simplify. |
| (streamer_write_chain): Move here from tree-stremaer-out.c. |
| * lto-streamer.h (lto_output_tree_ref): Update prototype. |
| (stream_read_tree_ref): Declare |
| (stream_write_tree_ref): Declare |
| * tree-streamer-in.c (streamer_read_chain): Update to use |
| stream_read_tree_ref. |
| (lto_input_ts_common_tree_pointers): Likewise. |
| (lto_input_ts_vector_tree_pointers): Likewise. |
| (lto_input_ts_poly_tree_pointers): Likewise. |
| (lto_input_ts_complex_tree_pointers): Likewise. |
| (lto_input_ts_decl_minimal_tree_pointers): Likewise. |
| (lto_input_ts_decl_common_tree_pointers): Likewise. |
| (lto_input_ts_decl_with_vis_tree_pointers): Likewise. |
| (lto_input_ts_field_decl_tree_pointers): Likewise. |
| (lto_input_ts_function_decl_tree_pointers): Likewise. |
| (lto_input_ts_type_common_tree_pointers): Likewise. |
| (lto_input_ts_type_non_common_tree_pointers): Likewise. |
| (lto_input_ts_list_tree_pointers): Likewise. |
| (lto_input_ts_vec_tree_pointers): Likewise. |
| (lto_input_ts_exp_tree_pointers): Likewise. |
| (lto_input_ts_block_tree_pointers): Likewise. |
| (lto_input_ts_binfo_tree_pointers): Likewise. |
| (lto_input_ts_constructor_tree_pointers): Likewise. |
| (lto_input_ts_omp_clause_tree_pointers): Likewise. |
| * tree-streamer-out.c (streamer_write_chain): Update to use |
| stream_write_tree_ref. |
| (write_ts_common_tree_pointers): Likewise. |
| (write_ts_vector_tree_pointers): Likewise. |
| (write_ts_poly_tree_pointers): Likewise. |
| (write_ts_complex_tree_pointers): Likewise. |
| (write_ts_decl_minimal_tree_pointers): Likewise. |
| (write_ts_decl_common_tree_pointers): Likewise. |
| (write_ts_decl_non_common_tree_pointers): Likewise. |
| (write_ts_decl_with_vis_tree_pointers): Likewise. |
| (write_ts_field_decl_tree_pointers): Likewise. |
| (write_ts_function_decl_tree_pointers): Likewise. |
| (write_ts_type_common_tree_pointers): Likewise. |
| (write_ts_type_non_common_tree_pointers): Likewise. |
| (write_ts_list_tree_pointers): Likewise. |
| (write_ts_vec_tree_pointers): Likewise. |
| (write_ts_exp_tree_pointers): Likewise. |
| (write_ts_block_tree_pointers): Likewise. |
| (write_ts_binfo_tree_pointers): Likewise. |
| (write_ts_constructor_tree_pointers): Likewise. |
| (write_ts_omp_clause_tree_pointers): Likewise. |
| (streamer_write_tree_body): Likewise. |
| (streamer_write_integer_cst): Likewise. |
| * tree-streamer.h (streamer_read_chain):Declare. |
| (streamer_write_chain):Declare. |
| (streamer_write_tree_body): Update prototype. |
| (streamer_write_integer_cst): Update prototype. |
| |
| 2020-05-29 H.J. Lu <hjl.tools@gmail.com> |
| |
| PR bootstrap/95413 |
| * configure: Regenerated. |
| |
| 2020-05-29 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber. |
| (add<mode>3_vcc_zext_dup_exec): Likewise. |
| (add<mode>3_vcc_zext_dup2): Likewise. |
| (add<mode>3_vcc_zext_dup2_exec): Likewise. |
| |
| 2020-05-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95272 |
| * tree-vectorizer.h (_slp_tree::representative): Add. |
| (SLP_TREE_REPRESENTATIVE): Likewise. |
| * tree-vect-loop.c (vectorizable_reduction): Adjust SLP |
| node gathering. |
| (vectorizable_live_operation): Use the representative to |
| attach the reduction info to. |
| * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize |
| SLP_TREE_REPRESENTATIVE. |
| (vect_create_new_slp_node): Likewise. |
| (slp_copy_subtree): Copy it. |
| (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts. |
| (vect_slp_analyze_node_operations_1): Pass the representative |
| to vect_analyze_stmt. |
| (vect_schedule_slp_instance): Pass the representative to |
| vect_transform_stmt. |
| |
| 2020-05-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95356 |
| * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP |
| node hacking during analysis. |
| |
| 2020-05-29 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR lto/95362 |
| * lto-streamer-out.c (lto_output_tree): Disable redundant streaming. |
| |
| 2020-05-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95403 |
| * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL |
| stmt_vinfo. |
| |
| 2020-05-29 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/95315 |
| * omp-general.c (omp_resolve_declare_variant): Fix up addition of |
| declare variant cgraph node removal callback. |
| |
| 2020-05-29 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/95052 |
| * expr.c (store_expr): If expr_size is constant and significantly |
| larger than TREE_STRING_LENGTH, set temp to just the |
| TREE_STRING_LENGTH portion of the STRING_CST. |
| |
| 2020-05-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95393 |
| * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build |
| to build the min/max expression so we simplify cases like |
| MAX(0, s) immediately. |
| |
| 2020-05-29 Joe Ramsay <joe.ramsay@arm.com> |
| |
| * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support |
| for unpacked EOR, ORR, AND. |
| |
| 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com> |
| |
| * Makefile.in: don't look for libiberty in the "pic" subdirectory |
| when building for Mingw. Add dependency on xgcc with the proper |
| extension. |
| |
| 2020-05-28 Jeff Law <law@redhat.com> |
| |
| * config/h8300/logical.md (bclrhi_msx): Remove pattern. |
| |
| 2020-05-28 Jeff Law <law@redhat.com> |
| |
| * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't |
| make a nonzero adjustment to the memory offset. |
| (b<ior,xor>hi_msx): Turn into a splitter. |
| |
| 2020-05-28 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into): |
| Fix off-by-one error. |
| |
| 2020-05-28 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.h (aarch64_frame): Add a comment above |
| wb_candidate1 and wb_candidate2. |
| * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate |
| wb_candidate1 and wb_candidate2 if we decided not to use them. |
| |
| 2020-05-28 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR testsuite/95361 |
| * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that |
| we have at least some CFI operations when using a frame pointer. |
| Only redefine the CFA if we have CFI operations. |
| |
| 2020-05-28 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove |
| case for !SLP_TREE_VECTYPE. |
| (vect_slp_analyze_node_operations): Adjust. |
| |
| 2020-05-28 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (_slp_tree::vec_defs): Add. |
| (SLP_TREE_VEC_DEFS): Likewise. |
| * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust. |
| (_slp_tree::~_slp_tree): Likewise. |
| (vect_mask_constant_operand_p): Remove unused function. |
| (vect_get_constant_vectors): Rename to... |
| (vect_create_constant_vectors): ... this. Take the |
| invariant node as argument and code generate it. Remove |
| dead code, remove temporary asserts. Pass a NULL stmt_info |
| to vect_init_vector. |
| (vect_get_slp_defs): Simplify. |
| (vect_schedule_slp_instance): Code-generate externals and |
| invariants using vect_create_constant_vectors. |
| |
| 2020-05-28 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-stmts.c (vect_finish_stmt_generation_1): |
| Conditionalize stmt_info use, assert the new stmt cannot throw |
| when not specified. |
| (vect_finish_stmt_generation): Adjust assert. |
| |
| 2020-05-28 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95273 |
| PR tree-optimization/95356 |
| * tree-vect-stmts.c (vectorizable_shift): Adjust when and to |
| what we set the vector type of the shift operand SLP node |
| again. |
| |
| 2020-05-28 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted |
| fall-throughs. |
| |
| 2020-05-28 Martin Liska <mliska@suse.cz> |
| |
| PR web/95380 |
| * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and |
| rename ipcp-unit-growth to ipa-cp-unit-growth. |
| |
| 2020-05-28 Hongtao Liu <hongtao.liu@intel.com> |
| |
| * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename |
| from *avx512vl_<code>v2div2qi_store and refine memory size of |
| the pattern. |
| (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto. |
| (*avx512vl_<code><mode>v4qi2_store_1): Ditto. |
| (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto. |
| (*avx512vl_<code><mode>v8qi2_store_1): Ditto. |
| (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto. |
| (*avx512vl_<code><mode>v4hi2_store_1): Ditto. |
| (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto. |
| (*avx512vl_<code>v2div2hi2_store_1): Ditto. |
| (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto. |
| (*avx512vl_<code>v2div2si2_store_1): Ditto. |
| (*avx512vl_<code>v2div2si2_mask_store_1): Ditto. |
| (*avx512f_<code>v8div16qi2_store_1): Ditto. |
| (*avx512f_<code>v8div16qi2_mask_store_1): Ditto. |
| (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split. |
| (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto. |
| (*avx512vl_<code><mode>v4qi2_store_2): Ditto. |
| (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto. |
| (*avx512vl_<code><mode>v8qi2_store_2): Ditto. |
| (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto. |
| (*avx512vl_<code><mode>v4hi2_store_2): Ditto. |
| (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto. |
| (*avx512vl_<code>v2div2hi2_store_2): Ditto. |
| (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto. |
| (*avx512vl_<code>v2div2si2_store_2): Ditto. |
| (*avx512vl_<code>v2div2si2_mask_store_2): Ditto. |
| (*avx512f_<code>v8div16qi2_store_2): Ditto. |
| (*avx512f_<code>v8div16qi2_mask_store_2): Ditto. |
| * config/i386/i386-builtin-types.def: Adjust builtin type. |
| * config/i386/i386-expand.c: Ditto. |
| * config/i386/i386-builtin.def: Adjust builtin. |
| * config/i386/avx512fintrin.h: Ditto. |
| * config/i386/avx512vlbwintrin.h: Ditto. |
| * config/i386/avx512vlintrin.h: Ditto. |
| |
| 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com> |
| |
| PR gcov-profile/95332 |
| * gcov-io.c (gcov_var::endian): Move field. |
| (from_file): Add IN_GCOV_TOOL check. |
| * gcov-io.h (gcov_magic): Ditto. |
| |
| 2020-05-28 Max Filippov <jcmvbkbc@gmail.com> |
| |
| * config/xtensa/xtensa.c (xtensa_delegitimize_address): New |
| function. |
| (TARGET_DELEGITIMIZE_ADDRESS): New macro. |
| |
| 2020-05-27 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * builtin-types.def (BT_UINT128): New primitive type. |
| (BT_FN_UINT128_UINT128): New function type. |
| * builtins.def (BUILT_IN_BSWAP128): New GCC builtin. |
| * doc/extend.texi (__builtin_bswap128): Document it. |
| * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128. |
| (is_inexpensive_builtin): Likewise. |
| * fold-const-call.c (fold_const_call_ss): Likewise. |
| * fold-const.c (tree_call_nonnegative_warnv_p): Likewise. |
| * tree-ssa-ccp.c (evaluate_stmt): Likewise. |
| * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise. |
| (vectorizable_call): Likewise. |
| * optabs.c (expand_unop): Always use the double word path for it. |
| * tree-core.h (enum tree_index): Add TI_UINT128_TYPE. |
| * tree.h (uint128_type_node): New global type. |
| * tree.c (build_common_tree_nodes): Build it if TImode is supported. |
| |
| 2020-05-27 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives. |
| (mmx_hsubv2sf3): Ditto. |
| (mmx_haddsubv2sf3): New expander. |
| (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct |
| RTL template to model horizontal subtraction and addition. |
| * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC): |
| Update for rename. |
| |
| 2020-05-27 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95355 |
| * config/i386/sse.md |
| (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): |
| Remove %q operand modifier from insn template. |
| (avx512f_<code>v8hiv8di2<mask_name>): Ditto. |
| |
| 2020-05-27 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives. |
| Enable insn pattern for TARGET_MMX_WITH_SSE. |
| (*mmx_movshdup): New insn pattern. |
| (*mmx_movsldup): Ditto. |
| (*mmx_movss): Ditto. |
| * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const): |
| Handle E_V2SFmode. |
| (expand_vec_perm_movs): Handle E_V2SFmode. |
| (expand_vec_perm_even_odd): Ditto. |
| (expand_vec_perm_broadcast_1): Assert that E_V2SFmode |
| is already handled by standard shuffle patterns. |
| |
| 2020-05-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95295 |
| * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after |
| merging stores from paths. |
| |
| 2020-05-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95356 |
| * tree-vect-stmts.c (vectorizable_shift): Adjust vector |
| type for the shift operand. |
| |
| 2020-05-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95335 |
| * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset |
| lvisited for nodes made external. |
| |
| 2020-05-27 Richard Biener <rguenther@suse.de> |
| |
| * dump-context.h (debug_dump_context): New class. |
| (dump_context): Make it friend. |
| * dumpfile.c (debug_dump_context::debug_dump_context): |
| Implement. |
| (debug_dump_context::~debug_dump_context): Likewise. |
| * tree-vect-slp.c: Include dump-context.h. |
| (vect_print_slp_tree): Dump a single SLP node. |
| (debug): New overload for slp_tree. |
| (vect_print_slp_graph): Rename from vect_print_slp_tree and |
| use that. |
| (vect_analyze_slp_instance): Adjust. |
| |
| 2020-05-27 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/95315 |
| * omp-general.c (omp_declare_variant_remove_hook): New function. |
| (omp_resolve_declare_variant): Always return base if it is already |
| declare_variant_alt magic decl itself. Register |
| omp_declare_variant_remove_hook as cgraph node removal hook. |
| |
| 2020-05-27 Jeff Law <law@redhat.com> |
| |
| * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants |
| for the primary input operand. |
| (tstsi_variable_bit_qi): Similarly. |
| |
| 2020-05-26 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative. |
| |
| 2020-05-26 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR ipa/95320 |
| * ipa-utils.h (odr_type_p): Also permit calls with |
| only flag_generate_offload set. |
| |
| 2020-05-26 Alexandre Oliva <oliva@adacore.com> |
| |
| * gcc.c (validate_switches): Add braced parameter. Adjust all |
| callers. Expected and skip trailing brace only if braced. |
| Return after handling one atom otherwise. |
| (DUMPS_OPTIONS): New. |
| (cpp_debug_options): Define in terms of it. |
| |
| 2020-05-26 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95327 |
| * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype |
| when we are not using a scalar shift. |
| |
| 2020-05-26 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern. |
| * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const): |
| Handle E_V2SImode and E_V4HImode. |
| (expand_vec_perm_even_odd_1): Handle E_V4HImode. |
| Assert that E_V2SImode is already handled. |
| (expand_vec_perm_broadcast_1): Assert that E_V2SImode |
| is already handled by standard shuffle patterns. |
| |
| 2020-05-26 Jan Hubicka <jh@suse.cz> |
| |
| * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in |
| enumeral types. |
| |
| 2020-05-26 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/95197 |
| * gimplify.c (find_combined_omp_for): Move to omp-general.c. |
| * omp-general.h (find_combined_omp_for): Declare. |
| * omp-general.c: Include tree-iterator.h. |
| (find_combined_omp_for): New function, moved from gimplify.c. |
| |
| 2020-05-26 Alexandre Oliva <oliva@adacore.com> |
| |
| * common.opt (aux_base_name): Define. |
| (dumpbase, dumpdir): Mark as Driver options. |
| (-dumpbase, -dumpdir): Likewise. |
| (dumpbase-ext, -dumpbase-ext): New. |
| (auxbase, auxbase-strip): Drop. |
| * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir): |
| Document. |
| (-o): Introduce the notion of primary output, mention it |
| influences auxiliary and dump output names as well, add |
| examples. |
| (-save-temps): Adjust, move examples into -dump*. |
| (-save-temps=cwd, -save-temps=obj): Likewise. |
| (-fdump-final-insns): Adjust. |
| * dwarf2out.c (gen_producer_string): Drop auxbase and |
| auxbase_strip; add dumpbase_ext. |
| * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP. |
| (save_temps_prefix, save_temps_length): Drop. |
| (save_temps_overrides_dumpdir): New. |
| (dumpdir, dumpbase, dumpbase_ext): New. |
| (dumpdir_length, dumpdir_trailing_dash_added): New. |
| (outbase, outbase_length): New. |
| (The Specs Language): Introduce %". Adjust %b and %B. |
| (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always. |
| Precede object file with %w when it's the primary output. |
| (cpp_debug_options): Do not pass on incoming -dumpdir, |
| -dumpbase and -dumpbase-ext options; recompute them with |
| %:dumps. |
| (cc1_options): Drop auxbase with and without compare-debug; |
| use cpp_debug_options instead of dumpbase. Mark asm output |
| with %w when it's the primary output. |
| (static_spec_functions): Drop %:compare-debug-auxbase-opt and |
| %:replace-exception. Add %:dumps. |
| (driver_handle_option): Implement -save-temps=*/-dumpdir |
| mutual overriding logic. Save dumpdir, dumpbase and |
| dumpbase-ext options. Do not save output_file in |
| save_temps_prefix. |
| (adds_single_suffix_p): New. |
| (single_input_file_index): New. |
| (process_command): Combine output dir, output base name, and |
| dumpbase into dumpdir and outbase. |
| (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir. |
| (do_spec_1): Optionally dumpdir instead of save_temps_prefix, |
| and outbase instead of input_basename in %b, %B and in |
| -save-temps aux files. Handle empty argument %". |
| (driver::maybe_run_linker): Adjust dumpdir and auxbase. |
| (compare_debug_dump_opt_spec_function): Adjust gkd dump file |
| naming. Spec-quote the computed -fdump-final-insns file name. |
| (debug_auxbase_opt): Drop. |
| (compare_debug_self_opt_spec_function): Drop auxbase-strip |
| computation. |
| (compare_debug_auxbase_opt_spec_function): Drop. |
| (not_actual_file_p): New. |
| (replace_extension_spec_func): Drop. |
| (dumps_spec_func): New. |
| (convert_white_space): Split-out parts into... |
| (quote_string, whitespace_to_convert_p): ... these. New. |
| (quote_spec_char_p, quote_spec, quote_spec_arg): New. |
| (driver::finalize): Release and reset new variables; drop |
| removed ones. |
| * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if... |
| (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the |
| empty string otherwise. |
| (DUMPBASE_SUFFIX): Drop leading period. |
| (debug_objcopy): Use concat. |
| (run_gcc): Recognize -save-temps=* as -save-temps too. Obey |
| -dumpdir. Pass on empty dumpdir and dumpbase with a directory |
| component. Simplify temp file names. |
| * opts.c (finish_options): Drop aux base name handling. |
| (common_handle_option): Drop auxbase-strip handling. |
| * toplev.c (print_switch_values): Drop auxbase, add |
| dumpbase-ext. |
| (process_options): Derive aux_base_name from dump_base_name |
| and dump_base_ext. |
| (lang_dependent_init): Compute dump_base_ext along with |
| dump_base_name. Disable stack usage and callgraph-info during |
| lto generation and compare-debug recompilation. |
| |
| 2020-05-26 Hongtao Liu <hongtao.liu@intel.com> |
| Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95211 |
| PR target/95256 |
| * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander. |
| (fix<fixunssuffix>_truncv2sfv2di2): Ditto. |
| (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from |
| float<floatunssuffix>v2div2sf2. |
| (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>): |
| Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>. |
| (vec_pack<floatprefix>_float_<mode>): Adjust icode name. |
| (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto. |
| (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto. |
| * config/i386/i386-builtin.def: Ditto. |
| * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector |
| subregs when both omode and imode are vector mode and |
| have the same inner mode. |
| |
| 2020-05-25 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into): |
| Only turn MEM_REFs into bit-field stores for small bit-field regions. |
| (imm_store_chain_info::output_merged_store): Be prepared for sources |
| with non-integral type in the bit-field insertion case. |
| (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as |
| the largest size for the bit-field case. |
| |
| 2020-05-25 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn. |
| (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute. |
| (*vec_dupv4hi): Redefine as define_insn. |
| Remove alternative with general register input. |
| (*vec_dupv2si): Ditto. |
| |
| 2020-05-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95309 |
| * tree-vect-slp.c (vect_get_constant_vectors): Move number |
| of vector computation ... |
| (vect_slp_analyze_node_operations): ... to analysis phase. |
| |
| 2020-05-25 Jan Hubicka <hubicka@ucw.cz> |
| |
| * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check. |
| * lto-streamer.h (streamer_debugging): New constant |
| * tree-streamer-in.c (streamer_read_tree_bitfields): Add |
| streamer_debugging check. |
| (streamer_get_pickled_tree): Likewise. |
| * tree-streamer-out.c (pack_ts_base_value_fields): Likewise. |
| |
| 2020-05-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95308 |
| * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize |
| test for TARGET_MEM_REFs. |
| |
| 2020-05-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95295 |
| * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores |
| RHSes and drop to full sm_other if they are not equal. |
| |
| 2020-05-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95271 |
| * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP |
| children vector type. |
| (vectorizable_call): Pass down slp ops. |
| |
| 2020-05-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95297 |
| * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg |
| skip updating operand 1 vector type. |
| |
| 2020-05-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95284 |
| * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous |
| fix. |
| |
| 2020-05-25 Hongtao Liu <hongtao.liu@intel.com> |
| |
| PR target/95125 |
| * config/i386/sse.md (sf2dfmode_lower): New mode attribute. |
| (trunc<mode><sf2dfmode_lower>2) New expander. |
| (extend<sf2dfmode_lower><mode>2): Ditto. |
| |
| 2020-05-23 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make |
| ubsan_{data,type},ASAN symbols linker-visible. |
| |
| 2020-05-22 Jan Hubicka <hubicka@ucw.cz> |
| |
| * lto-streamer-out.c (DFS::DFS): Silence warning. |
| |
| 2020-05-22 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95255 |
| * config/i386/i386.md (<rounding_insn><mode>2): Do not try to |
| expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines. |
| |
| 2020-05-22 Jan Hubicka <hubicka@ucw.cz> |
| |
| * lto-streamer-out.c (lto_output_tree): Do not stream final ref if |
| it is not needed. |
| |
| 2020-05-22 Jan Hubicka <hubicka@ucw.cz> |
| |
| * lto-section-out.c (lto_output_decl_index): Adjust dump indentation. |
| * lto-streamer-out.c (create_output_block): Fix whitespace |
| (lto_write_tree_1): Add (debug) dump. |
| (DFS::DFS): Add dump. |
| (DFS::DFS_write_tree_body): Do not dump here. |
| (lto_output_tree): Improve dumping; do not stream ref when not needed. |
| (produce_asm_for_decls): Fix whitespace. |
| * tree-streamer-out.c (streamer_write_tree_header): Add dump. |
| * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump. |
| |
| 2020-05-22 Hongtao.liu <hongtao.liu@intel.com> |
| |
| PR target/92658 |
| * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander |
| (truncv32hiv32qi2): Ditto. |
| (trunc<ssedoublemodelower><mode>2): Ditto. |
| (trunc<mode><pmov_dst_3>2): Ditto. |
| (trunc<mode><pmov_dst_mode_4>2): Ditto. |
| (truncv2div2si2): Ditto. |
| (truncv8div8qi2): Ditto. |
| (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2. |
| (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2. |
| (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from |
| *avx512vl_<code><mode>v<ssescalarnum>qi2. |
| |
| 2020-05-22 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/95258 |
| * config/i386/driver-i386.c (host_detect_local_cpu): Detect |
| AVX512VPOPCNTDQ. |
| |
| 2020-05-22 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95268 |
| * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers |
| properly. |
| |
| 2020-05-22 Jan Hubicka <hubicka@ucw.cz> |
| |
| * tree-streamer.c (record_common_node): Fix hash value of pre-streamed |
| nodes. |
| |
| 2020-05-22 Jan Hubicka <hubicka@ucw.cz> |
| |
| * lto-streamer-in.c (lto_read_tree): Do not stream end markers. |
| (lto_input_scc): Optimize streaming of entry lengths. |
| * lto-streamer-out.c (lto_write_tree): Do not stream end markers |
| (DFS::DFS): Optimize stremaing of entry lengths |
| |
| 2020-05-22 Richard Biener <rguenther@suse.de> |
| |
| PR lto/95190 |
| * doc/invoke.texi (flto): Document behavior of diagnostic |
| options. |
| |
| 2020-05-22 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vect_is_simple_use): New overload. |
| (vect_maybe_update_slp_op_vectype): New. |
| * tree-vect-stmts.c (vect_is_simple_use): New overload |
| accessing operands of SLP vs. non-SLP operation transparently. |
| (vect_maybe_update_slp_op_vectype): New function updating |
| the possibly shared SLP operands vector type. |
| (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic |
| using the new vect_is_simple_use overload; update SLP invariant |
| operand nodes vector type. |
| (vectorizable_comparison): Likewise. |
| (vectorizable_call): Likewise. |
| (vectorizable_conversion): Likewise. |
| (vectorizable_shift): Likewise. |
| (vectorizable_store): Likewise. |
| (vectorizable_condition): Likewise. |
| (vectorizable_assignment): Likewise. |
| * tree-vect-loop.c (vectorizable_reduction): Likewise. |
| * tree-vect-slp.c (vect_get_constant_vectors): Enforce |
| present SLP_TREE_VECTYPE and check it matches previous |
| behavior. |
| |
| 2020-05-22 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95248 |
| * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out. |
| |
| 2020-05-22 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (_slp_tree::_slp_tree): New. |
| (_slp_tree::~_slp_tree): Likewise. |
| * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code |
| from allocators. |
| (_slp_tree::~_slp_tree): Implement. |
| (vect_free_slp_tree): Simplify. |
| (vect_create_new_slp_node): Likewise. Add nops parameter. |
| (vect_build_slp_tree_2): Adjust. |
| (vect_analyze_slp_instance): Likewise. |
| |
| 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| |
| * adjust-alignment.c: Include memmodel.h. |
| |
| 2020-05-21 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/95260 |
| * config/i386/cpuid.h: Use hexadecimal in comments. |
| |
| 2020-05-21 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/95212 |
| * config/i386/i386-builtins.c (processor_features): Move |
| F_AVX512VP2INTERSECT after F_AVX512BF16. |
| (isa_names_table): Likewise. |
| |
| 2020-05-21 Martin Liska <mliska@suse.cz> |
| |
| * common/config/aarch64/aarch64-common.c (aarch64_handle_option): |
| Handle OPT_moutline_atomics. |
| * config/aarch64/aarch64.c: Add outline-atomics to |
| aarch64_attributes. |
| * doc/extend.texi: Document the newly added target attribute. |
| |
| 2020-05-21 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95218 |
| |
| * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark |
| operands 1 and 2 commutative. Manually swap operands. |
| (*mmx_nabsv2sf2): Ditto. |
| |
| Partially revert: |
| 2020-05-18 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (*<code>tf2_1): |
| Mark operands 1 and 2 commutative. |
| (*nabstf2_1): Ditto. |
| * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2 |
| commutative. Do not swap operands. |
| (*nabs<mode>2): Ditto. |
| |
| 2020-05-20 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95229 |
| * config/i386/sse.md (<code>v8qiv8hi2): Use |
| simplify_gen_subreg instead of simplify_subreg. |
| (<code>v8qiv8si2): Ditto. |
| (<code>v4qiv4si2): Ditto. |
| (<code>v4hiv4si2): Ditto. |
| (<code>v8qiv8di2): Ditto. |
| (<code>v4qiv4di2): Ditto. |
| (<code>v2qiv2di2): Ditto. |
| (<code>v4hiv4di2): Ditto. |
| (<code>v2hiv2di2): Ditto. |
| (<code>v2siv2di2): Ditto. |
| |
| 2020-05-20 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95238 |
| * config/i386/i386.md (*pushsi2_rex64): |
| Use "e" constraint instead of "i". |
| |
| 2020-05-20 Jan Hubicka <hubicka@ucw.cz> |
| |
| * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter. |
| (lto_input_tree_1): Strenghten sanity check. |
| (lto_input_tree): Update call of lto_input_scc. |
| * lto-streamer-out.c: Include ipa-utils.h |
| (create_output_block): Initialize local_trees if merigng is going |
| to happen. |
| (destroy_output_block): Destroy local_trees. |
| (DFS): Add max_local_entry. |
| (local_tree_p): New function. |
| (DFS::DFS): Initialize and maintain it. |
| (DFS::DFS_write_tree): Decide on streaming format. |
| (lto_output_tree): Stream inline singleton SCCs |
| * lto-streamer.h (enum LTO_tags): Add LTO_trees. |
| (struct output_block): Add local_trees. |
| (lto_input_scc): Update prototype. |
| |
| 2020-05-20 Patrick Palka <ppalka@redhat.com> |
| |
| PR c++/95223 |
| * hash-table.h (hash_table::find_with_hash): Move up the call to |
| hash_table::verify. |
| |
| 2020-05-20 Martin Liska <mliska@suse.cz> |
| |
| * lto-compress.c (lto_compression_zstd): Fill up |
| num_compressed_il_bytes. |
| (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here. |
| |
| 2020-05-20 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95219 |
| * tree-vect-loop.c (vectorizable_induction): Reduce |
| group_size before computing the number of required IVs. |
| |
| 2020-05-20 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/95231 |
| * tree-inline.c (remap_gimple_stmt): Revert adjusting |
| COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary. |
| |
| 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| PR target/94959 |
| * config/arm/arm-protos.h (arm_mode_base_reg_class): Function |
| declaration. |
| (mve_vector_mem_operand): Likewise. |
| * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check |
| the load from memory to a core register is legitimate for give mode. |
| (mve_vector_mem_operand): Define function. |
| (arm_print_operand): Modify comment. |
| (arm_mode_base_reg_class): Define. |
| * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for |
| TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE. |
| * config/arm/constraints.md (Ux): Likewise. |
| (Ul): Likewise. |
| * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also |
| add support for missing Vector Store Register and Vector Load Register. |
| Add a new alternative to support load from memory to PC (or label) in |
| vector store/load. |
| (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux. |
| (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to |
| mve_memory_operand and also modify the MVE instructions to emit. |
| (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux. |
| (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to |
| mve_memory_operand and also modify the MVE instructions to emit. |
| (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to |
| mve_memory_operand and also modify the MVE instructions to emit. |
| (mve_vldrhq_z_fv8hf): Likewise. |
| (mve_vldrhq_z_<supf><mode>): Likewise. |
| (mve_vldrwq_fv4sf): Likewise. |
| (mve_vldrwq_<supf>v4si): Likewise. |
| (mve_vldrwq_z_fv4sf): Likewise. |
| (mve_vldrwq_z_<supf>v4si): Likewise. |
| (mve_vld1q_f<mode>): Modify constriant Us to Ux. |
| (mve_vld1q_<supf><mode>): Likewise. |
| (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to |
| mve_memory_operand. |
| (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to |
| mve_memory_operand and also modify the MVE instructions to emit. |
| (mve_vstrhq_p_<supf><mode>): Likewise. |
| (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to |
| mve_memory_operand. |
| (mve_vstrwq_fv4sf): Modify constriant Us to Ux. |
| (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE |
| instructions to emit. |
| (mve_vstrwq_p_<supf>v4si): Likewise. |
| (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux. |
| * config/arm/predicates.md (mve_memory_operand): Define. |
| |
| 2020-05-30 Richard Biener <rguenther@suse.de> |
| |
| PR c/95141 |
| * c-fold.c (c_fully_fold_internal): Enhance guard on |
| overflow_warning. |
| |
| 2020-05-20 Kito Cheng <kito.cheng@sifive.com> |
| |
| PR target/90811 |
| * Makefile.in (OBJS): Add adjust-alignment.o. |
| * adjust-alignment.c (pass_data_adjust_alignment): New. |
| (pass_adjust_alignment): New. |
| (pass_adjust_alignment::execute): New. |
| (make_pass_adjust_alignment): New. |
| * tree-pass.h (make_pass_adjust_alignment): New. |
| * passes.def: Add pass_adjust_alignment. |
| |
| 2020-05-19 Alex Coplan <alex.coplan@arm.com> |
| |
| PR target/94591 |
| * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match |
| identity permutation. |
| |
| 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short, |
| msp430_small, msp430_large and size24plus DejaGNU effective |
| targets. |
| Improve grammar in descriptions for size20plus and size32plus effective |
| targets. |
| |
| 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> |
| |
| * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for |
| callee saved registers only in xBPF. |
| (bpf_expand_prologue): Save callee saved registers only in xBPF. |
| (bpf_expand_epilogue): Likewise for restoring. |
| * doc/invoke.texi (eBPF Options): Document this is activated by |
| -mxbpf. |
| |
| 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> |
| |
| * config/bpf/bpf.opt (mxbpf): New option. |
| * doc/invoke.texi (Option Summary): Add -mxbpf. |
| (eBPF Options): Document -mxbbpf. |
| |
| 2020-05-19 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/92658 |
| * config/i386/sse.md (<code>v16qiv16hi2): New expander. |
| (<code>v32qiv32hi2): Ditto. |
| (<code>v8qiv8hi2): Ditto. |
| (<code>v16qiv16si2): Ditto. |
| (<code>v8qiv8si2): Ditto. |
| (<code>v4qiv4si2): Ditto. |
| (<code>v16hiv16si2): Ditto. |
| (<code>v8hiv8si2): Ditto. |
| (<code>v4hiv4si2): Ditto. |
| (<code>v8qiv8di2): Ditto. |
| (<code>v4qiv4di2): Ditto. |
| (<code>v2qiv2di2): Ditto. |
| (<code>v8hiv8di2): Ditto. |
| (<code>v4hiv4di2): Ditto. |
| (<code>v2hiv2di2): Ditto. |
| (<code>v8siv8di2): Ditto. |
| (<code>v4siv4di2): Ditto. |
| (<code>v2siv2di2): Ditto. |
| |
| 2020-05-19 Kito Cheng <kito.cheng@sifive.com> |
| |
| * common/config/riscv/riscv-common.c (riscv_implied_info_t): New. |
| (riscv_implied_info): New. |
| (riscv_subset_list): Add handle_implied_ext. |
| (riscv_subset_list::to_string): New parameter version_p to |
| control output format. |
| (riscv_subset_list::handle_implied_ext): New. |
| (riscv_subset_list::parse_std_ext): Call handle_implied_ext. |
| (riscv_arch_str): New parameter version_p to control output format. |
| (riscv_expand_arch): New. |
| * config/riscv/riscv-protos.h (riscv_arch_str): New parameter, |
| version_p. |
| * config/riscv/riscv.h (riscv_expand_arch): New, |
| (EXTRA_SPEC_FUNCTIONS): Define. |
| (ASM_SPEC): Transform -march= via riscv_expand_arch. |
| |
| 2020-05-19 Kito Cheng <kito.cheng@sifive.com> |
| |
| * riscv-common.c (parse_sv_or_non_std_ext): Rename to |
| parse_multiletter_ext. |
| (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`, |
| adjust parsing order for 's' and 'x'. |
| |
| 2020-05-19 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (_slp_tree::vectype): Add field. |
| (SLP_TREE_VECTYPE): New. |
| * tree-vect-slp.c (vect_create_new_slp_node): Initialize |
| SLP_TREE_VECTYPE. |
| (vect_create_new_slp_node): Likewise. |
| (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c |
| and simplify. |
| (vect_slp_analyze_node_operations): Walk nodes children for |
| invariant costing. |
| (vect_get_constant_vectors): Use local scope op variable. |
| * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here. |
| (vect_model_simple_cost): Adjust. |
| (vect_model_store_cost): Likewise. |
| (vectorizable_store): Likewise. |
| |
| 2020-05-18 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/92815 |
| * tree-object-size.c (decl_init_size): New function. |
| (addr_object_size): Call it. |
| * tree.h (last_field): Declare. |
| (first_field): Add attribute nonnull. |
| |
| 2020-05-18 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/94940 |
| * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code. |
| * tree.c (component_ref_size): Correct the handling or array members |
| of unions. |
| Drop a pointless test. |
| Rename a local variable. |
| |
| 2020-05-18 Jason Merrill <jason@redhat.com> |
| |
| * aclocal.m4: Add ax_cxx_compile_stdcxx.m4. |
| * configure.ac: Use AX_CXX_COMPILE_STDCXX(11). |
| |
| 2020-05-14 Jason Merrill <jason@redhat.com> |
| |
| * doc/install.texi (Prerequisites): Update boostrap compiler |
| requirement to C++11/GCC 4.8. |
| |
| 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| PR tree-optimization/94952 |
| * gimple-ssa-store-merging.c (pass_store_merging::process_store): |
| Initialize variables bitpos, bitregion_start, and bitregion_end in |
| order to silence warnings about use of uninitialized variables. |
| |
| 2020-05-18 Carl Love <cel@us.ibm.com> |
| |
| PR target/94833 |
| * config/rs6000/vsx.md (define_expand): Fix instruction generation for |
| first_match_index_<mode>. |
| * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add |
| additional test cases with zero vector elements. |
| |
| 2020-05-18 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95169 |
| * config/i386/i386-expand.c (ix86_expand_int_movcc): |
| Avoid reversing a non-trapping comparison to a trapping one. |
| |
| 2020-05-18 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/arm/arm.c (output_move_double): Fix codegen when loading into |
| a register pair with an odd base register. |
| |
| 2020-05-18 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator): |
| Do not emit FLAGS_REG clobber for TFmode. |
| * config/i386/i386.md (*<code>tf2_1): Rewrite as |
| define_insn_and_split. Mark operands 1 and 2 commutative. |
| (*nabstf2_1): Ditto. |
| (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF. |
| Do not swap memory operands. Simplify RTX generation. |
| (neg abs SSE splitter): Ditto. |
| * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2 |
| commutative. Do not swap operands. Simplify RTX generation. |
| (*nabs<mode>2): Ditto. |
| |
| 2020-05-18 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_slp_bb): Start after labels. |
| (vect_get_constant_vectors): Really place init stmt after scalar defs. |
| * tree-vect-stmts.c (vect_init_vector_1): Insert before |
| region begin. |
| |
| 2020-05-18 H.J. Lu <hongjiu.lu@intel.com> |
| |
| * config/i386/driver-i386.c (host_detect_local_cpu): Support |
| Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake |
| processor families. |
| |
| 2020-05-18 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/95171 |
| * tree-inline.c (remap_gimple_stmt): Split out trapping compares |
| when inlining into a non-call EH function. |
| |
| 2020-05-18 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95172 |
| * tree-ssa-loop-im.c (execute_sm): Get flag whether we |
| eventually need the conditional processing. |
| (execute_sm_exit): When processing an orderd sequence |
| avoid doing any conditional processing. |
| (hoist_memory_references): Pass down whether all edges |
| have ordered processing for a ref to execute_sm. |
| |
| 2020-05-17 Jeff Law <law@redhat.com> |
| |
| * config/h8300/predicates.md (pc_or_label_operand): New predicate. |
| * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate |
| into a single pattern using pc_or_label_operand. |
| * config/h8300/combiner.md (bit branch patterns): Likewise. |
| * config/h8300/peepholes.md (HImode and SImode branches): Likewise. |
| |
| 2020-05-17 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/95021 |
| * config/i386/i386-features.c (has_non_address_hard_reg): |
| Renamed to ... |
| (pseudo_reg_set): This. Return the SET expression. Ignore |
| pseudo register push. |
| (general_scalar_to_vector_candidate_p): Combine single_set and |
| has_non_address_hard_reg calls to pseudo_reg_set. |
| (timode_scalar_to_vector_candidate_p): Likewise. |
| * config/i386/i386.md (*pushv1ti2): New pattern. |
| |
| 2020-05-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| Revert: |
| 2020-05-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (operand_less_p): Move to... |
| * vr-values.c (operand_less_p): ...here. |
| * tree-vrp.h (operand_less_p): Remove. |
| |
| 2020-05-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (operand_less_p): Move to... |
| * vr-values.c (operand_less_p): ...here. |
| * tree-vrp.h (operand_less_p): Remove. |
| |
| 2020-05-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (class vrp_insert): Remove prototype for |
| live_on_edge. |
| |
| 2020-05-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (class live_names): New. |
| (live_on_edge): Move into live_names. |
| (build_assert_expr_for): Move into vrp_insert. |
| (find_assert_locations_in_bb): Rename from |
| find_assert_locations_1. |
| (process_assert_insertions_for): Move into vrp_insert. |
| (compare_assert_loc): Same. |
| (remove_range_assertions): Same. |
| (dump_asserts_for): Rename to vrp_insert::dump. |
| (debug_asserts_for): Rename to vrp_insert::debug. |
| (dump_all_asserts): Rename to vrp_insert::dump. |
| (debug_all_asserts): Rename to vrp_insert::debug. |
| |
| 2020-05-17 Aldy Hernandez <aldyh@redhat.com> |
| |
| * tree-vrp.c (class vrp_prop): Move check_all_array_refs, |
| check_array_ref, check_mem_ref, and search_for_addr_array |
| into new class... |
| (class array_bounds_checker): ...here. |
| (class check_array_bounds_dom_walker): Adjust to use |
| array_bounds_checker. |
| (check_all_array_refs): Move into array_bounds_checker and rename |
| to check. |
| (class vrp_folder): Make fold_predicate_in private. |
| |
| 2020-05-15 Jeff Law <law@redhat.com> |
| |
| * config/h8300/h8300.md (SFI iterator): New iterator for |
| SFmode and SImode. |
| * config/h8300/peepholes.md (memory comparison): Use mode |
| iterator to consolidate 3 patterns into one. |
| (stack allocation and stack store): Handle SFmode. Handle |
| 8 byte allocations. |
| |
| 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require |
| RS6000_BTM_POWERPC64. |
| |
| 2020-05-15 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (SWI48DWI): New mode iterator. |
| (*push<mode>2): Allow XMM registers. |
| (*pushdi2_rex64): Ditto. |
| (*pushsi2_rex64): Ditto. |
| (*pushsi2): Ditto. |
| (push XMM reg splitter): New splitter |
| |
| (*pushdf) Change "x" operand constraint to "v". |
| (*pushsf_rex64): Ditto. |
| (*pushsf): Ditto. |
| |
| 2020-05-15 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/92260 |
| * tree-vect-slp.c (vect_get_constant_vectors): Compute |
| the number of vector stmts in a canonical way. |
| |
| 2020-05-15 Martin Liska <mliska@suse.cz> |
| |
| * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation |
| warning. |
| |
| 2020-05-15 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp. |
| |
| 2020-05-15 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95133 |
| * gimple-ssa-split-paths.c |
| (find_block_to_duplicate_for_splitting_paths): Check for |
| normal edges. |
| |
| 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt |
| routines. |
| (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p. |
| |
| 2020-05-15 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR middle-end/94635 |
| * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with |
| OMP_TARGET_EXIT_DATA, use 'release:' unless the associated |
| item is 'delete:'. |
| |
| 2020-05-15 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/i386.md (isa): Add sse3_noavx. |
| (enabled): Handle sse3_noavx. |
| |
| * config/i386/mmx.md (mmx_haddv2sf3): New expander. |
| (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX |
| alternatives. Match commutative vec_select selector operands. |
| (*mmx_haddv2sf3_low): New insn pattern. |
| |
| (*mmx_hsubv2sf3): Add SSE/AVX alternatives. |
| (*mmx_hsubv2sf3_low): New insn pattern. |
| |
| 2020-05-15 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/33315 |
| * tree-ssa-sink.c: Include tree-eh.h. |
| (sink_stats): Add commoned member. |
| (sink_common_stores_to_bb): New function implementing store |
| commoning by sinking to the successor. |
| (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned. |
| (pass_sink_code::execute): Likewise. Record commoned stores |
| in statistics. |
| |
| 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com> |
| |
| PR rtl-optimization/37451, part of PR target/61837 |
| * loop-doloop.c (doloop_simplify_count): New function. Simplify |
| (add -1; zero_ext; add +1) to zero_ext when not wrapping. |
| (doloop_modify): Call doloop_simplify_count. |
| |
| 2020-05-14 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR jit/94778 |
| * doc/sourcebuild.texi: Document effective target lgccjit. |
| |
| 2020-05-14 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a |
| define_expand, and rename the original to ... |
| (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand. |
| (add<mode>3_zext_dup_exec): Likewise, with ... |
| (add<mode>3_vcc_zext_dup_exec): ... this. |
| (add<mode>3_zext_dup2): Likewise, with ... |
| (add<mode>3_zext_dup_exec): ... this. |
| (add<mode>3_zext_dup2_exec): Likewise, with ... |
| (add<mode>3_zext_dup2): ... this. |
| * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch |
| addv64di3_zext* calls to use addv64di3_vcc_zext*. |
| |
| 2020-05-14 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/sse.md (truncv2dfv2df2): New insn pattern. |
| (extendv2sfv2df2): Ditto. |
| |
| 2020-05-14 H.J. Lu <hongjiu.lu@intel.com> |
| |
| * configure: Regenerated. |
| |
| 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/arm.c (reg_needs_saving_p): New function. |
| (use_return_insn): Use reg_needs_saving_p. |
| (arm_get_vfp_saved_size): Likewise. |
| (arm_compute_frame_layout): Likewise. |
| (arm_save_coproc_regs): Likewise. |
| (thumb1_expand_epilogue): Likewise. |
| (arm_expand_epilogue_apcs_frame): Likewise. |
| (arm_expand_epilogue): Likewise. |
| |
| 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/arm.c (thumb1_expand_prologue): Update error message. |
| |
| 2020-05-14 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1. |
| |
| (floatv2siv2df2): New expander. |
| (floatunsv2siv2df2): New insn pattern. |
| |
| (fix_truncv2dfv2si2): New expander. |
| (fixuns_truncv2dfv2si2): New insn pattern. |
| |
| 2020-05-14 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/95105 |
| * config/aarch64/aarch64-sve-builtins.cc |
| (handle_arm_sve_vector_bits_attribute): Create a copy of the |
| original type's TYPE_MAIN_VARIANT, then reapply all the differences |
| between the original type and its main variant. |
| |
| 2020-05-14 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/95118 |
| * real.c (real_to_decimal_for_mode): Make sure we handle |
| a zero with nonzero exponent. |
| |
| 2020-05-14 Jakub Jelinek <jakub@redhat.com> |
| |
| * Makefile.in (GTFILES): Add omp-general.c. |
| * cgraph.h (struct cgraph_node): Add declare_variant_alt and |
| calls_declare_variant_alt members and initialize them in the |
| ctor. |
| * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct |
| calls to declare_variant_alt nodes. |
| * lto-cgraph.c (lto_output_node): Write declare_variant_alt |
| and calls_declare_variant_alt. |
| (input_overwrite_node): Read them back. |
| * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt |
| bit. |
| * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt |
| bit. |
| (tree_function_versioning): Copy calls_declare_variant_alt bit. |
| * omp-offload.c (execute_omp_device_lower): Call |
| omp_resolve_declare_variant on direct function calls. |
| (pass_omp_device_lower::gate): Also enable for |
| calls_declare_variant_alt functions. |
| * omp-general.c (omp_maybe_offloaded): Return false after inlining. |
| (omp_context_selector_matches): Handle the case when |
| cfun->curr_properties has PROP_gimple_any bit set. |
| (struct omp_declare_variant_entry): New type. |
| (struct omp_declare_variant_base_entry): New type. |
| (struct omp_declare_variant_hasher): New type. |
| (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal): |
| New methods. |
| (omp_declare_variants): New variable. |
| (struct omp_declare_variant_alt_hasher): New type. |
| (omp_declare_variant_alt_hasher::hash, |
| omp_declare_variant_alt_hasher::equal): New methods. |
| (omp_declare_variant_alt): New variables. |
| (omp_resolve_late_declare_variant): New function. |
| (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant |
| when called late. Create a magic declare_variant_alt fndecl and |
| cgraph node and return that if decision needs to be deferred until |
| after gimplification. |
| * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt |
| bit. |
| |
| PR middle-end/95108 |
| * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member. |
| (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in |
| entry block if info->after_stmt is NULL, otherwise add after that stmt |
| and update it after adding each stmt. |
| (ipa_simd_modify_function_body): Initialize info.after_stmt. |
| |
| * function.h (struct function): Add has_omp_target bit. |
| * omp-offload.c (omp_discover_declare_target_fn_r): New function, |
| old renamed to ... |
| (omp_discover_declare_target_tgt_fn_r): ... this. |
| (omp_discover_declare_target_var_r): Call |
| omp_discover_declare_target_tgt_fn_r instead of |
| omp_discover_declare_target_fn_r. |
| (omp_discover_implicit_declare_target): Also queue functions with |
| has_omp_target bit set, for those walk with |
| omp_discover_declare_target_fn_r, for declare target to functions |
| walk with omp_discover_declare_target_tgt_fn_r. |
| |
| 2020-05-14 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id. |
| Add SSE/AVX alternative. Change operand predicates from |
| nonimmediate_operand to register_mmxmem_operand. |
| Enable instruction pattern for TARGET_MMX_WITH_SSE. |
| (fix_truncv2sfv2si2): New expander. |
| (fixuns_truncv2sfv2si2): New insn pattern. |
| |
| (mmx_floatv2siv2sf2): rename from mmx_floatv2si2. |
| Add SSE/AVX alternative. Change operand predicates from |
| nonimmediate_operand to register_mmxmem_operand. |
| Enable instruction pattern for TARGET_MMX_WITH_SSE. |
| (floatv2siv2sf2): New expander. |
| (floatunsv2siv2sf2): New insn pattern. |
| |
| * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID): |
| Update for rename. |
| (IX86_BUILTIN_PI2FD): Ditto. |
| |
| 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack |
| expander. |
| * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New |
| expanders. |
| |
| 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.c (allocate_stack_space): Add missing updates |
| of last_probe_offset. |
| |
| 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.md ("allocate_stack"): Call |
| anti_adjust_stack_and_probe_stack_clash when stack clash |
| protection is enabled. |
| * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove |
| prototype. Remove static. |
| * explow.h (anti_adjust_stack_and_probe_stack_clash): Add |
| prototype. |
| |
| 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| |
| * config/rs6000/altivec.h (vec_extractl): New #define. |
| (vec_extracth): Likewise. |
| * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant. |
| (UNSPEC_EXTRACTR): Likewise. |
| (vextractl<mode>): New expansion. |
| (vextractl<mode>_internal): New insn. |
| (vextractr<mode>): New expansion. |
| (vextractr<mode>_internal): New insn. |
| * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx): |
| New built-in function. |
| (__builtin_altivec_vextduhvlx): Likewise. |
| (__builtin_altivec_vextduwvlx): Likewise. |
| (__builtin_altivec_vextddvlx): Likewise. |
| (__builtin_altivec_vextdubvhx): Likewise. |
| (__builtin_altivec_vextduhvhx): Likewise. |
| (__builtin_altivec_vextduwvhx): Likewise. |
| (__builtin_altivec_vextddvhx): Likewise. |
| (__builtin_vec_extractl): New overloaded built-in function. |
| (__builtin_vec_extracth): Likewise. |
| * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): |
| Define overloaded forms of __builtin_vec_extractl and |
| __builtin_vec_extracth. |
| (builtin_function_type): Add cases to mark arguments of new |
| built-in functions as unsigned. |
| (rs6000_common_init_builtins): Add |
| opaque_ftype_opaque_opaque_opaque_opaque. |
| * config/rs6000/rs6000.md (du_or_d): New mode attribute. |
| * doc/extend.texi (PowerPC AltiVec Built-in Functions Available |
| for a Future Architecture): Add description of vec_extractl and |
| vec_extractr built-in functions. |
| |
| 2020-05-13 Richard Biener <rguenther@suse.de> |
| |
| * target.def (add_stmt_cost): Add new vectype parameter. |
| * targhooks.c (default_add_stmt_cost): Adjust. |
| * targhooks.h (default_add_stmt_cost): Likewise. |
| * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new |
| vectype parameter. |
| * config/arm/arm.c (arm_add_stmt_cost): Likewise. |
| * config/i386/i386.c (ix86_add_stmt_cost): Likewise. |
| * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise. |
| |
| * tree-vectorizer.h (stmt_info_for_cost::vectype): Add. |
| (dump_stmt_cost): Add new vectype parameter. |
| (add_stmt_cost): Likewise. |
| (record_stmt_cost): Likewise. |
| (record_stmt_cost): Add overload with old signature. |
| * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost): |
| Adjust. |
| (vect_get_known_peeling_cost): Likewise. |
| (vect_estimate_min_profitable_iters): Likewise. |
| * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter. |
| * tree-vect-stmts.c (record_stmt_cost): Likewise. |
| (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter |
| and pass down correct vectype and NULL stmt_info. |
| (vect_model_simple_cost): Adjust. |
| (vect_model_store_cost): Likewise. |
| |
| 2020-05-13 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove. |
| (_slp_instance::group_size): Likewise. |
| * tree-vect-loop.c (vectorizable_reduction): The group size |
| is the number of lanes in the node. |
| * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise. |
| (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE, |
| verify it matches the instance trees number of lanes. |
| (vect_slp_analyze_node_operations_1): Use the numer of lanes |
| in the node as group size. |
| (vect_bb_vectorization_profitable_p): Use the instance root |
| number of lanes for the size of life. |
| (vect_schedule_slp_instance): Use the number of lanes as |
| group_size. |
| * tree-vect-stmts.c (vectorizable_load): Remove SLP instance |
| parameter. Use the number of lanes of the load for the group |
| size in the gap adjustment code. |
| (vect_analyze_stmt): Adjust. |
| (vect_transform_stmt): Likewise. |
| |
| 2020-05-13 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/95080 |
| * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even |
| if the last insn is a note. |
| |
| PR tree-optimization/95060 |
| * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR |
| if it is the single use of the FMA internal builtin. |
| |
| 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com> |
| |
| PR tree-optimization/94969 |
| * tree-data-dependence.c (constant_access_functions): Rename to... |
| (invariant_access_functions): ...this. Add parameter. Check for |
| invariant access function, rather than constant. |
| (build_classic_dist_vector): Call above function. |
| * tree-loop-distribution.c (pg_add_dependence_edges): Add comment. |
| |
| 2020-05-13 Hongtao Liu <hongtao.liu@intel.com> |
| |
| PR target/94118 |
| * doc/extend.texi (x86Operandmodifiers): Document more x86 |
| operand modifier. |
| * gcc/config/i386/i386.c: Add comment for operand modifier N and I. |
| |
| 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br> |
| |
| * tree-vrp.c (class vrp_insert): New. |
| (insert_range_assertions): Move to class vrp_insert. |
| (dump_all_asserts): Same as above. |
| (dump_asserts_for): Same as above. |
| (live): Same as above. |
| (need_assert_for): Same as above. |
| (live_on_edge): Same as above. |
| (finish_register_edge_assert_for): Same as above. |
| (find_switch_asserts): Same as above. |
| (find_assert_locations): Same as above. |
| (find_assert_locations_1): Same as above. |
| (find_conditional_asserts): Same as above. |
| (process_assert_insertions): Same as above. |
| (register_new_assert_for): Same as above. |
| (vrp_prop): New variable fun. |
| (vrp_initialize): New parameter. |
| (identify_jump_threads): Same as above. |
| (execute_vrp): Same as above. |
| |
| |
| 2020-05-12 Keith Packard <keith.packard@sifive.com> |
| |
| * config/riscv/riscv.c (riscv_unique_section): New. |
| (TARGET_ASM_UNIQUE_SECTION): New. |
| |
| 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com> |
| |
| * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv. |
| * config/riscv/riscv-passes.def: New file. |
| * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare. |
| * config/riscv/riscv-shorten-memrefs.c: New file. |
| * config/riscv/riscv.c (tree-pass.h): New include. |
| (riscv_compressed_reg_p): New Function |
| (riscv_compressed_lw_offset_p): Likewise. |
| (riscv_compressed_lw_address_p): Likewise. |
| (riscv_shorten_lw_offset): Likewise. |
| (riscv_legitimize_address): Attempt to convert base + large_offset |
| to compressible new_base + small_offset. |
| (riscv_address_cost): Make anticipated compressed load/stores |
| cheaper for code size than uncompressed load/stores. |
| (riscv_register_priority): Move compressed register check to |
| riscv_compressed_reg_p. |
| * config/riscv/riscv.h (C_S_BITS): Define. |
| (CSW_MAX_OFFSET): Define. |
| * config/riscv/riscv.opt (mshorten-memefs): New option. |
| * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule. |
| (PASSES_EXTRA): Add riscv-passes.def. |
| * doc/invoke.texi: Document -mshorten-memrefs. |
| |
| * config/riscv/riscv.c (riscv_new_address_profitable_p): New function. |
| (TARGET_NEW_ADDRESS_PROFITABLE_P): Define. |
| * doc/tm.texi: Regenerate. |
| * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook. |
| * sched-deps.c (attempt_change): Use old address if it is cheaper than |
| new address. |
| * target.def (new_address_profitable_p): New hook. |
| * targhooks.c (default_new_address_profitable_p): New function. |
| * targhooks.h (default_new_address_profitable_p): Declare. |
| |
| 2020-05-12 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/mmx.md (copysignv2sf3): New expander. |
| (xorsignv2sf3): Ditto. |
| (signbitv2sf3): Ditto. |
| |
| 2020-05-12 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/mmx.md (fmav2sf4): New insn pattern. |
| (fmsv2sf4): Ditto. |
| (fnmav2sf4): Ditto. |
| (fnmsv2sf4): Ditto. |
| |
| 2020-05-12 H.J. Lu <hongjiu.lu@intel.com> |
| |
| * Makefile.in (CET_HOST_FLAGS): New. |
| (COMPILER): Add $(CET_HOST_FLAGS). |
| * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and |
| AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't |
| enabled. |
| * aclocal.m4: Regenerated. |
| * configure: Likewise. |
| |
| 2020-05-12 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/mmx.md (<code>v2sf2): New insn pattern. |
| (*mmx_<code>v2sf2): New insn_and_split pattern. |
| (*mmx_nabsv2sf2): Ditto. |
| (*mmx_andnotv2sf3): New insn pattern. |
| (*mmx_<code>v2sf3): Ditto. |
| * config/i386/i386.md (absneg_op): New code attribute. |
| * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode. |
| (ix86_build_signbit_mask): Ditto. |
| |
| 2020-05-12 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-live.c (remove_unused_locals): Remove dead debug |
| bind resets. |
| |
| 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common): |
| Update prototype to include "local" argument. |
| * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add |
| "local" argument. Handle local common decls. |
| * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust |
| msp430_output_aligned_decl_common call with 0 for "local" argument. |
| (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define. |
| |
| 2020-05-12 Richard Biener <rguenther@suse.de> |
| |
| * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set. |
| |
| 2020-05-12 Martin Liska <mliska@suse.cz> |
| |
| PR sanitizer/95033 |
| PR sanitizer/95051 |
| * sanopt.c (sanitize_rewrite_addressable_params): |
| Clear DECL_NOT_GIMPLE_REG_P for argument. |
| |
| 2020-05-12 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/94980 |
| * tree-vect-generic.c (expand_vector_comparison): Use |
| vector_element_bits_tree to get the element size in bits, |
| rather than using TYPE_SIZE. |
| (expand_vector_condition, vector_element): Likewise. |
| |
| 2020-05-12 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/94980 |
| * tree-vect-generic.c (build_replicated_const): Take the number |
| of bits as a parameter, instead of the type of the elements. |
| (do_plus_minus): Update accordingly, using vector_element_bits |
| to calculate the correct number of bits. |
| (do_negate): Likewise. |
| |
| 2020-05-12 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/94980 |
| * tree.h (vector_element_bits, vector_element_bits_tree): Declare. |
| * tree.c (vector_element_bits, vector_element_bits_tree): New. |
| * match.pd: Use the new functions instead of determining the |
| vector element size directly from TYPE_SIZE(_UNIT). |
| * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise. |
| * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise. |
| * tree-vect-stmts.c (vect_is_simple_cond): Likewise. |
| * tree-vect-generic.c (expand_vector_piecewise): Likewise. |
| (expand_vector_conversion): Likewise. |
| (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as |
| a divisor. Convert the dividend to bits to compensate. |
| * tree-vect-loop.c (vectorizable_live_operation): Call |
| vector_element_bits instead of open-coding it. |
| |
| 2020-05-12 Jakub Jelinek <jakub@redhat.com> |
| |
| * omp-offload.h (omp_discover_implicit_declare_target): Declare. |
| * omp-offload.c: Include context.h. |
| (omp_declare_target_fn_p, omp_declare_target_var_p, |
| omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r, |
| omp_discover_implicit_declare_target): New functions. |
| * cgraphunit.c (analyze_functions): Call |
| omp_discover_implicit_declare_target. |
| |
| 2020-05-12 Richard Biener <rguenther@suse.de> |
| |
| * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize |
| literal constant &MEM[..] to a constant literal. |
| |
| 2020-05-12 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95045 |
| * dbgcnt.def (lim): Add debug-counter. |
| * tree-ssa-loop-im.c: Include dbgcnt.h. |
| (find_refs_for_sm): Use lim debug counter for store motion |
| candidates. |
| (do_store_motion): Rename form store_motion. Commit edge |
| insertions... |
| (store_motion_loop): ... here. |
| (tree_ssa_lim): Adjust. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| |
| * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm. |
| (vec_ctzm): Rename to vec_cnttzm. |
| * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): |
| Change fourth operand for vec_ternarylogic to require |
| compatibility with unsigned SImode rather than unsigned QImode. |
| * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): |
| Remove overloaded forms of vec_gnb that are no longer needed. |
| * doc/extend.texi (PowerPC AltiVec Built-in Functions Available |
| for a Future Architecture): Replace vec_clzm with vec_cntlzm; |
| replace vec_ctzm with vec_cntlzm; remove four unwanted forms of |
| vec_gnb; move vec_ternarylogic documentation into this section |
| and replace const unsigned char with const unsigned int as its |
| fourth argument. |
| |
| 2020-05-11 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_genpcvm): New #define. |
| * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in |
| instantiation. |
| (XXGENPCVM_V8HI): Likewise. |
| (XXGENPCVM_V4SI): Likewise. |
| (XXGENPCVM_V2DI): Likewise. |
| (XXGENPCVM): New overloaded built-in instantiation. |
| * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add |
| entries for FUTURE_BUILTIN_VEC_XXGENPCVM. |
| (altivec_expand_builtin): Add special handling for |
| FUTURE_BUILTIN_VEC_XXGENPCVM. |
| (builtin_function_type): Add handling for |
| FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}. |
| * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator. |
| (UNSPEC_XXGENPCV): New constant. |
| (xxgenpcvm_<mode>_internal): New insn. |
| (xxgenpcvm_<mode>): New expansion. |
| * doc/extend.texi: Add documentation for vec_genpcvm built-ins. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| |
| * config/rs6000/altivec.h (vec_strir): New #define. |
| (vec_stril): Likewise. |
| (vec_strir_p): Likewise. |
| (vec_stril_p): Likewise. |
| * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant. |
| (UNSPEC_VSTRIL): Likewise. |
| (vstrir_<mode>): New expansion. |
| (vstrir_code_<mode>): New insn. |
| (vstrir_p_<mode>): New expansion. |
| (vstrir_p_code_<mode>): New insn. |
| (vstril_<mode>): New expansion. |
| (vstril_code_<mode>): New insn. |
| (vstril_p_<mode>): New expansion. |
| (vstril_p_code_<mode>): New insn. |
| * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr): |
| New built-in function. |
| (__builtin_altivec_vstrihr): Likewise. |
| (__builtin_altivec_vstribl): Likewise. |
| (__builtin_altivec_vstrihl): Likewise. |
| (__builtin_altivec_vstribr_p): Likewise. |
| (__builtin_altivec_vstrihr_p): Likewise. |
| (__builtin_altivec_vstribl_p): Likewise. |
| (__builtin_altivec_vstrihl_p): Likewise. |
| (__builtin_vec_strir): New overloaded built-in function. |
| (__builtin_vec_stril): Likewise. |
| (__builtin_vec_strir_p): Likewise. |
| (__builtin_vec_stril_p): Likewise. |
| * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): |
| Define overloaded forms of __builtin_vec_strir, |
| __builtin_vec_stril, __builtin_vec_strir_p, and |
| __builtin_vec_stril_p. |
| * doc/extend.texi (PowerPC AltiVec Built-in Functions Available |
| for a Future Architecture): Add description of vec_stril, |
| vec_stril_p, vec_strir, and vec_strir_p built-in functions. |
| |
| 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_ternarylogic): New #define. |
| * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant. |
| (xxeval): New insn. |
| * config/rs6000/predicates.md (u8bit_cint_operand): New predicate. |
| * config/rs6000/rs6000-builtin.def: Add handling of new macro |
| RS6000_BUILTIN_4. |
| (BU_FUTURE_V_4): New macro. Use it. |
| (BU_FUTURE_OVERLOAD_4): Likewise. |
| * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add |
| handling for quaternary built-in functions. |
| (altivec_resolve_overloaded_builtin): Add special-case handling |
| for __builtin_vec_xxeval. |
| * config/rs6000/rs6000-call.c: Add handling of new macro |
| RS6000_BUILTIN_4 in initialization of rs6000_builtin_info, |
| bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg, |
| bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays. |
| (altivec_overloaded_builtins): Add definitions for |
| FUTURE_BUILTIN_VEC_XXEVAL. |
| (bdesc_4arg): New array. |
| (htm_expand_builtin): Add handling for quaternary built-in |
| functions. |
| (rs6000_expand_quaternop_builtin): New function. |
| (rs6000_expand_builtin): Add handling for quaternary built-in |
| functions. |
| (rs6000_init_builtins): Initialize builtin_mode_to_type entries |
| for unsigned QImode and unsigned HImode. |
| (builtin_quaternary_function_type): New function. |
| (rs6000_common_init_builtins): Add handling of quaternary |
| operations. |
| * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined |
| constant. |
| (RS6000_BTC_PREDICATE): Change value of constant. |
| (RS6000_BTC_ABS): Likewise. |
| (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4. |
| * doc/extend.texi (PowerPC AltiVec Built-In Functions Available |
| for a Future Architecture): Add description of vec_ternarylogic |
| built-in function. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| |
| * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in |
| function. |
| (__builtin_pextd): Likewise. |
| * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant. |
| (UNSPEC_PEXTD): Likewise. |
| (pdepd): New insn. |
| (pextd): Likewise. |
| * doc/extend.texi (Basic PowerPC Built-in Functions Available for |
| a Future Architecture): Add descriptions of __builtin_pdepd and |
| __builtin_pextd functions. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| |
| * config/rs6000/altivec.h (vec_clrl): New #define. |
| (vec_clrr): Likewise. |
| * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant. |
| (UNSPEC_VCLRRB): Likewise. |
| (vclrlb): New insn. |
| (vclrrb): Likewise. |
| * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New |
| built-in function. |
| (__builtin_altivec_vclrrb): Likewise. |
| (__builtin_vec_clrl): New overloaded built-in function. |
| (__builtin_vec_clrr): Likewise. |
| * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): |
| Define overloaded forms of __builtin_vec_clrl and |
| __builtin_vec_clrr. |
| * doc/extend.texi (PowerPC AltiVec Built-in Functions Available |
| for a Future Architecture): Add descriptions of vec_clrl and |
| vec_clrr. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| |
| * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New |
| built-in function definition. |
| (__builtin_cnttzdm): Likewise. |
| * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant. |
| (UNSPEC_CNTTZDM): Likewise. |
| (cntlzdm): New insn. |
| (cnttzdm): Likewise. |
| * doc/extend.texi (Basic PowerPC Built-in Functions available for |
| a Future Architecture): Add descriptions of __builtin_cntlzdm and |
| __builtin_cnttzdm functions. |
| |
| 2020-05-11 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/mmx.md (sqrtv2sf2): New insn pattern. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| |
| * config/rs6000/altivec.h (vec_cfuge): New #define. |
| * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant. |
| (vcfuged): New insn. |
| * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged): |
| New built-in function. |
| * config/rs6000/rs6000-call.c (builtin_function_type): Add |
| handling for FUTURE_BUILTIN_VCFUGED case. |
| * doc/extend.texi (PowerPC AltiVec Built-in Functions Available |
| for a Future Architecture): Add description of vec_cfuge built-in |
| function. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| |
| * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New |
| #define. |
| (BU_FUTURE_MISC_1): Likewise. |
| (BU_FUTURE_MISC_2): Likewise. |
| (BU_FUTURE_MISC_3): Likewise. |
| (__builtin_cfuged): New built-in function definition. |
| * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant. |
| (cfuged): New insn. |
| * doc/extend.texi (Basic PowerPC Built-in Functions Available for |
| a Future Architecture): New subsubsection. |
| |
| 2020-05-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/95049 |
| * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition |
| between different constants. |
| |
| 2020-05-11 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_gnb): New #define. |
| * config/rs6000/altivec.md (UNSPEC_VGNB): New constant. |
| (vgnb): New insn. |
| * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New |
| #define. |
| (BU_FUTURE_OVERLOAD_2): Likewise. |
| (BU_FUTURE_OVERLOAD_3): Likewise. |
| (__builtin_altivec_gnb): New built-in function. |
| (__buiiltin_vec_gnb): New overloaded built-in function. |
| * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): |
| Define overloaded forms of __builtin_vec_gnb. |
| (rs6000_expand_binop_builtin): Add error checking for 2nd argument |
| of __builtin_vec_gnb. |
| (builtin_function_type): Mark return value and arguments unsigned |
| for FUTURE_BUILTIN_VGNB. |
| * doc/extend.texi (PowerPC AltiVec Built-in Functions Available |
| for a Future Architecture): Add description of vec_gnb built-in |
| function. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_pdep): New macro implementing new |
| built-in function. |
| (vec_pext): Likewise. |
| * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant. |
| (UNSPEC_VPEXTD): Likewise. |
| (vpdepd): New insn. |
| (vpextd): Likewise. |
| * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New |
| built-in function. |
| (__builtin_altivec_vpextd): Likewise. |
| * config/rs6000/rs6000-call.c (builtin_function_type): Add |
| handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD |
| cases. |
| * doc/extend.texi (PowerPC Altivec Built-in Functions Available |
| for a Future Architecture): Add description of vec_pdep and |
| vec_pext built-in functions. |
| |
| 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> |
| Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| * config/rs6000/altivec.h (vec_clzm): New macro. |
| (vec_ctzm): Likewise. |
| * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant. |
| (UNSPEC_VCTZDM): Likewise. |
| (vclzdm): New insn. |
| (vctzdm): Likewise. |
| * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro. |
| (BU_FUTURE_V_1): Likewise. |
| (BU_FUTURE_V_2): Likewise. |
| (BU_FUTURE_V_3): Likewise. |
| (__builtin_altivec_vclzdm): New builtin definition. |
| (__builtin_altivec_vctzdm): Likewise. |
| * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause |
| _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is |
| set. |
| * config/rs6000/rs6000-call.c (builtin_function_type): Set return |
| value and parameter types to be unsigned for VCLZDM and VCTZDM. |
| * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add |
| support for TARGET_FUTURE flag. |
| * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant. |
| * doc/extend.texi (PowerPC Altivec Built-in Functions Available |
| for a Future Architecture): New subsubsection. |
| |
| 2020-05-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94988 |
| PR tree-optimization/95025 |
| * tree-ssa-loop-im.c (seq_entry): Make a struct, add from. |
| (sm_seq_push_down): Take extra parameter denoting where we |
| moved the ref to. |
| (execute_sm_exit): Re-issue sm_other stores in the correct |
| order. |
| (sm_seq_valid_bb): When always executed, allow sm_other to |
| prevail inbetween sm_ord and record their stored value. |
| (hoist_memory_references): Adjust refs_not_supported propagation |
| and prune sm_other from the end of the ordered sequences. |
| |
| 2020-05-11 Felix Yang <felix.yang@huawei.com> |
| |
| PR target/94991 |
| * config/aarch64/aarch64.md (mov<mode>): |
| Bitcasts to the equivalent integer mode using gen_lowpart |
| instead of doing FAIL for scalar floating point move. |
| |
| 2020-05-11 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case |
| to correctly calculate cost for new pattern (*csinv3_uxtw_insn3). |
| * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New. |
| (*csinv3_uxtw_insn2): New. |
| (*csinv3_uxtw_insn3): New. |
| * config/aarch64/iterators.md (neg_not_cs): New. |
| |
| 2020-05-11 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint |
| instead of "Yv" for AVX alternatives. Add "prefix" attribute. |
| (*mmx_addv2sf3): Ditto. |
| (*mmx_subv2sf3): Ditto. |
| (*mmx_mulv2sf3): Ditto. |
| (*mmx_<code>v2sf3): Ditto. |
| (mmx_ieee_<ieee_maxmin>v2sf3): Ditto. |
| |
| 2020-05-11 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/95046 |
| * config/i386/i386.c (ix86_vector_mode_supported_p): |
| Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE. |
| * config/i386/mmx.md (*mov<mode>_internal): Do not set |
| mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE. |
| |
| (mmx_addv2sf3): Change operand predicates from |
| nonimmediate_operand to register_mmxmem_operand. |
| (addv2sf3): New expander. |
| (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand |
| predicates from nonimmediate_operand to register_mmxmem_operand. |
| Enable instruction pattern for TARGET_MMX_WITH_SSE. |
| |
| (mmx_subv2sf3): Change operand predicate from |
| nonimmediate_operand to register_mmxmem_operand. |
| (mmx_subrv2sf3): Ditto. |
| (subv2sf3): New expander. |
| (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand |
| predicates from nonimmediate_operand to register_mmxmem_operand. |
| Enable instruction pattern for TARGET_MMX_WITH_SSE. |
| |
| (mmx_mulv2sf3): Change operand predicates from |
| nonimmediate_operand to register_mmxmem_operand. |
| (mulv2sf3): New expander. |
| (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand |
| predicates from nonimmediate_operand to register_mmxmem_operand. |
| Enable instruction pattern for TARGET_MMX_WITH_SSE. |
| |
| (mmx_<code>v2sf3): Change operand predicates from |
| nonimmediate_operand to register_mmxmem_operand. |
| (<code>v2sf3): New expander. |
| (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand |
| predicates from nonimmediate_operand to register_mmxmem_operand. |
| Enable instruction pattern for TARGET_MMX_WITH_SSE. |
| (mmx_ieee_<ieee_maxmin>v2sf3): Ditto. |
| |
| 2020-05-11 Martin Liska <mliska@suse.cz> |
| |
| PR c/95040 |
| * common.opt: Fix typo in option description. |
| |
| 2020-05-11 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/94928 |
| * gcov-io.h: Add caveat about coverage format parsing and |
| possible outdated documentation. |
| |
| 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com> |
| |
| PR tree-optimization/83403 |
| * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with |
| determine_value_range, Add fold conversion of MULT_EXPR, fix the |
| previous PLUS_EXPR. |
| |
| 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com> |
| |
| * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and |
| __ILP32__ for 32-bit targets. |
| |
| 2020-05-09 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * tree.h (expr_align): Delete. |
| * tree.c (expr_align): Likewise. |
| |
| 2020-05-09 Hans-Peter Nilsson <hp@axis.com> |
| |
| * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM |
| from end_of_function_needs. |
| |
| * config.gcc: Remove support for crisv32-*-* and cris-*-linux*. |
| * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt: |
| Remove. |
| * config/cris/t-elfmulti: Remove crisv32 multilib. |
| * config/cris: Remove shared-library and CRIS v32 support. |
| |
| Move trivially from cc0 to reg:CC model, removing most optimizations. |
| * config/cris/cris.md: Remove all side-effect patterns and their |
| splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM |
| to all but post-reload control-flow and movem insns. Remove |
| constraints on all modified expanders. Remove obsoleted cc0-related |
| references. |
| (attr "cc"): Remove alternative "rev". |
| (mode_iterator BWDD, DI_, SI_): New. |
| (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New. |
| ("tst<mode>"): Remove; fold as "M" alternative into compare insn. |
| ("mstep_shift", "mstep_mul"): Remove patterns. |
| ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize. |
| * config/cris/cris.c: Change all non-condition-code, |
| non-control-flow emitted insns to add a parallel with clobber of |
| CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with |
| emit_insn to use of emit_move_insn, gen_add2_insn or |
| cris_emit_insn, as convenient. |
| (cris_reg_overlap_mentioned_p) |
| (cris_normal_notice_update_cc, cris_notice_update_cc): Remove. |
| (cris_movem_load_rest_p): Don't assume all elements in a |
| PARALLEL are SETs. |
| (cris_store_multiple_op_p): Ditto. |
| (cris_emit_insn): New function. |
| * cris/cris-protos.h (cris_emit_insn): Declare. |
| |
| PR target/93372 |
| * config/cris/cris.md (zcond): New code_iterator. |
| ("*cbranch<mode>4_btstq<CC>"): New insn_and_split. |
| |
| * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define. |
| |
| * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true. |
| |
| * config/cris/cris.md ("movsi"): For memory destination |
| post-reload, generate clobberless variant. Similarly for a |
| zero-source post-reload. |
| ("*mov_tomem<mode>_split"): New split. |
| ("*mov_tomem<mode>"): New insn. |
| ("enabled", mov_tomem_enabled): Define and use to exclude "x" -> |
| "Q>m" for less-than-SImode. |
| ("*mov_fromzero<mode>_split"): New split. |
| ("*mov_fromzero<mode>"): New insn. |
| |
| Prepare for cmpelim pass to eliminate redundant compare insns. |
| * config/cris/cris-modes.def: New file. |
| * config/cris/cris-protos.h (cris_select_cc_mode): Declare. |
| (cris_notice_update_cc): Remove left-over declaration. |
| * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define. |
| (cris_select_cc_mode, cris_cc_modes_compatible): New functions. |
| * config/cris/cris.h (SELECT_CC_MODE): Define. |
| * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New |
| mode_iterators. |
| (cond): New code_iterator. |
| (nzcond): Replacement for incorrect ncond. All callers changed. |
| (nzvccond): Replacement for ocond. All callers changed. |
| (rnzcond): Replacement for rcond. All callers changed. |
| (xCC): New code_attr. |
| (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All |
| users changed. |
| ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace |
| CCmode with iteration over NZVCSET. |
| ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from |
| "*cmp_ext<mode>". |
| ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi". |
| ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>". |
| ("*btst<mode>"): Similarly, from "*btst". |
| ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4", |
| iterating over cond instead of matching the comparison with |
| ordered_comparison_operator. |
| ("*cbranch<mode>4_btstq<CC>"): Correct label operand number. |
| ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating |
| over NZUSE. |
| ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over |
| NZVCUSE. Remove FIXME. |
| ("*b<nzcond:code>_reversed<mode>"): Similarly from |
| "*b<ncond:code>_reversed", over NZUSE. |
| ("*b<nzvccond:code>_reversed<mode>"): Similarly from |
| "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME. |
| ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>", |
| over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice, |
| depending on CC_NZmode vs. CCmode. Remove FIXME. |
| ("*b<rnzcond:code>_reversed<mode>"): Similarly from |
| "*b<rcond:code>_reversed", over NZUSE. |
| ("*cstore<mode><code>4"): Rename from "*cstore<mode>4", |
| iterating over cond instead of matching the comparison with |
| ordered_comparison_operator. |
| ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>", |
| iterating over NZUSE. |
| ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over |
| NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice, |
| depending on CC_NZmode vs. CCmode. |
| ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over |
| NZVCUSE. Remove FIXME. |
| ("cc"): Comment on new use. |
| ("cc_enabled"): New attribute. |
| ("enabled"): Make default fall back to cc_enabled. |
| ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New |
| default_subst_attrs. |
| ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst. |
| ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from |
| "*movsi_internal". Correct contents of, and rename attribute |
| "cc" to "cc<cccc><ccnz><ccnzvc>". |
| ("anz", "anzvc", "acc"): New define_subst_attrs. |
| ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from |
| "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>". |
| ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from |
| "movqi". Correct contents of, and rename "cc" attribute to |
| "cc<cccc><ccnz><ccnzvc>". |
| ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>". |
| ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>". |
| ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>". |
| ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"): |
| Rename from "extend<mode>si2". |
| ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"): |
| Similar, from "zero_extend<mode>si2". |
| ("*adddi3<setnz>"): Rename from "*adddi3". |
| ("*subdi3<setnz>"): Similarly from "*subdi3". |
| ("*addsi3<setnz>"): Similarly from "*addsi3". |
| ("*subsi3<setnz>"): Similarly from "*subsi3". |
| ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the |
| "cc" attribute to "cc<ccnz>". |
| ("*addqi3<setnz>"): Similarly from "*addqi3". |
| ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3". |
| ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from |
| "*expanded_andsi". |
| ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3". |
| Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>". |
| ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3". |
| ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3". |
| ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from |
| "*expanded_andhi". Add quick cc-setting alternative for 0..31. |
| ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3". |
| ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename |
| from "xorsi3". |
| ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename |
| from "one_cmplsi2". |
| ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename |
| from "<shlr>si3". |
| ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename |
| from "clzsi2". |
| ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename |
| from "bswapsi2". |
| ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3". |
| |
| * config/cris/cris-modes.def (CC_ZnN): New CC_MODE. |
| * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test |
| * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators. |
| (znnCC, rznnCC): New code_attrs. |
| ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove |
| obseolete comment. Add belt-and-suspenders mode-test to condition. |
| Add fixme regarding remaining matched-but-not-generated case. |
| ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split. |
| ("*cbranch<mode>4_btstqb0_<CC>"): Rename from |
| "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC. |
| ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE. |
| Handle output of CC_ZnNmode. |
| ("*b<nzcond:code>_reversed<mode>"): Ditto. |
| |
| * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for |
| NEG too. Correct comment. |
| * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from |
| "neg<mode>2". |
| |
| 2020-05-08 Vladimir Makarov <vmakarov@redhat.com> |
| |
| * ira-color.c (update_costs_from_allocno): Remove |
| conflict_cost_update_p argument. Propagate costs only along |
| threads. Always do conflict cost update. Add printing debugging |
| info. |
| (update_costs_from_copies): Add printing debugging info. |
| (restore_costs_from_copies): Ditto. |
| (assign_hard_reg): Improve debug info. |
| (push_only_colorable): Ditto. Call update_costs_from_prefs. |
| (color_allocnos): Remove update_costs_from_prefs. |
| |
| 2020-05-08 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vec_info::slp_loads): New. |
| (vect_optimize_slp): Declare. |
| * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do |
| nothing when there are no loads. |
| (vect_gather_slp_loads): Gather loads into a vector. |
| (vect_supported_load_permutation_p): Remove. |
| (vect_analyze_slp_instance): Do not verify permutation |
| validity here. |
| (vect_analyze_slp): Optimize permutations of reductions |
| after all SLP instances have been gathered and gather |
| all loads. |
| (vect_optimize_slp): New function split out from |
| vect_supported_load_permutation_p. Elide some permutations. |
| (vect_slp_analyze_bb_1): Call vect_optimize_slp. |
| * tree-vect-loop.c (vect_analyze_loop_2): Likewise. |
| * tree-vect-stmts.c (vectorizable_load): Check whether |
| the load can be permuted. When generating code assert we can. |
| |
| 2020-05-08 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-sccvn.c (rpo_avail): Change type to |
| eliminate_dom_walker *. |
| (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize |
| use the DOM walker availability. |
| (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1 |
| with vn_valueize as valueization callback. |
| (vn_reference_maybe_forwprop_address): Likewise. |
| * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize |
| array_ref_low_bound. |
| |
| 2020-05-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94786 |
| * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New |
| simplification. |
| |
| PR target/94857 |
| * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New |
| define_peephole2. |
| |
| PR middle-end/94724 |
| * tree.c (get_narrower): Reuse the op temporary instead of |
| shadowing it. |
| |
| PR tree-optimization/94783 |
| * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)): |
| New simplification. |
| |
| PR tree-optimization/94956 |
| * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into |
| __builtin_ctz* + 1 if direct IFN_CTZ is supported. |
| |
| PR tree-optimization/94913 |
| * match.pd (A - B + -1 >= A to B >= A): New simplification. |
| (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always |
| true for TYPE_UNSIGNED integral types. |
| |
| PR bootstrap/94961 |
| PR rtl-optimization/94516 |
| * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted |
| to false. |
| * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument. |
| Call df_notes_rescan if that argument is not true and returning true. |
| * combine.c (adjust_for_new_dest): Pass true as second argument to |
| remove_reg_equal_equiv_notes. |
| * postreload.c (reload_combine_recognize_pattern): Don't call |
| df_notes_rescan. |
| |
| 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New |
| define_insn. |
| (*setnbcr_<un>signed_<GPR:mode>): New define_insn. |
| (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1. |
| (*neg_ne_<mode>): Likewise. |
| |
| 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New |
| define_insn. |
| (*setbcr_<un>signed_<GPR:mode>): Likewise. |
| (cstore<mode>4): Use setbc[r] if available. |
| (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE. |
| (eq<mode>3): Use setbc for TARGET_FUTURE. |
| (*eq<mode>3): Avoid for TARGET_FUTURE. |
| (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE; |
| else for non-Pmode, use gen_eq and gen_xor. |
| (*ne<mode>3): Avoid for TARGET_FUTURE. |
| (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1. |
| |
| 2020-05-07 Jeff Law <law@redhat.com> |
| |
| * config/h8300/h8300.md: Move expanders and patterns into |
| files based on functionality. |
| * config/h8300/addsub.md: New file. |
| * config/h8300/bitfield.md: New file |
| * config/h8300/combiner.md: New file |
| * config/h8300/divmod.md: New file |
| * config/h8300/extensions.md: New file |
| * config/h8300/jumpcall.md: New file |
| * config/h8300/logical.md: New file |
| * config/h8300/movepush.md: New file |
| * config/h8300/multiply.md: New file |
| * config/h8300/other.md: New file |
| * config/h8300/proepi.md: New file |
| * config/h8300/shiftrotate.md: New file |
| * config/h8300/testcompare.md: New file |
| |
| * config/h8300/h8300.md (adds/subs splitters): Merge into single |
| splitter. |
| (negation expanders and patterns): Simplify and combine using |
| iterators. |
| (one_cmpl expanders and patterns): Likewise. |
| (tablejump, indirect_jump patterns ): Likewise. |
| (shift and rotate expanders and patterns): Likewise. |
| (absolute value expander and pattern): Drop expander, rename pattern |
| to just "abssf2" |
| (peephole2 patterns): Move into... |
| * config/h8300/peepholes.md: New file. |
| |
| * config/h8300/constraints.md (L and N): Simplify now that we're not |
| longer supporting the original H8/300 chip. |
| * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H. |
| * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support. |
| (shift_alg_hi, shift_alg_si): Similarly. |
| (h8300_option_overrides): Similarly. Default to H8/300H. If |
| compiling for H8/S, then turn off H8/300H. Do not update the |
| shift_alg tables for H8/300 port. |
| (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify |
| where possible. |
| (push, split_adds_subs, h8300_rtx_costs): Likewise. |
| (h8300_print_operand, compute_mov_length): Likewise. |
| (output_plussi, compute_plussi_length): Likewise. |
| (compute_plussi_cc, output_logical_op): Likewise. |
| (compute_logical_op_length, compute_logical_op_cc): Likewise. |
| (get_shift_alg, h8300_shift_needs_scratch): Likewise. |
| (output_a_shift, compute_a_shift_length): Likewise. |
| (output_a_rotate, compute_a_rotate_length): Likewise. |
| (output_simode_bld, h8300_hard_regno_mode_ok): Likewise. |
| (h8300_modes_tieable_p, h8300_return_in_memory): Likewise. |
| * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise. |
| (attr_cpu, TARGET_H8300): Remove. |
| (TARGET_DEFAULT): Update. |
| (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible. |
| (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise. |
| (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise. |
| (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise. |
| * config/h8300/h8300.md: Simplify patterns throughout. |
| * config/h8300/t-h8300: Update multilib configuration. |
| |
| * config/h8300/h8300.h (LINK_SPEC): Remove. |
| (USER_LABEL_PREFIX): Likewise. |
| |
| * config/h8300/h8300.c (h8300_asm_named_section): Remove. |
| (h8300_option_override): Remove remnants of COFF support. |
| |
| 2020-05-07 Alan Modra <amodra@gmail.com> |
| |
| * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace |
| set_rtx_cost with set_src_cost. |
| * tree-switch-conversion.c (bit_test_cluster::emit): Likewise. |
| |
| 2020-05-07 Kewen Lin <linkw@gcc.gnu.org> |
| |
| * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid |
| redundant half vector handlings for no peeling gaps. |
| |
| 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br> |
| |
| * tree-ssa-operands.c (operands_scanner): New class. |
| (operands_bitmap_obstack): Remove. |
| (n_initialized): Remove. |
| (build_uses): Move to operands_scanner class. |
| (build_vuse): Same as above. |
| (build_vdef): Same as above. |
| (verify_ssa_operands): Same as above. |
| (finalize_ssa_uses): Same as above. |
| (cleanup_build_arrays): Same as above. |
| (finalize_ssa_stmt_operands): Same as above. |
| (start_ssa_stmt_operands): Same as above. |
| (append_use): Same as above. |
| (append_vdef): Same as above. |
| (add_virtual_operand): Same as above. |
| (add_stmt_operand): Same as above. |
| (get_mem_ref_operands): Same as above. |
| (get_tmr_operands): Same as above. |
| (maybe_add_call_vops): Same as above. |
| (get_asm_stmt_operands): Same as above. |
| (get_expr_operands): Same as above. |
| (parse_ssa_operands): Same as above. |
| (finalize_ssa_defs): Same as above. |
| (build_ssa_operands): Same as above, plus create a C-like wrapper. |
| (update_stmt_operands): Create an instance of operands_scanner. |
| |
| 2020-05-07 Richard Biener <rguenther@suse.de> |
| |
| PR ipa/94947 |
| * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use |
| DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible. |
| (refered_from_nonlocal_var): Likewise. |
| (ipa_pta_execute): Likewise. |
| |
| 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com> |
| |
| * gcc/tree-ssa-struct-alias.c: Fix comments |
| |
| 2020-05-07 Martin Liska <mliska@suse.cz> |
| |
| * doc/invoke.texi: Fix 2 optindex entries. |
| |
| 2020-05-07 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94703 |
| * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ... |
| (tree_decl_common::not_gimple_reg_flag): ... to this. |
| * tree.h (DECL_GIMPLE_REG_P): Rename ... |
| (DECL_NOT_GIMPLE_REG_P): ... to this. |
| * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P. |
| (create_tmp_reg): Simplify. |
| (create_tmp_reg_fn): Likewise. |
| (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs. |
| * gimplify.c (create_tmp_from_val): Simplify. |
| (gimplify_bind_expr): Likewise. |
| (gimplify_compound_literal_expr): Likewise. |
| (gimplify_function_tree): Likewise. |
| (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P. |
| * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P. |
| (asan_add_global): Copy it. |
| * cgraphunit.c (cgraph_node::expand_thunk): Force args |
| to be GIMPLE regs. |
| * function.c (gimplify_parameters): Copy |
| DECL_NOT_GIMPLE_REG_P. |
| * ipa-param-manipulation.c |
| (ipa_param_body_adjustments::common_initialization): Simplify. |
| (ipa_param_body_adjustments::reset_debug_stmts): Copy |
| DECL_NOT_GIMPLE_REG_P. |
| * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P. |
| * sanopt.c (sanitize_rewrite_addressable_params): Likewise. |
| * tree-cfg.c (make_blocks_1): Simplify. |
| (verify_address): Do not verify DECL_GIMPLE_REG_P setting. |
| * tree-eh.c (lower_eh_constructs_2): Simplify. |
| * tree-inline.c (declare_return_variable): Adjust and |
| generalize. |
| (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P. |
| (copy_result_decl_to_var): Likewise. |
| * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment. |
| * tree-nested.c (create_tmp_var_for): Simplify. |
| * tree-parloops.c (separate_decls_in_region_name): Copy |
| DECL_NOT_GIMPLE_REG_P. |
| * tree-sra.c (create_access_replacement): Adjust and |
| generalize partial def support. |
| * tree-ssa-forwprop.c (pass_forwprop::execute): Set |
| DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on. |
| * tree-ssa.c (maybe_optimize_var): Handle clearing of |
| TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P |
| independently. |
| * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P. |
| * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream |
| DECL_NOT_GIMPLE_REG_P. |
| * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise. |
| * cfgexpand.c (avoid_type_punning_on_regs): New. |
| (discover_nonconstant_array_refs): Call |
| avoid_type_punning_on_regs to avoid unsupported mode punning. |
| |
| 2020-05-07 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class |
| from definition. |
| |
| 2020-05-07 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/57359 |
| * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove. |
| (in_mem_ref::dep_loop): Repurpose. |
| (LOOP_DEP_BIT): Remove. |
| (enum dep_kind): New. |
| (enum dep_state): Likewise. |
| (record_loop_dependence): New function to populate the |
| dependence cache. |
| (query_loop_dependence): New function to query the dependence |
| cache. |
| (memory_accesses::refs_in_loop): Rename to ... |
| (memory_accesses::refs_loaded_in_loop): ... this and change to |
| only record loads. |
| (outermost_indep_loop): Adjust. |
| (mem_ref_alloc): Likewise. |
| (gather_mem_refs_stmt): Likewise. |
| (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down. |
| (struct sm_aux): New. |
| (execute_sm): Split code generation on exits, record state |
| into new hash-map. |
| (enum sm_kind): New. |
| (execute_sm_exit): Exit code generation part. |
| (sm_seq_push_down): Helper for sm_seq_valid_bb performing |
| dependence checking on stores reached from exits. |
| (sm_seq_valid_bb): New function gathering SM stores on exits. |
| (hoist_memory_references): Re-implement. |
| (refs_independent_p): Add tbaa_p parameter and pass it down. |
| (record_dep_loop): Remove. |
| (ref_indep_loop_p_1): Fold into ... |
| (ref_indep_loop_p): ... this and generalize for three kinds |
| of dependence queries. |
| (can_sm_ref_p): Adjust according to hoist_memory_references |
| changes. |
| (store_motion_loop): Don't do anything if the set of SM |
| candidates is empty. |
| (tree_ssa_lim_initialize): Adjust. |
| (tree_ssa_lim_finalize): Likewise. |
| |
| 2020-05-07 Eric Botcazou <ebotcazou@adacore.com> |
| Pierre-Marie de Rodat <derodat@adacore.com> |
| |
| * dwarf2out.c (add_data_member_location_attribute): Take into account |
| the variant part offset in the computation of the data bit offset. |
| (add_bit_offset_attribute): Remove CTX parameter. Pass a new context |
| in the call to field_byte_offset. |
| (gen_field_die): Adjust call to add_bit_offset_attribute and remove |
| confusing assertion. |
| (analyze_variant_discr): Deal with boolean subtypes. |
| |
| 2020-05-07 Martin Liska <mliska@suse.cz> |
| |
| * lto-wrapper.c: Split arguments of MAKE environment |
| variable. |
| |
| 2020-05-07 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use |
| TARGET_EXPR instead of MODIFY_EXPR for the first assignments to |
| fenv_var and new_fenv_var. |
| |
| 2020-05-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93069 |
| * config/i386/subst.md (store_mask_constraint, store_mask_predicate): |
| Remove. |
| (avx512dq_vextract<shuffletype>64x2_1_maskm, |
| avx512f_vextract<shuffletype>32x4_1_maskm, |
| vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove. |
| (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split |
| into ... |
| (*avx512dq_vextract<shuffletype>64x2_1, |
| avx512dq_vextract<shuffletype>64x2_1_mask): ... these new |
| define_insns. Even in the masked variant allow memory output but in |
| that case use 0 rather than 0C constraint on the source of masked-out |
| elts. |
| (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split |
| into ... |
| (*avx512f_vextract<shuffletype>32x4_1, |
| avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns. |
| Even in the masked variant allow memory output but in that case use |
| 0 rather than 0C constraint on the source of masked-out elts. |
| (vec_extract_lo_<mode><mask_name>): Split into ... |
| (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new |
| define_insns. Even in the masked variant allow memory output but in |
| that case use 0 rather than 0C constraint on the source of masked-out |
| elts. |
| (vec_extract_hi_<mode><mask_name>): Split into ... |
| (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new |
| define_insns. Even in the masked variant allow memory output but in |
| that case use 0 rather than 0C constraint on the source of masked-out |
| elts. |
| |
| 2020-05-06 qing zhao <qing.zhao@oracle.com> |
| |
| PR c/94230 |
| * common.opt: Add -flarge-source-files. |
| * doc/invoke.texi: Document it. |
| * toplev.c (process_options): set line_table->default_range_bits |
| to 0 when flag_large_source_files is true. |
| |
| 2020-05-06 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/94913 |
| * config/i386/predicates.md (add_comparison_operator): New predicate. |
| * config/i386/i386.md (compare->add splitter): New splitters. |
| |
| 2020-05-06 Richard Biener <rguenther@suse.de> |
| |
| * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust. |
| * tree-vect-data-refs.c (vect_slp_analyze_node_dependences): |
| Remove slp_instance parameter, just iterate over all scalar stmts. |
| (vect_slp_analyze_instance_dependence): Adjust and likewise. |
| * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB |
| parameter. |
| (vect_schedule_slp): Just iterate over all scalar stmts. |
| (vect_supported_load_permutation_p): Adjust. |
| (vect_transform_slp_perm_load): Remove slp_instance parameter, |
| instead use the number of lanes in the node as group size. |
| * tree-vect-stmts.c (vect_model_load_cost): Get vectorization |
| factor instead of slp_instance as parameter. |
| (vectorizable_load): Adjust. |
| |
| 2020-05-06 Andreas Schwab <schwab@suse.de> |
| |
| * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h". |
| (aarch64_get_extension_string_for_isa_flags): Don't declare. |
| |
| 2020-05-06 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94964 |
| * cfgloopmanip.c (create_preheader): Require non-complex |
| preheader edge for CP_SIMPLE_PREHEADERS. |
| |
| 2020-05-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94963 |
| * tree-ssa-loop-im.c (execute_sm_if_changed): Remove |
| no-warning marking of the conditional store. |
| (execute_sm): Instead mark the uninitialized state |
| on loop entry to be not warned about. |
| |
| 2020-05-06 Hongtao Liu <hongtao.liu@intel.com> |
| |
| * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET, |
| OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros. |
| * config.gcc: Add tsxldtrkintrin.h to extra_headers. |
| * config/i386/driver-i386.c (host_detect_local_cpu): Detect |
| TSXLDTRK. |
| * config/i386/i386-builtin.def: Add new builtins. |
| * config/i386/i386-c.c (ix86_target_macros_internal): Define |
| __TSXLDTRK__. |
| * config/i386/i386-options.c (ix86_target_string): Add |
| -mtsxldtrk. |
| (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk. |
| * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P): |
| New. |
| * config/i386/i386.md (define_c_enum "unspec"): Add |
| UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK. |
| (TSXLDTRK): New define_int_iterator. |
| ("<tsxldtrk>"): New define_insn. |
| * config/i386/i386.opt: Add -mtsxldtrk. |
| * config/i386/immintrin.h: Include tsxldtrkintrin.h. |
| * config/i386/tsxldtrkintrin.h: New. |
| * doc/invoke.texi: Document -mtsxldtrk. |
| |
| 2020-05-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94921 |
| * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New |
| simplifications. |
| |
| 2020-05-06 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94965 |
| * tree-vect-stmts.c (vectorizable_load): Fix typo. |
| |
| 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| |
| * doc/install.texi: Replace Sun with Solaris as appropriate. |
| (Tools/packages necessary for building GCC, Perl version between |
| 5.6.1 and 5.6.24): Remove Solaris 8 reference. |
| (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove |
| TGCware reference. |
| (Specific, i?86-*-solaris2*): Update version references for |
| Solaris 11.3 and later. Remove gas 2.26 caveat. |
| (Specific, *-*-solaris2*): Update version references for |
| Solaris 11.3 and later. Remove boehm-gc reference. |
| Document GMP, MPFR caveats on Solaris 11.3. |
| (Specific, sparc-sun-solaris2*): Update Solaris 9 references. |
| (Specific, sparc64-*-solaris2*): Likewise. |
| Document --build requirement. |
| |
| 2020-05-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94950 |
| * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use |
| TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags. |
| |
| PR rtl-optimization/94873 |
| * combine.c (combine_instructions): Don't optimize using REG_EQUAL |
| note if SET_SRC (set) has side-effects. |
| |
| 2020-05-06 Hongtao Liu <hongtao.liu@intel.com> |
| Wei Xiao <wei3.xiao@intel.com> |
| |
| * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET, |
| OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros. |
| (ix86_handle_option): Handle -mserialize. |
| * config.gcc (serializeintrin.h): New header file. |
| * config/i386/cpuid.h (bit_SERIALIZE): New bit. |
| * config/i386/driver-i386.c (host_detect_local_cpu): Detect |
| -mserialize. |
| * config/i386/i386-builtin.def: Add new builtin. |
| * config/i386/i386-c.c (__SERIALIZE__): New macro. |
| * config/i386/i386-options.c (ix86_target_opts_isa2_opts): |
| Add -mserialize. |
| * (ix86_valid_target_attribute_inner_p): Add target attribute |
| * for serialize. |
| * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P): |
| New macros. |
| * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec. |
| (serialize): New define_insn. |
| * config/i386/i386.opt (mserialize): New option |
| * config/i386/immintrin.h: Include serailizeintrin.h. |
| * config/i386/serializeintrin.h: New header file. |
| * doc/invoke.texi: Add documents for -mserialize. |
| |
| 2020-05-06 Richard Biener <rguenther@suse.de> |
| |
| * tree-cfg.c (verify_gimple_assign_unary): Adjust integer |
| to/from pointer conversion checking. |
| |
| 2020-05-05 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000-builtin.def: Delete changes meant for a |
| private branch. |
| * config/rs6000/rs6000-c.c: Likewise. |
| * config/rs6000/rs6000-call.c: Likewise. |
| * config/rs6000/rs6000.c: Likewise. |
| |
| 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de> |
| |
| * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined. |
| (RTEMS_ENDFILE_SPEC): Likewise. |
| (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC. |
| (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC. |
| (LIB_SPECS): Support -nodefaultlibs option. |
| * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define. |
| (RTEMS_ENDFILE_SPEC): Likewise. |
| * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise. |
| (RTEMS_ENDFILE_SPEC): Likewise. |
| * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise. |
| (RTEMS_ENDFILE_SPEC): Likewise. |
| |
| 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu> |
| |
| * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove. |
| (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove. |
| |
| 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu> |
| |
| * config/pru/pru.h: Mark R3.w0 as caller saved. |
| |
| 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu> |
| |
| * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal |
| and gen_doloop_begin_internal. |
| (pru_reorg_loop): Use gen_pruloop with mode. |
| * config/pru/pru.md: Use new @insn syntax. |
| |
| 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu> |
| |
| * config/pru/pru.c (pru_print_operand): Fix fall through comment. |
| |
| 2020-05-05 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (fixuns_trunc<mode>si2): Use |
| "clobber (scratch:M)" instad of "clobber (match_scratch:M N)". |
| (addqi3_cconly_overflow): Ditto. |
| (umulv<mode>4): Ditto. |
| (<s>mul<mode>3_highpart): Ditto. |
| (tls_global_dynamic_32): Ditto. |
| (tls_local_dynamic_base_32): Ditto. |
| (atanxf2): Ditto. |
| (asinxf2): Ditto. |
| (acosxf2): Ditto. |
| (logxf2): Ditto. |
| (log10xf2): Ditto. |
| (log2xf2): Ditto. |
| (*adddi_4): Remove "m" constraint from scratch operand. |
| (*add<mode>_4): Ditto. |
| |
| 2020-05-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/94516 |
| * postreload.c (reload_cse_simplify): When replacing sp = sp + const |
| with sp = reg, add REG_EQUAL note with sp + const. |
| * combine-stack-adj.c (try_apply_stack_adjustment): Change return |
| type from int to bool. Add LIVE and OTHER_INSN arguments. Undo |
| postreload sp = sp + const to sp = reg optimization if needed and |
| possible. |
| (combine_stack_adjustments_for_block): Add LIVE argument. Handle |
| reg = sp insn with sp + const REG_EQUAL note. Adjust |
| try_apply_stack_adjustment caller, call |
| df_simulate_initialize_forwards and df_simulate_one_insn_forwards. |
| (combine_stack_adjustments): Allocate and free LIVE bitmap, |
| adjust combine_stack_adjustments_for_block caller. |
| |
| 2020-05-05 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/93623 |
| * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect |
| reality. |
| |
| 2020-05-05 Martin Liska <mliska@suse.cz> |
| |
| * opt-functions.awk (opt_args_non_empty): New function. |
| * opt-read.awk: Use the function for various option arguments. |
| |
| 2020-05-05 Martin Liska <mliska@suse.cz> |
| |
| PR driver/94330 |
| * lto-wrapper.c (run_gcc): When using -flto=jobserver, |
| report warning when the jobserver is not detected. |
| |
| 2020-05-05 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/94636 |
| * gcov.c (main): Print total lines summary at the end. |
| (generate_results): Expect file_name always being non-null. |
| Print newline after intermediate file is printed in order to align with |
| what we do for normal files. |
| |
| 2020-05-05 Martin Liska <mliska@suse.cz> |
| |
| * dumpfile.c (dump_switch_p): Change return type |
| and print option suggestion. |
| * dumpfile.h: Change return type. |
| * opts-global.c (handle_common_deferred_options): |
| Move error into dump_switch_p function. |
| |
| 2020-05-05 Martin Liska <mliska@suse.cz> |
| |
| PR c/92472 |
| * alloc-pool.h: Use const for some arguments. |
| * bitmap.h: Likewise. |
| * mem-stats.h: Likewise. |
| * sese.h (get_entry_bb): Likewise. |
| (get_exit_bb): Likewise. |
| |
| 2020-05-05 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (struct vdhs_data): New. |
| (vect_detect_hybrid_slp): New walker. |
| (vect_detect_hybrid_slp): Rewrite. |
| |
| 2020-05-05 Richard Biener <rguenther@suse.de> |
| |
| PR ipa/94947 |
| * tree-ssa-structalias.c (ipa_pta_execute): Use |
| varpool_node::externally_visible_p (). |
| (refered_from_nonlocal_var): Likewise. |
| |
| 2020-05-05 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gcc.c (LTO_PLUGIN_SPEC): Define if not already. |
| (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC. |
| * config/vxworks.h (LTO_PLUGIN_SPEC): Define. |
| |
| 2020-05-05 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * gimplify.c (gimplify_init_constructor): Do not put the constructor |
| into static memory if it is not complete. |
| |
| 2020-05-05 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94949 |
| * tree-ssa-loop-im.c (execute_sm): Check whether we use |
| the multithreaded model or always compute the stored value |
| before eliding a load. |
| |
| 2020-05-05 Alex Coplan <alex.coplan@arm.com> |
| |
| * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New. |
| |
| 2020-05-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94800 |
| * match.pd (X + (X << C) to X * (1 + (1 << C)), |
| (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New |
| canonicalizations. |
| |
| PR target/94942 |
| * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv. |
| |
| PR tree-optimization/94914 |
| * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0): |
| New simplification. |
| |
| 2020-05-05 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (*testqi_ext_3): Use |
| int_nonimmediate_operand instead of manual mode checks. |
| (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>): |
| Use int_nonimmediate_operand predicate. Rewrite |
| define_insn_and_split pattern to a combine pass splitter. |
| |
| 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> |
| |
| * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris. |
| * configure: Regenerate. |
| |
| 2020-05-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94460 |
| * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3, |
| ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3, |
| avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3, |
| ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns. |
| |
| 2020-05-04 Clement Chigot <clement.chigot@atos.net> |
| David Edelsohn <dje.gcc@gmail.com> |
| |
| * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit |
| for fmodl, frexpl, ldexpl and modfl builtins. |
| |
| 2020-05-04 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR middle-end/94941 |
| * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the |
| chosen lhs is different from the gcall lhs. |
| (expand_mask_load_optab_fn): Likewise. |
| (expand_gather_load_optab_fn): Likewise. |
| |
| 2020-05-04 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/94795 |
| * config/i386/i386.md (*neg<mode>_ccc): New insn pattern. |
| (EQ compare->LTU compare splitter): New splitter. |
| (NE compare->NEG splitter): Ditto. |
| |
| 2020-05-04 Marek Polacek <polacek@redhat.com> |
| |
| Revert: |
| 2020-04-30 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/94775 |
| * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match. |
| (check_aligned_type): Check if TYPE_USER_ALIGN match. |
| |
| 2020-05-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93891 |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to |
| the original reference tree for assessing access alignment. |
| |
| 2020-05-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/39612 |
| * tree-ssa-loop-im.c (im_mem_ref::loaded): New member. |
| (set_ref_loaded_in_loop): New. |
| (mark_ref_loaded): Likewise. |
| (gather_mem_refs_stmt): Call mark_ref_loaded for loads. |
| (execute_sm): Avoid issueing a load when it was not there. |
| (execute_sm_if_changed): Avoid issueing warnings for the |
| conditional store. |
| |
| 2020-05-04 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/93385 |
| * tree-inline.c (tree_function_versioning): Leave any type conversion |
| of replacements to setup_one_parameter and its friend |
| force_value_to_type. |
| |
| 2020-05-04 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/94650 |
| * config/i386/predicates.md (shr_comparison_operator): New predicate. |
| * config/i386/i386.md (compare->shr splitter): New splitters. |
| |
| 2020-05-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94718 |
| * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification. |
| |
| PR tree-optimization/94718 |
| * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can, |
| replace two nop conversions on bit_{and,ior,xor} argument |
| and result with just one conversion on the result or another argument. |
| |
| PR tree-optimization/94718 |
| * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C) |
| -> (X ^ Y) & C eqne 0 optimization to ... |
| * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here. |
| |
| * opts.c (get_option_html_page): Instead of hardcoding a list of |
| options common between C/C++ and Fortran only use gfortran/ |
| documentation for warnings that have CL_Fortran set but not |
| CL_C or CL_CXX. |
| |
| 2020-05-03 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386-expand.c (ix86_expand_int_movcc): |
| Use plus_constant instead of gen_rtx_PLUS with GEN_INT. |
| (emit_memmov): Ditto. |
| (emit_memset): Ditto. |
| (ix86_expand_strlensi_unroll_1): Ditto. |
| (release_scratch_register_on_entry): Ditto. |
| (gen_frame_set): Ditto. |
| (ix86_emit_restore_reg_using_pop): Ditto. |
| (ix86_emit_outlined_ms2sysv_restore): Ditto. |
| (ix86_expand_epilogue): Ditto. |
| (ix86_expand_split_stack_prologue): Ditto. |
| * config/i386/i386.md (push immediate splitter): Ditto. |
| (strmov): Ditto. |
| (strset): Ditto. |
| |
| 2020-05-02 Iain Sandoe <iain@sandoe.co.uk> |
| |
| PR translation/93861 |
| * config/darwin-driver.c (darwin_driver_init): Adjust spelling in |
| a warning. |
| |
| 2020-05-02 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/tilegx/tilegx.md |
| (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n> |
| rather than just <n>. |
| |
| 2020-05-01 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/93492 |
| * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size |
| and crtl->patch_area_entry. |
| * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry. |
| * opts.c (common_handle_option): Limit |
| function_entry_patch_area_size and function_entry_patch_area_start |
| to USHRT_MAX. Fix a typo in error message. |
| * varasm.c (assemble_start_function): Use crtl->patch_area_size |
| and crtl->patch_area_entry. |
| * doc/invoke.texi: Document the maximum value for |
| -fpatchable-function-entry. |
| |
| 2020-05-01 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS. |
| Override SUBTARGET_SHADOW_OFFSET macro. |
| |
| 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org> |
| |
| * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET. |
| * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro. |
| * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro. |
| * config/i386/freebsd.h: Likewise. |
| * config/freebsd.h (LIBASAN_EARLY_SPEC): Define. |
| LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise. |
| |
| 2020-04-30 Alexandre Oliva <oliva@adacore.com> |
| |
| * doc/sourcebuild.texi (Effective-Target Keywords): Document |
| the newly-introduced fileio effective target. |
| |
| 2020-04-30 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/94740 |
| * cse.c (cse_process_notes_1): Replace with... |
| (cse_process_note_1): ...this new function, acting as a |
| simplify_replace_fn_rtx callback to process_note. Handle only |
| REGs and MEMs directly. Validate the MEM if cse_process_note |
| changes its address. |
| (cse_process_notes): Replace with... |
| (cse_process_note): ...this new function. |
| (cse_extended_basic_block): Update accordingly, iterating over |
| the register notes and passing individual notes to cse_process_note. |
| |
| 2020-04-30 Carl Love <cel@us.ibm.com> |
| |
| * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment. |
| |
| 2020-04-30 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/94856 |
| * cgraph.c (clone_of_p): Also consider thunks whih had their bodies |
| saved by the inliner and thunks which had their call inlined. |
| * ipa-inline-transform.c (save_inline_function_body): Fill in |
| former_clone_of of new body holders. |
| |
| 2020-04-30 Jakub Jelinek <jakub@redhat.com> |
| |
| * BASE-VER: Set to 11.0.0. |
| |
| 2020-04-30 Jonathan Wakely <jwakely@redhat.com> |
| |
| * pretty-print.c (pp_take_prefix): Fix spelling in comment. |
| |
| 2020-04-30 Marek Polacek <polacek@redhat.com> |
| |
| PR c++/94775 |
| * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match. |
| (check_aligned_type): Check if TYPE_USER_ALIGN match. |
| |
| 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define. |
| * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable. |
| * doc/invoke.texi (moutline-atomics): Document as on by default. |
| |
| 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| PR target/94748 |
| * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove |
| the check for NOTE_INSN_DELETED_LABEL. |
| |
| 2020-04-30 Jakub Jelinek <jakub@redhat.com> |
| |
| * configure.ac (--with-documentation-root-url, |
| --with-changes-root-url): Diagnose URL not ending with /, |
| use AC_DEFINE_UNQUOTED instead of AC_SUBST. |
| * opts.h (get_changes_url): Remove. |
| * opts.c (get_changes_url): Remove. |
| * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL |
| or -DCHANGES_ROOT_URL. |
| * doc/install.texi (--with-documentation-root-url, |
| --with-changes-root-url): Document. |
| * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call |
| get_changes_url and free, change url variable type to const char * and |
| set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base". |
| * config/s390/s390.c (s390_function_arg_vector, |
| s390_function_arg_float): Likewise. |
| * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate): |
| Likewise. |
| * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate): |
| Likewise. |
| * config.in: Regenerate. |
| * configure: Regenerate. |
| |
| 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| PR target/57002 |
| * config/arm/arm.c (isr_attribute_args): Remove duplicate entries. |
| |
| 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/constraints.md ("j>f", "jb4"): New constraints. |
| * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix |
| macro definitions. |
| * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a |
| separate expander. |
| ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst. |
| Change constraint for vlrl/vstrl to jb4. |
| |
| 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| * var-tracking.c (vt_initialize): Move variables pre and post |
| into inner block and initialize both in order to fix warning |
| about uninitialized use. Remove unnecessary checks for |
| frame_pointer_needed. |
| |
| 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| * toplev.c (output_stack_usage_1): Ensure that first |
| argument to fprintf is not null. |
| |
| 2020-04-29 Jakub Jelinek <jakub@redhat.com> |
| |
| * configure.ac (-with-changes-root-url): New configure option, |
| defaulting to https://gcc.gnu.org/. |
| * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for |
| opts.c. |
| * pretty-print.c (get_end_url_string): New function. |
| (pp_format): Handle %{ and %} for URLs. |
| (pp_begin_url): Use pp_string instead of pp_printf. |
| (pp_end_url): Use get_end_url_string. |
| * opts.h (get_changes_url): Declare. |
| * opts.c (get_changes_url): New function. |
| * config/rs6000/rs6000-call.c: Include opts.h. |
| (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead |
| of just in GCC 10.1 in diagnostics and add URL. |
| * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise. |
| * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate): |
| Likewise. |
| * config/s390/s390.c (s390_function_arg_vector, |
| s390_function_arg_float): Likewise. |
| * configure: Regenerated. |
| |
| PR target/94704 |
| * config/s390/s390.c (s390_function_arg_vector, |
| s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of |
| cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type |
| passed to the function rather than the type of the single element. |
| Rename cxx17_empty_base_seen variable to empty_base_seen, change |
| type to int, and adjust diagnostics depending on if the field |
| has [[no_unique_attribute]] or not. |
| |
| PR target/94832 |
| * config/i386/avx512bwintrin.h (_mm512_alignr_epi8, |
| _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands |
| used in casts into parens. |
| * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph, |
| _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph, |
| _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph, |
| _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask, |
| _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask, |
| _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask, |
| _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise. |
| * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8, |
| _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8, |
| _mm256_mask_cmp_epu8_mask): Likewise. |
| * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph, |
| _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise. |
| * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise. |
| * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise. |
| |
| PR target/94832 |
| * config/i386/avx2intrin.h (_mm_mask_i32gather_pd, |
| _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd, |
| _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, |
| _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps, |
| _mm256_mask_i64gather_ps, _mm_i32gather_epi64, |
| _mm_mask_i32gather_epi64, _mm256_i32gather_epi64, |
| _mm256_mask_i32gather_epi64, _mm_i64gather_epi64, |
| _mm_mask_i64gather_epi64, _mm256_i64gather_epi64, |
| _mm256_mask_i64gather_epi64, _mm_i32gather_epi32, |
| _mm_mask_i32gather_epi32, _mm256_i32gather_epi32, |
| _mm256_mask_i32gather_epi32, _mm_i64gather_epi32, |
| _mm_mask_i64gather_epi32, _mm256_i64gather_epi32, |
| _mm256_mask_i64gather_epi32): Surround macro parameter uses with |
| parens. |
| (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, |
| _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, |
| _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use |
| as mask vector containing -1.0 or -1.0f elts, but instead vector |
| with all bits set using _mm*_cmpeq_p? with zero operands. |
| * config/i386/avx512fintrin.h (_mm512_i32gather_ps, |
| _mm512_mask_i32gather_ps, _mm512_i32gather_pd, |
| _mm512_mask_i32gather_pd, _mm512_i64gather_ps, |
| _mm512_mask_i64gather_ps, _mm512_i64gather_pd, |
| _mm512_mask_i64gather_pd, _mm512_i32gather_epi32, |
| _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64, |
| _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32, |
| _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64, |
| _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps, |
| _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd, |
| _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps, |
| _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd, |
| _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32, |
| _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64, |
| _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32, |
| _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64, |
| _mm512_mask_i64scatter_epi64): Surround macro parameter uses with |
| parens. |
| * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd, |
| _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd, |
| _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd, |
| _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd, |
| _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd, |
| _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd, |
| _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd, |
| _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd, |
| _mm512_mask_prefetch_i64scatter_ps): Likewise. |
| * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps, |
| _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd, |
| _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps, |
| _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd, |
| _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32, |
| _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64, |
| _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32, |
| _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64, |
| _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps, |
| _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps, |
| _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd, |
| _mm_mask_i32scatter_pd, _mm256_i64scatter_ps, |
| _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps, |
| _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd, |
| _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32, |
| _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32, |
| _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64, |
| _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64, |
| _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32, |
| _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32, |
| _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64, |
| _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64, |
| _mm_mask_i64scatter_epi64): Likewise. |
| |
| 2020-04-29 Jeff Law <law@redhat.com> |
| |
| * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific |
| division instructions are 4 bytes long. |
| |
| 2020-04-29 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94826 |
| * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use |
| TARGET_EXPR instead of MODIFY_EXPR for first assignment to |
| fenv_var, fenv_clear and old_fenv variables. For fenv_addr |
| take address of TARGET_EXPR of fenv_var with void_node initializer. |
| Formatting fixes. |
| |
| 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| |
| PR tree-optimization/94774 |
| * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize |
| variable retval. |
| |
| 2020-04-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * calls.h (cxx17_empty_base_field_p): Turn into a function declaration. |
| * calls.c (cxx17_empty_base_field_p): New function. Check |
| DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the |
| previous checks. |
| |
| 2020-04-29 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/93654 |
| * config/i386/i386-options.c (ix86_set_indirect_branch_type): |
| Allow -fcf-protection with -mindirect-branch=thunk-extern and |
| -mfunction-return=thunk-extern. |
| * doc/invoke.texi: Update notes for -fcf-protection=branch with |
| -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern. |
| |
| 2020-04-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor. |
| |
| 2020-04-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use |
| TARGET_EXPR instead of MODIFY_EXPR for the first assignments to |
| fenv_var and new_fenv_var. |
| |
| 2020-04-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new |
| effective-target keyword. |
| (arm_arch_v8a_hard_multilib): Likewise. |
| (arm_arch_v8a_hard): Document new dg-add-options keyword. |
| * config/arm/arm.c (arm_return_in_memory): Note that the APCS |
| code is deprecated and has not been updated to handle |
| DECL_FIELD_ABI_IGNORED. |
| (WARN_PSABI_EMPTY_CXX17_BASE): New constant. |
| (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise. |
| (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter |
| avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields |
| whose DECL_FIELD_ABI_IGNORED bit is set when determining whether |
| something actually is a HFA or HVA. Record whether we see a |
| [[no_unique_address]] field that previous GCCs would not have |
| ignored in this way. |
| (aapcs_vfp_is_call_or_return_candidate): Update the calls to |
| aapcs_vfp_sub_candidate and report a -Wpsabi warning for the |
| [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the |
| diagnostic messages. |
| (arm_needs_doubleword_align): Add a comment explaining why we |
| consider even zero-sized fields. |
| |
| 2020-04-29 Richard Biener <rguenther@suse.de> |
| Li Zekun <lizekun1@huawei.com> |
| |
| PR lto/94822 |
| * tree.c (component_ref_size): Guard against error_mark_node |
| DECL_INITIAL as it happens with LTO. |
| |
| 2020-04-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a |
| comment explaining why we consider even zero-sized fields. |
| (WARN_PSABI_EMPTY_CXX17_BASE): New constant. |
| (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise. |
| (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter |
| avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields |
| whose DECL_FIELD_ABI_IGNORED bit is set when determining whether |
| something actually is a HFA or HVA. Record whether we see a |
| [[no_unique_address]] field that previous GCCs would not have |
| ignored in this way. |
| (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say |
| whether diagnostics should be suppressed. Update the calls to |
| aapcs_vfp_sub_candidate and report a -Wpsabi warning for the |
| [[no_unique_address]] case. |
| (aarch64_return_in_msb): Update call accordingly, never silencing |
| diagnostics. |
| (aarch64_function_value): Likewise. |
| (aarch64_return_in_memory_1): Likewise. |
| (aarch64_init_cumulative_args): Likewise. |
| (aarch64_gimplify_va_arg_expr): Likewise. |
| (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and |
| use it to decide whether arch64_vfp_is_call_or_return_candidate |
| should be silent. |
| (aarch64_pass_by_reference): Update calls accordingly. |
| (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument |
| to decide whether arch64_vfp_is_call_or_return_candidate should be |
| silent. |
| |
| 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com> |
| |
| PR target/94820 |
| * config/aarch64/aarch64-builtins.c |
| (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of |
| MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and |
| new_fenv_var. |
| |
| 2020-04-29 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * configure.ac <$enable_offload_targets>: Do parsing as done |
| elsewhere. |
| * configure: Regenerate. |
| |
| * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'. |
| * configure: Regenerate. |
| |
| PR target/94279 |
| * rtlanal.c (set_noop_p): Handle non-constant selectors. |
| |
| PR target/94282 |
| * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New |
| function. |
| (TARGET_EXCEPT_UNWIND_INFO): Define. |
| |
| 2020-04-29 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94248 |
| * config/gcn/gcn.md (*mov<mode>_insn): Use |
| 'reg_overlap_mentioned_p' to check for overlap. |
| |
| PR target/94706 |
| * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED |
| instead of cxx17_empty_base_field_p. |
| |
| PR target/94707 |
| * tree-core.h (tree_decl_common): Note decl_flag_0 used for |
| DECL_FIELD_ABI_IGNORED. |
| * tree.h (DECL_FIELD_ABI_IGNORED): Define. |
| * calls.h (cxx17_empty_base_field_p): Change into a temporary |
| macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address" |
| attribute. |
| * calls.c (cxx17_empty_base_field_p): Remove. |
| * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle |
| DECL_FIELD_ABI_IGNORED. |
| * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise. |
| * lto-streamer-out.c (hash_tree): Likewise. |
| * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename |
| cxx17_empty_base_seen to empty_base_seen, change type to int *, |
| adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of |
| cxx17_empty_base_field_p, if "no_unique_address" attribute is |
| present, propagate that to the caller too. |
| (rs6000_discover_homogeneous_aggregate): Adjust |
| rs6000_aggregate_candidate caller, emit different diagnostics |
| when c++17 empty base fields are present and when empty |
| [[no_unique_address]] fields are present. |
| * config/rs6000/rs6000.c (rs6000_special_round_type_align, |
| darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED |
| fields. |
| |
| 2020-04-29 Richard Biener <rguenther@suse.de> |
| |
| * tree-ssa-loop-im.c (ref_always_accessed::operator ()): |
| Just check whether the stmt stores. |
| |
| 2020-04-28 Alexandre Oliva <oliva@adacore.com> |
| |
| PR target/94812 |
| * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to |
| output operand in emulation. Don't overwrite pseudos. |
| |
| 2020-04-28 Jeff Law <law@redhat.com> |
| |
| * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific |
| multiply patterns are 4 bytes long. |
| |
| 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option. |
| * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option. |
| |
| 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94711 |
| * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty |
| base class artificial fields. |
| (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI |
| decision is different after this fix. |
| |
| 2020-04-28 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/94447 |
| PR analyzer/94639 |
| PR analyzer/94732 |
| PR analyzer/94754 |
| * doc/invoke.texi (Static Analyzer Options): Remove |
| -Wanalyzer-use-of-uninitialized-value. |
| (-Wno-analyzer-use-of-uninitialized-value): Remove item. |
| |
| 2020-04-28 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94809 |
| * tree.c (build_call_expr_internal_loc_array): Call |
| process_call_operands. |
| |
| 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com> |
| |
| * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define. |
| (thunderx3t110_regmove_cost): Likewise. |
| (thunderx3t110_vector_cost): Likewise. |
| (thunderx3t110_prefetch_tune): Likewise. |
| (thunderx3t110_tunings): Likewise. |
| * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs): |
| Define. |
| * config/aarch64/thunderx3t110.md: New file. |
| * config/aarch64/aarch64.md: Include thunderx3t110.md. |
| * doc/invoke.texi (AArch64 options): Add thunderx3t110. |
| |
| 2020-04-28 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94704 |
| * config/s390/s390.c (s390_function_arg_vector, |
| s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed. |
| |
| 2020-04-28 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/94727 |
| * tree-vect-stmts.c (vect_is_simple_cond): If both comparison |
| operands are invariant booleans, use the mask type associated with the |
| STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP. |
| (vectorizable_condition): Pass vectype unconditionally to |
| vect_is_simple_cond. |
| |
| 2020-04-27 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94780 |
| * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use |
| TARGET_EXPR instead of MODIFY_EXPR for first assignment to |
| sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var. |
| |
| 2020-04-27 David Malcolm <dmalcolm@redhat.com> |
| |
| PR 92830 |
| * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from |
| default value, so that it can by supplied by get_option_html_page. |
| * configure: Regenerate. |
| * opts.c: Include "selftest.h". |
| (get_option_html_page): New function. |
| (get_option_url): Use it. Reformat to place comments next to the |
| expressions they refer to. |
| (selftest::test_get_option_html_page): New. |
| (selftest::opts_c_tests): New. |
| * selftest-run-tests.c (selftest::run_tests): Call |
| selftest::opts_c_tests. |
| * selftest.h (selftest::opts_c_tests): New decl. |
| |
| 2020-04-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply |
| UINTVAL to CONST_INTs. |
| |
| 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/constraints.md (e): Remove constraint. |
| (Te): Define constraint. |
| * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in |
| operand 0 from "e" to "Te". |
| (vaddvaq_<supf><mode>): Likewise. |
| (vaddvq_p_<supf><mode>): Likewise. |
| (vmladavq_<supf><mode>): Likewise. |
| (vmladavxq_s<mode>): Likewise. |
| (vmlsdavq_s<mode>): Likewise. |
| (vmlsdavxq_s<mode>): Likewise. |
| (vaddvaq_p_<supf><mode>): Likewise. |
| (vmladavaq_<supf><mode>): Likewise. |
| (vmladavq_p_<supf><mode>): Likewise. |
| (vmladavxq_p_s<mode>): Likewise. |
| (vmlsdavq_p_s<mode>): Likewise. |
| (vmlsdavxq_p_s<mode>): Likewise. |
| (vmlsdavaxq_s<mode>): Likewise. |
| (vmlsdavaq_s<mode>): Likewise. |
| (vmladavaxq_s<mode>): Likewise. |
| (vmladavaq_p_<supf><mode>): Likewise. |
| (vmladavaxq_p_s<mode>): Likewise. |
| (vmlsdavaq_p_s<mode>): Likewise. |
| (vmlsdavaxq_p_s<mode>): Likewise. |
| |
| 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm.c (output_move_neon): Only get the first operand if |
| addr is PLUS. |
| |
| 2020-04-27 Felix Yang <felix.yang@huawei.com> |
| |
| PR tree-optimization/94784 |
| * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the |
| assert around so that it checks that the two vectors have equal |
| TYPE_VECTOR_SUBPARTS and that converting the corresponding element |
| types is a useless_type_conversion_p. |
| |
| 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| PR target/94515 |
| * dwarf2cfi.c (struct GTY): Add ra_mangled. |
| (cfi_row_equal_p): Check ra_mangled. |
| (dwarf2out_frame_debug_cfa_window_save): Remove the argument, |
| this only handles the sparc logic now. |
| (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for |
| the aarch64 specific logic. |
| (dwarf2out_frame_debug): Update to use the new subroutines. |
| (change_cfi_row): Check ra_mangled. |
| |
| 2020-04-27 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94704 |
| * config/s390/s390.c (s390_function_arg_vector, |
| s390_function_arg_float): Ignore cxx17_empty_base_field_p fields. |
| |
| 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com> |
| |
| * common/config/rs6000/rs6000-common.c |
| (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off |
| -fweb. |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to |
| set flag_web. |
| |
| 2020-04-27 Martin Liska <mliska@suse.cz> |
| |
| PR lto/94659 |
| * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p): |
| Do not remove ifunc_resolvers in remove unreachable nodes in LTO. |
| |
| 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com> |
| |
| PR target/91518 |
| * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed): |
| New variable. |
| (rs6000_emit_prologue_components): |
| Check with frame_pointer_needed_indeed. |
| (rs6000_emit_epilogue_components): Likewise. |
| (rs6000_emit_prologue): Likewise. |
| (rs6000_emit_epilogue): Set frame_pointer_needed_indeed. |
| |
| 2020-04-25 David Edelsohn <dje.gcc@gmail.com> |
| |
| * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a |
| stack frame when debugging and flag_compare_debug is enabled. |
| |
| 2020-04-25 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to |
| enable PC-relative addressing for -mcpu=future. |
| * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move |
| after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS. |
| * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined, |
| suppress PC-relative addressing. |
| (rs6000_option_override_internal): Split up error messages |
| checking for -mprefixed and -mpcrel. Enable -mpcrel if the target |
| system supports it. |
| |
| 2020-04-25 Jakub Jelinek <jakub@redhat.com> |
| Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94734 |
| PR tree-optimization/89430 |
| * tree-ssa-phiopt.c: Include tree-eh.h. |
| (cond_store_replacement): Return false if an automatic variable |
| access could trap. If -fstore-data-races, don't return false |
| just because an automatic variable is addressable. |
| |
| 2020-04-24 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge |
| of high-part. |
| (add<mode>_sext_dup2_exec): Likewise. |
| |
| 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| PR target/94710 |
| * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little |
| endian byteshift_val calculation. |
| |
| 2020-04-24 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload. |
| |
| 2020-04-24 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/arm_sve.h: Add a comment. |
| |
| 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com> |
| |
| PR rtl-optimization/94708 |
| * combine.c (simplify_if_then_else): Add check for |
| !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode). |
| |
| 2020-04-23 Martin Sebor <msebor@redhat.com> |
| |
| PR driver/90983 |
| * common.opt (-Wno-frame-larger-than): New option. |
| (-Wno-larger-than, -Wno-stack-usage): Same. |
| |
| 2020-04-23 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands |
| 2 and 3. |
| (mov<mode>_exec): Likewise. |
| (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec. |
| (<convop><mode><vndi>2_exec): Likewise. |
| |
| 2019-04-23 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR tree-optimization/94717 |
| * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one |
| of the stores doesn't have the same landing pad number as the first. |
| (coalesce_immediate_stores): Do not try to coalesce the store using |
| bswap if it doesn't have the same landing pad number as the first. |
| |
| 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): |
| Replace outdated link to ELFv2 ABI. |
| |
| 2020-04-23 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94710 |
| * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx |
| just return v2. |
| |
| PR middle-end/94724 |
| * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs |
| temporarily with non-final second operand and updating it later, |
| push COMPOUND_EXPRs into a vector and process it in reverse, |
| creating COMPOUND_EXPRs with the final operands. |
| |
| 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| PR target/94697 |
| * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap |
| bti c and bti j handling. |
| |
| 2020-04-23 Andrew Stubbs <ams@codesourcery.com> |
| Thomas Schwinge <thomas@codesourcery.com> |
| |
| PR middle-end/93488 |
| |
| * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on |
| t_async and the wait arguments. |
| |
| 2020-04-23 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/94727 |
| * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when |
| comparing invariant scalar booleans. |
| |
| 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94383 |
| * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17 |
| empty base class artificial fields. |
| (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is |
| different after this fix. |
| |
| 2020-04-23 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94707 |
| * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate): |
| Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check |
| if the same type has been diagnosed most recently already. |
| |
| 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's |
| datatype. |
| (__arm_vbicq_n_s16): Likewise. |
| (__arm_vbicq_n_u32): Likewise. |
| (__arm_vbicq_n_s32): Likewise. |
| (__arm_vbicq): Likewise. |
| (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype. |
| (__arm_vbicq_n_s32): Likewise. |
| (__arm_vbicq_n_u16): Likewise. |
| (__arm_vbicq_n_u32): Likewise. |
| (__arm_vdupq_m_n_s8): Likewise. |
| (__arm_vdupq_m_n_s16): Likewise. |
| (__arm_vdupq_m_n_s32): Likewise. |
| (__arm_vdupq_m_n_u8): Likewise. |
| (__arm_vdupq_m_n_u16): Likewise. |
| (__arm_vdupq_m_n_u32): Likewise. |
| (__arm_vdupq_m_n_f16): Likewise. |
| (__arm_vdupq_m_n_f32): Likewise. |
| (__arm_vldrhq_gather_offset_s16): Likewise. |
| (__arm_vldrhq_gather_offset_s32): Likewise. |
| (__arm_vldrhq_gather_offset_u16): Likewise. |
| (__arm_vldrhq_gather_offset_u32): Likewise. |
| (__arm_vldrhq_gather_offset_f16): Likewise. |
| (__arm_vldrhq_gather_offset_z_s16): Likewise. |
| (__arm_vldrhq_gather_offset_z_s32): Likewise. |
| (__arm_vldrhq_gather_offset_z_u16): Likewise. |
| (__arm_vldrhq_gather_offset_z_u32): Likewise. |
| (__arm_vldrhq_gather_offset_z_f16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_s16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_s32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_u16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_u32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_f16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise. |
| (__arm_vldrwq_gather_offset_s32): Likewise. |
| (__arm_vldrwq_gather_offset_u32): Likewise. |
| (__arm_vldrwq_gather_offset_f32): Likewise. |
| (__arm_vldrwq_gather_offset_z_s32): Likewise. |
| (__arm_vldrwq_gather_offset_z_u32): Likewise. |
| (__arm_vldrwq_gather_offset_z_f32): Likewise. |
| (__arm_vldrwq_gather_shifted_offset_s32): Likewise. |
| (__arm_vldrwq_gather_shifted_offset_u32): Likewise. |
| (__arm_vldrwq_gather_shifted_offset_f32): Likewise. |
| (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise. |
| (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise. |
| (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise. |
| (__arm_vdwdupq_x_n_u8): Likewise. |
| (__arm_vdwdupq_x_n_u16): Likewise. |
| (__arm_vdwdupq_x_n_u32): Likewise. |
| (__arm_viwdupq_x_n_u8): Likewise. |
| (__arm_viwdupq_x_n_u16): Likewise. |
| (__arm_viwdupq_x_n_u32): Likewise. |
| (__arm_vidupq_x_n_u8): Likewise. |
| (__arm_vddupq_x_n_u8): Likewise. |
| (__arm_vidupq_x_n_u16): Likewise. |
| (__arm_vddupq_x_n_u16): Likewise. |
| (__arm_vidupq_x_n_u32): Likewise. |
| (__arm_vddupq_x_n_u32): Likewise. |
| (__arm_vldrdq_gather_offset_s64): Likewise. |
| (__arm_vldrdq_gather_offset_u64): Likewise. |
| (__arm_vldrdq_gather_offset_z_s64): Likewise. |
| (__arm_vldrdq_gather_offset_z_u64): Likewise. |
| (__arm_vldrdq_gather_shifted_offset_s64): Likewise. |
| (__arm_vldrdq_gather_shifted_offset_u64): Likewise. |
| (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise. |
| (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise. |
| (__arm_vidupq_m_n_u8): Likewise. |
| (__arm_vidupq_m_n_u16): Likewise. |
| (__arm_vidupq_m_n_u32): Likewise. |
| (__arm_vddupq_m_n_u8): Likewise. |
| (__arm_vddupq_m_n_u16): Likewise. |
| (__arm_vddupq_m_n_u32): Likewise. |
| (__arm_vidupq_n_u16): Likewise. |
| (__arm_vidupq_n_u32): Likewise. |
| (__arm_vidupq_n_u8): Likewise. |
| (__arm_vddupq_n_u16): Likewise. |
| (__arm_vddupq_n_u32): Likewise. |
| (__arm_vddupq_n_u8): Likewise. |
| |
| 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| * doc/install.texi (D-Specific Options): Document |
| --enable-libphobos-checking and --with-libphobos-druntime-only. |
| |
| 2020-04-23 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94707 |
| * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add |
| cxx17_empty_base_seen argument. Pass it to recursive calls. |
| Ignore cxx17_empty_base_field_p fields after setting |
| *cxx17_empty_base_seen to true. |
| (rs6000_discover_homogeneous_aggregate): Adjust |
| rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous |
| aggregates with C++17 empty base fields. |
| |
| PR c/94705 |
| * attribs.c (decl_attribute): Don't diagnose attribute exclusions |
| if last_decl is error_mark_node or has such a TREE_TYPE. |
| |
| PR c/94705 |
| * attribs.c (decl_attribute): Don't diagnose attribute exclusions |
| if last_decl is error_mark_node or has such a TREE_TYPE. |
| |
| 2020-04-22 Felix Yang <felix.yang@huawei.com> |
| |
| PR target/94678 |
| * config/aarch64/aarch64.h (TARGET_SVE): |
| Add && !TARGET_GENERAL_REGS_ONLY. |
| (TARGET_SVE2): Add && TARGET_SVE. |
| (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3, |
| TARGET_SVE2_SM4): Add && TARGET_SVE2. |
| * config/aarch64/aarch64-sve-builtins.h |
| (sve_switcher::m_old_general_regs_only): New member. |
| * config/aarch64/aarch64-sve-builtins.cc (check_required_registers): |
| New function. |
| (reported_missing_registers_p): New variable. |
| (check_required_extensions): Call check_required_registers before |
| return if all required extenstions are present. |
| (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in |
| m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in |
| global_options.x_target_flags. |
| (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in |
| global_options.x_target_flags if m_old_general_regs_only is true. |
| |
| 2020-04-22 Zackery Spytz <zspytz@gmail.com> |
| |
| * doc/extend.exi: Add "free" to list of other builtin functions |
| supported by GCC. |
| |
| 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| PR target/94622 |
| * config/rs6000/sync.md (load_quadpti): Add attr "prefixed" |
| if TARGET_PREFIXED. |
| (store_quadpti): Ditto. |
| (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as |
| plq will be used and doesn't need it. |
| (atomic_store<mode>): Ditto, for pstq. |
| |
| 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com> |
| |
| * doc/invoke.texi: Update flags turned on by -O3. |
| |
| 2020-04-22 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94706 |
| * config/ia64/ia64.c (hfa_element_mode): Ignore |
| cxx17_empty_base_field_p fields. |
| |
| PR target/94383 |
| * calls.h (cxx17_empty_base_field_p): Declare. |
| * calls.c (cxx17_empty_base_field_p): Define. |
| |
| 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document. |
| |
| 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu. |
| * config/arm/arm-cpus.in (quirk_no_asmcpu): Define. |
| (ALL_QUIRKS): Add quirk_no_asmcpu. |
| (cortex-m55): Define new cpu. |
| * config/arm/arm-tables.opt: Regenerate. |
| * config/arm/arm-tune.md: Likewise. |
| * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55. |
| |
| 2020-04-22 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/94700 |
| * tree-ssa-forwprop.c (simplify_vector_constructor): When processing |
| an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures |
| of similarly-structured but distinct vector types. |
| |
| 2020-04-21 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/94647 |
| * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct |
| the computation of the lower bound of the source access size. |
| (builtin_access::generic_overlap): Remove a hack for setting ranges |
| of overlap offsets. |
| |
| 2020-04-21 John David Anglin <danglin@gcc.gnu.org> |
| |
| * config/pa/som.h (ASM_WEAKEN_LABEL): Delete. |
| (ASM_WEAKEN_DECL): New define. |
| (HAVE_GAS_WEAKREF): Undefine. |
| |
| 2020-04-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/94683 |
| * tree-ssa-forwprop.c (simplify_vector_constructor): Use a |
| VIEW_CONVERT_EXPR to handle mixtures of similarly-structured |
| but distinct vector types. |
| |
| 2020-04-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c/94641 |
| * stor-layout.c (place_field, finalize_record_size): Don't emit |
| -Wpadded warning on TYPE_ARTIFICIAL rli->t. |
| * ubsan.c (ubsan_get_type_descriptor_type, |
| ubsan_get_source_location_type, ubsan_create_data): Set |
| TYPE_ARTIFICIAL. |
| * asan.c (asan_global_struct): Likewise. |
| |
| 2020-04-21 Duan bo <duanbo3@huawei.com> |
| |
| PR target/94577 |
| * config/aarch64/aarch64.c: Add an error message for option conflict. |
| * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is |
| incompatible with -fpic, -fPIC and -mabi=ilp32. |
| |
| 2020-04-21 Frederik Harwath <frederik@codesourcery.com> |
| |
| PR other/94629 |
| * omp-low.c (new_omp_context): Remove assignments to |
| ctx->outer_reduction_clauses and ctx->local_reduction_clauses. |
| |
| 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx") |
| ("popcountv2di2_vx"): Use simplify_gen_subreg. |
| |
| 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| PR target/94613 |
| * config/s390/s390-builtin-types.def: Add 3 new function modes. |
| * config/s390/s390-builtins.def: Add mode dependent low-level |
| builtin and map the overloaded builtins to these. |
| * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ... |
| ("vsel<V_HW"): ... this and rewrite the pattern with bitops. |
| |
| 2020-04-20 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo |
| has a variable VF, prefer new_loop_vinfo if it is cheaper for the |
| estimated VF and is no worse at double the estimated VF. |
| |
| 2020-04-20 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/94668 |
| * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix |
| order of arguments to rtx_vector_builder. |
| (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise. |
| When extending the trailing constants to a full vector, replace any |
| variables with zeros. |
| |
| 2020-04-20 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/94582 |
| * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local |
| flag. |
| |
| 2020-04-20 Martin Liska <mliska@suse.cz> |
| |
| * symtab.c (symtab_node::dump_references): Add space after |
| one entry. |
| (symtab_node::dump_referring): Likewise. |
| |
| 2020-04-18 Jeff Law <law@redhat.com> |
| |
| PR debug/94439 |
| * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking |
| the chain. |
| |
| 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org> |
| |
| * doc/sourcebuild.texi (Effective-Target Keywords, Environment |
| attributes): Document d_runtime_has_std_library. |
| |
| 2020-04-17 Jeff Law <law@redhat.com> |
| |
| PR rtl-optimization/90275 |
| * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels |
| when the destination has a REG_UNUSED note. |
| |
| 2020-04-17 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR middle-end/94635 |
| * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to |
| MAP_DELETE. |
| |
| 2020-04-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function. |
| (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the |
| cost of load and store insns if one loop iteration has enough scalar |
| elements to use an Advanced SIMD LDP or STP. |
| (aarch64_add_stmt_cost): Update call accordingly. |
| |
| 2020-04-17 Jakub Jelinek <jakub@redhat.com> |
| Jeff Law <law@redhat.com> |
| |
| PR target/94567 |
| * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than |
| CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision, |
| or pos + len >= 32, or pos + len is equal to operands[2] precision |
| and operands[2] is not a register operand. During splitting perform |
| SImode AND if operands[0] doesn't have CCZmode and pos + len is |
| equal to mode precision. |
| |
| 2020-04-17 Richard Biener <rguenther@suse.de> |
| |
| PR other/94629 |
| * cgraphclones.c (cgraph_node::create_clone): Remove duplicate |
| initialization. |
| * dwarf2out.c (dw_val_equal_p): Fix pasto in |
| dw_val_class_vms_delta comparison. |
| * optabs.c (expand_binop_directly): Fix pasto in commutation |
| check. |
| * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in |
| initialization. |
| |
| 2020-04-17 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/94618 |
| * cfgrtl.c (delete_insn_and_edges): Set purge not just when |
| insn is the BB_END of its block, but also when it is only followed |
| by DEBUG_INSNs in its block. |
| |
| PR tree-optimization/94621 |
| * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN. |
| Move id->adjust_array_error_bounds check first in the condition. |
| |
| 2020-04-17 Martin Liska <mliska@suse.cz> |
| Jonathan Yong <10walls@gmail.com> |
| |
| PR gcov-profile/94570 |
| * coverage.c (coverage_init): Use separator properly. |
| |
| 2020-04-16 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR rtl-optimization/93974 |
| * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define. |
| (rs6000_cannot_substitute_mem_equiv_p): New function. |
| |
| 2020-04-16 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/93621 |
| * ipa-inline.h (ipa_saved_clone_sources): Declare. |
| * ipa-inline-transform.c (ipa_saved_clone_sources): New variable. |
| (save_inline_function_body): Link the new body holder with the |
| previous one. |
| * cgraph.c: Include ipa-inline.h. |
| (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from |
| the statement in ipa_saved_clone_sources. |
| * cgraphunit.c: Include ipa-inline.h. |
| (expand_all_functions): Free ipa_saved_clone_sources. |
| |
| 2020-04-16 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/94606 |
| * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take |
| the VNx16BI lowpart of the recursively-generated constant. |
| |
| 2020-04-16 Martin Liska <mliska@suse.cz> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/94314 |
| * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop |
| DECL_IS_REPLACEABLE_OPERATOR during cloning. |
| * tree-ssa-dce.c (valid_new_delete_pair_p): New function. |
| (propagate_necessity): Check operator names. |
| |
| 2020-04-16 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/94605 |
| * early-remat.c (early_remat::process_block): Handle insns that |
| set multiple candidate registers. |
| 2020-04-16 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR gcov-profile/93401 |
| * common.opt (profile-prefix-path): New option. |
| * coverae.c: Include diagnostics.h. |
| (coverage_init): Strip profile prefix path. |
| * doc/invoke.texi (-fprofile-prefix-path): Document. |
| |
| 2020-04-16 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94614 |
| * expr.c (emit_move_multi_word): Do not generate code when |
| the destination part is undefined_operand_subword_p. |
| * lower-subreg.c (resolve_clobber): Look through a paradoxica |
| subreg. |
| |
| 2020-04-16 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/94598 |
| * tree-sra.c (verify_sra_access_forest): Fix verification of total |
| scalarization accesses under access to one-element arrays. |
| |
| 2020-04-16 Jakub Jelinek <jakub@redhat.com> |
| |
| PR bootstrap/89494 |
| * function.c (assign_parm_find_data_types): Add workaround for |
| BROKEN_VALUE_INITIALIZATION compilers. |
| |
| 2020-04-16 Richard Biener <rguenther@suse.de> |
| |
| * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME |
| nodes. |
| |
| 2020-04-15 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/94603 |
| * config/i386/i386-builtin.def (__builtin_ia32_movq128): |
| Require OPTION_MASK_ISA_SSE2. |
| |
| 2020-04-15 Gustavo Romero <gromero@linux.ibm.com> |
| |
| PR bootstrap/89494 |
| * dumpfile.c (selftest::temp_dump_context::temp_dump_context): |
| Don't construct a dump_context temporary to call static method. |
| |
| 2020-04-15 Andrea Corallo <andrea.corallo@arm.com> |
| |
| * config/aarch64/falkor-tag-collision-avoidance.c |
| (valid_src_p): Check for aarch64_address_info type before |
| accessing base field. |
| |
| 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern. |
| (V_sz_elem2): Remove unused mode attribute. |
| |
| 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * config/arm/arm.md (arm_movdi): Disallow for MVE. |
| |
| 2020-04-15 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94539 |
| * tree-ssa-alias.c (same_type_for_tbaa): Defer to |
| alias_sets_conflict_p for pointers. |
| |
| 2020-04-14 Max Filippov <jcmvbkbc@gmail.com> |
| |
| PR target/94584 |
| * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2) |
| (extendhisi2_internal): Add %v1 before the load instructions. |
| |
| 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| PR target/94542 |
| * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to |
| use PC-relative addressing for TLS references. |
| |
| 2020-04-14 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/94434 |
| * ipa-sra.c: Include internal-fn.h. |
| (enum isra_scan_context): Update comment. |
| (scan_function): Treat calls to internal_functions like loads or stores. |
| |
| 2020-04-14 Yang Yang <yangyang305@huawei.com> |
| |
| PR tree-optimization/94574 |
| * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing |
| whether a vector-insert is rewritable using a BIT_INSERT_EXPR. |
| |
| 2020-04-14 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/94561 |
| * config/i386/i386.c (ix86_get_ssemov): Remove mode size check. |
| |
| 2020-04-13 Martin Sebor <msebor@redhat.com> |
| |
| * doc/extend.texi (-Wall): Mention -Wformat-overflow and |
| -Wformat-truncation. Move -Wzero-length-bounds last. |
| (-Wrestrict): Document positive form of option enabled by -Wall. |
| |
| 2020-04-13 Zachary Spytz <zspytz@gmail.com> |
| |
| * doc/extend.texi: Add realloc to list of built-in functions |
| are recognized by the compiler. |
| |
| 2020-04-13 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/94556 |
| * config/i386/i386.c (ix86_expand_epilogue): Restore the frame |
| pointer in word_mode for eh_return epilogues. |
| |
| 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to |
| memory references in %B, %C and %D operand selectors when the inner |
| operand is a post increment address. |
| |
| 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory |
| reference by 4 bytes, and %D memory reference by 6 bytes. |
| |
| 2020-04-11 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/94494 |
| * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2 |
| condition for V4SI, V8HI and V16QI modes. |
| |
| 2020-04-11 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/94495 |
| PR target/94551 |
| * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on |
| val->val_rtx. |
| |
| 2020-04-10 Thomas Schwinge <thomas@codesourcery.com> |
| |
| PR middle-end/89433 |
| PR middle-end/93465 |
| * omp-general.c (oacc_verify_routine_clauses): Diagnose if |
| "#pragma omp declare target" has also been applied. |
| |
| 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com> |
| |
| * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn |
| when to emit the epilogue_helper insn. |
| * config/msp430/msp430.md (epilogue_helper): Add a return insn to the |
| RTL pattern. |
| |
| 2020-04-09 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/94495 |
| * cselib.h (cselib_record_sp_cfa_base_equiv, |
| cselib_sp_derived_value_p): Declare. |
| * cselib.c (cselib_record_sp_cfa_base_equiv, |
| cselib_sp_derived_value_p): New functions. |
| * var-tracking.c (add_stores): Don't record MO_VAL_SET for |
| cselib_sp_derived_value_p values. |
| (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the |
| start of extended basic blocks other than the first one |
| for !frame_pointer_needed functions. |
| |
| 2020-04-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw) |
| (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw) |
| (aarch64_sve2048_hw): Document. |
| * config/aarch64/aarch64-protos.h |
| (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare. |
| * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define |
| __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled. |
| * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New |
| function. |
| (find_type_suffix_for_scalar_type): Use it instead of comparing |
| TYPE_MAIN_VARIANTs. |
| (function_resolver::infer_vector_or_tuple_type): Likewise. |
| (function_resolver::require_vector_type): Likewise. |
| (handle_arm_sve_vector_bits_attribute): New function. |
| * config/aarch64/aarch64.c (pure_scalable_type_info): New class. |
| (aarch64_attribute_table): Add arm_sve_vector_bits. |
| (aarch64_return_in_memory_1): |
| (pure_scalable_type_info::piece::get_rtx): New function. |
| (pure_scalable_type_info::num_zr): Likewise. |
| (pure_scalable_type_info::num_pr): Likewise. |
| (pure_scalable_type_info::get_rtx): Likewise. |
| (pure_scalable_type_info::analyze): Likewise. |
| (pure_scalable_type_info::analyze_registers): Likewise. |
| (pure_scalable_type_info::analyze_array): Likewise. |
| (pure_scalable_type_info::analyze_record): Likewise. |
| (pure_scalable_type_info::add_piece): Likewise. |
| (aarch64_some_values_include_pst_objects_p): Likewise. |
| (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info |
| to analyze whether the type is returned in SVE registers. |
| (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type |
| is passed in SVE registers. |
| (aarch64_pass_by_reference_1): New function, extracted from... |
| (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info |
| to analyze whether the type is a pure scalable type and, if so, |
| whether it should be passed by reference. |
| (aarch64_return_in_msb): Return false for pure scalable types. |
| (aarch64_function_value_1): Fold back into... |
| (aarch64_function_value): ...this function. Use |
| pure_scalable_type_info to analyze whether the type is a pure |
| scalable type and, if so, which registers it should use. Handle |
| types that include pure scalable types but are not themselves |
| pure scalable types. |
| (aarch64_return_in_memory_1): New function, split out from... |
| (aarch64_return_in_memory): ...here. Use pure_scalable_type_info |
| to analyze whether the type is a pure scalable type and, if so, |
| whether it should be returned by reference. |
| (aarch64_layout_arg): Remove orig_mode argument. Use |
| pure_scalable_type_info to analyze whether the type is a pure |
| scalable type and, if so, which registers it should use. Handle |
| types that include pure scalable types but are not themselves |
| pure scalable types. |
| (aarch64_function_arg): Update call accordingly. |
| (aarch64_function_arg_advance): Likewise. |
| (aarch64_pad_reg_upward): On big-endian targets, return false for |
| pure scalable types that are smaller than 16 bytes. |
| (aarch64_member_type_forces_blk): New function. |
| (aapcs_vfp_sub_candidate): Exit early for built-in SVE types. |
| (aarch64_short_vector_p): Return false for VECTOR_TYPEs that |
| correspond to built-in SVE types. Do not rely on a vector mode |
| if the type includes an pure scalable type. When returning true, |
| assert that the mode is not an SVE mode. |
| (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE |
| built-in types here. When returning true, assert that the type |
| does not have an SVE mode. |
| (aarch64_can_change_mode_class): Don't allow anything to change |
| between a predicate mode and a non-predicate mode. Also don't |
| allow changes between SVE vector modes and other modes that |
| might be bigger than 128 bits. |
| (aarch64_invalid_binary_op): Reject binary operations that mix |
| SVE and GNU vector types. |
| (TARGET_MEMBER_TYPE_FORCES_BLK): Define. |
| |
| 2020-04-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_attribute_table): Add |
| "SVE sizeless type". |
| * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless) |
| (sizeless_type_p): New functions. |
| (register_builtin_types): Apply make_type_sizeless to the type. |
| (register_tuple_type): Likewise. |
| (verify_type_context): Use sizeless_type_p instead of builin_type_p. |
| |
| 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * config/arm/arm_cde.h: Remove `extern "C"` when compiling for |
| C++. |
| |
| 2020-04-09 Martin Jambor <mjambor@suse.cz> |
| Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94482 |
| * tree-sra.c (create_access_replacement): Dump new replacement with |
| TDF_UID. |
| (sra_modify_expr): Fix handling of cases when the original EXPR writes |
| to only part of the replacement. |
| * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify |
| the first operand of combinations into REAL/IMAGPART_EXPR and |
| BIT_FIELD_REF. |
| |
| 2020-04-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/sourcebuild.texi (check-function-bodies): Treat the third |
| parameter as a list of option regexps and require each regexp |
| to match. |
| |
| 2020-04-09 Andrea Corallo <andrea.corallo@arm.com> |
| |
| PR target/94530 |
| * config/aarch64/falkor-tag-collision-avoidance.c |
| (valid_src_p): Fix missing rtx type check. |
| |
| 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com> |
| Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93674 |
| * tree-ssa-loop-ivopts.c (langhooks.h): New include. |
| (add_iv_candidate_for_use): For iv_use of non integer or pointer type, |
| or non-mode precision type, add candidate in unsigned type with the |
| same precision. |
| |
| 2020-04-08 Clement Chigot <clement.chigot@atos.net> |
| |
| * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128. |
| * config/rs6000/aix71.h (LIB_SPEC): Likewise. |
| * config/rs6000/aix72.h (LIB_SPEC): Likewise. |
| |
| 2020-04-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/94526 |
| * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P |
| with zero offset. |
| * reload1.c (eliminate_regs_1): Avoid creating |
| (plus (reg) (const_int 0)) in DEBUG_INSNs. |
| |
| PR tree-optimization/94524 |
| * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is |
| negative for signed TRUNC_MOD_EXPR, multiply with absolute value of |
| op1 rather than op1 itself at the end. Punt for signed modulo by |
| most negative constant. |
| * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed |
| modulo by most negative constant. |
| |
| 2020-04-08 Richard Biener <rguenther@suse.de> |
| |
| PR rtl-optimization/93946 |
| * cse.c (cse_insn): Record the tabled expression in |
| src_related. Verify a redundant store removal is valid. |
| |
| 2020-04-08 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/94417 |
| * config/i386/i386-features.c (rest_of_insert_endbranch): Insert |
| ENDBR at function entry if function will be called indirectly. |
| |
| 2020-04-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94438 |
| * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size |
| 1, 2, 4 and 8. |
| |
| 2020-04-08 Martin Liska <mliska@suse.cz> |
| |
| PR c++/94314 |
| * gimple.c (gimple_call_operator_delete_p): Rename to... |
| (gimple_call_replaceable_operator_delete_p): ... this. |
| Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P. |
| * gimple.h (gimple_call_operator_delete_p): Rename to ... |
| (gimple_call_replaceable_operator_delete_p): ... this. |
| * tree-core.h (tree_function_decl): Add replaceable_operator |
| flag. |
| * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1): |
| Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P. |
| (propagate_necessity): Use gimple_call_replaceable_operator_delete_p. |
| (eliminate_unnecessary_stmts): Likewise. |
| * tree-streamer-in.c (unpack_ts_function_decl_value_fields): |
| Pack DECL_IS_REPLACEABLE_OPERATOR. |
| * tree-streamer-out.c (pack_ts_function_decl_value_fields): |
| Unpack the field here. |
| * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New. |
| (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New. |
| (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New. |
| * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable. |
| * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare |
| replaceable operator flags. |
| |
| 2020-04-08 Dennis Zhang <dennis.zhang@arm.com> |
| Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro. |
| (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise. |
| (CX_TERNARY_QUALIFIERS): Likewise. |
| (ARM_BUILTIN_CDE_PATTERN_START): Likewise. |
| (ARM_BUILTIN_CDE_PATTERN_END): Likewise. |
| (arm_init_acle_builtins): Initialize CDE builtins. |
| (arm_expand_acle_builtin): Check CDE constant operands. |
| * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range |
| of CDE constant operand. |
| * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for |
| TARGET_VFP_BASE. |
| (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise. |
| * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface. |
| (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise. |
| (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise. |
| (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise. |
| (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise. |
| * config/arm/arm_cde_builtins.def: New file. |
| * config/arm/iterators.md (V_reg): New attribute of SI. |
| * config/arm/predicates.md (const_int_coproc_operand): New. |
| (const_int_vcde1_operand, const_int_vcde2_operand): New. |
| (const_int_vcde3_operand): New. |
| * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New. |
| * config/arm/vfp.md (arm_vcx1<mode>): New entry. |
| (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise. |
| (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise. |
| |
| 2020-04-08 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config.gcc: Add arm_cde.h. |
| * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine |
| __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC. |
| * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options. |
| * config/arm/arm.c (arm_option_reconfigure_globals): Configure |
| arm_arch_cde and arm_arch_cde_coproc to store the feature bits. |
| * config/arm/arm.h (TARGET_CDE): New macro. |
| * config/arm/arm_cde.h: New file. |
| * doc/invoke.texi: Document CDE options +cdecp[0-7]. |
| * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target |
| supports option. |
| (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise. |
| |
| 2020-04-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/94516 |
| * postreload.c: Include rtl-iter.h. |
| (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR |
| looking for all MEMs with RTX_AUTOINC operand. |
| (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling. |
| |
| 2020-04-08 Tobias Burnus <tobias@codesourcery.com> |
| |
| * omp-grid.c (grid_eliminate_combined_simd_part): Use |
| OMP_CLAUSE_CODE to access the omp clause code. |
| |
| 2020-04-07 Jeff Law <law@redhat.com> |
| |
| PR rtl-optimization/92264 |
| * config/h8300/h8300.md (mov;add peephole2): Avoid applying when |
| the destination is the stack pointer. |
| |
| 2020-04-07 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/94291 |
| PR rtl-optimization/84169 |
| * combine.c (try_combine): For split_i2i3, don't assume SET_DEST |
| must be a REG or SUBREG of REG; if it is not one of these, don't |
| update LOG_LINKs. |
| |
| 2020-04-07 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94479 |
| * gimplify.c (gimplify_addr_expr): Also consider generated |
| MEM_REFs. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm_mve.h: Cast some pointers to expected types. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the |
| same with '__arm_' prefix. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm.c (arm_mve_immediate_check): Removed. |
| * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types. |
| (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*, |
| mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*, |
| mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*, |
| mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*, |
| mve_vqshruntq_m_n_s*): Fixed immediate constraints. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm_mve.h: Fix v[id]wdup intrinsics. |
| * config/arm/mve/md: Fix v[id]wdup patterns. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm.c (output_move_neon): Deal with label + offset cases. |
| * config/arm/mve.md (*mve_mov<mode>): Handle const vectors. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters |
| and remove const_ptr enums. |
| |
| 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm_mve.h (vsubq_n): Merge with... |
| (vsubq): ... this. |
| (vmulq_n): Merge with... |
| (vmulq): ... this. |
| (__ARM_mve_typeid): Simplify scalar and constant detection. |
| |
| 2020-04-07 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94509 |
| * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check |
| for inter-lane permutation for 64-byte modes. |
| |
| PR target/94488 |
| * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3, |
| ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT. |
| Assume it is a REG after that instead of testing it and doing FAIL |
| otherwise. Formatting fix. |
| |
| 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de> |
| |
| * config/rs6000/t-rtems: Delete mcpu=8540 multilib. |
| |
| 2020-04-07 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94500 |
| * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode |
| handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes. |
| |
| 2020-04-06 Jakub Jelinek <jakub@redhat.com> |
| |
| * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P |
| + const0_rtx return the SP_DERIVED_VALUE_P. |
| |
| 2020-04-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/92989 |
| * lra-lives.c (process_bb_lives): Do not treat eh_return data |
| registers as being live at the beginning of the EH receiver. |
| |
| 2020-04-05 Zachary Spytz <zspytz@gmail.com> |
| |
| * extend.texi: Add free to list of ISO C90 functions that |
| are recognized by the compiler. |
| |
| 2020-04-05 Nagaraju Mekala <nmekala@xilix.com> |
| |
| * config/microblaze/microblaze.c (microblaze_must_save_register): Check |
| for fast_interrupt. |
| |
| * config/microblaze/microblaze.md (trap): Update output pattern. |
| |
| 2020-04-04 Hannes Domani <ssbssa@yahoo.de> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/94459 |
| * dwarf2out.c (gen_subprogram_die): Look through references, pointers, |
| arrays, pointer-to-members, function types and qualifiers when |
| checking if in-class DIE had an 'auto' or 'decltype(auto)' return type |
| to emit type again on definition. |
| |
| 2020-04-04 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/93940 |
| * ipa-fnsummary.c (vrp_will_run_p): New function. |
| (fre_will_run_p): New function. |
| (evaluate_properties_for_edge): Use it. |
| * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline |
| !optimize_debug to optimize_debug. |
| |
| 2020-04-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/94468 |
| * cselib.c (references_value_p): Formatting fix. |
| (cselib_useless_value_p): New function. |
| (discard_useless_locs, discard_useless_values, |
| cselib_invalidate_regno_val, cselib_invalidate_mem, |
| cselib_record_set): Use it instead of |
| v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx). |
| |
| PR debug/94441 |
| * tree-iterator.h (expr_single): Declare. |
| * tree-iterator.c (expr_single): New function. |
| * tree.h (protected_set_expr_location_if_unset): Declare. |
| * tree.c (protected_set_expr_location): Use expr_single. |
| (protected_set_expr_location_if_unset): New function. |
| |
| 2020-04-03 Jeff Law <law@redhat.com> |
| |
| PR rtl-optimization/92264 |
| * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle |
| reloading of auto-increment addressing modes. |
| |
| 2020-04-03 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/94467 |
| * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand |
| as earlyclobber. |
| |
| 2020-04-03 Jeff Law <law@redhat.com> |
| |
| PR rtl-optimization/92264 |
| * config/m32r/m32r.c (m32r_output_block_move): Properly account for |
| post-increment addressing of source operands as well as residuals |
| when computing any adjustments to the input pointer. |
| |
| 2020-04-03 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94460 |
| * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3, |
| avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do |
| second half of first lane from first lane of second operand and |
| first half of second lane from second lane of first operand. |
| |
| 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE. |
| |
| 2020-04-03 Tamar Christina <tamar.christina@arm.com> |
| |
| PR target/94396 |
| * common/config/aarch64/aarch64-common.c |
| (aarch64_get_extension_string_for_isa_flags): Handle default flags. |
| |
| 2020-04-03 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94465 |
| * tree.c (array_ref_low_bound): Deal with released SSA names |
| in index position. |
| |
| 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com> |
| |
| * config/gcn/gcn.c (print_operand): Handle unordered comparison |
| operators. |
| * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered |
| comparison operators. |
| |
| 2020-04-03 Kewen Lin <linkw@gcc.gnu.org> |
| |
| PR tree-optimization/94443 |
| * tree-vect-loop.c (vectorizable_live_operation): Use |
| gsi_insert_seq_before to replace gsi_insert_before. |
| |
| 2020-04-03 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/94445 |
| * ipa-icf-gimple.c (func_checker::compare_gimple_call): |
| Compare type attributes for gimple_call_fntypes. |
| |
| 2020-04-02 Sandra Loosemore <sandra@codesourcery.com> |
| |
| * alias.c (get_alias_set): Fix comment typos. |
| |
| 2020-04-02 Fritz Reese <foreese@gcc.gnu.org> |
| |
| PR fortran/85982 |
| * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into |
| attribute checking used by TYPE. |
| |
| 2020-04-02 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/92676 |
| * ipa-sra.c (struct caller_issues): New fields candidate and |
| call_from_outside_comdat. |
| (check_for_caller_issues): Check for calls from outsied of |
| candidate's same_comdat_group. |
| (check_all_callers_for_issues): Set up issues.candidate, check result |
| of the new check. |
| (mark_callers_calls_comdat_local): New function. |
| (process_isra_node_results): Set calls_comdat_local of callers if |
| appropriate. |
| |
| 2020-04-02 Richard Biener <rguenther@suse.de> |
| |
| PR c/94392 |
| * common.opt (ffinite-loops): Initialize to zero. |
| * opts.c (default_options_table): Remove OPT_ffinite_loops |
| entry. |
| * cfgloop.h (loop::finite_p): New member. |
| * cfgloopmanip.c (copy_loop_info): Copy finite_p. |
| * ipa-icf-gimple.c (func_checker::compare_loops): Compare |
| finite_p. |
| * lto-streamer-in.c (input_cfg): Stream finite_p. |
| * lto-streamer-out.c (output_cfg): Likewise. |
| * tree-cfg.c (replace_loop_annotate): Initialize finite_p |
| from flag_finite_loops at CFG build time. |
| * tree-ssa-loop-niter.c (finite_loop_p): Check the loops |
| finite_p flag instead of flag_finite_loops. |
| * doc/invoke.texi (ffinite-loops): Adjust documentation of |
| default setting. |
| |
| 2020-04-02 Richard Biener <rguenther@suse.de> |
| |
| PR debug/94450 |
| * dwarf2out.c (dwarf2out_early_finish): Remove code emitting |
| DW_TAG_imported_unit. |
| |
| 2020-04-02 Maciej W. Rozycki <macro@wdc.com> |
| |
| * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux> |
| <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to |
| 2.30. |
| |
| 2020-04-02 Kewen Lin <linkw@gcc.gnu.org> |
| |
| PR tree-optimization/94401 |
| * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE |
| access type when loading halves of vector to avoid peeling for gaps. |
| |
| 2020-04-02 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in |
| between a string literal and MIPS_SYSVERSION_SPEC macro. |
| |
| 2020-04-02 Martin Jambor <mjambor@suse.cz> |
| |
| * doc/invoke.texi (Optimize Options): Document sra-max-propagations. |
| |
| 2020-04-02 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/92264 |
| * params.opt (-param=max-find-base-term-values=): Decrease default |
| from 2000 to 200. |
| |
| PR rtl-optimization/92264 |
| * rtl.h (struct rtx_def): Mention that call bit is used as |
| SP_DERIVED_VALUE_P in cselib.c. |
| * cselib.c (SP_DERIVED_VALUE_P): Define. |
| (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier. |
| (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P |
| val_rtx and sp based expression where offsets cancel each other. |
| (preserve_constants_and_equivs): Formatting fix. |
| (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P |
| locs list for cfa_base_preserved_val if needed. Formatting fix. |
| (autoinc_split): If the to be returned value is a REG, MEM or |
| VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its |
| locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off. |
| (rtx_equal_for_cselib_1): Call autoinc_split even if both |
| expressions are PLUS in Pmode with CONST_INT second operands. |
| Handle SP_DERIVED_VALUE_P cases. |
| (cselib_hash_plus_const_int): New function. |
| (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT |
| second operand, as well as for PRE_DEC etc. that ought to be |
| hashed the same way. |
| (cselib_subst_to_values): Substitute PLUS with Pmode and |
| CONST_INT operand if the first operand is a VALUE which has |
| SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the |
| SP_DERIVED_VALUE_P + adjusted offset. |
| (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx, |
| set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding |
| SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location. |
| * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv |
| on the sp value before calling cselib_add_permanent_equiv on the |
| cfa_base value. |
| * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC |
| in the insn without REG_INC note. |
| (replace_read): Punt on RTX_AUTOINC in the *loc being replaced. |
| Punt on invalid insns added by copy_to_mode_reg. Formatting fixes. |
| |
| PR target/94435 |
| * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For |
| y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode. |
| |
| 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| PR target/94317 |
| * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define. |
| (LDRGBWBXU_Z_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify |
| intrinsic defintion by adding a new builtin call to writeback into base |
| address. |
| (__arm_vldrdq_gather_base_wb_u64): Likewise. |
| (__arm_vldrdq_gather_base_wb_z_s64): Likewise. |
| (__arm_vldrdq_gather_base_wb_z_u64): Likewise. |
| (__arm_vldrwq_gather_base_wb_s32): Likewise. |
| (__arm_vldrwq_gather_base_wb_u32): Likewise. |
| (__arm_vldrwq_gather_base_wb_z_s32): Likewise. |
| (__arm_vldrwq_gather_base_wb_z_u32): Likewise. |
| (__arm_vldrwq_gather_base_wb_f32): Likewise. |
| (__arm_vldrwq_gather_base_wb_z_f32): Likewise. |
| * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify |
| builtin's qualifier. |
| (vldrdq_gather_base_wb_z_u): Likewise. |
| (vldrwq_gather_base_wb_u): Likewise. |
| (vldrdq_gather_base_wb_u): Likewise. |
| (vldrwq_gather_base_wb_z_s): Likewise. |
| (vldrwq_gather_base_wb_z_f): Likewise. |
| (vldrdq_gather_base_wb_z_s): Likewise. |
| (vldrwq_gather_base_wb_s): Likewise. |
| (vldrwq_gather_base_wb_f): Likewise. |
| (vldrdq_gather_base_wb_s): Likewise. |
| (vldrwq_gather_base_nowb_z_u): Define builtin. |
| (vldrdq_gather_base_nowb_z_u): Likewise. |
| (vldrwq_gather_base_nowb_u): Likewise. |
| (vldrdq_gather_base_nowb_u): Likewise. |
| (vldrwq_gather_base_nowb_z_s): Likewise. |
| (vldrwq_gather_base_nowb_z_f): Likewise. |
| (vldrdq_gather_base_nowb_z_s): Likewise. |
| (vldrwq_gather_base_nowb_s): Likewise. |
| (vldrwq_gather_base_nowb_f): Likewise. |
| (vldrdq_gather_base_nowb_s): Likewise. |
| * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL |
| pattern. |
| (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern. |
| (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern. |
| (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern. |
| (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern. |
| (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern. |
| (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern. |
| (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern. |
| (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern. |
| (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern. |
| (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern. |
| (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern. |
| |
| 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3") |
| ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3") |
| ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3") |
| ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>") |
| ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>") |
| ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3") |
| ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4") |
| ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx") |
| ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint |
| modifier. |
| ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>") |
| ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"): |
| Remove constraints from expander. |
| * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq") |
| ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>") |
| ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>") |
| ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>") |
| ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3") |
| ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier. |
| |
| 2020-04-01 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR rtl-optimization/94123 |
| * lower-subreg.c (pass_lower_subreg3::gate): Remove test for |
| flag_split_wide_types_early. |
| |
| 2020-04-01 Joerg Sonnenberger <joerg@bec.de> |
| |
| * doc/extend.texi (Common Function Attributes): Fix typo. |
| |
| 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| PR target/94420 |
| * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition |
| on operands[1]. |
| |
| 2020-04-01 Zackery Spytz <zspytz@gmail.com> |
| |
| * doc/extend.texi: Fix a typo in the documentation of the |
| copy function attribute. |
| |
| 2020-04-01 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/94423 |
| * tree-object-size.c (pass_object_sizes::execute): Don't call |
| replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead |
| call replace_call_with_value. |
| |
| 2020-04-01 Kewen Lin <linkw@gcc.gnu.org> |
| |
| PR tree-optimization/94043 |
| * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed |
| phi for vec_lhs and use it for lane extraction. |
| |
| 2020-03-31 Felix Yang <felix.yang@huawei.com> |
| |
| PR tree-optimization/94398 |
| * tree-vect-stmts.c (vectorizable_store): Instead of calling |
| vect_supportable_dr_alignment, set alignment_support_scheme to |
| dr_unaligned_supported for gather-scatter accesses. |
| (vectorizable_load): Likewise. |
| |
| 2020-03-31 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF): |
| New mode iterators. |
| (vnsi, VnSI, vndi, VnDI): New mode attributes. |
| (mov<mode>): Use <VnDI> in place of V64DI. |
| (mov<mode>_exec): Likewise. |
| (mov<mode>_sgprbase): Likewise. |
| (reload_out<mode>): Likewise. |
| (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64. |
| (gather_load<mode>v64si): Rename to ... |
| (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI, |
| and <VnDI> in place of V64DI. |
| (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI. |
| (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI. |
| (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>. |
| (scatter_store<mode>v64si): Rename to ... |
| (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>. |
| (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>. |
| (scatter<mode>_insn_1offset<exec_scatter>): Likewise. |
| (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise. |
| (scatter<mode>_insn_2offsets<exec_scatter>): Likewise. |
| (ds_bpermute<mode>): Use <VnSI>. |
| (addv64si3_vcc<exec_vcc>): Rename to ... |
| (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI. |
| (addv64si3_vcc_dup<exec_vcc>): Rename to ... |
| (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI. |
| (addcv64si3<exec_vcc>): Rename to ... |
| (addc<mode>3<exec_vcc>): ... this, and use V_SI. |
| (subv64si3_vcc<exec_vcc>): Rename to ... |
| (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI. |
| (subcv64si3<exec_vcc>): Rename to ... |
| (subc<mode>3<exec_vcc>): ... this, and use V_SI. |
| (addv64di3): Rename to ... |
| (add<mode>3): ... this, and use V_DI. |
| (addv64di3_exec): Rename to ... |
| (add<mode>3_exec): ... this, and use V_DI. |
| (subv64di3): Rename to ... |
| (sub<mode>3): ... this, and use V_DI. |
| (subv64di3_exec): Rename to ... |
| (sub<mode>3_exec): ... this, and use V_DI. |
| (addv64di3_zext): Rename to ... |
| (add<mode>3_zext): ... this, and use V_DI and <VnSI>. |
| (addv64di3_zext_exec): Rename to ... |
| (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>. |
| (addv64di3_zext_dup): Rename to ... |
| (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>. |
| (addv64di3_zext_dup_exec): Rename to ... |
| (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>. |
| (addv64di3_zext_dup2): Rename to ... |
| (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>. |
| (addv64di3_zext_dup2_exec): Rename to ... |
| (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>. |
| (addv64di3_sext_dup2): Rename to ... |
| (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>. |
| (addv64di3_sext_dup2_exec): Rename to ... |
| (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>. |
| (<su>mulv64si3_highpart<exec>): Rename to ... |
| (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>. |
| (mulv64di3): Rename to ... |
| (mul<mode>3): ... this, and use V_DI and <VnSI>. |
| (mulv64di3_exec): Rename to ... |
| (mul<mode>3_exec): ... this, and use V_DI and <VnSI>. |
| (mulv64di3_zext): Rename to ... |
| (mul<mode>3_zext): ... this, and use V_DI and <VnSI>. |
| (mulv64di3_zext_exec): Rename to ... |
| (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>. |
| (mulv64di3_zext_dup2): Rename to ... |
| (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>. |
| (mulv64di3_zext_dup2_exec): Rename to ... |
| (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>. |
| (<expander>v64di3): Rename to ... |
| (<expander><mode>3): ... this, and use V_DI and <VnSI>. |
| (<expander>v64di3_exec): Rename to ... |
| (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>. |
| (<expander>v64si3<exec>): Rename to ... |
| (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>. |
| (v<expander>v64si3<exec>): Rename to ... |
| (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>. |
| (<expander>v64si3<exec>): Rename to ... |
| (<expander><vnsi>3<exec>): ... this, and use V_SI. |
| (subv64df3<exec>): Rename to ... |
| (sub<mode>3<exec>): ... this, and use V_DF. |
| (truncv64di<mode>2): Rename to ... |
| (trunc<vndi><mode>2): ... this, and use <VnDI>. |
| (truncv64di<mode>2_exec): Rename to ... |
| (trunc<vndi><mode>2_exec): ... this, and use <VnDI>. |
| (<convop><mode>v64di2): Rename to ... |
| (<convop><mode><vndi>2): ... this, and use <VnDI>. |
| (<convop><mode>v64di2_exec): Rename to ... |
| (<convop><mode><vndi>2_exec): ... this, and use <VnDI>. |
| (vec_cmp<u>v64qidi): Rename to ... |
| (vec_cmp<u><mode>di): ... this, and use <VnSI>. |
| (vec_cmp<u>v64qidi_exec): Rename to ... |
| (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>. |
| (vcond_mask_<mode>di): Use <VnDI>. |
| (maskload<mode>di): Likewise. |
| (maskstore<mode>di): Likewise. |
| (mask_gather_load<mode>v64si): Rename to ... |
| (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>. |
| (mask_scatter_store<mode>v64si): Rename to ... |
| (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>. |
| (*<reduc_op>_dpp_shr_v64di): Rename to ... |
| (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>. |
| (*plus_carry_in_dpp_shr_v64si): Rename to ... |
| (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI. |
| (*plus_carry_dpp_shr_v64di): Rename to ... |
| (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>. |
| (vec_seriesv64si): Rename to ... |
| (vec_series<mode>): ... this, and use V_SI. |
| (vec_seriesv64di): Rename to ... |
| (vec_series<mode>): ... this, and use V_DI. |
| |
| 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (arc_print_operand): Use |
| HOST_WIDE_INT_PRINT_DEC macro. |
| |
| 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it. |
| |
| 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic |
| variant. |
| (__arm_vbicq): Likewise. |
| |
| 2020-03-31 Vineet Gupta <vgupta@synopsys.com> |
| |
| * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700. |
| |
| 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the |
| common section of both MVE Integer and MVE Floating Point. |
| (vaddvq): Likewise. |
| (vaddlvq_p): Likewise. |
| (vaddvaq): Likewise. |
| (vaddvq_p): Likewise. |
| (vcmpcsq): Likewise. |
| (vmlsdavxq): Likewise. |
| (vmlsdavq): Likewise. |
| (vmladavxq): Likewise. |
| (vmladavq): Likewise. |
| (vminvq): Likewise. |
| (vminavq): Likewise. |
| (vmaxvq): Likewise. |
| (vmaxavq): Likewise. |
| (vmlaldavq): Likewise. |
| (vcmphiq): Likewise. |
| (vaddlvaq): Likewise. |
| (vrmlaldavhq): Likewise. |
| (vrmlaldavhxq): Likewise. |
| (vrmlsldavhq): Likewise. |
| (vrmlsldavhxq): Likewise. |
| (vmlsldavxq): Likewise. |
| (vmlsldavq): Likewise. |
| (vabavq): Likewise. |
| (vrmlaldavhaq): Likewise. |
| (vcmpgeq_m_n): Likewise. |
| (vmlsdavxq_p): Likewise. |
| (vmlsdavq_p): Likewise. |
| (vmlsdavaxq): Likewise. |
| (vmlsdavaq): Likewise. |
| (vaddvaq_p): Likewise. |
| (vcmpcsq_m_n): Likewise. |
| (vcmpcsq_m): Likewise. |
| (vmladavxq_p): Likewise. |
| (vmladavq_p): Likewise. |
| (vmladavaxq): Likewise. |
| (vmladavaq): Likewise. |
| (vminvq_p): Likewise. |
| (vminavq_p): Likewise. |
| (vmaxvq_p): Likewise. |
| (vmaxavq_p): Likewise. |
| (vcmphiq_m): Likewise. |
| (vaddlvaq_p): Likewise. |
| (vmlaldavaq): Likewise. |
| (vmlaldavaxq): Likewise. |
| (vmlaldavq_p): Likewise. |
| (vmlaldavxq_p): Likewise. |
| (vmlsldavaq): Likewise. |
| (vmlsldavaxq): Likewise. |
| (vmlsldavq_p): Likewise. |
| (vmlsldavxq_p): Likewise. |
| (vrmlaldavhaxq): Likewise. |
| (vrmlaldavhq_p): Likewise. |
| (vrmlaldavhxq_p): Likewise. |
| (vrmlsldavhaq): Likewise. |
| (vrmlsldavhaxq): Likewise. |
| (vrmlsldavhq_p): Likewise. |
| (vrmlsldavhxq_p): Likewise. |
| (vabavq_p): Likewise. |
| (vmladavaq_p): Likewise. |
| (vstrbq_scatter_offset): Likewise. |
| (vstrbq_p): Likewise. |
| (vstrbq_scatter_offset_p): Likewise. |
| (vstrdq_scatter_base_p): Likewise. |
| (vstrdq_scatter_base): Likewise. |
| (vstrdq_scatter_offset_p): Likewise. |
| (vstrdq_scatter_offset): Likewise. |
| (vstrdq_scatter_shifted_offset_p): Likewise. |
| (vstrdq_scatter_shifted_offset): Likewise. |
| (vmaxq_x): Likewise. |
| (vminq_x): Likewise. |
| (vmovlbq_x): Likewise. |
| (vmovltq_x): Likewise. |
| (vmulhq_x): Likewise. |
| (vmullbq_int_x): Likewise. |
| (vmullbq_poly_x): Likewise. |
| (vmulltq_int_x): Likewise. |
| (vmulltq_poly_x): Likewise. |
| (vstrbq): Likewise. |
| |
| 2020-03-31 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94368 |
| * config/aarch64/constraints.md (Uph): New constraint. |
| * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr. |
| (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's |
| constraint. |
| |
| 2020-03-31 Marc Glisse <marc.glisse@inria.fr> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/94412 |
| * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use |
| ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P. |
| |
| 2020-03-31 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94403 |
| * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also |
| ENUMERAL_TYPE lhs_type. |
| |
| PR rtl-optimization/94344 |
| * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision |
| conversions, either on both operands of |^+ or just one. Handle |
| also extra same precision conversion on RSHIFT_EXPR first operand |
| provided RSHIFT_EXPR is performed in unsigned type. |
| |
| 2020-03-30 David Malcolm <dmalcolm@redhat.com> |
| |
| * lra.c (finish_insn_code_data_once): Set the array elements |
| to NULL after freeing them. |
| |
| 2020-03-30 Andreas Schwab <schwab@suse.de> |
| |
| * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]: |
| Define. |
| |
| 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com> |
| |
| * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code |
| to skip defining builtins based on builtin_mask. |
| |
| 2020-03-30 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94343 |
| * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If |
| !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input |
| operand is a register. Don't enable masked variants for V*[QH]Imode. |
| |
| PR target/93069 |
| * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use |
| <store_mask_constraint> instead of m in output operand constraint. |
| (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of |
| %{%3%}. |
| |
| 2020-03-30 Alan Modra <amodra@gmail.com> |
| |
| * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern. |
| (rs6000_indirect_call_template_1): Adjust to suit. |
| * config/rs6000/rs6000.md (call_local): Merge call_local32, |
| call_local64, and call_local_aix. |
| (call_value_local): Simlarly. |
| (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit, |
| and disable pattern when CALL_LONG. |
| (call_indirect_aix, call_value_indirect_aix): Adjust rtl. |
| (call_indirect_elfv2, call_indirect_pcrel): Likewise. |
| (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise. |
| |
| 2020-03-29 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR driver/94381 |
| * doc/invoke.texi: Update -falign-functions, -falign-loops and |
| -falign-jumps documentation. |
| |
| 2020-03-29 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/94363 |
| * cgraphunit.c (process_function_and_variable_attributes): Remove |
| double 'attribute' words. |
| |
| 2020-03-29 John David Anglin <dave.anglin@bell.net> |
| |
| * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate |
| .align output. |
| |
| 2020-03-28 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c/93573 |
| * c-decl.c (grokdeclarator): After issuing errors, set size_int_const |
| to true after setting size to integer_one_node. |
| |
| PR tree-optimization/94329 |
| * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt |
| on the last stmt in a bb, make sure gsi_prev isn't done immediately |
| after gsi_last_bb. |
| |
| 2020-03-27 Alan Modra <amodra@gmail.com> |
| |
| PR target/94145 |
| * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile |
| for PLT16_LO and PLT_PCREL. |
| * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove. |
| (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define. |
| (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile. |
| |
| 2020-03-27 Martin Sebor <msebor@redhat.com> |
| |
| PR c++/94098 |
| * calls.c (init_attr_rdwr_indices): Iterate over all access attributes. |
| |
| 2020-03-27 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md: |
| (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout. |
| (VEC_1REG_MODE): Delete. |
| (VEC_1REG_ALT): Delete. |
| (VEC_ALL1REG_MODE): Rename to V_1REG throughout. |
| (VEC_1REG_INT_MODE): Delete. |
| (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout. |
| (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout. |
| (VEC_2REG_MODE): Rename to V_2REG throughout. |
| (VEC_REG_MODE): Rename to V_noHI throughout. |
| (VEC_ALLREG_MODE): Rename to V_ALL throughout. |
| (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout. |
| (VEC_ALLREG_INT_MODE): Rename to V_INT throughout. |
| (VEC_INT_MODE): Delete. |
| (VEC_FP_MODE): Rename to V_FP throughout and move to top. |
| (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top. |
| (FP_MODE): Delete and replace with FP throughout. |
| (FP_1REG_MODE): Delete and replace with FP_1REG throughout. |
| (VCMP_MODE): Rename to V_noQI throughout and move to top. |
| (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top. |
| * config/gcn/gcn.md (FP): New mode iterator. |
| (FP_1REG): New mode iterator. |
| |
| 2020-03-27 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this |
| now emits two .dot files. |
| * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD. |
| (graphviz_out::end_tr): Only close a TR, not a TD. |
| (graphviz_out::begin_td): New. |
| (graphviz_out::end_td): New. |
| (graphviz_out::begin_trtd): New, replacing the old implementation |
| of graphviz_out::begin_tr. |
| (graphviz_out::end_tdtr): New, replacing the old implementation |
| of graphviz_out::end_tr. |
| * graphviz.h (graphviz_out::begin_td): New decl. |
| (graphviz_out::end_td): New decl. |
| (graphviz_out::begin_trtd): New decl. |
| (graphviz_out::end_tdtr): New decl. |
| |
| 2020-03-27 Richard Biener <rguenther@suse.de> |
| |
| PR debug/94273 |
| * dwarf2out.c (should_emit_struct_debug): Return false for |
| DINFO_LEVEL_TERSE. |
| |
| 2020-03-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94352 |
| * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the |
| worklist ... |
| (ssa_propagation_engine::ssa_propagate): ... here after |
| initializing curr_order. |
| |
| 2020-03-27 Kewen Lin <linkw@gcc.gnu.org> |
| |
| PR tree-optimization/90332 |
| * tree-vect-stmts.c (vector_vector_composition_type): New function. |
| (get_group_load_store_type): Adjust to call |
| vector_vector_composition_type, extend it to construct with scalar |
| types. |
| (vectorizable_load): Likewise. |
| |
| 2020-03-27 Roman Zhuykov <zhroma@ispras.ru> |
| |
| * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions. |
| (create_ddg_dep_no_link): Likewise. |
| (add_cross_iteration_register_deps): Move debug instruction check. |
| Other minor refactoring. |
| (add_intra_loop_mem_dep): Do not check for debug instructions. |
| (add_inter_loop_mem_dep): Likewise. |
| (build_intra_loop_deps): Likewise. |
| (create_ddg): Do not include debug insns into the graph. |
| * ddg.h (struct ddg): Remove num_debug field. |
| * modulo-sched.c (doloop_register_get): Adjust condition. |
| (res_MII): Remove DDG num_debug field usage. |
| (sms_schedule_by_order): Use assertion against debug insns. |
| (ps_has_conflicts): Drop debug insn check. |
| |
| 2020-03-26 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/94323 |
| * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST |
| that contains exactly one non-DEBUG_BEGIN_STMT statement. |
| |
| PR debug/94281 |
| * gimple.h (gimple_seq_first_nondebug_stmt): New function. |
| (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains |
| a single non-debug stmt followed by one or more debug stmts. |
| * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt |
| instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt |
| and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and |
| gimple_seq_last to check if outer_stmt gbind could be reused and |
| if yes and it is surrounded by any debug stmts, move them into the |
| gbind body. |
| |
| PR rtl-optimization/92264 |
| * var-tracking.c (add_stores): Call cselib_set_value_sp_based even |
| for sp based values in !frame_pointer_needed |
| && !ACCUMULATE_OUTGOING_ARGS functions. |
| |
| 2020-03-26 Felix Yang <felix.yang@huawei.com> |
| |
| PR tree-optimization/94269 |
| * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict |
| this |
| operation to single basic block. |
| |
| 2020-03-25 Jeff Law <law@redhat.com> |
| |
| PR rtl-optimization/90275 |
| * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the |
| pattern. |
| |
| 2020-03-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94292 |
| * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to |
| mode rather than VOIDmode. |
| |
| 2020-03-25 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/94004 |
| * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings |
| even for alloca calls resulting from system macro expansion. |
| Include inlining context in all warnings. |
| |
| 2020-03-25 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/94254 |
| * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow |
| FPRs to change between SDmode and DDmode. |
| |
| 2020-03-25 Martin Sebor <msebor@redhat.com> |
| |
| PR tree-optimization/94131 |
| * gimple-fold.c (get_range_strlen_tree): Fail for variable-length |
| types and decls. |
| * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming |
| types have constant sizes. |
| |
| 2020-03-25 Martin Liska <mliska@suse.cz> |
| |
| PR lto/94259 |
| * configure.ac: Report error only when --with-zstd |
| is used. |
| * configure: Regenerate. |
| |
| 2020-03-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94308 |
| * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set |
| INSN_CODE (insn) to -1 when changing the pattern. |
| |
| 2020-03-25 Martin Liska <mliska@suse.cz> |
| |
| PR target/93274 |
| PR ipa/94271 |
| * config/i386/i386-features.c (make_resolver_func): Drop |
| public flag for resolver. |
| * config/rs6000/rs6000.c (make_resolver_func): Add comdat |
| group for resolver and drop public flag if possible. |
| * multiple_target.c (create_dispatcher_calls): Drop unique_name |
| and resolution as we want to enable LTO privatization of the default |
| symbol. |
| |
| 2020-03-25 Martin Liska <mliska@suse.cz> |
| |
| PR lto/94259 |
| * configure.ac: Respect --without-zstd and report |
| error when we can't find header file with --with-zstd. |
| * configure: Regenerate. |
| |
| 2020-03-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/94303 |
| * varasm.c (output_constructor_array_range): If local->index |
| RANGE_EXPR doesn't start at the current location in the constructor, |
| skip needed number of bytes using assemble_zeros or assert we don't |
| go backwards. |
| |
| PR c++/94223 |
| * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong |
| counter instead of DECL_UID. |
| |
| PR tree-optimization/94300 |
| * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset |
| is positive, make sure that off + size isn't larger than needed_len. |
| |
| 2020-03-25 Richard Biener <rguenther@suse.de> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/94283 |
| * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards. |
| |
| 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * doc/sourcebuild.texi (ARM-specific attributes): Add |
| arm_fp_dp_ok. |
| (Features for dg-add-options): Add arm_fp_dp. |
| |
| 2020-03-24 John David Anglin <danglin@gcc.gnu.org> |
| |
| PR lto/94249 |
| * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__. |
| |
| 2020-03-24 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR libgomp/81689 |
| * omp-offload.c (omp_finish_file): Fix target-link handling if |
| targetm_common.have_named_sections is false. |
| |
| 2020-03-24 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94286 |
| * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode |
| instead of GEN_INT. |
| |
| PR debug/94285 |
| * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to |
| e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts. |
| If not after and at *incr_pos is a debug stmt, set stmt location to |
| location of next non-debug stmt after it if any. |
| |
| PR debug/94283 |
| * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set |
| GF_PLF_2, but don't add them to worklist. Don't add an assigment to |
| worklist or set GF_PLF_2 just because it is used in a debug stmt in |
| another bb. Formatting improvements. |
| |
| PR debug/94277 |
| * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and |
| non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC |
| regardless of whether TREE_NO_WARNING is set on it or whether |
| warn_unused_function is true or not. |
| |
| 2020-03-23 Jeff Law <law@redhat.com> |
| |
| PR rtl-optimization/90275 |
| PR target/94238 |
| PR target/94144 |
| * simplify-rtx.c (comparison_code_valid_for_mode): New function. |
| (simplify_logical_relational_operation): Use it. |
| |
| 2020-03-23 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c++/91993 |
| * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on |
| ultimate rhs and if returned something different, reconstructing |
| the COMPOUND_EXPRs. |
| |
| 2020-03-23 Lewis Hyatt <lhyatt@gmail.com> |
| |
| * opts.c (print_filtered_help): Improve the help text for alias options. |
| |
| 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm_mve.h (vshlcq_m_s8): Define macro. |
| (vshlcq_m_u8): Likewise. |
| (vshlcq_m_s16): Likewise. |
| (vshlcq_m_u16): Likewise. |
| (vshlcq_m_s32): Likewise. |
| (vshlcq_m_u32): Likewise. |
| (__arm_vshlcq_m_s8): Define intrinsic. |
| (__arm_vshlcq_m_u8): Likewise. |
| (__arm_vshlcq_m_s16): Likewise. |
| (__arm_vshlcq_m_u16): Likewise. |
| (__arm_vshlcq_m_s32): Likewise. |
| (__arm_vshlcq_m_u32): Likewise. |
| (vshlcq_m): Define polymorphic variant. |
| * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE): |
| Use builtin qualifier. |
| (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise. |
| * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern. |
| (mve_vshlcq_m_carry_<supf><mode>): Likewise. |
| (mve_vshlcq_m_<supf><mode>): Likewise. |
| |
| 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier. |
| (UQSHL_QUALIFIERS): Likewise. |
| (ASRL_QUALIFIERS): Likewise. |
| (SQSHL_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in |
| Big-Endian Mode. |
| (sqrshr): Define macro. |
| (sqrshrl): Likewise. |
| (sqrshrl_sat48): Likewise. |
| (sqshl): Likewise. |
| (sqshll): Likewise. |
| (srshr): Likewise. |
| (srshrl): Likewise. |
| (uqrshl): Likewise. |
| (uqrshll): Likewise. |
| (uqrshll_sat48): Likewise. |
| (uqshl): Likewise. |
| (uqshll): Likewise. |
| (urshr): Likewise. |
| (urshrl): Likewise. |
| (lsll): Likewise. |
| (asrl): Likewise. |
| (__arm_lsll): Define intrinsic. |
| (__arm_asrl): Likewise. |
| (__arm_uqrshll): Likewise. |
| (__arm_uqrshll_sat48): Likewise. |
| (__arm_sqrshrl): Likewise. |
| (__arm_sqrshrl_sat48): Likewise. |
| (__arm_uqshll): Likewise. |
| (__arm_urshrl): Likewise. |
| (__arm_srshrl): Likewise. |
| (__arm_sqshll): Likewise. |
| (__arm_uqrshl): Likewise. |
| (__arm_sqrshr): Likewise. |
| (__arm_uqshl): Likewise. |
| (__arm_urshr): Likewise. |
| (__arm_sqshl): Likewise. |
| (__arm_srshr): Likewise. |
| * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin |
| qualifier. |
| (UQSHL_QUALIFIERS): Likewise. |
| (ASRL_QUALIFIERS): Likewise. |
| (SQSHL_QUALIFIERS): Likewise. |
| * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern. |
| (mve_sqrshrl_sat<supf>_di): Likewise. |
| (mve_uqrshl_si): Likewise. |
| (mve_sqrshr_si): Likewise. |
| (mve_uqshll_di): Likewise. |
| (mve_urshrl_di): Likewise. |
| (mve_uqshl_si): Likewise. |
| (mve_urshr_si): Likewise. |
| (mve_sqshl_si): Likewise. |
| (mve_srshr_si): Likewise. |
| (mve_srshrl_di): Likewise. |
| (mve_sqshll_di): Likewise. |
| |
| 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm_mve.h (vsetq_lane_f16): Define macro. |
| (vsetq_lane_f32): Likewise. |
| (vsetq_lane_s16): Likewise. |
| (vsetq_lane_s32): Likewise. |
| (vsetq_lane_s8): Likewise. |
| (vsetq_lane_s64): Likewise. |
| (vsetq_lane_u8): Likewise. |
| (vsetq_lane_u16): Likewise. |
| (vsetq_lane_u32): Likewise. |
| (vsetq_lane_u64): Likewise. |
| (vgetq_lane_f16): Likewise. |
| (vgetq_lane_f32): Likewise. |
| (vgetq_lane_s16): Likewise. |
| (vgetq_lane_s32): Likewise. |
| (vgetq_lane_s8): Likewise. |
| (vgetq_lane_s64): Likewise. |
| (vgetq_lane_u8): Likewise. |
| (vgetq_lane_u16): Likewise. |
| (vgetq_lane_u32): Likewise. |
| (vgetq_lane_u64): Likewise. |
| (__ARM_NUM_LANES): Likewise. |
| (__ARM_LANEQ): Likewise. |
| (__ARM_CHECK_LANEQ): Likewise. |
| (__arm_vsetq_lane_s16): Define intrinsic. |
| (__arm_vsetq_lane_s32): Likewise. |
| (__arm_vsetq_lane_s8): Likewise. |
| (__arm_vsetq_lane_s64): Likewise. |
| (__arm_vsetq_lane_u8): Likewise. |
| (__arm_vsetq_lane_u16): Likewise. |
| (__arm_vsetq_lane_u32): Likewise. |
| (__arm_vsetq_lane_u64): Likewise. |
| (__arm_vgetq_lane_s16): Likewise. |
| (__arm_vgetq_lane_s32): Likewise. |
| (__arm_vgetq_lane_s8): Likewise. |
| (__arm_vgetq_lane_s64): Likewise. |
| (__arm_vgetq_lane_u8): Likewise. |
| (__arm_vgetq_lane_u16): Likewise. |
| (__arm_vgetq_lane_u32): Likewise. |
| (__arm_vgetq_lane_u64): Likewise. |
| (__arm_vsetq_lane_f16): Likewise. |
| (__arm_vsetq_lane_f32): Likewise. |
| (__arm_vgetq_lane_f16): Likewise. |
| (__arm_vgetq_lane_f32): Likewise. |
| (vgetq_lane): Define polymorphic variant. |
| (vsetq_lane): Likewise. |
| * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL |
| pattern. |
| (mve_vec_extractv2didi): Likewise. |
| (mve_vec_extract_sext_internal<mode>): Likewise. |
| (mve_vec_extract_zext_internal<mode>): Likewise. |
| (mve_vec_set<mode>_internal): Likewise. |
| (mve_vec_setv2di_internal): Likewise. |
| * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md |
| file. |
| (vec_extract<mode><V_elem_l>): Rename to |
| "neon_vec_extract<mode><V_elem_l>". |
| (vec_extractv2didi): Rename to "neon_vec_extractv2didi". |
| * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL |
| pattern common for MVE and NEON. |
| (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both |
| MVE and NEON. |
| |
| 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/mve.md (earlyclobber_32): New mode attribute. |
| (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*, |
| mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers. |
| |
| 2020-03-23 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94261 |
| * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove |
| IL operand swapping code. |
| (vect_slp_rearrange_stmts): Do not arrange isomorphic |
| nodes that would need operation code adjustments. |
| |
| 2020-03-23 Tobias Burnus <tobias@codesourcery.com> |
| |
| * doc/install.texi (amdgcn-*-amdhsa): Renamed |
| from amdgcn-unknown-amdhsa; change |
| amdgcn-unknown-amdhsa to amdgcn-amdhsa. |
| |
| 2020-03-23 Richard Biener <rguenther@suse.de> |
| |
| PR ipa/94245 |
| * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP |
| directly rather than also folding it via build_fold_addr_expr. |
| |
| 2020-03-23 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94266 |
| * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate |
| addresses of TARGET_MEM_REFs. |
| |
| 2020-03-23 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/94250 |
| * symtab.c (symtab_node::clone_references): Save speculative_id |
| as ref may be overwritten by create_reference. |
| (symtab_node::clone_referring): Likewise. |
| (symtab_node::clone_reference): Likewise. |
| |
| 2020-03-22 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove |
| references to Darwin. |
| * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this |
| unconditionally and comment on why. |
| |
| 2020-03-21 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * config/darwin.c (darwin_mergeable_constant_section): Collect |
| section anchor checks into the caller. |
| (machopic_select_section): Collect section anchor checks into |
| the determination of 'effective zero-size' objects. When the |
| size is unknown, assume it is non-zero, and thus return the |
| 'generic' section for the DECL. |
| |
| 2020-03-21 Iain Sandoe <iain@sandoe.co.uk> |
| |
| PR target/93694 |
| * config/darwin.opt: Amend options descriptions. |
| |
| 2020-03-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/94052 |
| * lra-constraints.c (simplify_operand_subreg): Reload the inner |
| register of a paradoxical subreg if simplify_subreg_regno fails |
| to give a valid hard register for the outer mode. |
| |
| 2020-03-20 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/93435 |
| * params.opt (sra-max-propagations): New parameter. |
| * tree-sra.c (propagation_budget): New variable. |
| (budget_for_propagation_access): New function. |
| (propagate_subaccesses_from_rhs): Use it. |
| (propagate_subaccesses_from_lhs): Likewise. |
| (propagate_all_subaccesses): Set up and destroy propagation_budget. |
| |
| 2020-03-20 Carl Love <cel@us.ibm.com> |
| |
| PR/target 87583 |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Add check for TARGET_FPRND for Power 7 or newer. |
| |
| 2020-03-20 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/93347 |
| * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag. |
| (cgraph_edge::redirect_callee): Move here; likewise. |
| (cgraph_node::remove_callees): Update calls_comdat_local flag. |
| (cgraph_node::verify_node): Verify that calls_comdat_local flag match |
| reality. |
| (cgraph_node::check_calls_comdat_local_p): New member function. |
| * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare. |
| (cgraph_edge::redirect_callee): Move offline. |
| * ipa-fnsummary.c (compute_fn_summary): Do not compute |
| calls_comdat_local flag here. |
| * ipa-inline-transform.c (inline_call): Fix updating of |
| calls_comdat_local flag. |
| * ipa-split.c (split_function): Use true instead of 1 to set the flag. |
| * symtab.c (symtab_node::add_to_same_comdat_group): Update |
| calls_comdat_local flag. |
| |
| 2020-03-20 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree |
| from the possibly modified root. |
| |
| 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm_mve.h (vst1q_p_u8): Define macro. |
| (vst1q_p_s8): Likewise. |
| (vst2q_s8): Likewise. |
| (vst2q_u8): Likewise. |
| (vld1q_z_u8): Likewise. |
| (vld1q_z_s8): Likewise. |
| (vld2q_s8): Likewise. |
| (vld2q_u8): Likewise. |
| (vld4q_s8): Likewise. |
| (vld4q_u8): Likewise. |
| (vst1q_p_u16): Likewise. |
| (vst1q_p_s16): Likewise. |
| (vst2q_s16): Likewise. |
| (vst2q_u16): Likewise. |
| (vld1q_z_u16): Likewise. |
| (vld1q_z_s16): Likewise. |
| (vld2q_s16): Likewise. |
| (vld2q_u16): Likewise. |
| (vld4q_s16): Likewise. |
| (vld4q_u16): Likewise. |
| (vst1q_p_u32): Likewise. |
| (vst1q_p_s32): Likewise. |
| (vst2q_s32): Likewise. |
| (vst2q_u32): Likewise. |
| (vld1q_z_u32): Likewise. |
| (vld1q_z_s32): Likewise. |
| (vld2q_s32): Likewise. |
| (vld2q_u32): Likewise. |
| (vld4q_s32): Likewise. |
| (vld4q_u32): Likewise. |
| (vld4q_f16): Likewise. |
| (vld2q_f16): Likewise. |
| (vld1q_z_f16): Likewise. |
| (vst2q_f16): Likewise. |
| (vst1q_p_f16): Likewise. |
| (vld4q_f32): Likewise. |
| (vld2q_f32): Likewise. |
| (vld1q_z_f32): Likewise. |
| (vst2q_f32): Likewise. |
| (vst1q_p_f32): Likewise. |
| (__arm_vst1q_p_u8): Define intrinsic. |
| (__arm_vst1q_p_s8): Likewise. |
| (__arm_vst2q_s8): Likewise. |
| (__arm_vst2q_u8): Likewise. |
| (__arm_vld1q_z_u8): Likewise. |
| (__arm_vld1q_z_s8): Likewise. |
| (__arm_vld2q_s8): Likewise. |
| (__arm_vld2q_u8): Likewise. |
| (__arm_vld4q_s8): Likewise. |
| (__arm_vld4q_u8): Likewise. |
| (__arm_vst1q_p_u16): Likewise. |
| (__arm_vst1q_p_s16): Likewise. |
| (__arm_vst2q_s16): Likewise. |
| (__arm_vst2q_u16): Likewise. |
| (__arm_vld1q_z_u16): Likewise. |
| (__arm_vld1q_z_s16): Likewise. |
| (__arm_vld2q_s16): Likewise. |
| (__arm_vld2q_u16): Likewise. |
| (__arm_vld4q_s16): Likewise. |
| (__arm_vld4q_u16): Likewise. |
| (__arm_vst1q_p_u32): Likewise. |
| (__arm_vst1q_p_s32): Likewise. |
| (__arm_vst2q_s32): Likewise. |
| (__arm_vst2q_u32): Likewise. |
| (__arm_vld1q_z_u32): Likewise. |
| (__arm_vld1q_z_s32): Likewise. |
| (__arm_vld2q_s32): Likewise. |
| (__arm_vld2q_u32): Likewise. |
| (__arm_vld4q_s32): Likewise. |
| (__arm_vld4q_u32): Likewise. |
| (__arm_vld4q_f16): Likewise. |
| (__arm_vld2q_f16): Likewise. |
| (__arm_vld1q_z_f16): Likewise. |
| (__arm_vst2q_f16): Likewise. |
| (__arm_vst1q_p_f16): Likewise. |
| (__arm_vld4q_f32): Likewise. |
| (__arm_vld2q_f32): Likewise. |
| (__arm_vld1q_z_f32): Likewise. |
| (__arm_vst2q_f32): Likewise. |
| (__arm_vst1q_p_f32): Likewise. |
| (vld1q_z): Define polymorphic variant. |
| (vld2q): Likewise. |
| (vld4q): Likewise. |
| (vst1q_p): Likewise. |
| (vst2q): Likewise. |
| * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier. |
| (LOAD1): Likewise. |
| * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern. |
| (mve_vld2q<mode>): Likewise. |
| (mve_vld4q<mode>): Likewise. |
| |
| 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define. |
| (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise. |
| (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and |
| "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array. |
| (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC |
| and ARM_BUILTIN_SET_FPSCR_NZCVQC. |
| * config/arm/arm_mve.h (vadciq_s32): Define macro. |
| (vadciq_u32): Likewise. |
| (vadciq_m_s32): Likewise. |
| (vadciq_m_u32): Likewise. |
| (vadcq_s32): Likewise. |
| (vadcq_u32): Likewise. |
| (vadcq_m_s32): Likewise. |
| (vadcq_m_u32): Likewise. |
| (vsbciq_s32): Likewise. |
| (vsbciq_u32): Likewise. |
| (vsbciq_m_s32): Likewise. |
| (vsbciq_m_u32): Likewise. |
| (vsbcq_s32): Likewise. |
| (vsbcq_u32): Likewise. |
| (vsbcq_m_s32): Likewise. |
| (vsbcq_m_u32): Likewise. |
| (__arm_vadciq_s32): Define intrinsic. |
| (__arm_vadciq_u32): Likewise. |
| (__arm_vadciq_m_s32): Likewise. |
| (__arm_vadciq_m_u32): Likewise. |
| (__arm_vadcq_s32): Likewise. |
| (__arm_vadcq_u32): Likewise. |
| (__arm_vadcq_m_s32): Likewise. |
| (__arm_vadcq_m_u32): Likewise. |
| (__arm_vsbciq_s32): Likewise. |
| (__arm_vsbciq_u32): Likewise. |
| (__arm_vsbciq_m_s32): Likewise. |
| (__arm_vsbciq_m_u32): Likewise. |
| (__arm_vsbcq_s32): Likewise. |
| (__arm_vsbcq_u32): Likewise. |
| (__arm_vsbcq_m_s32): Likewise. |
| (__arm_vsbcq_m_u32): Likewise. |
| (vadciq_m): Define polymorphic variant. |
| (vadciq): Likewise. |
| (vadcq_m): Likewise. |
| (vadcq): Likewise. |
| (vsbciq_m): Likewise. |
| (vsbciq): Likewise. |
| (vsbcq_m): Likewise. |
| (vsbcq): Likewise. |
| * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin |
| qualifier. |
| (BINOP_UNONE_UNONE_UNONE): Likewise. |
| (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise. |
| * config/arm/mve.md (VADCIQ): Define iterator. |
| (VADCIQ_M): Likewise. |
| (VSBCQ): Likewise. |
| (VSBCQ_M): Likewise. |
| (VSBCIQ): Likewise. |
| (VSBCIQ_M): Likewise. |
| (VADCQ): Likewise. |
| (VADCQ_M): Likewise. |
| (mve_vadciq_m_<supf>v4si): Define RTL pattern. |
| (mve_vadciq_<supf>v4si): Likewise. |
| (mve_vadcq_m_<supf>v4si): Likewise. |
| (mve_vadcq_<supf>v4si): Likewise. |
| (mve_vsbciq_m_<supf>v4si): Likewise. |
| (mve_vsbciq_<supf>v4si): Likewise. |
| (mve_vsbcq_m_<supf>v4si): Likewise. |
| (mve_vsbcq_<supf>v4si): Likewise. |
| (get_fpscr_nzcvqc): Define isns. |
| (set_fpscr_nzcvqc): Define isns. |
| * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define. |
| (UNSPEC_SET_FPSCR_NZCVQC): Define. |
| |
| 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro. |
| (vddupq_x_n_u16): Likewise. |
| (vddupq_x_n_u32): Likewise. |
| (vddupq_x_wb_u8): Likewise. |
| (vddupq_x_wb_u16): Likewise. |
| (vddupq_x_wb_u32): Likewise. |
| (vdwdupq_x_n_u8): Likewise. |
| (vdwdupq_x_n_u16): Likewise. |
| (vdwdupq_x_n_u32): Likewise. |
| (vdwdupq_x_wb_u8): Likewise. |
| (vdwdupq_x_wb_u16): Likewise. |
| (vdwdupq_x_wb_u32): Likewise. |
| (vidupq_x_n_u8): Likewise. |
| (vidupq_x_n_u16): Likewise. |
| (vidupq_x_n_u32): Likewise. |
| (vidupq_x_wb_u8): Likewise. |
| (vidupq_x_wb_u16): Likewise. |
| (vidupq_x_wb_u32): Likewise. |
| (viwdupq_x_n_u8): Likewise. |
| (viwdupq_x_n_u16): Likewise. |
| (viwdupq_x_n_u32): Likewise. |
| (viwdupq_x_wb_u8): Likewise. |
| (viwdupq_x_wb_u16): Likewise. |
| (viwdupq_x_wb_u32): Likewise. |
| (vdupq_x_n_s8): Likewise. |
| (vdupq_x_n_s16): Likewise. |
| (vdupq_x_n_s32): Likewise. |
| (vdupq_x_n_u8): Likewise. |
| (vdupq_x_n_u16): Likewise. |
| (vdupq_x_n_u32): Likewise. |
| (vminq_x_s8): Likewise. |
| (vminq_x_s16): Likewise. |
| (vminq_x_s32): Likewise. |
| (vminq_x_u8): Likewise. |
| (vminq_x_u16): Likewise. |
| (vminq_x_u32): Likewise. |
| (vmaxq_x_s8): Likewise. |
| (vmaxq_x_s16): Likewise. |
| (vmaxq_x_s32): Likewise. |
| (vmaxq_x_u8): Likewise. |
| (vmaxq_x_u16): Likewise. |
| (vmaxq_x_u32): Likewise. |
| (vabdq_x_s8): Likewise. |
| (vabdq_x_s16): Likewise. |
| (vabdq_x_s32): Likewise. |
| (vabdq_x_u8): Likewise. |
| (vabdq_x_u16): Likewise. |
| (vabdq_x_u32): Likewise. |
| (vabsq_x_s8): Likewise. |
| (vabsq_x_s16): Likewise. |
| (vabsq_x_s32): Likewise. |
| (vaddq_x_s8): Likewise. |
| (vaddq_x_s16): Likewise. |
| (vaddq_x_s32): Likewise. |
| (vaddq_x_n_s8): Likewise. |
| (vaddq_x_n_s16): Likewise. |
| (vaddq_x_n_s32): Likewise. |
| (vaddq_x_u8): Likewise. |
| (vaddq_x_u16): Likewise. |
| (vaddq_x_u32): Likewise. |
| (vaddq_x_n_u8): Likewise. |
| (vaddq_x_n_u16): Likewise. |
| (vaddq_x_n_u32): Likewise. |
| (vclsq_x_s8): Likewise. |
| (vclsq_x_s16): Likewise. |
| (vclsq_x_s32): Likewise. |
| (vclzq_x_s8): Likewise. |
| (vclzq_x_s16): Likewise. |
| (vclzq_x_s32): Likewise. |
| (vclzq_x_u8): Likewise. |
| (vclzq_x_u16): Likewise. |
| (vclzq_x_u32): Likewise. |
| (vnegq_x_s8): Likewise. |
| (vnegq_x_s16): Likewise. |
| (vnegq_x_s32): Likewise. |
| (vmulhq_x_s8): Likewise. |
| (vmulhq_x_s16): Likewise. |
| (vmulhq_x_s32): Likewise. |
| (vmulhq_x_u8): Likewise. |
| (vmulhq_x_u16): Likewise. |
| (vmulhq_x_u32): Likewise. |
| (vmullbq_poly_x_p8): Likewise. |
| (vmullbq_poly_x_p16): Likewise. |
| (vmullbq_int_x_s8): Likewise. |
| (vmullbq_int_x_s16): Likewise. |
| (vmullbq_int_x_s32): Likewise. |
| (vmullbq_int_x_u8): Likewise. |
| (vmullbq_int_x_u16): Likewise. |
| (vmullbq_int_x_u32): Likewise. |
| (vmulltq_poly_x_p8): Likewise. |
| (vmulltq_poly_x_p16): Likewise. |
| (vmulltq_int_x_s8): Likewise. |
| (vmulltq_int_x_s16): Likewise. |
| (vmulltq_int_x_s32): Likewise. |
| (vmulltq_int_x_u8): Likewise. |
| (vmulltq_int_x_u16): Likewise. |
| (vmulltq_int_x_u32): Likewise. |
| (vmulq_x_s8): Likewise. |
| (vmulq_x_s16): Likewise. |
| (vmulq_x_s32): Likewise. |
| (vmulq_x_n_s8): Likewise. |
| (vmulq_x_n_s16): Likewise. |
| (vmulq_x_n_s32): Likewise. |
| (vmulq_x_u8): Likewise. |
| (vmulq_x_u16): Likewise. |
| (vmulq_x_u32): Likewise. |
| (vmulq_x_n_u8): Likewise. |
| (vmulq_x_n_u16): Likewise. |
| (vmulq_x_n_u32): Likewise. |
| (vsubq_x_s8): Likewise. |
| (vsubq_x_s16): Likewise. |
| (vsubq_x_s32): Likewise. |
| (vsubq_x_n_s8): Likewise. |
| (vsubq_x_n_s16): Likewise. |
| (vsubq_x_n_s32): Likewise. |
| (vsubq_x_u8): Likewise. |
| (vsubq_x_u16): Likewise. |
| (vsubq_x_u32): Likewise. |
| (vsubq_x_n_u8): Likewise. |
| (vsubq_x_n_u16): Likewise. |
| (vsubq_x_n_u32): Likewise. |
| (vcaddq_rot90_x_s8): Likewise. |
| (vcaddq_rot90_x_s16): Likewise. |
| (vcaddq_rot90_x_s32): Likewise. |
| (vcaddq_rot90_x_u8): Likewise. |
| (vcaddq_rot90_x_u16): Likewise. |
| (vcaddq_rot90_x_u32): Likewise. |
| (vcaddq_rot270_x_s8): Likewise. |
| (vcaddq_rot270_x_s16): Likewise. |
| (vcaddq_rot270_x_s32): Likewise. |
| (vcaddq_rot270_x_u8): Likewise. |
| (vcaddq_rot270_x_u16): Likewise. |
| (vcaddq_rot270_x_u32): Likewise. |
| (vhaddq_x_n_s8): Likewise. |
| (vhaddq_x_n_s16): Likewise. |
| (vhaddq_x_n_s32): Likewise. |
| (vhaddq_x_n_u8): Likewise. |
| (vhaddq_x_n_u16): Likewise. |
| (vhaddq_x_n_u32): Likewise. |
| (vhaddq_x_s8): Likewise. |
| (vhaddq_x_s16): Likewise. |
| (vhaddq_x_s32): Likewise. |
| (vhaddq_x_u8): Likewise. |
| (vhaddq_x_u16): Likewise. |
| (vhaddq_x_u32): Likewise. |
| (vhcaddq_rot90_x_s8): Likewise. |
| (vhcaddq_rot90_x_s16): Likewise. |
| (vhcaddq_rot90_x_s32): Likewise. |
| (vhcaddq_rot270_x_s8): Likewise. |
| (vhcaddq_rot270_x_s16): Likewise. |
| (vhcaddq_rot270_x_s32): Likewise. |
| (vhsubq_x_n_s8): Likewise. |
| (vhsubq_x_n_s16): Likewise. |
| (vhsubq_x_n_s32): Likewise. |
| (vhsubq_x_n_u8): Likewise. |
| (vhsubq_x_n_u16): Likewise. |
| (vhsubq_x_n_u32): Likewise. |
| (vhsubq_x_s8): Likewise. |
| (vhsubq_x_s16): Likewise. |
| (vhsubq_x_s32): Likewise. |
| (vhsubq_x_u8): Likewise. |
| (vhsubq_x_u16): Likewise. |
| (vhsubq_x_u32): Likewise. |
| (vrhaddq_x_s8): Likewise. |
| (vrhaddq_x_s16): Likewise. |
| (vrhaddq_x_s32): Likewise. |
| (vrhaddq_x_u8): Likewise. |
| (vrhaddq_x_u16): Likewise. |
| (vrhaddq_x_u32): Likewise. |
| (vrmulhq_x_s8): Likewise. |
| (vrmulhq_x_s16): Likewise. |
| (vrmulhq_x_s32): Likewise. |
| (vrmulhq_x_u8): Likewise. |
| (vrmulhq_x_u16): Likewise. |
| (vrmulhq_x_u32): Likewise. |
| (vandq_x_s8): Likewise. |
| (vandq_x_s16): Likewise. |
| (vandq_x_s32): Likewise. |
| (vandq_x_u8): Likewise. |
| (vandq_x_u16): Likewise. |
| (vandq_x_u32): Likewise. |
| (vbicq_x_s8): Likewise. |
| (vbicq_x_s16): Likewise. |
| (vbicq_x_s32): Likewise. |
| (vbicq_x_u8): Likewise. |
| (vbicq_x_u16): Likewise. |
| (vbicq_x_u32): Likewise. |
| (vbrsrq_x_n_s8): Likewise. |
| (vbrsrq_x_n_s16): Likewise. |
| (vbrsrq_x_n_s32): Likewise. |
| (vbrsrq_x_n_u8): Likewise. |
| (vbrsrq_x_n_u16): Likewise. |
| (vbrsrq_x_n_u32): Likewise. |
| (veorq_x_s8): Likewise. |
| (veorq_x_s16): Likewise. |
| (veorq_x_s32): Likewise. |
| (veorq_x_u8): Likewise. |
| (veorq_x_u16): Likewise. |
| (veorq_x_u32): Likewise. |
| (vmovlbq_x_s8): Likewise. |
| (vmovlbq_x_s16): Likewise. |
| (vmovlbq_x_u8): Likewise. |
| (vmovlbq_x_u16): Likewise. |
| (vmovltq_x_s8): Likewise. |
| (vmovltq_x_s16): Likewise. |
| (vmovltq_x_u8): Likewise. |
| (vmovltq_x_u16): Likewise. |
| (vmvnq_x_s8): Likewise. |
| (vmvnq_x_s16): Likewise. |
| (vmvnq_x_s32): Likewise. |
| (vmvnq_x_u8): Likewise. |
| (vmvnq_x_u16): Likewise. |
| (vmvnq_x_u32): Likewise. |
| (vmvnq_x_n_s16): Likewise. |
| (vmvnq_x_n_s32): Likewise. |
| (vmvnq_x_n_u16): Likewise. |
| (vmvnq_x_n_u32): Likewise. |
| (vornq_x_s8): Likewise. |
| (vornq_x_s16): Likewise. |
| (vornq_x_s32): Likewise. |
| (vornq_x_u8): Likewise. |
| (vornq_x_u16): Likewise. |
| (vornq_x_u32): Likewise. |
| (vorrq_x_s8): Likewise. |
| (vorrq_x_s16): Likewise. |
| (vorrq_x_s32): Likewise. |
| (vorrq_x_u8): Likewise. |
| (vorrq_x_u16): Likewise. |
| (vorrq_x_u32): Likewise. |
| (vrev16q_x_s8): Likewise. |
| (vrev16q_x_u8): Likewise. |
| (vrev32q_x_s8): Likewise. |
| (vrev32q_x_s16): Likewise. |
| (vrev32q_x_u8): Likewise. |
| (vrev32q_x_u16): Likewise. |
| (vrev64q_x_s8): Likewise. |
| (vrev64q_x_s16): Likewise. |
| (vrev64q_x_s32): Likewise. |
| (vrev64q_x_u8): Likewise. |
| (vrev64q_x_u16): Likewise. |
| (vrev64q_x_u32): Likewise. |
| (vrshlq_x_s8): Likewise. |
| (vrshlq_x_s16): Likewise. |
| (vrshlq_x_s32): Likewise. |
| (vrshlq_x_u8): Likewise. |
| (vrshlq_x_u16): Likewise. |
| (vrshlq_x_u32): Likewise. |
| (vshllbq_x_n_s8): Likewise. |
| (vshllbq_x_n_s16): Likewise. |
| (vshllbq_x_n_u8): Likewise. |
| (vshllbq_x_n_u16): Likewise. |
| (vshlltq_x_n_s8): Likewise. |
| (vshlltq_x_n_s16): Likewise. |
| (vshlltq_x_n_u8): Likewise. |
| (vshlltq_x_n_u16): Likewise. |
| (vshlq_x_s8): Likewise. |
| (vshlq_x_s16): Likewise. |
| (vshlq_x_s32): Likewise. |
| (vshlq_x_u8): Likewise. |
| (vshlq_x_u16): Likewise. |
| (vshlq_x_u32): Likewise. |
| (vshlq_x_n_s8): Likewise. |
| (vshlq_x_n_s16): Likewise. |
| (vshlq_x_n_s32): Likewise. |
| (vshlq_x_n_u8): Likewise. |
| (vshlq_x_n_u16): Likewise. |
| (vshlq_x_n_u32): Likewise. |
| (vrshrq_x_n_s8): Likewise. |
| (vrshrq_x_n_s16): Likewise. |
| (vrshrq_x_n_s32): Likewise. |
| (vrshrq_x_n_u8): Likewise. |
| (vrshrq_x_n_u16): Likewise. |
| (vrshrq_x_n_u32): Likewise. |
| (vshrq_x_n_s8): Likewise. |
| (vshrq_x_n_s16): Likewise. |
| (vshrq_x_n_s32): Likewise. |
| (vshrq_x_n_u8): Likewise. |
| (vshrq_x_n_u16): Likewise. |
| (vshrq_x_n_u32): Likewise. |
| (vdupq_x_n_f16): Likewise. |
| (vdupq_x_n_f32): Likewise. |
| (vminnmq_x_f16): Likewise. |
| (vminnmq_x_f32): Likewise. |
| (vmaxnmq_x_f16): Likewise. |
| (vmaxnmq_x_f32): Likewise. |
| (vabdq_x_f16): Likewise. |
| (vabdq_x_f32): Likewise. |
| (vabsq_x_f16): Likewise. |
| (vabsq_x_f32): Likewise. |
| (vaddq_x_f16): Likewise. |
| (vaddq_x_f32): Likewise. |
| (vaddq_x_n_f16): Likewise. |
| (vaddq_x_n_f32): Likewise. |
| (vnegq_x_f16): Likewise. |
| (vnegq_x_f32): Likewise. |
| (vmulq_x_f16): Likewise. |
| (vmulq_x_f32): Likewise. |
| (vmulq_x_n_f16): Likewise. |
| (vmulq_x_n_f32): Likewise. |
| (vsubq_x_f16): Likewise. |
| (vsubq_x_f32): Likewise. |
| (vsubq_x_n_f16): Likewise. |
| (vsubq_x_n_f32): Likewise. |
| (vcaddq_rot90_x_f16): Likewise. |
| (vcaddq_rot90_x_f32): Likewise. |
| (vcaddq_rot270_x_f16): Likewise. |
| (vcaddq_rot270_x_f32): Likewise. |
| (vcmulq_x_f16): Likewise. |
| (vcmulq_x_f32): Likewise. |
| (vcmulq_rot90_x_f16): Likewise. |
| (vcmulq_rot90_x_f32): Likewise. |
| (vcmulq_rot180_x_f16): Likewise. |
| (vcmulq_rot180_x_f32): Likewise. |
| (vcmulq_rot270_x_f16): Likewise. |
| (vcmulq_rot270_x_f32): Likewise. |
| (vcvtaq_x_s16_f16): Likewise. |
| (vcvtaq_x_s32_f32): Likewise. |
| (vcvtaq_x_u16_f16): Likewise. |
| (vcvtaq_x_u32_f32): Likewise. |
| (vcvtnq_x_s16_f16): Likewise. |
| (vcvtnq_x_s32_f32): Likewise. |
| (vcvtnq_x_u16_f16): Likewise. |
| (vcvtnq_x_u32_f32): Likewise. |
| (vcvtpq_x_s16_f16): Likewise. |
| (vcvtpq_x_s32_f32): Likewise. |
| (vcvtpq_x_u16_f16): Likewise. |
| (vcvtpq_x_u32_f32): Likewise. |
| (vcvtmq_x_s16_f16): Likewise. |
| (vcvtmq_x_s32_f32): Likewise. |
| (vcvtmq_x_u16_f16): Likewise. |
| (vcvtmq_x_u32_f32): Likewise. |
| (vcvtbq_x_f32_f16): Likewise. |
| (vcvttq_x_f32_f16): Likewise. |
| (vcvtq_x_f16_u16): Likewise. |
| (vcvtq_x_f16_s16): Likewise. |
| (vcvtq_x_f32_s32): Likewise. |
| (vcvtq_x_f32_u32): Likewise. |
| (vcvtq_x_n_f16_s16): Likewise. |
| (vcvtq_x_n_f16_u16): Likewise. |
| (vcvtq_x_n_f32_s32): Likewise. |
| (vcvtq_x_n_f32_u32): Likewise. |
| (vcvtq_x_s16_f16): Likewise. |
| (vcvtq_x_s32_f32): Likewise. |
| (vcvtq_x_u16_f16): Likewise. |
| (vcvtq_x_u32_f32): Likewise. |
| (vcvtq_x_n_s16_f16): Likewise. |
| (vcvtq_x_n_s32_f32): Likewise. |
| (vcvtq_x_n_u16_f16): Likewise. |
| (vcvtq_x_n_u32_f32): Likewise. |
| (vrndq_x_f16): Likewise. |
| (vrndq_x_f32): Likewise. |
| (vrndnq_x_f16): Likewise. |
| (vrndnq_x_f32): Likewise. |
| (vrndmq_x_f16): Likewise. |
| (vrndmq_x_f32): Likewise. |
| (vrndpq_x_f16): Likewise. |
| (vrndpq_x_f32): Likewise. |
| (vrndaq_x_f16): Likewise. |
| (vrndaq_x_f32): Likewise. |
| (vrndxq_x_f16): Likewise. |
| (vrndxq_x_f32): Likewise. |
| (vandq_x_f16): Likewise. |
| (vandq_x_f32): Likewise. |
| (vbicq_x_f16): Likewise. |
| (vbicq_x_f32): Likewise. |
| (vbrsrq_x_n_f16): Likewise. |
| (vbrsrq_x_n_f32): Likewise. |
| (veorq_x_f16): Likewise. |
| (veorq_x_f32): Likewise. |
| (vornq_x_f16): Likewise. |
| (vornq_x_f32): Likewise. |
| (vorrq_x_f16): Likewise. |
| (vorrq_x_f32): Likewise. |
| (vrev32q_x_f16): Likewise. |
| (vrev64q_x_f16): Likewise. |
| (vrev64q_x_f32): Likewise. |
| (__arm_vddupq_x_n_u8): Define intrinsic. |
| (__arm_vddupq_x_n_u16): Likewise. |
| (__arm_vddupq_x_n_u32): Likewise. |
| (__arm_vddupq_x_wb_u8): Likewise. |
| (__arm_vddupq_x_wb_u16): Likewise. |
| (__arm_vddupq_x_wb_u32): Likewise. |
| (__arm_vdwdupq_x_n_u8): Likewise. |
| (__arm_vdwdupq_x_n_u16): Likewise. |
| (__arm_vdwdupq_x_n_u32): Likewise. |
| (__arm_vdwdupq_x_wb_u8): Likewise. |
| (__arm_vdwdupq_x_wb_u16): Likewise. |
| (__arm_vdwdupq_x_wb_u32): Likewise. |
| (__arm_vidupq_x_n_u8): Likewise. |
| (__arm_vidupq_x_n_u16): Likewise. |
| (__arm_vidupq_x_n_u32): Likewise. |
| (__arm_vidupq_x_wb_u8): Likewise. |
| (__arm_vidupq_x_wb_u16): Likewise. |
| (__arm_vidupq_x_wb_u32): Likewise. |
| (__arm_viwdupq_x_n_u8): Likewise. |
| (__arm_viwdupq_x_n_u16): Likewise. |
| (__arm_viwdupq_x_n_u32): Likewise. |
| (__arm_viwdupq_x_wb_u8): Likewise. |
| (__arm_viwdupq_x_wb_u16): Likewise. |
| (__arm_viwdupq_x_wb_u32): Likewise. |
| (__arm_vdupq_x_n_s8): Likewise. |
| (__arm_vdupq_x_n_s16): Likewise. |
| (__arm_vdupq_x_n_s32): Likewise. |
| (__arm_vdupq_x_n_u8): Likewise. |
| (__arm_vdupq_x_n_u16): Likewise. |
| (__arm_vdupq_x_n_u32): Likewise. |
| (__arm_vminq_x_s8): Likewise. |
| (__arm_vminq_x_s16): Likewise. |
| (__arm_vminq_x_s32): Likewise. |
| (__arm_vminq_x_u8): Likewise. |
| (__arm_vminq_x_u16): Likewise. |
| (__arm_vminq_x_u32): Likewise. |
| (__arm_vmaxq_x_s8): Likewise. |
| (__arm_vmaxq_x_s16): Likewise. |
| (__arm_vmaxq_x_s32): Likewise. |
| (__arm_vmaxq_x_u8): Likewise. |
| (__arm_vmaxq_x_u16): Likewise. |
| (__arm_vmaxq_x_u32): Likewise. |
| (__arm_vabdq_x_s8): Likewise. |
| (__arm_vabdq_x_s16): Likewise. |
| (__arm_vabdq_x_s32): Likewise. |
| (__arm_vabdq_x_u8): Likewise. |
| (__arm_vabdq_x_u16): Likewise. |
| (__arm_vabdq_x_u32): Likewise. |
| (__arm_vabsq_x_s8): Likewise. |
| (__arm_vabsq_x_s16): Likewise. |
| (__arm_vabsq_x_s32): Likewise. |
| (__arm_vaddq_x_s8): Likewise. |
| (__arm_vaddq_x_s16): Likewise. |
| (__arm_vaddq_x_s32): Likewise. |
| (__arm_vaddq_x_n_s8): Likewise. |
| (__arm_vaddq_x_n_s16): Likewise. |
| (__arm_vaddq_x_n_s32): Likewise. |
| (__arm_vaddq_x_u8): Likewise. |
| (__arm_vaddq_x_u16): Likewise. |
| (__arm_vaddq_x_u32): Likewise. |
| (__arm_vaddq_x_n_u8): Likewise. |
| (__arm_vaddq_x_n_u16): Likewise. |
| (__arm_vaddq_x_n_u32): Likewise. |
| (__arm_vclsq_x_s8): Likewise. |
| (__arm_vclsq_x_s16): Likewise. |
| (__arm_vclsq_x_s32): Likewise. |
| (__arm_vclzq_x_s8): Likewise. |
| (__arm_vclzq_x_s16): Likewise. |
| (__arm_vclzq_x_s32): Likewise. |
| (__arm_vclzq_x_u8): Likewise. |
| (__arm_vclzq_x_u16): Likewise. |
| (__arm_vclzq_x_u32): Likewise. |
| (__arm_vnegq_x_s8): Likewise. |
| (__arm_vnegq_x_s16): Likewise. |
| (__arm_vnegq_x_s32): Likewise. |
| (__arm_vmulhq_x_s8): Likewise. |
| (__arm_vmulhq_x_s16): Likewise. |
| (__arm_vmulhq_x_s32): Likewise. |
| (__arm_vmulhq_x_u8): Likewise. |
| (__arm_vmulhq_x_u16): Likewise. |
| (__arm_vmulhq_x_u32): Likewise. |
| (__arm_vmullbq_poly_x_p8): Likewise. |
| (__arm_vmullbq_poly_x_p16): Likewise. |
| (__arm_vmullbq_int_x_s8): Likewise. |
| (__arm_vmullbq_int_x_s16): Likewise. |
| (__arm_vmullbq_int_x_s32): Likewise. |
| (__arm_vmullbq_int_x_u8): Likewise. |
| (__arm_vmullbq_int_x_u16): Likewise. |
| (__arm_vmullbq_int_x_u32): Likewise. |
| (__arm_vmulltq_poly_x_p8): Likewise. |
| (__arm_vmulltq_poly_x_p16): Likewise. |
| (__arm_vmulltq_int_x_s8): Likewise. |
| (__arm_vmulltq_int_x_s16): Likewise. |
| (__arm_vmulltq_int_x_s32): Likewise. |
| (__arm_vmulltq_int_x_u8): Likewise. |
| (__arm_vmulltq_int_x_u16): Likewise. |
| (__arm_vmulltq_int_x_u32): Likewise. |
| (__arm_vmulq_x_s8): Likewise. |
| (__arm_vmulq_x_s16): Likewise. |
| (__arm_vmulq_x_s32): Likewise. |
| (__arm_vmulq_x_n_s8): Likewise. |
| (__arm_vmulq_x_n_s16): Likewise. |
| (__arm_vmulq_x_n_s32): Likewise. |
| (__arm_vmulq_x_u8): Likewise. |
| (__arm_vmulq_x_u16): Likewise. |
| (__arm_vmulq_x_u32): Likewise. |
| (__arm_vmulq_x_n_u8): Likewise. |
| (__arm_vmulq_x_n_u16): Likewise. |
| (__arm_vmulq_x_n_u32): Likewise. |
| (__arm_vsubq_x_s8): Likewise. |
| (__arm_vsubq_x_s16): Likewise. |
| (__arm_vsubq_x_s32): Likewise. |
| (__arm_vsubq_x_n_s8): Likewise. |
| (__arm_vsubq_x_n_s16): Likewise. |
| (__arm_vsubq_x_n_s32): Likewise. |
| (__arm_vsubq_x_u8): Likewise. |
| (__arm_vsubq_x_u16): Likewise. |
| (__arm_vsubq_x_u32): Likewise. |
| (__arm_vsubq_x_n_u8): Likewise. |
| (__arm_vsubq_x_n_u16): Likewise. |
| (__arm_vsubq_x_n_u32): Likewise. |
| (__arm_vcaddq_rot90_x_s8): Likewise. |
| (__arm_vcaddq_rot90_x_s16): Likewise. |
| (__arm_vcaddq_rot90_x_s32): Likewise. |
| (__arm_vcaddq_rot90_x_u8): Likewise. |
| (__arm_vcaddq_rot90_x_u16): Likewise. |
| (__arm_vcaddq_rot90_x_u32): Likewise. |
| (__arm_vcaddq_rot270_x_s8): Likewise. |
| (__arm_vcaddq_rot270_x_s16): Likewise. |
| (__arm_vcaddq_rot270_x_s32): Likewise. |
| (__arm_vcaddq_rot270_x_u8): Likewise. |
| (__arm_vcaddq_rot270_x_u16): Likewise. |
| (__arm_vcaddq_rot270_x_u32): Likewise. |
| (__arm_vhaddq_x_n_s8): Likewise. |
| (__arm_vhaddq_x_n_s16): Likewise. |
| (__arm_vhaddq_x_n_s32): Likewise. |
| (__arm_vhaddq_x_n_u8): Likewise. |
| (__arm_vhaddq_x_n_u16): Likewise. |
| (__arm_vhaddq_x_n_u32): Likewise. |
| (__arm_vhaddq_x_s8): Likewise. |
| (__arm_vhaddq_x_s16): Likewise. |
| (__arm_vhaddq_x_s32): Likewise. |
| (__arm_vhaddq_x_u8): Likewise. |
| (__arm_vhaddq_x_u16): Likewise. |
| (__arm_vhaddq_x_u32): Likewise. |
| (__arm_vhcaddq_rot90_x_s8): Likewise. |
| (__arm_vhcaddq_rot90_x_s16): Likewise. |
| (__arm_vhcaddq_rot90_x_s32): Likewise. |
| (__arm_vhcaddq_rot270_x_s8): Likewise. |
| (__arm_vhcaddq_rot270_x_s16): Likewise. |
| (__arm_vhcaddq_rot270_x_s32): Likewise. |
| (__arm_vhsubq_x_n_s8): Likewise. |
| (__arm_vhsubq_x_n_s16): Likewise. |
| (__arm_vhsubq_x_n_s32): Likewise. |
| (__arm_vhsubq_x_n_u8): Likewise. |
| (__arm_vhsubq_x_n_u16): Likewise. |
| (__arm_vhsubq_x_n_u32): Likewise. |
| (__arm_vhsubq_x_s8): Likewise. |
| (__arm_vhsubq_x_s16): Likewise. |
| (__arm_vhsubq_x_s32): Likewise. |
| (__arm_vhsubq_x_u8): Likewise. |
| (__arm_vhsubq_x_u16): Likewise. |
| (__arm_vhsubq_x_u32): Likewise. |
| (__arm_vrhaddq_x_s8): Likewise. |
| (__arm_vrhaddq_x_s16): Likewise. |
| (__arm_vrhaddq_x_s32): Likewise. |
| (__arm_vrhaddq_x_u8): Likewise. |
| (__arm_vrhaddq_x_u16): Likewise. |
| (__arm_vrhaddq_x_u32): Likewise. |
| (__arm_vrmulhq_x_s8): Likewise. |
| (__arm_vrmulhq_x_s16): Likewise. |
| (__arm_vrmulhq_x_s32): Likewise. |
| (__arm_vrmulhq_x_u8): Likewise. |
| (__arm_vrmulhq_x_u16): Likewise. |
| (__arm_vrmulhq_x_u32): Likewise. |
| (__arm_vandq_x_s8): Likewise. |
| (__arm_vandq_x_s16): Likewise. |
| (__arm_vandq_x_s32): Likewise. |
| (__arm_vandq_x_u8): Likewise. |
| (__arm_vandq_x_u16): Likewise. |
| (__arm_vandq_x_u32): Likewise. |
| (__arm_vbicq_x_s8): Likewise. |
| (__arm_vbicq_x_s16): Likewise. |
| (__arm_vbicq_x_s32): Likewise. |
| (__arm_vbicq_x_u8): Likewise. |
| (__arm_vbicq_x_u16): Likewise. |
| (__arm_vbicq_x_u32): Likewise. |
| (__arm_vbrsrq_x_n_s8): Likewise. |
| (__arm_vbrsrq_x_n_s16): Likewise. |
| (__arm_vbrsrq_x_n_s32): Likewise. |
| (__arm_vbrsrq_x_n_u8): Likewise. |
| (__arm_vbrsrq_x_n_u16): Likewise. |
| (__arm_vbrsrq_x_n_u32): Likewise. |
| (__arm_veorq_x_s8): Likewise. |
| (__arm_veorq_x_s16): Likewise. |
| (__arm_veorq_x_s32): Likewise. |
| (__arm_veorq_x_u8): Likewise. |
| (__arm_veorq_x_u16): Likewise. |
| (__arm_veorq_x_u32): Likewise. |
| (__arm_vmovlbq_x_s8): Likewise. |
| (__arm_vmovlbq_x_s16): Likewise. |
| (__arm_vmovlbq_x_u8): Likewise. |
| (__arm_vmovlbq_x_u16): Likewise. |
| (__arm_vmovltq_x_s8): Likewise. |
| (__arm_vmovltq_x_s16): Likewise. |
| (__arm_vmovltq_x_u8): Likewise. |
| (__arm_vmovltq_x_u16): Likewise. |
| (__arm_vmvnq_x_s8): Likewise. |
| (__arm_vmvnq_x_s16): Likewise. |
| (__arm_vmvnq_x_s32): Likewise. |
| (__arm_vmvnq_x_u8): Likewise. |
| (__arm_vmvnq_x_u16): Likewise. |
| (__arm_vmvnq_x_u32): Likewise. |
| (__arm_vmvnq_x_n_s16): Likewise. |
| (__arm_vmvnq_x_n_s32): Likewise. |
| (__arm_vmvnq_x_n_u16): Likewise. |
| (__arm_vmvnq_x_n_u32): Likewise. |
| (__arm_vornq_x_s8): Likewise. |
| (__arm_vornq_x_s16): Likewise. |
| (__arm_vornq_x_s32): Likewise. |
| (__arm_vornq_x_u8): Likewise. |
| (__arm_vornq_x_u16): Likewise. |
| (__arm_vornq_x_u32): Likewise. |
| (__arm_vorrq_x_s8): Likewise. |
| (__arm_vorrq_x_s16): Likewise. |
| (__arm_vorrq_x_s32): Likewise. |
| (__arm_vorrq_x_u8): Likewise. |
| (__arm_vorrq_x_u16): Likewise. |
| (__arm_vorrq_x_u32): Likewise. |
| (__arm_vrev16q_x_s8): Likewise. |
| (__arm_vrev16q_x_u8): Likewise. |
| (__arm_vrev32q_x_s8): Likewise. |
| (__arm_vrev32q_x_s16): Likewise. |
| (__arm_vrev32q_x_u8): Likewise. |
| (__arm_vrev32q_x_u16): Likewise. |
| (__arm_vrev64q_x_s8): Likewise. |
| (__arm_vrev64q_x_s16): Likewise. |
| (__arm_vrev64q_x_s32): Likewise. |
| (__arm_vrev64q_x_u8): Likewise. |
| (__arm_vrev64q_x_u16): Likewise. |
| (__arm_vrev64q_x_u32): Likewise. |
| (__arm_vrshlq_x_s8): Likewise. |
| (__arm_vrshlq_x_s16): Likewise. |
| (__arm_vrshlq_x_s32): Likewise. |
| (__arm_vrshlq_x_u8): Likewise. |
| (__arm_vrshlq_x_u16): Likewise. |
| (__arm_vrshlq_x_u32): Likewise. |
| (__arm_vshllbq_x_n_s8): Likewise. |
| (__arm_vshllbq_x_n_s16): Likewise. |
| (__arm_vshllbq_x_n_u8): Likewise. |
| (__arm_vshllbq_x_n_u16): Likewise. |
| (__arm_vshlltq_x_n_s8): Likewise. |
| (__arm_vshlltq_x_n_s16): Likewise. |
| (__arm_vshlltq_x_n_u8): Likewise. |
| (__arm_vshlltq_x_n_u16): Likewise. |
| (__arm_vshlq_x_s8): Likewise. |
| (__arm_vshlq_x_s16): Likewise. |
| (__arm_vshlq_x_s32): Likewise. |
| (__arm_vshlq_x_u8): Likewise. |
| (__arm_vshlq_x_u16): Likewise. |
| (__arm_vshlq_x_u32): Likewise. |
| (__arm_vshlq_x_n_s8): Likewise. |
| (__arm_vshlq_x_n_s16): Likewise. |
| (__arm_vshlq_x_n_s32): Likewise. |
| (__arm_vshlq_x_n_u8): Likewise. |
| (__arm_vshlq_x_n_u16): Likewise. |
| (__arm_vshlq_x_n_u32): Likewise. |
| (__arm_vrshrq_x_n_s8): Likewise. |
| (__arm_vrshrq_x_n_s16): Likewise. |
| (__arm_vrshrq_x_n_s32): Likewise. |
| (__arm_vrshrq_x_n_u8): Likewise. |
| (__arm_vrshrq_x_n_u16): Likewise. |
| (__arm_vrshrq_x_n_u32): Likewise. |
| (__arm_vshrq_x_n_s8): Likewise. |
| (__arm_vshrq_x_n_s16): Likewise. |
| (__arm_vshrq_x_n_s32): Likewise. |
| (__arm_vshrq_x_n_u8): Likewise. |
| (__arm_vshrq_x_n_u16): Likewise. |
| (__arm_vshrq_x_n_u32): Likewise. |
| (__arm_vdupq_x_n_f16): Likewise. |
| (__arm_vdupq_x_n_f32): Likewise. |
| (__arm_vminnmq_x_f16): Likewise. |
| (__arm_vminnmq_x_f32): Likewise. |
| (__arm_vmaxnmq_x_f16): Likewise. |
| (__arm_vmaxnmq_x_f32): Likewise. |
| (__arm_vabdq_x_f16): Likewise. |
| (__arm_vabdq_x_f32): Likewise. |
| (__arm_vabsq_x_f16): Likewise. |
| (__arm_vabsq_x_f32): Likewise. |
| (__arm_vaddq_x_f16): Likewise. |
| (__arm_vaddq_x_f32): Likewise. |
| (__arm_vaddq_x_n_f16): Likewise. |
| (__arm_vaddq_x_n_f32): Likewise. |
| (__arm_vnegq_x_f16): Likewise. |
| (__arm_vnegq_x_f32): Likewise. |
| (__arm_vmulq_x_f16): Likewise. |
| (__arm_vmulq_x_f32): Likewise. |
| (__arm_vmulq_x_n_f16): Likewise. |
| (__arm_vmulq_x_n_f32): Likewise. |
| (__arm_vsubq_x_f16): Likewise. |
| (__arm_vsubq_x_f32): Likewise. |
| (__arm_vsubq_x_n_f16): Likewise. |
| (__arm_vsubq_x_n_f32): Likewise. |
| (__arm_vcaddq_rot90_x_f16): Likewise. |
| (__arm_vcaddq_rot90_x_f32): Likewise. |
| (__arm_vcaddq_rot270_x_f16): Likewise. |
| (__arm_vcaddq_rot270_x_f32): Likewise. |
| (__arm_vcmulq_x_f16): Likewise. |
| (__arm_vcmulq_x_f32): Likewise. |
| (__arm_vcmulq_rot90_x_f16): Likewise. |
| (__arm_vcmulq_rot90_x_f32): Likewise. |
| (__arm_vcmulq_rot180_x_f16): Likewise. |
| (__arm_vcmulq_rot180_x_f32): Likewise. |
| (__arm_vcmulq_rot270_x_f16): Likewise. |
| (__arm_vcmulq_rot270_x_f32): Likewise. |
| (__arm_vcvtaq_x_s16_f16): Likewise. |
| (__arm_vcvtaq_x_s32_f32): Likewise. |
| (__arm_vcvtaq_x_u16_f16): Likewise. |
| (__arm_vcvtaq_x_u32_f32): Likewise. |
| (__arm_vcvtnq_x_s16_f16): Likewise. |
| (__arm_vcvtnq_x_s32_f32): Likewise. |
| (__arm_vcvtnq_x_u16_f16): Likewise. |
| (__arm_vcvtnq_x_u32_f32): Likewise. |
| (__arm_vcvtpq_x_s16_f16): Likewise. |
| (__arm_vcvtpq_x_s32_f32): Likewise. |
| (__arm_vcvtpq_x_u16_f16): Likewise. |
| (__arm_vcvtpq_x_u32_f32): Likewise. |
| (__arm_vcvtmq_x_s16_f16): Likewise. |
| (__arm_vcvtmq_x_s32_f32): Likewise. |
| (__arm_vcvtmq_x_u16_f16): Likewise. |
| (__arm_vcvtmq_x_u32_f32): Likewise. |
| (__arm_vcvtbq_x_f32_f16): Likewise. |
| (__arm_vcvttq_x_f32_f16): Likewise. |
| (__arm_vcvtq_x_f16_u16): Likewise. |
| (__arm_vcvtq_x_f16_s16): Likewise. |
| (__arm_vcvtq_x_f32_s32): Likewise. |
| (__arm_vcvtq_x_f32_u32): Likewise. |
| (__arm_vcvtq_x_n_f16_s16): Likewise. |
| (__arm_vcvtq_x_n_f16_u16): Likewise. |
| (__arm_vcvtq_x_n_f32_s32): Likewise. |
| (__arm_vcvtq_x_n_f32_u32): Likewise. |
| (__arm_vcvtq_x_s16_f16): Likewise. |
| (__arm_vcvtq_x_s32_f32): Likewise. |
| (__arm_vcvtq_x_u16_f16): Likewise. |
| (__arm_vcvtq_x_u32_f32): Likewise. |
| (__arm_vcvtq_x_n_s16_f16): Likewise. |
| (__arm_vcvtq_x_n_s32_f32): Likewise. |
| (__arm_vcvtq_x_n_u16_f16): Likewise. |
| (__arm_vcvtq_x_n_u32_f32): Likewise. |
| (__arm_vrndq_x_f16): Likewise. |
| (__arm_vrndq_x_f32): Likewise. |
| (__arm_vrndnq_x_f16): Likewise. |
| (__arm_vrndnq_x_f32): Likewise. |
| (__arm_vrndmq_x_f16): Likewise. |
| (__arm_vrndmq_x_f32): Likewise. |
| (__arm_vrndpq_x_f16): Likewise. |
| (__arm_vrndpq_x_f32): Likewise. |
| (__arm_vrndaq_x_f16): Likewise. |
| (__arm_vrndaq_x_f32): Likewise. |
| (__arm_vrndxq_x_f16): Likewise. |
| (__arm_vrndxq_x_f32): Likewise. |
| (__arm_vandq_x_f16): Likewise. |
| (__arm_vandq_x_f32): Likewise. |
| (__arm_vbicq_x_f16): Likewise. |
| (__arm_vbicq_x_f32): Likewise. |
| (__arm_vbrsrq_x_n_f16): Likewise. |
| (__arm_vbrsrq_x_n_f32): Likewise. |
| (__arm_veorq_x_f16): Likewise. |
| (__arm_veorq_x_f32): Likewise. |
| (__arm_vornq_x_f16): Likewise. |
| (__arm_vornq_x_f32): Likewise. |
| (__arm_vorrq_x_f16): Likewise. |
| (__arm_vorrq_x_f32): Likewise. |
| (__arm_vrev32q_x_f16): Likewise. |
| (__arm_vrev64q_x_f16): Likewise. |
| (__arm_vrev64q_x_f32): Likewise. |
| (vabdq_x): Define polymorphic variant. |
| (vabsq_x): Likewise. |
| (vaddq_x): Likewise. |
| (vandq_x): Likewise. |
| (vbicq_x): Likewise. |
| (vbrsrq_x): Likewise. |
| (vcaddq_rot270_x): Likewise. |
| (vcaddq_rot90_x): Likewise. |
| (vcmulq_rot180_x): Likewise. |
| (vcmulq_rot270_x): Likewise. |
| (vcmulq_x): Likewise. |
| (vcvtq_x): Likewise. |
| (vcvtq_x_n): Likewise. |
| (vcvtnq_m): Likewise. |
| (veorq_x): Likewise. |
| (vmaxnmq_x): Likewise. |
| (vminnmq_x): Likewise. |
| (vmulq_x): Likewise. |
| (vnegq_x): Likewise. |
| (vornq_x): Likewise. |
| (vorrq_x): Likewise. |
| (vrev32q_x): Likewise. |
| (vrev64q_x): Likewise. |
| (vrndaq_x): Likewise. |
| (vrndmq_x): Likewise. |
| (vrndnq_x): Likewise. |
| (vrndpq_x): Likewise. |
| (vrndq_x): Likewise. |
| (vrndxq_x): Likewise. |
| (vsubq_x): Likewise. |
| (vcmulq_rot90_x): Likewise. |
| (vadciq): Likewise. |
| (vclsq_x): Likewise. |
| (vclzq_x): Likewise. |
| (vhaddq_x): Likewise. |
| (vhcaddq_rot270_x): Likewise. |
| (vhcaddq_rot90_x): Likewise. |
| (vhsubq_x): Likewise. |
| (vmaxq_x): Likewise. |
| (vminq_x): Likewise. |
| (vmovlbq_x): Likewise. |
| (vmovltq_x): Likewise. |
| (vmulhq_x): Likewise. |
| (vmullbq_int_x): Likewise. |
| (vmullbq_poly_x): Likewise. |
| (vmulltq_int_x): Likewise. |
| (vmulltq_poly_x): Likewise. |
| (vmvnq_x): Likewise. |
| (vrev16q_x): Likewise. |
| (vrhaddq_x): Likewise. |
| (vrmulhq_x): Likewise. |
| (vrshlq_x): Likewise. |
| (vrshrq_x): Likewise. |
| (vshllbq_x): Likewise. |
| (vshlltq_x): Likewise. |
| (vshlq_x_n): Likewise. |
| (vshlq_x): Likewise. |
| (vdwdupq_x_u8): Likewise. |
| (vdwdupq_x_u16): Likewise. |
| (vdwdupq_x_u32): Likewise. |
| (viwdupq_x_u8): Likewise. |
| (viwdupq_x_u16): Likewise. |
| (viwdupq_x_u32): Likewise. |
| (vidupq_x_u8): Likewise. |
| (vddupq_x_u8): Likewise. |
| (vidupq_x_u16): Likewise. |
| (vddupq_x_u16): Likewise. |
| (vidupq_x_u32): Likewise. |
| (vddupq_x_u32): Likewise. |
| (vshrq_x): Likewise. |
| |
| 2020-03-20 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts |
| to vectorize for CTOR defs. |
| |
| 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin |
| qualifier. |
| (LDRGBWBU_QUALIFIERS): Likewise. |
| (LDRGBWBS_Z_QUALIFIERS): Likewise. |
| (LDRGBWBU_Z_QUALIFIERS): Likewise. |
| (STRSBWBS_QUALIFIERS): Likewise. |
| (STRSBWBU_QUALIFIERS): Likewise. |
| (STRSBWBS_P_QUALIFIERS): Likewise. |
| (STRSBWBU_P_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro. |
| (vldrdq_gather_base_wb_u64): Likewise. |
| (vldrdq_gather_base_wb_z_s64): Likewise. |
| (vldrdq_gather_base_wb_z_u64): Likewise. |
| (vldrwq_gather_base_wb_f32): Likewise. |
| (vldrwq_gather_base_wb_s32): Likewise. |
| (vldrwq_gather_base_wb_u32): Likewise. |
| (vldrwq_gather_base_wb_z_f32): Likewise. |
| (vldrwq_gather_base_wb_z_s32): Likewise. |
| (vldrwq_gather_base_wb_z_u32): Likewise. |
| (vstrdq_scatter_base_wb_p_s64): Likewise. |
| (vstrdq_scatter_base_wb_p_u64): Likewise. |
| (vstrdq_scatter_base_wb_s64): Likewise. |
| (vstrdq_scatter_base_wb_u64): Likewise. |
| (vstrwq_scatter_base_wb_p_s32): Likewise. |
| (vstrwq_scatter_base_wb_p_f32): Likewise. |
| (vstrwq_scatter_base_wb_p_u32): Likewise. |
| (vstrwq_scatter_base_wb_s32): Likewise. |
| (vstrwq_scatter_base_wb_u32): Likewise. |
| (vstrwq_scatter_base_wb_f32): Likewise. |
| (__arm_vldrdq_gather_base_wb_s64): Define intrinsic. |
| (__arm_vldrdq_gather_base_wb_u64): Likewise. |
| (__arm_vldrdq_gather_base_wb_z_s64): Likewise. |
| (__arm_vldrdq_gather_base_wb_z_u64): Likewise. |
| (__arm_vldrwq_gather_base_wb_s32): Likewise. |
| (__arm_vldrwq_gather_base_wb_u32): Likewise. |
| (__arm_vldrwq_gather_base_wb_z_s32): Likewise. |
| (__arm_vldrwq_gather_base_wb_z_u32): Likewise. |
| (__arm_vstrdq_scatter_base_wb_s64): Likewise. |
| (__arm_vstrdq_scatter_base_wb_u64): Likewise. |
| (__arm_vstrdq_scatter_base_wb_p_s64): Likewise. |
| (__arm_vstrdq_scatter_base_wb_p_u64): Likewise. |
| (__arm_vstrwq_scatter_base_wb_p_s32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_p_u32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_s32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_u32): Likewise. |
| (__arm_vldrwq_gather_base_wb_f32): Likewise. |
| (__arm_vldrwq_gather_base_wb_z_f32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_f32): Likewise. |
| (__arm_vstrwq_scatter_base_wb_p_f32): Likewise. |
| (vstrwq_scatter_base_wb): Define polymorphic variant. |
| (vstrwq_scatter_base_wb_p): Likewise. |
| (vstrdq_scatter_base_wb_p): Likewise. |
| (vstrdq_scatter_base_wb): Likewise. |
| * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin |
| qualifier. |
| * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL |
| pattern. |
| (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise. |
| (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise. |
| (mve_vstrwq_scatter_base_wb_fv4sf): Likewise. |
| (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise. |
| (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise. |
| (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise. |
| (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise. |
| (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise. |
| (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise. |
| (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise. |
| (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise. |
| (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise. |
| (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise. |
| (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise. |
| (mve_vldrwq_gather_base_wb_fv4sf): Likewise. |
| (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise. |
| (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise. |
| (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise. |
| (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise. |
| (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise. |
| (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise. |
| (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise. |
| |
| 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm-builtins.c |
| (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary |
| builtin qualifier. |
| * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro. |
| (vddupq_m_n_u32): Likewise. |
| (vddupq_m_n_u16): Likewise. |
| (vddupq_m_wb_u8): Likewise. |
| (vddupq_m_wb_u16): Likewise. |
| (vddupq_m_wb_u32): Likewise. |
| (vddupq_n_u8): Likewise. |
| (vddupq_n_u32): Likewise. |
| (vddupq_n_u16): Likewise. |
| (vddupq_wb_u8): Likewise. |
| (vddupq_wb_u16): Likewise. |
| (vddupq_wb_u32): Likewise. |
| (vdwdupq_m_n_u8): Likewise. |
| (vdwdupq_m_n_u32): Likewise. |
| (vdwdupq_m_n_u16): Likewise. |
| (vdwdupq_m_wb_u8): Likewise. |
| (vdwdupq_m_wb_u32): Likewise. |
| (vdwdupq_m_wb_u16): Likewise. |
| (vdwdupq_n_u8): Likewise. |
| (vdwdupq_n_u32): Likewise. |
| (vdwdupq_n_u16): Likewise. |
| (vdwdupq_wb_u8): Likewise. |
| (vdwdupq_wb_u32): Likewise. |
| (vdwdupq_wb_u16): Likewise. |
| (vidupq_m_n_u8): Likewise. |
| (vidupq_m_n_u32): Likewise. |
| (vidupq_m_n_u16): Likewise. |
| (vidupq_m_wb_u8): Likewise. |
| (vidupq_m_wb_u16): Likewise. |
| (vidupq_m_wb_u32): Likewise. |
| (vidupq_n_u8): Likewise. |
| (vidupq_n_u32): Likewise. |
| (vidupq_n_u16): Likewise. |
| (vidupq_wb_u8): Likewise. |
| (vidupq_wb_u16): Likewise. |
| (vidupq_wb_u32): Likewise. |
| (viwdupq_m_n_u8): Likewise. |
| (viwdupq_m_n_u32): Likewise. |
| (viwdupq_m_n_u16): Likewise. |
| (viwdupq_m_wb_u8): Likewise. |
| (viwdupq_m_wb_u32): Likewise. |
| (viwdupq_m_wb_u16): Likewise. |
| (viwdupq_n_u8): Likewise. |
| (viwdupq_n_u32): Likewise. |
| (viwdupq_n_u16): Likewise. |
| (viwdupq_wb_u8): Likewise. |
| (viwdupq_wb_u32): Likewise. |
| (viwdupq_wb_u16): Likewise. |
| (__arm_vddupq_m_n_u8): Define intrinsic. |
| (__arm_vddupq_m_n_u32): Likewise. |
| (__arm_vddupq_m_n_u16): Likewise. |
| (__arm_vddupq_m_wb_u8): Likewise. |
| (__arm_vddupq_m_wb_u16): Likewise. |
| (__arm_vddupq_m_wb_u32): Likewise. |
| (__arm_vddupq_n_u8): Likewise. |
| (__arm_vddupq_n_u32): Likewise. |
| (__arm_vddupq_n_u16): Likewise. |
| (__arm_vdwdupq_m_n_u8): Likewise. |
| (__arm_vdwdupq_m_n_u32): Likewise. |
| (__arm_vdwdupq_m_n_u16): Likewise. |
| (__arm_vdwdupq_m_wb_u8): Likewise. |
| (__arm_vdwdupq_m_wb_u32): Likewise. |
| (__arm_vdwdupq_m_wb_u16): Likewise. |
| (__arm_vdwdupq_n_u8): Likewise. |
| (__arm_vdwdupq_n_u32): Likewise. |
| (__arm_vdwdupq_n_u16): Likewise. |
| (__arm_vdwdupq_wb_u8): Likewise. |
| (__arm_vdwdupq_wb_u32): Likewise. |
| (__arm_vdwdupq_wb_u16): Likewise. |
| (__arm_vidupq_m_n_u8): Likewise. |
| (__arm_vidupq_m_n_u32): Likewise. |
| (__arm_vidupq_m_n_u16): Likewise. |
| (__arm_vidupq_n_u8): Likewise. |
| (__arm_vidupq_m_wb_u8): Likewise. |
| (__arm_vidupq_m_wb_u16): Likewise. |
| (__arm_vidupq_m_wb_u32): Likewise. |
| (__arm_vidupq_n_u32): Likewise. |
| (__arm_vidupq_n_u16): Likewise. |
| (__arm_vidupq_wb_u8): Likewise. |
| (__arm_vidupq_wb_u16): Likewise. |
| (__arm_vidupq_wb_u32): Likewise. |
| (__arm_vddupq_wb_u8): Likewise. |
| (__arm_vddupq_wb_u16): Likewise. |
| (__arm_vddupq_wb_u32): Likewise. |
| (__arm_viwdupq_m_n_u8): Likewise. |
| (__arm_viwdupq_m_n_u32): Likewise. |
| (__arm_viwdupq_m_n_u16): Likewise. |
| (__arm_viwdupq_m_wb_u8): Likewise. |
| (__arm_viwdupq_m_wb_u32): Likewise. |
| (__arm_viwdupq_m_wb_u16): Likewise. |
| (__arm_viwdupq_n_u8): Likewise. |
| (__arm_viwdupq_n_u32): Likewise. |
| (__arm_viwdupq_n_u16): Likewise. |
| (__arm_viwdupq_wb_u8): Likewise. |
| (__arm_viwdupq_wb_u32): Likewise. |
| (__arm_viwdupq_wb_u16): Likewise. |
| (vidupq_m): Define polymorphic variant. |
| (vddupq_m): Likewise. |
| (vidupq_u16): Likewise. |
| (vidupq_u32): Likewise. |
| (vidupq_u8): Likewise. |
| (vddupq_u16): Likewise. |
| (vddupq_u32): Likewise. |
| (vddupq_u8): Likewise. |
| (viwdupq_m): Likewise. |
| (viwdupq_u16): Likewise. |
| (viwdupq_u32): Likewise. |
| (viwdupq_u8): Likewise. |
| (vdwdupq_m): Likewise. |
| (vdwdupq_u16): Likewise. |
| (vdwdupq_u32): Likewise. |
| (vdwdupq_u8): Likewise. |
| * config/arm/arm_mve_builtins.def |
| (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin |
| qualifier. |
| * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern. |
| (mve_vidupq_u<mode>_insn): Likewise. |
| (mve_vidupq_m_n_u<mode>): Likewise. |
| (mve_vidupq_m_wb_u<mode>_insn): Likewise. |
| (mve_vddupq_n_u<mode>): Likewise. |
| (mve_vddupq_u<mode>_insn): Likewise. |
| (mve_vddupq_m_n_u<mode>): Likewise. |
| (mve_vddupq_m_wb_u<mode>_insn): Likewise. |
| (mve_vdwdupq_n_u<mode>): Likewise. |
| (mve_vdwdupq_wb_u<mode>): Likewise. |
| (mve_vdwdupq_wb_u<mode>_insn): Likewise. |
| (mve_vdwdupq_m_n_u<mode>): Likewise. |
| (mve_vdwdupq_m_wb_u<mode>): Likewise. |
| (mve_vdwdupq_m_wb_u<mode>_insn): Likewise. |
| (mve_viwdupq_n_u<mode>): Likewise. |
| (mve_viwdupq_wb_u<mode>): Likewise. |
| (mve_viwdupq_wb_u<mode>_insn): Likewise. |
| (mve_viwdupq_m_n_u<mode>): Likewise. |
| (mve_viwdupq_m_wb_u<mode>): Likewise. |
| (mve_viwdupq_m_wb_u<mode>_insn): Likewise. |
| |
| 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro. |
| (vreinterpretq_s16_s64): Likewise. |
| (vreinterpretq_s16_s8): Likewise. |
| (vreinterpretq_s16_u16): Likewise. |
| (vreinterpretq_s16_u32): Likewise. |
| (vreinterpretq_s16_u64): Likewise. |
| (vreinterpretq_s16_u8): Likewise. |
| (vreinterpretq_s32_s16): Likewise. |
| (vreinterpretq_s32_s64): Likewise. |
| (vreinterpretq_s32_s8): Likewise. |
| (vreinterpretq_s32_u16): Likewise. |
| (vreinterpretq_s32_u32): Likewise. |
| (vreinterpretq_s32_u64): Likewise. |
| (vreinterpretq_s32_u8): Likewise. |
| (vreinterpretq_s64_s16): Likewise. |
| (vreinterpretq_s64_s32): Likewise. |
| (vreinterpretq_s64_s8): Likewise. |
| (vreinterpretq_s64_u16): Likewise. |
| (vreinterpretq_s64_u32): Likewise. |
| (vreinterpretq_s64_u64): Likewise. |
| (vreinterpretq_s64_u8): Likewise. |
| (vreinterpretq_s8_s16): Likewise. |
| (vreinterpretq_s8_s32): Likewise. |
| (vreinterpretq_s8_s64): Likewise. |
| (vreinterpretq_s8_u16): Likewise. |
| (vreinterpretq_s8_u32): Likewise. |
| (vreinterpretq_s8_u64): Likewise. |
| (vreinterpretq_s8_u8): Likewise. |
| (vreinterpretq_u16_s16): Likewise. |
| (vreinterpretq_u16_s32): Likewise. |
| (vreinterpretq_u16_s64): Likewise. |
| (vreinterpretq_u16_s8): Likewise. |
| (vreinterpretq_u16_u32): Likewise. |
| (vreinterpretq_u16_u64): Likewise. |
| (vreinterpretq_u16_u8): Likewise. |
| (vreinterpretq_u32_s16): Likewise. |
| (vreinterpretq_u32_s32): Likewise. |
| (vreinterpretq_u32_s64): Likewise. |
| (vreinterpretq_u32_s8): Likewise. |
| (vreinterpretq_u32_u16): Likewise. |
| (vreinterpretq_u32_u64): Likewise. |
| (vreinterpretq_u32_u8): Likewise. |
| (vreinterpretq_u64_s16): Likewise. |
| (vreinterpretq_u64_s32): Likewise. |
| (vreinterpretq_u64_s64): Likewise. |
| (vreinterpretq_u64_s8): Likewise. |
| (vreinterpretq_u64_u16): Likewise. |
| (vreinterpretq_u64_u32): Likewise. |
| (vreinterpretq_u64_u8): Likewise. |
| (vreinterpretq_u8_s16): Likewise. |
| (vreinterpretq_u8_s32): Likewise. |
| (vreinterpretq_u8_s64): Likewise. |
| (vreinterpretq_u8_s8): Likewise. |
| (vreinterpretq_u8_u16): Likewise. |
| (vreinterpretq_u8_u32): Likewise. |
| (vreinterpretq_u8_u64): Likewise. |
| (vreinterpretq_s32_f16): Likewise. |
| (vreinterpretq_s32_f32): Likewise. |
| (vreinterpretq_u16_f16): Likewise. |
| (vreinterpretq_u16_f32): Likewise. |
| (vreinterpretq_u32_f16): Likewise. |
| (vreinterpretq_u32_f32): Likewise. |
| (vreinterpretq_u64_f16): Likewise. |
| (vreinterpretq_u64_f32): Likewise. |
| (vreinterpretq_u8_f16): Likewise. |
| (vreinterpretq_u8_f32): Likewise. |
| (vreinterpretq_f16_f32): Likewise. |
| (vreinterpretq_f16_s16): Likewise. |
| (vreinterpretq_f16_s32): Likewise. |
| (vreinterpretq_f16_s64): Likewise. |
| (vreinterpretq_f16_s8): Likewise. |
| (vreinterpretq_f16_u16): Likewise. |
| (vreinterpretq_f16_u32): Likewise. |
| (vreinterpretq_f16_u64): Likewise. |
| (vreinterpretq_f16_u8): Likewise. |
| (vreinterpretq_f32_f16): Likewise. |
| (vreinterpretq_f32_s16): Likewise. |
| (vreinterpretq_f32_s32): Likewise. |
| (vreinterpretq_f32_s64): Likewise. |
| (vreinterpretq_f32_s8): Likewise. |
| (vreinterpretq_f32_u16): Likewise. |
| (vreinterpretq_f32_u32): Likewise. |
| (vreinterpretq_f32_u64): Likewise. |
| (vreinterpretq_f32_u8): Likewise. |
| (vreinterpretq_s16_f16): Likewise. |
| (vreinterpretq_s16_f32): Likewise. |
| (vreinterpretq_s64_f16): Likewise. |
| (vreinterpretq_s64_f32): Likewise. |
| (vreinterpretq_s8_f16): Likewise. |
| (vreinterpretq_s8_f32): Likewise. |
| (vuninitializedq_u8): Likewise. |
| (vuninitializedq_u16): Likewise. |
| (vuninitializedq_u32): Likewise. |
| (vuninitializedq_u64): Likewise. |
| (vuninitializedq_s8): Likewise. |
| (vuninitializedq_s16): Likewise. |
| (vuninitializedq_s32): Likewise. |
| (vuninitializedq_s64): Likewise. |
| (vuninitializedq_f16): Likewise. |
| (vuninitializedq_f32): Likewise. |
| (__arm_vuninitializedq_u8): Define intrinsic. |
| (__arm_vuninitializedq_u16): Likewise. |
| (__arm_vuninitializedq_u32): Likewise. |
| (__arm_vuninitializedq_u64): Likewise. |
| (__arm_vuninitializedq_s8): Likewise. |
| (__arm_vuninitializedq_s16): Likewise. |
| (__arm_vuninitializedq_s32): Likewise. |
| (__arm_vuninitializedq_s64): Likewise. |
| (__arm_vreinterpretq_s16_s32): Likewise. |
| (__arm_vreinterpretq_s16_s64): Likewise. |
| (__arm_vreinterpretq_s16_s8): Likewise. |
| (__arm_vreinterpretq_s16_u16): Likewise. |
| (__arm_vreinterpretq_s16_u32): Likewise. |
| (__arm_vreinterpretq_s16_u64): Likewise. |
| (__arm_vreinterpretq_s16_u8): Likewise. |
| (__arm_vreinterpretq_s32_s16): Likewise. |
| (__arm_vreinterpretq_s32_s64): Likewise. |
| (__arm_vreinterpretq_s32_s8): Likewise. |
| (__arm_vreinterpretq_s32_u16): Likewise. |
| (__arm_vreinterpretq_s32_u32): Likewise. |
| (__arm_vreinterpretq_s32_u64): Likewise. |
| (__arm_vreinterpretq_s32_u8): Likewise. |
| (__arm_vreinterpretq_s64_s16): Likewise. |
| (__arm_vreinterpretq_s64_s32): Likewise. |
| (__arm_vreinterpretq_s64_s8): Likewise. |
| (__arm_vreinterpretq_s64_u16): Likewise. |
| (__arm_vreinterpretq_s64_u32): Likewise. |
| (__arm_vreinterpretq_s64_u64): Likewise. |
| (__arm_vreinterpretq_s64_u8): Likewise. |
| (__arm_vreinterpretq_s8_s16): Likewise. |
| (__arm_vreinterpretq_s8_s32): Likewise. |
| (__arm_vreinterpretq_s8_s64): Likewise. |
| (__arm_vreinterpretq_s8_u16): Likewise. |
| (__arm_vreinterpretq_s8_u32): Likewise. |
| (__arm_vreinterpretq_s8_u64): Likewise. |
| (__arm_vreinterpretq_s8_u8): Likewise. |
| (__arm_vreinterpretq_u16_s16): Likewise. |
| (__arm_vreinterpretq_u16_s32): Likewise. |
| (__arm_vreinterpretq_u16_s64): Likewise. |
| (__arm_vreinterpretq_u16_s8): Likewise. |
| (__arm_vreinterpretq_u16_u32): Likewise. |
| (__arm_vreinterpretq_u16_u64): Likewise. |
| (__arm_vreinterpretq_u16_u8): Likewise. |
| (__arm_vreinterpretq_u32_s16): Likewise. |
| (__arm_vreinterpretq_u32_s32): Likewise. |
| (__arm_vreinterpretq_u32_s64): Likewise. |
| (__arm_vreinterpretq_u32_s8): Likewise. |
| (__arm_vreinterpretq_u32_u16): Likewise. |
| (__arm_vreinterpretq_u32_u64): Likewise. |
| (__arm_vreinterpretq_u32_u8): Likewise. |
| (__arm_vreinterpretq_u64_s16): Likewise. |
| (__arm_vreinterpretq_u64_s32): Likewise. |
| (__arm_vreinterpretq_u64_s64): Likewise. |
| (__arm_vreinterpretq_u64_s8): Likewise. |
| (__arm_vreinterpretq_u64_u16): Likewise. |
| (__arm_vreinterpretq_u64_u32): Likewise. |
| (__arm_vreinterpretq_u64_u8): Likewise. |
| (__arm_vreinterpretq_u8_s16): Likewise. |
| (__arm_vreinterpretq_u8_s32): Likewise. |
| (__arm_vreinterpretq_u8_s64): Likewise. |
| (__arm_vreinterpretq_u8_s8): Likewise. |
| (__arm_vreinterpretq_u8_u16): Likewise. |
| (__arm_vreinterpretq_u8_u32): Likewise. |
| (__arm_vreinterpretq_u8_u64): Likewise. |
| (__arm_vuninitializedq_f16): Likewise. |
| (__arm_vuninitializedq_f32): Likewise. |
| (__arm_vreinterpretq_s32_f16): Likewise. |
| (__arm_vreinterpretq_s32_f32): Likewise. |
| (__arm_vreinterpretq_s16_f16): Likewise. |
| (__arm_vreinterpretq_s16_f32): Likewise. |
| (__arm_vreinterpretq_s64_f16): Likewise. |
| (__arm_vreinterpretq_s64_f32): Likewise. |
| (__arm_vreinterpretq_s8_f16): Likewise. |
| (__arm_vreinterpretq_s8_f32): Likewise. |
| (__arm_vreinterpretq_u16_f16): Likewise. |
| (__arm_vreinterpretq_u16_f32): Likewise. |
| (__arm_vreinterpretq_u32_f16): Likewise. |
| (__arm_vreinterpretq_u32_f32): Likewise. |
| (__arm_vreinterpretq_u64_f16): Likewise. |
| (__arm_vreinterpretq_u64_f32): Likewise. |
| (__arm_vreinterpretq_u8_f16): Likewise. |
| (__arm_vreinterpretq_u8_f32): Likewise. |
| (__arm_vreinterpretq_f16_f32): Likewise. |
| (__arm_vreinterpretq_f16_s16): Likewise. |
| (__arm_vreinterpretq_f16_s32): Likewise. |
| (__arm_vreinterpretq_f16_s64): Likewise. |
| (__arm_vreinterpretq_f16_s8): Likewise. |
| (__arm_vreinterpretq_f16_u16): Likewise. |
| (__arm_vreinterpretq_f16_u32): Likewise. |
| (__arm_vreinterpretq_f16_u64): Likewise. |
| (__arm_vreinterpretq_f16_u8): Likewise. |
| (__arm_vreinterpretq_f32_f16): Likewise. |
| (__arm_vreinterpretq_f32_s16): Likewise. |
| (__arm_vreinterpretq_f32_s32): Likewise. |
| (__arm_vreinterpretq_f32_s64): Likewise. |
| (__arm_vreinterpretq_f32_s8): Likewise. |
| (__arm_vreinterpretq_f32_u16): Likewise. |
| (__arm_vreinterpretq_f32_u32): Likewise. |
| (__arm_vreinterpretq_f32_u64): Likewise. |
| (__arm_vreinterpretq_f32_u8): Likewise. |
| (vuninitializedq): Define polymorphic variant. |
| (vreinterpretq_f16): Likewise. |
| (vreinterpretq_f32): Likewise. |
| (vreinterpretq_s16): Likewise. |
| (vreinterpretq_s32): Likewise. |
| (vreinterpretq_s64): Likewise. |
| (vreinterpretq_s8): Likewise. |
| (vreinterpretq_u16): Likewise. |
| (vreinterpretq_u32): Likewise. |
| (vreinterpretq_u64): Likewise. |
| (vreinterpretq_u8): Likewise. |
| |
| 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm_mve.h (vaddq_s8): Define macro. |
| (vaddq_s16): Likewise. |
| (vaddq_s32): Likewise. |
| (vaddq_u8): Likewise. |
| (vaddq_u16): Likewise. |
| (vaddq_u32): Likewise. |
| (vaddq_f16): Likewise. |
| (vaddq_f32): Likewise. |
| (__arm_vaddq_s8): Define intrinsic. |
| (__arm_vaddq_s16): Likewise. |
| (__arm_vaddq_s32): Likewise. |
| (__arm_vaddq_u8): Likewise. |
| (__arm_vaddq_u16): Likewise. |
| (__arm_vaddq_u32): Likewise. |
| (__arm_vaddq_f16): Likewise. |
| (__arm_vaddq_f32): Likewise. |
| (vaddq): Define polymorphic variant. |
| * config/arm/iterators.md (VNIM): Define mode iterator for common types |
| Neon, IWMMXT and MVE. |
| (VNINOTM): Likewise. |
| * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern. |
| (mve_vaddq_f<mode>): Define RTL pattern. |
| * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern. |
| (addv8hf3_neon): Define RTL pattern. |
| * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern |
| to support MVE. |
| (addv8hf3): Define standard RTL pattern for MVE and Neon. |
| (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT. |
| |
| 2020-03-20 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/94232 |
| * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously |
| build_ref_for_offset function was used and it transforms off to bytes |
| from bits. |
| |
| 2020-03-20 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94266 |
| * gimple-ssa-sprintf.c (get_origin_and_offset): Use the |
| type of the underlying object to adjust for the containing |
| field if available. |
| |
| 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ... |
| (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec. |
| * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns. |
| |
| 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/mve.md (mve_mov<mode>): Fix R->R case. |
| |
| 2020-03-20 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94224 |
| * gimple-ssa-store-merging.c |
| (imm_store_chain_info::coalesce_immediate): Don't consider overlapping |
| or adjacent INTEGER_CST rhs_code stores as mergeable if they have |
| different lp_nr. |
| |
| 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve. |
| |
| 2020-03-19 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/94202 |
| * cgraph.c (cgraph_node::function_symbol): Fix availability computation. |
| (cgraph_node::function_or_virtual_thunk_symbol): Likewise. |
| |
| 2020-03-19 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR ipa/92372 |
| * cgraphunit.c (process_function_and_variable_attributes): warn |
| for flatten attribute on alias. |
| * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias. |
| |
| 2020-03-19 Martin Liska <mliska@suse.cz> |
| |
| * lto-section-in.c: Add ext_symtab. |
| * lto-streamer-out.c (write_symbol_extension_info): New. |
| (produce_symtab_extension): New. |
| (produce_asm_for_decls): Stream also produce_symtab_extension. |
| * lto-streamer.h (enum lto_section_type): New section. |
| |
| 2020-03-19 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94211 |
| * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq |
| instead of estimate_num_insns for bb_seq (middle_bb). Rename |
| emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust |
| all uses. |
| |
| 2020-03-19 Richard Biener <rguenther@suse.de> |
| |
| PR ipa/94217 |
| * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr |
| and build_ref_for_offset. |
| |
| 2020-03-19 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94216 |
| * fold-const.c (fold_binary_loc): Avoid using |
| build_fold_addr_expr when we really want an ADDR_EXPR. |
| |
| 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented |
| aliases for "wa". |
| |
| 2020-03-12 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/90275 |
| * cse.c (cse_insn): Delete no-op register moves too. |
| |
| 2020-03-18 Martin Sebor <msebor@redhat.com> |
| |
| PR ipa/92799 |
| * cgraphunit.c (process_function_and_variable_attributes): Also |
| complain about weakref function definitions and drop all effects |
| of the attribute. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro. |
| (vstrdq_scatter_base_p_u64): Likewise. |
| (vstrdq_scatter_base_s64): Likewise. |
| (vstrdq_scatter_base_u64): Likewise. |
| (vstrdq_scatter_offset_p_s64): Likewise. |
| (vstrdq_scatter_offset_p_u64): Likewise. |
| (vstrdq_scatter_offset_s64): Likewise. |
| (vstrdq_scatter_offset_u64): Likewise. |
| (vstrdq_scatter_shifted_offset_p_s64): Likewise. |
| (vstrdq_scatter_shifted_offset_p_u64): Likewise. |
| (vstrdq_scatter_shifted_offset_s64): Likewise. |
| (vstrdq_scatter_shifted_offset_u64): Likewise. |
| (vstrhq_scatter_offset_f16): Likewise. |
| (vstrhq_scatter_offset_p_f16): Likewise. |
| (vstrhq_scatter_shifted_offset_f16): Likewise. |
| (vstrhq_scatter_shifted_offset_p_f16): Likewise. |
| (vstrwq_scatter_base_f32): Likewise. |
| (vstrwq_scatter_base_p_f32): Likewise. |
| (vstrwq_scatter_offset_f32): Likewise. |
| (vstrwq_scatter_offset_p_f32): Likewise. |
| (vstrwq_scatter_offset_p_s32): Likewise. |
| (vstrwq_scatter_offset_p_u32): Likewise. |
| (vstrwq_scatter_offset_s32): Likewise. |
| (vstrwq_scatter_offset_u32): Likewise. |
| (vstrwq_scatter_shifted_offset_f32): Likewise. |
| (vstrwq_scatter_shifted_offset_p_f32): Likewise. |
| (vstrwq_scatter_shifted_offset_p_s32): Likewise. |
| (vstrwq_scatter_shifted_offset_p_u32): Likewise. |
| (vstrwq_scatter_shifted_offset_s32): Likewise. |
| (vstrwq_scatter_shifted_offset_u32): Likewise. |
| (__arm_vstrdq_scatter_base_p_s64): Define intrinsic. |
| (__arm_vstrdq_scatter_base_p_u64): Likewise. |
| (__arm_vstrdq_scatter_base_s64): Likewise. |
| (__arm_vstrdq_scatter_base_u64): Likewise. |
| (__arm_vstrdq_scatter_offset_p_s64): Likewise. |
| (__arm_vstrdq_scatter_offset_p_u64): Likewise. |
| (__arm_vstrdq_scatter_offset_s64): Likewise. |
| (__arm_vstrdq_scatter_offset_u64): Likewise. |
| (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise. |
| (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise. |
| (__arm_vstrdq_scatter_shifted_offset_s64): Likewise. |
| (__arm_vstrdq_scatter_shifted_offset_u64): Likewise. |
| (__arm_vstrwq_scatter_offset_p_s32): Likewise. |
| (__arm_vstrwq_scatter_offset_p_u32): Likewise. |
| (__arm_vstrwq_scatter_offset_s32): Likewise. |
| (__arm_vstrwq_scatter_offset_u32): Likewise. |
| (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise. |
| (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise. |
| (__arm_vstrwq_scatter_shifted_offset_s32): Likewise. |
| (__arm_vstrwq_scatter_shifted_offset_u32): Likewise. |
| (__arm_vstrhq_scatter_offset_f16): Likewise. |
| (__arm_vstrhq_scatter_offset_p_f16): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_f16): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise. |
| (__arm_vstrwq_scatter_base_f32): Likewise. |
| (__arm_vstrwq_scatter_base_p_f32): Likewise. |
| (__arm_vstrwq_scatter_offset_f32): Likewise. |
| (__arm_vstrwq_scatter_offset_p_f32): Likewise. |
| (__arm_vstrwq_scatter_shifted_offset_f32): Likewise. |
| (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise. |
| (vstrhq_scatter_offset): Define polymorphic variant. |
| (vstrhq_scatter_offset_p): Likewise. |
| (vstrhq_scatter_shifted_offset): Likewise. |
| (vstrhq_scatter_shifted_offset_p): Likewise. |
| (vstrwq_scatter_base): Likewise. |
| (vstrwq_scatter_base_p): Likewise. |
| (vstrwq_scatter_offset): Likewise. |
| (vstrwq_scatter_offset_p): Likewise. |
| (vstrwq_scatter_shifted_offset): Likewise. |
| (vstrwq_scatter_shifted_offset_p): Likewise. |
| (vstrdq_scatter_base_p): Likewise. |
| (vstrdq_scatter_base): Likewise. |
| (vstrdq_scatter_offset_p): Likewise. |
| (vstrdq_scatter_offset): Likewise. |
| (vstrdq_scatter_shifted_offset_p): Likewise. |
| (vstrdq_scatter_shifted_offset): Likewise. |
| * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier. |
| (STRSBS_P): Likewise. |
| (STRSBU): Likewise. |
| (STRSBU_P): Likewise. |
| (STRSS): Likewise. |
| (STRSS_P): Likewise. |
| (STRSU): Likewise. |
| (STRSU_P): Likewise. |
| * config/arm/constraints.md (Ri): Define. |
| * config/arm/mve.md (VSTRDSBQ): Define iterator. |
| (VSTRDSOQ): Likewise. |
| (VSTRDSSOQ): Likewise. |
| (VSTRWSOQ): Likewise. |
| (VSTRWSSOQ): Likewise. |
| (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern. |
| (mve_vstrdq_scatter_base_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_offset_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise. |
| (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise. |
| (mve_vstrhq_scatter_offset_fv8hf): Likewise. |
| (mve_vstrhq_scatter_offset_p_fv8hf): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise. |
| (mve_vstrwq_scatter_base_fv4sf): Likewise. |
| (mve_vstrwq_scatter_base_p_fv4sf): Likewise. |
| (mve_vstrwq_scatter_offset_fv4sf): Likewise. |
| (mve_vstrwq_scatter_offset_p_fv4sf): Likewise. |
| (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_offset_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise. |
| (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise. |
| * config/arm/predicates.md (Ri): Define predicate to check immediate |
| is the range +/-1016 and multiple of 8. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vst1q_f32): Define macro. |
| (vst1q_f16): Likewise. |
| (vst1q_s8): Likewise. |
| (vst1q_s32): Likewise. |
| (vst1q_s16): Likewise. |
| (vst1q_u8): Likewise. |
| (vst1q_u32): Likewise. |
| (vst1q_u16): Likewise. |
| (vstrhq_f16): Likewise. |
| (vstrhq_scatter_offset_s32): Likewise. |
| (vstrhq_scatter_offset_s16): Likewise. |
| (vstrhq_scatter_offset_u32): Likewise. |
| (vstrhq_scatter_offset_u16): Likewise. |
| (vstrhq_scatter_offset_p_s32): Likewise. |
| (vstrhq_scatter_offset_p_s16): Likewise. |
| (vstrhq_scatter_offset_p_u32): Likewise. |
| (vstrhq_scatter_offset_p_u16): Likewise. |
| (vstrhq_scatter_shifted_offset_s32): Likewise. |
| (vstrhq_scatter_shifted_offset_s16): Likewise. |
| (vstrhq_scatter_shifted_offset_u32): Likewise. |
| (vstrhq_scatter_shifted_offset_u16): Likewise. |
| (vstrhq_scatter_shifted_offset_p_s32): Likewise. |
| (vstrhq_scatter_shifted_offset_p_s16): Likewise. |
| (vstrhq_scatter_shifted_offset_p_u32): Likewise. |
| (vstrhq_scatter_shifted_offset_p_u16): Likewise. |
| (vstrhq_s32): Likewise. |
| (vstrhq_s16): Likewise. |
| (vstrhq_u32): Likewise. |
| (vstrhq_u16): Likewise. |
| (vstrhq_p_f16): Likewise. |
| (vstrhq_p_s32): Likewise. |
| (vstrhq_p_s16): Likewise. |
| (vstrhq_p_u32): Likewise. |
| (vstrhq_p_u16): Likewise. |
| (vstrwq_f32): Likewise. |
| (vstrwq_s32): Likewise. |
| (vstrwq_u32): Likewise. |
| (vstrwq_p_f32): Likewise. |
| (vstrwq_p_s32): Likewise. |
| (vstrwq_p_u32): Likewise. |
| (__arm_vst1q_s8): Define intrinsic. |
| (__arm_vst1q_s32): Likewise. |
| (__arm_vst1q_s16): Likewise. |
| (__arm_vst1q_u8): Likewise. |
| (__arm_vst1q_u32): Likewise. |
| (__arm_vst1q_u16): Likewise. |
| (__arm_vstrhq_scatter_offset_s32): Likewise. |
| (__arm_vstrhq_scatter_offset_s16): Likewise. |
| (__arm_vstrhq_scatter_offset_u32): Likewise. |
| (__arm_vstrhq_scatter_offset_u16): Likewise. |
| (__arm_vstrhq_scatter_offset_p_s32): Likewise. |
| (__arm_vstrhq_scatter_offset_p_s16): Likewise. |
| (__arm_vstrhq_scatter_offset_p_u32): Likewise. |
| (__arm_vstrhq_scatter_offset_p_u16): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_s32): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_s16): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_u32): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_u16): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise. |
| (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise. |
| (__arm_vstrhq_s32): Likewise. |
| (__arm_vstrhq_s16): Likewise. |
| (__arm_vstrhq_u32): Likewise. |
| (__arm_vstrhq_u16): Likewise. |
| (__arm_vstrhq_p_s32): Likewise. |
| (__arm_vstrhq_p_s16): Likewise. |
| (__arm_vstrhq_p_u32): Likewise. |
| (__arm_vstrhq_p_u16): Likewise. |
| (__arm_vstrwq_s32): Likewise. |
| (__arm_vstrwq_u32): Likewise. |
| (__arm_vstrwq_p_s32): Likewise. |
| (__arm_vstrwq_p_u32): Likewise. |
| (__arm_vstrwq_p_f32): Likewise. |
| (__arm_vstrwq_f32): Likewise. |
| (__arm_vst1q_f32): Likewise. |
| (__arm_vst1q_f16): Likewise. |
| (__arm_vstrhq_f16): Likewise. |
| (__arm_vstrhq_p_f16): Likewise. |
| (vst1q): Define polymorphic variant. |
| (vstrhq): Likewise. |
| (vstrhq_p): Likewise. |
| (vstrhq_scatter_offset_p): Likewise. |
| (vstrhq_scatter_offset): Likewise. |
| (vstrhq_scatter_shifted_offset_p): Likewise. |
| (vstrhq_scatter_shifted_offset): Likewise. |
| (vstrwq_p): Likewise. |
| (vstrwq): Likewise. |
| * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier. |
| (STRS_P): Likewise. |
| (STRSS): Likewise. |
| (STRSS_P): Likewise. |
| (STRSU): Likewise. |
| (STRSU_P): Likewise. |
| (STRU): Likewise. |
| (STRU_P): Likewise. |
| * config/arm/mve.md (VST1Q): Define iterator. |
| (VSTRHSOQ): Likewise. |
| (VSTRHSSOQ): Likewise. |
| (VSTRHQ): Likewise. |
| (VSTRWQ): Likewise. |
| (mve_vstrhq_fv8hf): Define RTL pattern. |
| (mve_vstrhq_p_fv8hf): Likewise. |
| (mve_vstrhq_p_<supf><mode>): Likewise. |
| (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise. |
| (mve_vstrhq_scatter_offset_<supf><mode>): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise. |
| (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise. |
| (mve_vstrhq_<supf><mode>): Likewise. |
| (mve_vstrwq_fv4sf): Likewise. |
| (mve_vstrwq_p_fv4sf): Likewise. |
| (mve_vstrwq_p_<supf>v4si): Likewise. |
| (mve_vstrwq_<supf>v4si): Likewise. |
| (mve_vst1q_f<mode>): Define expand. |
| (mve_vst1q_<supf><mode>): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vld1q_s8): Define macro. |
| (vld1q_s32): Likewise. |
| (vld1q_s16): Likewise. |
| (vld1q_u8): Likewise. |
| (vld1q_u32): Likewise. |
| (vld1q_u16): Likewise. |
| (vldrhq_gather_offset_s32): Likewise. |
| (vldrhq_gather_offset_s16): Likewise. |
| (vldrhq_gather_offset_u32): Likewise. |
| (vldrhq_gather_offset_u16): Likewise. |
| (vldrhq_gather_offset_z_s32): Likewise. |
| (vldrhq_gather_offset_z_s16): Likewise. |
| (vldrhq_gather_offset_z_u32): Likewise. |
| (vldrhq_gather_offset_z_u16): Likewise. |
| (vldrhq_gather_shifted_offset_s32): Likewise. |
| (vldrhq_gather_shifted_offset_s16): Likewise. |
| (vldrhq_gather_shifted_offset_u32): Likewise. |
| (vldrhq_gather_shifted_offset_u16): Likewise. |
| (vldrhq_gather_shifted_offset_z_s32): Likewise. |
| (vldrhq_gather_shifted_offset_z_s16): Likewise. |
| (vldrhq_gather_shifted_offset_z_u32): Likewise. |
| (vldrhq_gather_shifted_offset_z_u16): Likewise. |
| (vldrhq_s32): Likewise. |
| (vldrhq_s16): Likewise. |
| (vldrhq_u32): Likewise. |
| (vldrhq_u16): Likewise. |
| (vldrhq_z_s32): Likewise. |
| (vldrhq_z_s16): Likewise. |
| (vldrhq_z_u32): Likewise. |
| (vldrhq_z_u16): Likewise. |
| (vldrwq_s32): Likewise. |
| (vldrwq_u32): Likewise. |
| (vldrwq_z_s32): Likewise. |
| (vldrwq_z_u32): Likewise. |
| (vld1q_f32): Likewise. |
| (vld1q_f16): Likewise. |
| (vldrhq_f16): Likewise. |
| (vldrhq_z_f16): Likewise. |
| (vldrwq_f32): Likewise. |
| (vldrwq_z_f32): Likewise. |
| (__arm_vld1q_s8): Define intrinsic. |
| (__arm_vld1q_s32): Likewise. |
| (__arm_vld1q_s16): Likewise. |
| (__arm_vld1q_u8): Likewise. |
| (__arm_vld1q_u32): Likewise. |
| (__arm_vld1q_u16): Likewise. |
| (__arm_vldrhq_gather_offset_s32): Likewise. |
| (__arm_vldrhq_gather_offset_s16): Likewise. |
| (__arm_vldrhq_gather_offset_u32): Likewise. |
| (__arm_vldrhq_gather_offset_u16): Likewise. |
| (__arm_vldrhq_gather_offset_z_s32): Likewise. |
| (__arm_vldrhq_gather_offset_z_s16): Likewise. |
| (__arm_vldrhq_gather_offset_z_u32): Likewise. |
| (__arm_vldrhq_gather_offset_z_u16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_s32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_s16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_u32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_u16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise. |
| (__arm_vldrhq_s32): Likewise. |
| (__arm_vldrhq_s16): Likewise. |
| (__arm_vldrhq_u32): Likewise. |
| (__arm_vldrhq_u16): Likewise. |
| (__arm_vldrhq_z_s32): Likewise. |
| (__arm_vldrhq_z_s16): Likewise. |
| (__arm_vldrhq_z_u32): Likewise. |
| (__arm_vldrhq_z_u16): Likewise. |
| (__arm_vldrwq_s32): Likewise. |
| (__arm_vldrwq_u32): Likewise. |
| (__arm_vldrwq_z_s32): Likewise. |
| (__arm_vldrwq_z_u32): Likewise. |
| (__arm_vld1q_f32): Likewise. |
| (__arm_vld1q_f16): Likewise. |
| (__arm_vldrwq_f32): Likewise. |
| (__arm_vldrwq_z_f32): Likewise. |
| (__arm_vldrhq_z_f16): Likewise. |
| (__arm_vldrhq_f16): Likewise. |
| (vld1q): Define polymorphic variant. |
| (vldrhq_gather_offset): Likewise. |
| (vldrhq_gather_offset_z): Likewise. |
| (vldrhq_gather_shifted_offset): Likewise. |
| (vldrhq_gather_shifted_offset_z): Likewise. |
| * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier. |
| (LDRS): Likewise. |
| (LDRU_Z): Likewise. |
| (LDRS_Z): Likewise. |
| (LDRGU_Z): Likewise. |
| (LDRGU): Likewise. |
| (LDRGS_Z): Likewise. |
| (LDRGS): Likewise. |
| * config/arm/mve.md (MVE_H_ELEM): Define mode iterator. |
| (V_sz_elem1): Likewise. |
| (VLD1Q): Define iterator. |
| (VLDRHGOQ): Likewise. |
| (VLDRHGSOQ): Likewise. |
| (VLDRHQ): Likewise. |
| (VLDRWQ): Likewise. |
| (mve_vldrhq_fv8hf): Define RTL pattern. |
| (mve_vldrhq_gather_offset_<supf><mode>): Likewise. |
| (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise. |
| (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise. |
| (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise. |
| (mve_vldrhq_<supf><mode>): Likewise. |
| (mve_vldrhq_z_fv8hf): Likewise. |
| (mve_vldrhq_z_<supf><mode>): Likewise. |
| (mve_vldrwq_fv4sf): Likewise. |
| (mve_vldrwq_<supf>v4si): Likewise. |
| (mve_vldrwq_z_fv4sf): Likewise. |
| (mve_vldrwq_z_<supf>v4si): Likewise. |
| (mve_vld1q_f<mode>): Define RTL expand pattern. |
| (mve_vld1q_<supf><mode>): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vld1q_s8): Define macro. |
| (vld1q_s32): Likewise. |
| (vld1q_s16): Likewise. |
| (vld1q_u8): Likewise. |
| (vld1q_u32): Likewise. |
| (vld1q_u16): Likewise. |
| (vldrhq_gather_offset_s32): Likewise. |
| (vldrhq_gather_offset_s16): Likewise. |
| (vldrhq_gather_offset_u32): Likewise. |
| (vldrhq_gather_offset_u16): Likewise. |
| (vldrhq_gather_offset_z_s32): Likewise. |
| (vldrhq_gather_offset_z_s16): Likewise. |
| (vldrhq_gather_offset_z_u32): Likewise. |
| (vldrhq_gather_offset_z_u16): Likewise. |
| (vldrhq_gather_shifted_offset_s32): Likewise. |
| (vldrhq_gather_shifted_offset_s16): Likewise. |
| (vldrhq_gather_shifted_offset_u32): Likewise. |
| (vldrhq_gather_shifted_offset_u16): Likewise. |
| (vldrhq_gather_shifted_offset_z_s32): Likewise. |
| (vldrhq_gather_shifted_offset_z_s16): Likewise. |
| (vldrhq_gather_shifted_offset_z_u32): Likewise. |
| (vldrhq_gather_shifted_offset_z_u16): Likewise. |
| (vldrhq_s32): Likewise. |
| (vldrhq_s16): Likewise. |
| (vldrhq_u32): Likewise. |
| (vldrhq_u16): Likewise. |
| (vldrhq_z_s32): Likewise. |
| (vldrhq_z_s16): Likewise. |
| (vldrhq_z_u32): Likewise. |
| (vldrhq_z_u16): Likewise. |
| (vldrwq_s32): Likewise. |
| (vldrwq_u32): Likewise. |
| (vldrwq_z_s32): Likewise. |
| (vldrwq_z_u32): Likewise. |
| (vld1q_f32): Likewise. |
| (vld1q_f16): Likewise. |
| (vldrhq_f16): Likewise. |
| (vldrhq_z_f16): Likewise. |
| (vldrwq_f32): Likewise. |
| (vldrwq_z_f32): Likewise. |
| (__arm_vld1q_s8): Define intrinsic. |
| (__arm_vld1q_s32): Likewise. |
| (__arm_vld1q_s16): Likewise. |
| (__arm_vld1q_u8): Likewise. |
| (__arm_vld1q_u32): Likewise. |
| (__arm_vld1q_u16): Likewise. |
| (__arm_vldrhq_gather_offset_s32): Likewise. |
| (__arm_vldrhq_gather_offset_s16): Likewise. |
| (__arm_vldrhq_gather_offset_u32): Likewise. |
| (__arm_vldrhq_gather_offset_u16): Likewise. |
| (__arm_vldrhq_gather_offset_z_s32): Likewise. |
| (__arm_vldrhq_gather_offset_z_s16): Likewise. |
| (__arm_vldrhq_gather_offset_z_u32): Likewise. |
| (__arm_vldrhq_gather_offset_z_u16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_s32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_s16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_u32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_u16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise. |
| (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise. |
| (__arm_vldrhq_s32): Likewise. |
| (__arm_vldrhq_s16): Likewise. |
| (__arm_vldrhq_u32): Likewise. |
| (__arm_vldrhq_u16): Likewise. |
| (__arm_vldrhq_z_s32): Likewise. |
| (__arm_vldrhq_z_s16): Likewise. |
| (__arm_vldrhq_z_u32): Likewise. |
| (__arm_vldrhq_z_u16): Likewise. |
| (__arm_vldrwq_s32): Likewise. |
| (__arm_vldrwq_u32): Likewise. |
| (__arm_vldrwq_z_s32): Likewise. |
| (__arm_vldrwq_z_u32): Likewise. |
| (__arm_vld1q_f32): Likewise. |
| (__arm_vld1q_f16): Likewise. |
| (__arm_vldrwq_f32): Likewise. |
| (__arm_vldrwq_z_f32): Likewise. |
| (__arm_vldrhq_z_f16): Likewise. |
| (__arm_vldrhq_f16): Likewise. |
| (vld1q): Define polymorphic variant. |
| (vldrhq_gather_offset): Likewise. |
| (vldrhq_gather_offset_z): Likewise. |
| (vldrhq_gather_shifted_offset): Likewise. |
| (vldrhq_gather_shifted_offset_z): Likewise. |
| * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier. |
| (LDRS): Likewise. |
| (LDRU_Z): Likewise. |
| (LDRS_Z): Likewise. |
| (LDRGU_Z): Likewise. |
| (LDRGU): Likewise. |
| (LDRGS_Z): Likewise. |
| (LDRGS): Likewise. |
| * config/arm/mve.md (MVE_H_ELEM): Define mode iterator. |
| (V_sz_elem1): Likewise. |
| (VLD1Q): Define iterator. |
| (VLDRHGOQ): Likewise. |
| (VLDRHGSOQ): Likewise. |
| (VLDRHQ): Likewise. |
| (VLDRWQ): Likewise. |
| (mve_vldrhq_fv8hf): Define RTL pattern. |
| (mve_vldrhq_gather_offset_<supf><mode>): Likewise. |
| (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise. |
| (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise. |
| (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise. |
| (mve_vldrhq_<supf><mode>): Likewise. |
| (mve_vldrhq_z_fv8hf): Likewise. |
| (mve_vldrhq_z_<supf><mode>): Likewise. |
| (mve_vldrwq_fv4sf): Likewise. |
| (mve_vldrwq_<supf>v4si): Likewise. |
| (mve_vldrwq_z_fv4sf): Likewise. |
| (mve_vldrwq_z_<supf>v4si): Likewise. |
| (mve_vld1q_f<mode>): Define RTL expand pattern. |
| (mve_vld1q_<supf><mode>): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin |
| qualifier. |
| (LDRGBU_Z_QUALIFIERS): Likewise. |
| (LDRGS_Z_QUALIFIERS): Likewise. |
| (LDRGU_Z_QUALIFIERS): Likewise. |
| (LDRS_Z_QUALIFIERS): Likewise. |
| (LDRU_Z_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro. |
| (vldrbq_gather_offset_z_u8): Likewise. |
| (vldrbq_gather_offset_z_s32): Likewise. |
| (vldrbq_gather_offset_z_u16): Likewise. |
| (vldrbq_gather_offset_z_u32): Likewise. |
| (vldrbq_gather_offset_z_s8): Likewise. |
| (vldrbq_z_s16): Likewise. |
| (vldrbq_z_u8): Likewise. |
| (vldrbq_z_s8): Likewise. |
| (vldrbq_z_s32): Likewise. |
| (vldrbq_z_u16): Likewise. |
| (vldrbq_z_u32): Likewise. |
| (vldrwq_gather_base_z_u32): Likewise. |
| (vldrwq_gather_base_z_s32): Likewise. |
| (__arm_vldrbq_gather_offset_z_s8): Define intrinsic. |
| (__arm_vldrbq_gather_offset_z_s32): Likewise. |
| (__arm_vldrbq_gather_offset_z_s16): Likewise. |
| (__arm_vldrbq_gather_offset_z_u8): Likewise. |
| (__arm_vldrbq_gather_offset_z_u32): Likewise. |
| (__arm_vldrbq_gather_offset_z_u16): Likewise. |
| (__arm_vldrbq_z_s8): Likewise. |
| (__arm_vldrbq_z_s32): Likewise. |
| (__arm_vldrbq_z_s16): Likewise. |
| (__arm_vldrbq_z_u8): Likewise. |
| (__arm_vldrbq_z_u32): Likewise. |
| (__arm_vldrbq_z_u16): Likewise. |
| (__arm_vldrwq_gather_base_z_s32): Likewise. |
| (__arm_vldrwq_gather_base_z_u32): Likewise. |
| (vldrbq_gather_offset_z): Define polymorphic variant. |
| * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin |
| qualifier. |
| (LDRGBU_Z_QUALIFIERS): Likewise. |
| (LDRGS_Z_QUALIFIERS): Likewise. |
| (LDRGU_Z_QUALIFIERS): Likewise. |
| (LDRS_Z_QUALIFIERS): Likewise. |
| (LDRU_Z_QUALIFIERS): Likewise. |
| * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define |
| RTL pattern. |
| (mve_vldrbq_z_<supf><mode>): Likewise. |
| (mve_vldrwq_gather_base_z_<supf>v4si): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin |
| qualifier. |
| (STRU_P_QUALIFIERS): Likewise. |
| (STRSU_P_QUALIFIERS): Likewise. |
| (STRSS_P_QUALIFIERS): Likewise. |
| (STRSBS_P_QUALIFIERS): Likewise. |
| (STRSBU_P_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vstrbq_p_s8): Define macro. |
| (vstrbq_p_s32): Likewise. |
| (vstrbq_p_s16): Likewise. |
| (vstrbq_p_u8): Likewise. |
| (vstrbq_p_u32): Likewise. |
| (vstrbq_p_u16): Likewise. |
| (vstrbq_scatter_offset_p_s8): Likewise. |
| (vstrbq_scatter_offset_p_s32): Likewise. |
| (vstrbq_scatter_offset_p_s16): Likewise. |
| (vstrbq_scatter_offset_p_u8): Likewise. |
| (vstrbq_scatter_offset_p_u32): Likewise. |
| (vstrbq_scatter_offset_p_u16): Likewise. |
| (vstrwq_scatter_base_p_s32): Likewise. |
| (vstrwq_scatter_base_p_u32): Likewise. |
| (__arm_vstrbq_p_s8): Define intrinsic. |
| (__arm_vstrbq_p_s32): Likewise. |
| (__arm_vstrbq_p_s16): Likewise. |
| (__arm_vstrbq_p_u8): Likewise. |
| (__arm_vstrbq_p_u32): Likewise. |
| (__arm_vstrbq_p_u16): Likewise. |
| (__arm_vstrbq_scatter_offset_p_s8): Likewise. |
| (__arm_vstrbq_scatter_offset_p_s32): Likewise. |
| (__arm_vstrbq_scatter_offset_p_s16): Likewise. |
| (__arm_vstrbq_scatter_offset_p_u8): Likewise. |
| (__arm_vstrbq_scatter_offset_p_u32): Likewise. |
| (__arm_vstrbq_scatter_offset_p_u16): Likewise. |
| (__arm_vstrwq_scatter_base_p_s32): Likewise. |
| (__arm_vstrwq_scatter_base_p_u32): Likewise. |
| (vstrbq_p): Define polymorphic variant. |
| (vstrbq_scatter_offset_p): Likewise. |
| (vstrwq_scatter_base_p): Likewise. |
| * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin |
| qualifier. |
| (STRU_P_QUALIFIERS): Likewise. |
| (STRSU_P_QUALIFIERS): Likewise. |
| (STRSS_P_QUALIFIERS): Likewise. |
| (STRSBS_P_QUALIFIERS): Likewise. |
| (STRSBU_P_QUALIFIERS): Likewise. |
| * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define |
| RTL pattern. |
| (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise. |
| (mve_vstrbq_p_<supf><mode>): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin |
| qualifier. |
| (LDRGS_QUALIFIERS): Likewise. |
| (LDRS_QUALIFIERS): Likewise. |
| (LDRU_QUALIFIERS): Likewise. |
| (LDRGBS_QUALIFIERS): Likewise. |
| (LDRGBU_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro. |
| (vldrbq_gather_offset_s8): Likewise. |
| (vldrbq_s8): Likewise. |
| (vldrbq_u8): Likewise. |
| (vldrbq_gather_offset_u16): Likewise. |
| (vldrbq_gather_offset_s16): Likewise. |
| (vldrbq_s16): Likewise. |
| (vldrbq_u16): Likewise. |
| (vldrbq_gather_offset_u32): Likewise. |
| (vldrbq_gather_offset_s32): Likewise. |
| (vldrbq_s32): Likewise. |
| (vldrbq_u32): Likewise. |
| (vldrwq_gather_base_s32): Likewise. |
| (vldrwq_gather_base_u32): Likewise. |
| (__arm_vldrbq_gather_offset_u8): Define intrinsic. |
| (__arm_vldrbq_gather_offset_s8): Likewise. |
| (__arm_vldrbq_s8): Likewise. |
| (__arm_vldrbq_u8): Likewise. |
| (__arm_vldrbq_gather_offset_u16): Likewise. |
| (__arm_vldrbq_gather_offset_s16): Likewise. |
| (__arm_vldrbq_s16): Likewise. |
| (__arm_vldrbq_u16): Likewise. |
| (__arm_vldrbq_gather_offset_u32): Likewise. |
| (__arm_vldrbq_gather_offset_s32): Likewise. |
| (__arm_vldrbq_s32): Likewise. |
| (__arm_vldrbq_u32): Likewise. |
| (__arm_vldrwq_gather_base_s32): Likewise. |
| (__arm_vldrwq_gather_base_u32): Likewise. |
| (vldrbq_gather_offset): Define polymorphic variant. |
| * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin |
| qualifier. |
| (LDRGS_QUALIFIERS): Likewise. |
| (LDRS_QUALIFIERS): Likewise. |
| (LDRU_QUALIFIERS): Likewise. |
| (LDRGBS_QUALIFIERS): Likewise. |
| (LDRGBU_QUALIFIERS): Likewise. |
| * config/arm/mve.md (VLDRBGOQ): Define iterator. |
| (VLDRBQ): Likewise. |
| (VLDRWGBQ): Likewise. |
| (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern. |
| (mve_vldrbq_<supf><mode>): Likewise. |
| (mve_vldrwq_gather_base_<supf>v4si): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier. |
| (STRU_QUALIFIERS): Likewise. |
| (STRSS_QUALIFIERS): Likewise. |
| (STRSU_QUALIFIERS): Likewise. |
| (STRSBS_QUALIFIERS): Likewise. |
| (STRSBU_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vstrbq_s8): Define macro. |
| (vstrbq_u8): Likewise. |
| (vstrbq_u16): Likewise. |
| (vstrbq_scatter_offset_s8): Likewise. |
| (vstrbq_scatter_offset_u8): Likewise. |
| (vstrbq_scatter_offset_u16): Likewise. |
| (vstrbq_s16): Likewise. |
| (vstrbq_u32): Likewise. |
| (vstrbq_scatter_offset_s16): Likewise. |
| (vstrbq_scatter_offset_u32): Likewise. |
| (vstrbq_s32): Likewise. |
| (vstrbq_scatter_offset_s32): Likewise. |
| (vstrwq_scatter_base_s32): Likewise. |
| (vstrwq_scatter_base_u32): Likewise. |
| (__arm_vstrbq_scatter_offset_s8): Define intrinsic. |
| (__arm_vstrbq_scatter_offset_s32): Likewise. |
| (__arm_vstrbq_scatter_offset_s16): Likewise. |
| (__arm_vstrbq_scatter_offset_u8): Likewise. |
| (__arm_vstrbq_scatter_offset_u32): Likewise. |
| (__arm_vstrbq_scatter_offset_u16): Likewise. |
| (__arm_vstrbq_s8): Likewise. |
| (__arm_vstrbq_s32): Likewise. |
| (__arm_vstrbq_s16): Likewise. |
| (__arm_vstrbq_u8): Likewise. |
| (__arm_vstrbq_u32): Likewise. |
| (__arm_vstrbq_u16): Likewise. |
| (__arm_vstrwq_scatter_base_s32): Likewise. |
| (__arm_vstrwq_scatter_base_u32): Likewise. |
| (vstrbq): Define polymorphic variant. |
| (vstrbq_scatter_offset): Likewise. |
| (vstrwq_scatter_base): Likewise. |
| * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin |
| qualifier. |
| (STRU_QUALIFIERS): Likewise. |
| (STRSS_QUALIFIERS): Likewise. |
| (STRSU_QUALIFIERS): Likewise. |
| (STRSBS_QUALIFIERS): Likewise. |
| (STRSBU_QUALIFIERS): Likewise. |
| * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator. |
| (VSTRWSBQ): Define iterators. |
| (VSTRBSOQ): Likewise. |
| (VSTRBQ): Likewise. |
| (mve_vstrbq_<supf><mode>): Define RTL pattern. |
| (mve_vstrbq_scatter_offset_<supf><mode>): Likewise. |
| (mve_vstrwq_scatter_base_<supf>v4si): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vabdq_m_f32): Define macro. |
| (vabdq_m_f16): Likewise. |
| (vaddq_m_f32): Likewise. |
| (vaddq_m_f16): Likewise. |
| (vaddq_m_n_f32): Likewise. |
| (vaddq_m_n_f16): Likewise. |
| (vandq_m_f32): Likewise. |
| (vandq_m_f16): Likewise. |
| (vbicq_m_f32): Likewise. |
| (vbicq_m_f16): Likewise. |
| (vbrsrq_m_n_f32): Likewise. |
| (vbrsrq_m_n_f16): Likewise. |
| (vcaddq_rot270_m_f32): Likewise. |
| (vcaddq_rot270_m_f16): Likewise. |
| (vcaddq_rot90_m_f32): Likewise. |
| (vcaddq_rot90_m_f16): Likewise. |
| (vcmlaq_m_f32): Likewise. |
| (vcmlaq_m_f16): Likewise. |
| (vcmlaq_rot180_m_f32): Likewise. |
| (vcmlaq_rot180_m_f16): Likewise. |
| (vcmlaq_rot270_m_f32): Likewise. |
| (vcmlaq_rot270_m_f16): Likewise. |
| (vcmlaq_rot90_m_f32): Likewise. |
| (vcmlaq_rot90_m_f16): Likewise. |
| (vcmulq_m_f32): Likewise. |
| (vcmulq_m_f16): Likewise. |
| (vcmulq_rot180_m_f32): Likewise. |
| (vcmulq_rot180_m_f16): Likewise. |
| (vcmulq_rot270_m_f32): Likewise. |
| (vcmulq_rot270_m_f16): Likewise. |
| (vcmulq_rot90_m_f32): Likewise. |
| (vcmulq_rot90_m_f16): Likewise. |
| (vcvtq_m_n_s32_f32): Likewise. |
| (vcvtq_m_n_s16_f16): Likewise. |
| (vcvtq_m_n_u32_f32): Likewise. |
| (vcvtq_m_n_u16_f16): Likewise. |
| (veorq_m_f32): Likewise. |
| (veorq_m_f16): Likewise. |
| (vfmaq_m_f32): Likewise. |
| (vfmaq_m_f16): Likewise. |
| (vfmaq_m_n_f32): Likewise. |
| (vfmaq_m_n_f16): Likewise. |
| (vfmasq_m_n_f32): Likewise. |
| (vfmasq_m_n_f16): Likewise. |
| (vfmsq_m_f32): Likewise. |
| (vfmsq_m_f16): Likewise. |
| (vmaxnmq_m_f32): Likewise. |
| (vmaxnmq_m_f16): Likewise. |
| (vminnmq_m_f32): Likewise. |
| (vminnmq_m_f16): Likewise. |
| (vmulq_m_f32): Likewise. |
| (vmulq_m_f16): Likewise. |
| (vmulq_m_n_f32): Likewise. |
| (vmulq_m_n_f16): Likewise. |
| (vornq_m_f32): Likewise. |
| (vornq_m_f16): Likewise. |
| (vorrq_m_f32): Likewise. |
| (vorrq_m_f16): Likewise. |
| (vsubq_m_f32): Likewise. |
| (vsubq_m_f16): Likewise. |
| (vsubq_m_n_f32): Likewise. |
| (vsubq_m_n_f16): Likewise. |
| (__attribute__): Likewise. |
| (__arm_vabdq_m_f32): Likewise. |
| (__arm_vabdq_m_f16): Likewise. |
| (__arm_vaddq_m_f32): Likewise. |
| (__arm_vaddq_m_f16): Likewise. |
| (__arm_vaddq_m_n_f32): Likewise. |
| (__arm_vaddq_m_n_f16): Likewise. |
| (__arm_vandq_m_f32): Likewise. |
| (__arm_vandq_m_f16): Likewise. |
| (__arm_vbicq_m_f32): Likewise. |
| (__arm_vbicq_m_f16): Likewise. |
| (__arm_vbrsrq_m_n_f32): Likewise. |
| (__arm_vbrsrq_m_n_f16): Likewise. |
| (__arm_vcaddq_rot270_m_f32): Likewise. |
| (__arm_vcaddq_rot270_m_f16): Likewise. |
| (__arm_vcaddq_rot90_m_f32): Likewise. |
| (__arm_vcaddq_rot90_m_f16): Likewise. |
| (__arm_vcmlaq_m_f32): Likewise. |
| (__arm_vcmlaq_m_f16): Likewise. |
| (__arm_vcmlaq_rot180_m_f32): Likewise. |
| (__arm_vcmlaq_rot180_m_f16): Likewise. |
| (__arm_vcmlaq_rot270_m_f32): Likewise. |
| (__arm_vcmlaq_rot270_m_f16): Likewise. |
| (__arm_vcmlaq_rot90_m_f32): Likewise. |
| (__arm_vcmlaq_rot90_m_f16): Likewise. |
| (__arm_vcmulq_m_f32): Likewise. |
| (__arm_vcmulq_m_f16): Likewise. |
| (__arm_vcmulq_rot180_m_f32): Define intrinsic. |
| (__arm_vcmulq_rot180_m_f16): Likewise. |
| (__arm_vcmulq_rot270_m_f32): Likewise. |
| (__arm_vcmulq_rot270_m_f16): Likewise. |
| (__arm_vcmulq_rot90_m_f32): Likewise. |
| (__arm_vcmulq_rot90_m_f16): Likewise. |
| (__arm_vcvtq_m_n_s32_f32): Likewise. |
| (__arm_vcvtq_m_n_s16_f16): Likewise. |
| (__arm_vcvtq_m_n_u32_f32): Likewise. |
| (__arm_vcvtq_m_n_u16_f16): Likewise. |
| (__arm_veorq_m_f32): Likewise. |
| (__arm_veorq_m_f16): Likewise. |
| (__arm_vfmaq_m_f32): Likewise. |
| (__arm_vfmaq_m_f16): Likewise. |
| (__arm_vfmaq_m_n_f32): Likewise. |
| (__arm_vfmaq_m_n_f16): Likewise. |
| (__arm_vfmasq_m_n_f32): Likewise. |
| (__arm_vfmasq_m_n_f16): Likewise. |
| (__arm_vfmsq_m_f32): Likewise. |
| (__arm_vfmsq_m_f16): Likewise. |
| (__arm_vmaxnmq_m_f32): Likewise. |
| (__arm_vmaxnmq_m_f16): Likewise. |
| (__arm_vminnmq_m_f32): Likewise. |
| (__arm_vminnmq_m_f16): Likewise. |
| (__arm_vmulq_m_f32): Likewise. |
| (__arm_vmulq_m_f16): Likewise. |
| (__arm_vmulq_m_n_f32): Likewise. |
| (__arm_vmulq_m_n_f16): Likewise. |
| (__arm_vornq_m_f32): Likewise. |
| (__arm_vornq_m_f16): Likewise. |
| (__arm_vorrq_m_f32): Likewise. |
| (__arm_vorrq_m_f16): Likewise. |
| (__arm_vsubq_m_f32): Likewise. |
| (__arm_vsubq_m_f16): Likewise. |
| (__arm_vsubq_m_n_f32): Likewise. |
| (__arm_vsubq_m_n_f16): Likewise. |
| (vabdq_m): Define polymorphic variant. |
| (vaddq_m): Likewise. |
| (vaddq_m_n): Likewise. |
| (vandq_m): Likewise. |
| (vbicq_m): Likewise. |
| (vbrsrq_m_n): Likewise. |
| (vcaddq_rot270_m): Likewise. |
| (vcaddq_rot90_m): Likewise. |
| (vcmlaq_m): Likewise. |
| (vcmlaq_rot180_m): Likewise. |
| (vcmlaq_rot270_m): Likewise. |
| (vcmlaq_rot90_m): Likewise. |
| (vcmulq_m): Likewise. |
| (vcmulq_rot180_m): Likewise. |
| (vcmulq_rot270_m): Likewise. |
| (vcmulq_rot90_m): Likewise. |
| (veorq_m): Likewise. |
| (vfmaq_m): Likewise. |
| (vfmaq_m_n): Likewise. |
| (vfmasq_m_n): Likewise. |
| (vfmsq_m): Likewise. |
| (vmaxnmq_m): Likewise. |
| (vminnmq_m): Likewise. |
| (vmulq_m): Likewise. |
| (vmulq_m_n): Likewise. |
| (vornq_m): Likewise. |
| (vsubq_m): Likewise. |
| (vsubq_m_n): Likewise. |
| (vorrq_m): Likewise. |
| * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use |
| builtin qualifier. |
| (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise. |
| (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise. |
| * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern. |
| (mve_vaddq_m_f<mode>): Likewise. |
| (mve_vaddq_m_n_f<mode>): Likewise. |
| (mve_vandq_m_f<mode>): Likewise. |
| (mve_vbicq_m_f<mode>): Likewise. |
| (mve_vbrsrq_m_n_f<mode>): Likewise. |
| (mve_vcaddq_rot270_m_f<mode>): Likewise. |
| (mve_vcaddq_rot90_m_f<mode>): Likewise. |
| (mve_vcmlaq_m_f<mode>): Likewise. |
| (mve_vcmlaq_rot180_m_f<mode>): Likewise. |
| (mve_vcmlaq_rot270_m_f<mode>): Likewise. |
| (mve_vcmlaq_rot90_m_f<mode>): Likewise. |
| (mve_vcmulq_m_f<mode>): Likewise. |
| (mve_vcmulq_rot180_m_f<mode>): Likewise. |
| (mve_vcmulq_rot270_m_f<mode>): Likewise. |
| (mve_vcmulq_rot90_m_f<mode>): Likewise. |
| (mve_veorq_m_f<mode>): Likewise. |
| (mve_vfmaq_m_f<mode>): Likewise. |
| (mve_vfmaq_m_n_f<mode>): Likewise. |
| (mve_vfmasq_m_n_f<mode>): Likewise. |
| (mve_vfmsq_m_f<mode>): Likewise. |
| (mve_vmaxnmq_m_f<mode>): Likewise. |
| (mve_vminnmq_m_f<mode>): Likewise. |
| (mve_vmulq_m_f<mode>): Likewise. |
| (mve_vmulq_m_n_f<mode>): Likewise. |
| (mve_vornq_m_f<mode>): Likewise. |
| (mve_vorrq_m_f<mode>): Likewise. |
| (mve_vsubq_m_f<mode>): Likewise. |
| (mve_vsubq_m_n_f<mode>): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-protos.h (arm_mve_immediate_check): |
| * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check |
| mode and interger value. |
| * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro. |
| (vmlaldavaq_p_s16): Likewise. |
| (vmlaldavaq_p_u32): Likewise. |
| (vmlaldavaq_p_u16): Likewise. |
| (vmlaldavaxq_p_s32): Likewise. |
| (vmlaldavaxq_p_s16): Likewise. |
| (vmlaldavaxq_p_u32): Likewise. |
| (vmlaldavaxq_p_u16): Likewise. |
| (vmlsldavaq_p_s32): Likewise. |
| (vmlsldavaq_p_s16): Likewise. |
| (vmlsldavaxq_p_s32): Likewise. |
| (vmlsldavaxq_p_s16): Likewise. |
| (vmullbq_poly_m_p8): Likewise. |
| (vmullbq_poly_m_p16): Likewise. |
| (vmulltq_poly_m_p8): Likewise. |
| (vmulltq_poly_m_p16): Likewise. |
| (vqdmullbq_m_n_s32): Likewise. |
| (vqdmullbq_m_n_s16): Likewise. |
| (vqdmullbq_m_s32): Likewise. |
| (vqdmullbq_m_s16): Likewise. |
| (vqdmulltq_m_n_s32): Likewise. |
| (vqdmulltq_m_n_s16): Likewise. |
| (vqdmulltq_m_s32): Likewise. |
| (vqdmulltq_m_s16): Likewise. |
| (vqrshrnbq_m_n_s32): Likewise. |
| (vqrshrnbq_m_n_s16): Likewise. |
| (vqrshrnbq_m_n_u32): Likewise. |
| (vqrshrnbq_m_n_u16): Likewise. |
| (vqrshrntq_m_n_s32): Likewise. |
| (vqrshrntq_m_n_s16): Likewise. |
| (vqrshrntq_m_n_u32): Likewise. |
| (vqrshrntq_m_n_u16): Likewise. |
| (vqrshrunbq_m_n_s32): Likewise. |
| (vqrshrunbq_m_n_s16): Likewise. |
| (vqrshruntq_m_n_s32): Likewise. |
| (vqrshruntq_m_n_s16): Likewise. |
| (vqshrnbq_m_n_s32): Likewise. |
| (vqshrnbq_m_n_s16): Likewise. |
| (vqshrnbq_m_n_u32): Likewise. |
| (vqshrnbq_m_n_u16): Likewise. |
| (vqshrntq_m_n_s32): Likewise. |
| (vqshrntq_m_n_s16): Likewise. |
| (vqshrntq_m_n_u32): Likewise. |
| (vqshrntq_m_n_u16): Likewise. |
| (vqshrunbq_m_n_s32): Likewise. |
| (vqshrunbq_m_n_s16): Likewise. |
| (vqshruntq_m_n_s32): Likewise. |
| (vqshruntq_m_n_s16): Likewise. |
| (vrmlaldavhaq_p_s32): Likewise. |
| (vrmlaldavhaq_p_u32): Likewise. |
| (vrmlaldavhaxq_p_s32): Likewise. |
| (vrmlsldavhaq_p_s32): Likewise. |
| (vrmlsldavhaxq_p_s32): Likewise. |
| (vrshrnbq_m_n_s32): Likewise. |
| (vrshrnbq_m_n_s16): Likewise. |
| (vrshrnbq_m_n_u32): Likewise. |
| (vrshrnbq_m_n_u16): Likewise. |
| (vrshrntq_m_n_s32): Likewise. |
| (vrshrntq_m_n_s16): Likewise. |
| (vrshrntq_m_n_u32): Likewise. |
| (vrshrntq_m_n_u16): Likewise. |
| (vshllbq_m_n_s8): Likewise. |
| (vshllbq_m_n_s16): Likewise. |
| (vshllbq_m_n_u8): Likewise. |
| (vshllbq_m_n_u16): Likewise. |
| (vshlltq_m_n_s8): Likewise. |
| (vshlltq_m_n_s16): Likewise. |
| (vshlltq_m_n_u8): Likewise. |
| (vshlltq_m_n_u16): Likewise. |
| (vshrnbq_m_n_s32): Likewise. |
| (vshrnbq_m_n_s16): Likewise. |
| (vshrnbq_m_n_u32): Likewise. |
| (vshrnbq_m_n_u16): Likewise. |
| (vshrntq_m_n_s32): Likewise. |
| (vshrntq_m_n_s16): Likewise. |
| (vshrntq_m_n_u32): Likewise. |
| (vshrntq_m_n_u16): Likewise. |
| (__arm_vmlaldavaq_p_s32): Define intrinsic. |
| (__arm_vmlaldavaq_p_s16): Likewise. |
| (__arm_vmlaldavaq_p_u32): Likewise. |
| (__arm_vmlaldavaq_p_u16): Likewise. |
| (__arm_vmlaldavaxq_p_s32): Likewise. |
| (__arm_vmlaldavaxq_p_s16): Likewise. |
| (__arm_vmlaldavaxq_p_u32): Likewise. |
| (__arm_vmlaldavaxq_p_u16): Likewise. |
| (__arm_vmlsldavaq_p_s32): Likewise. |
| (__arm_vmlsldavaq_p_s16): Likewise. |
| (__arm_vmlsldavaxq_p_s32): Likewise. |
| (__arm_vmlsldavaxq_p_s16): Likewise. |
| (__arm_vmullbq_poly_m_p8): Likewise. |
| (__arm_vmullbq_poly_m_p16): Likewise. |
| (__arm_vmulltq_poly_m_p8): Likewise. |
| (__arm_vmulltq_poly_m_p16): Likewise. |
| (__arm_vqdmullbq_m_n_s32): Likewise. |
| (__arm_vqdmullbq_m_n_s16): Likewise. |
| (__arm_vqdmullbq_m_s32): Likewise. |
| (__arm_vqdmullbq_m_s16): Likewise. |
| (__arm_vqdmulltq_m_n_s32): Likewise. |
| (__arm_vqdmulltq_m_n_s16): Likewise. |
| (__arm_vqdmulltq_m_s32): Likewise. |
| (__arm_vqdmulltq_m_s16): Likewise. |
| (__arm_vqrshrnbq_m_n_s32): Likewise. |
| (__arm_vqrshrnbq_m_n_s16): Likewise. |
| (__arm_vqrshrnbq_m_n_u32): Likewise. |
| (__arm_vqrshrnbq_m_n_u16): Likewise. |
| (__arm_vqrshrntq_m_n_s32): Likewise. |
| (__arm_vqrshrntq_m_n_s16): Likewise. |
| (__arm_vqrshrntq_m_n_u32): Likewise. |
| (__arm_vqrshrntq_m_n_u16): Likewise. |
| (__arm_vqrshrunbq_m_n_s32): Likewise. |
| (__arm_vqrshrunbq_m_n_s16): Likewise. |
| (__arm_vqrshruntq_m_n_s32): Likewise. |
| (__arm_vqrshruntq_m_n_s16): Likewise. |
| (__arm_vqshrnbq_m_n_s32): Likewise. |
| (__arm_vqshrnbq_m_n_s16): Likewise. |
| (__arm_vqshrnbq_m_n_u32): Likewise. |
| (__arm_vqshrnbq_m_n_u16): Likewise. |
| (__arm_vqshrntq_m_n_s32): Likewise. |
| (__arm_vqshrntq_m_n_s16): Likewise. |
| (__arm_vqshrntq_m_n_u32): Likewise. |
| (__arm_vqshrntq_m_n_u16): Likewise. |
| (__arm_vqshrunbq_m_n_s32): Likewise. |
| (__arm_vqshrunbq_m_n_s16): Likewise. |
| (__arm_vqshruntq_m_n_s32): Likewise. |
| (__arm_vqshruntq_m_n_s16): Likewise. |
| (__arm_vrmlaldavhaq_p_s32): Likewise. |
| (__arm_vrmlaldavhaq_p_u32): Likewise. |
| (__arm_vrmlaldavhaxq_p_s32): Likewise. |
| (__arm_vrmlsldavhaq_p_s32): Likewise. |
| (__arm_vrmlsldavhaxq_p_s32): Likewise. |
| (__arm_vrshrnbq_m_n_s32): Likewise. |
| (__arm_vrshrnbq_m_n_s16): Likewise. |
| (__arm_vrshrnbq_m_n_u32): Likewise. |
| (__arm_vrshrnbq_m_n_u16): Likewise. |
| (__arm_vrshrntq_m_n_s32): Likewise. |
| (__arm_vrshrntq_m_n_s16): Likewise. |
| (__arm_vrshrntq_m_n_u32): Likewise. |
| (__arm_vrshrntq_m_n_u16): Likewise. |
| (__arm_vshllbq_m_n_s8): Likewise. |
| (__arm_vshllbq_m_n_s16): Likewise. |
| (__arm_vshllbq_m_n_u8): Likewise. |
| (__arm_vshllbq_m_n_u16): Likewise. |
| (__arm_vshlltq_m_n_s8): Likewise. |
| (__arm_vshlltq_m_n_s16): Likewise. |
| (__arm_vshlltq_m_n_u8): Likewise. |
| (__arm_vshlltq_m_n_u16): Likewise. |
| (__arm_vshrnbq_m_n_s32): Likewise. |
| (__arm_vshrnbq_m_n_s16): Likewise. |
| (__arm_vshrnbq_m_n_u32): Likewise. |
| (__arm_vshrnbq_m_n_u16): Likewise. |
| (__arm_vshrntq_m_n_s32): Likewise. |
| (__arm_vshrntq_m_n_s16): Likewise. |
| (__arm_vshrntq_m_n_u32): Likewise. |
| (__arm_vshrntq_m_n_u16): Likewise. |
| (vmullbq_poly_m): Define polymorphic variant. |
| (vmulltq_poly_m): Likewise. |
| (vshllbq_m): Likewise. |
| (vshrntq_m_n): Likewise. |
| (vshrnbq_m_n): Likewise. |
| (vshlltq_m_n): Likewise. |
| (vshllbq_m_n): Likewise. |
| (vrshrntq_m_n): Likewise. |
| (vrshrnbq_m_n): Likewise. |
| (vqshruntq_m_n): Likewise. |
| (vqshrunbq_m_n): Likewise. |
| (vqdmullbq_m_n): Likewise. |
| (vqdmullbq_m): Likewise. |
| (vqdmulltq_m_n): Likewise. |
| (vqdmulltq_m): Likewise. |
| (vqrshrnbq_m_n): Likewise. |
| (vqrshrntq_m_n): Likewise. |
| (vqrshrunbq_m_n): Likewise. |
| (vqrshruntq_m_n): Likewise. |
| (vqshrnbq_m_n): Likewise. |
| (vqshrntq_m_n): Likewise. |
| * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use |
| builtin qualifiers. |
| (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise. |
| (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise. |
| * config/arm/mve.md (VMLALDAVAQ_P): Define iterator. |
| (VMLALDAVAXQ_P): Likewise. |
| (VQRSHRNBQ_M_N): Likewise. |
| (VQRSHRNTQ_M_N): Likewise. |
| (VQSHRNBQ_M_N): Likewise. |
| (VQSHRNTQ_M_N): Likewise. |
| (VRSHRNBQ_M_N): Likewise. |
| (VRSHRNTQ_M_N): Likewise. |
| (VSHLLBQ_M_N): Likewise. |
| (VSHLLTQ_M_N): Likewise. |
| (VSHRNBQ_M_N): Likewise. |
| (VSHRNTQ_M_N): Likewise. |
| (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern. |
| (mve_vmlaldavaxq_p_<supf><mode>): Likewise. |
| (mve_vqrshrnbq_m_n_<supf><mode>): Likewise. |
| (mve_vqrshrntq_m_n_<supf><mode>): Likewise. |
| (mve_vqshrnbq_m_n_<supf><mode>): Likewise. |
| (mve_vqshrntq_m_n_<supf><mode>): Likewise. |
| (mve_vrmlaldavhaq_p_sv4si): Likewise. |
| (mve_vrshrnbq_m_n_<supf><mode>): Likewise. |
| (mve_vrshrntq_m_n_<supf><mode>): Likewise. |
| (mve_vshllbq_m_n_<supf><mode>): Likewise. |
| (mve_vshlltq_m_n_<supf><mode>): Likewise. |
| (mve_vshrnbq_m_n_<supf><mode>): Likewise. |
| (mve_vshrntq_m_n_<supf><mode>): Likewise. |
| (mve_vmlsldavaq_p_s<mode>): Likewise. |
| (mve_vmlsldavaxq_p_s<mode>): Likewise. |
| (mve_vmullbq_poly_m_p<mode>): Likewise. |
| (mve_vmulltq_poly_m_p<mode>): Likewise. |
| (mve_vqdmullbq_m_n_s<mode>): Likewise. |
| (mve_vqdmullbq_m_s<mode>): Likewise. |
| (mve_vqdmulltq_m_n_s<mode>): Likewise. |
| (mve_vqdmulltq_m_s<mode>): Likewise. |
| (mve_vqrshrunbq_m_n_s<mode>): Likewise. |
| (mve_vqrshruntq_m_n_s<mode>): Likewise. |
| (mve_vqshrunbq_m_n_s<mode>): Likewise. |
| (mve_vqshruntq_m_n_s<mode>): Likewise. |
| (mve_vrmlaldavhaq_p_uv4si): Likewise. |
| (mve_vrmlaldavhaxq_p_sv4si): Likewise. |
| (mve_vrmlsldavhaq_p_sv4si): Likewise. |
| (mve_vrmlsldavhaxq_p_sv4si): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vabdq_m_s8): Define macro. |
| (vabdq_m_s32): Likewise. |
| (vabdq_m_s16): Likewise. |
| (vabdq_m_u8): Likewise. |
| (vabdq_m_u32): Likewise. |
| (vabdq_m_u16): Likewise. |
| (vaddq_m_n_s8): Likewise. |
| (vaddq_m_n_s32): Likewise. |
| (vaddq_m_n_s16): Likewise. |
| (vaddq_m_n_u8): Likewise. |
| (vaddq_m_n_u32): Likewise. |
| (vaddq_m_n_u16): Likewise. |
| (vaddq_m_s8): Likewise. |
| (vaddq_m_s32): Likewise. |
| (vaddq_m_s16): Likewise. |
| (vaddq_m_u8): Likewise. |
| (vaddq_m_u32): Likewise. |
| (vaddq_m_u16): Likewise. |
| (vandq_m_s8): Likewise. |
| (vandq_m_s32): Likewise. |
| (vandq_m_s16): Likewise. |
| (vandq_m_u8): Likewise. |
| (vandq_m_u32): Likewise. |
| (vandq_m_u16): Likewise. |
| (vbicq_m_s8): Likewise. |
| (vbicq_m_s32): Likewise. |
| (vbicq_m_s16): Likewise. |
| (vbicq_m_u8): Likewise. |
| (vbicq_m_u32): Likewise. |
| (vbicq_m_u16): Likewise. |
| (vbrsrq_m_n_s8): Likewise. |
| (vbrsrq_m_n_s32): Likewise. |
| (vbrsrq_m_n_s16): Likewise. |
| (vbrsrq_m_n_u8): Likewise. |
| (vbrsrq_m_n_u32): Likewise. |
| (vbrsrq_m_n_u16): Likewise. |
| (vcaddq_rot270_m_s8): Likewise. |
| (vcaddq_rot270_m_s32): Likewise. |
| (vcaddq_rot270_m_s16): Likewise. |
| (vcaddq_rot270_m_u8): Likewise. |
| (vcaddq_rot270_m_u32): Likewise. |
| (vcaddq_rot270_m_u16): Likewise. |
| (vcaddq_rot90_m_s8): Likewise. |
| (vcaddq_rot90_m_s32): Likewise. |
| (vcaddq_rot90_m_s16): Likewise. |
| (vcaddq_rot90_m_u8): Likewise. |
| (vcaddq_rot90_m_u32): Likewise. |
| (vcaddq_rot90_m_u16): Likewise. |
| (veorq_m_s8): Likewise. |
| (veorq_m_s32): Likewise. |
| (veorq_m_s16): Likewise. |
| (veorq_m_u8): Likewise. |
| (veorq_m_u32): Likewise. |
| (veorq_m_u16): Likewise. |
| (vhaddq_m_n_s8): Likewise. |
| (vhaddq_m_n_s32): Likewise. |
| (vhaddq_m_n_s16): Likewise. |
| (vhaddq_m_n_u8): Likewise. |
| (vhaddq_m_n_u32): Likewise. |
| (vhaddq_m_n_u16): Likewise. |
| (vhaddq_m_s8): Likewise. |
| (vhaddq_m_s32): Likewise. |
| (vhaddq_m_s16): Likewise. |
| (vhaddq_m_u8): Likewise. |
| (vhaddq_m_u32): Likewise. |
| (vhaddq_m_u16): Likewise. |
| (vhcaddq_rot270_m_s8): Likewise. |
| (vhcaddq_rot270_m_s32): Likewise. |
| (vhcaddq_rot270_m_s16): Likewise. |
| (vhcaddq_rot90_m_s8): Likewise. |
| (vhcaddq_rot90_m_s32): Likewise. |
| (vhcaddq_rot90_m_s16): Likewise. |
| (vhsubq_m_n_s8): Likewise. |
| (vhsubq_m_n_s32): Likewise. |
| (vhsubq_m_n_s16): Likewise. |
| (vhsubq_m_n_u8): Likewise. |
| (vhsubq_m_n_u32): Likewise. |
| (vhsubq_m_n_u16): Likewise. |
| (vhsubq_m_s8): Likewise. |
| (vhsubq_m_s32): Likewise. |
| (vhsubq_m_s16): Likewise. |
| (vhsubq_m_u8): Likewise. |
| (vhsubq_m_u32): Likewise. |
| (vhsubq_m_u16): Likewise. |
| (vmaxq_m_s8): Likewise. |
| (vmaxq_m_s32): Likewise. |
| (vmaxq_m_s16): Likewise. |
| (vmaxq_m_u8): Likewise. |
| (vmaxq_m_u32): Likewise. |
| (vmaxq_m_u16): Likewise. |
| (vminq_m_s8): Likewise. |
| (vminq_m_s32): Likewise. |
| (vminq_m_s16): Likewise. |
| (vminq_m_u8): Likewise. |
| (vminq_m_u32): Likewise. |
| (vminq_m_u16): Likewise. |
| (vmladavaq_p_s8): Likewise. |
| (vmladavaq_p_s32): Likewise. |
| (vmladavaq_p_s16): Likewise. |
| (vmladavaq_p_u8): Likewise. |
| (vmladavaq_p_u32): Likewise. |
| (vmladavaq_p_u16): Likewise. |
| (vmladavaxq_p_s8): Likewise. |
| (vmladavaxq_p_s32): Likewise. |
| (vmladavaxq_p_s16): Likewise. |
| (vmlaq_m_n_s8): Likewise. |
| (vmlaq_m_n_s32): Likewise. |
| (vmlaq_m_n_s16): Likewise. |
| (vmlaq_m_n_u8): Likewise. |
| (vmlaq_m_n_u32): Likewise. |
| (vmlaq_m_n_u16): Likewise. |
| (vmlasq_m_n_s8): Likewise. |
| (vmlasq_m_n_s32): Likewise. |
| (vmlasq_m_n_s16): Likewise. |
| (vmlasq_m_n_u8): Likewise. |
| (vmlasq_m_n_u32): Likewise. |
| (vmlasq_m_n_u16): Likewise. |
| (vmlsdavaq_p_s8): Likewise. |
| (vmlsdavaq_p_s32): Likewise. |
| (vmlsdavaq_p_s16): Likewise. |
| (vmlsdavaxq_p_s8): Likewise. |
| (vmlsdavaxq_p_s32): Likewise. |
| (vmlsdavaxq_p_s16): Likewise. |
| (vmulhq_m_s8): Likewise. |
| (vmulhq_m_s32): Likewise. |
| (vmulhq_m_s16): Likewise. |
| (vmulhq_m_u8): Likewise. |
| (vmulhq_m_u32): Likewise. |
| (vmulhq_m_u16): Likewise. |
| (vmullbq_int_m_s8): Likewise. |
| (vmullbq_int_m_s32): Likewise. |
| (vmullbq_int_m_s16): Likewise. |
| (vmullbq_int_m_u8): Likewise. |
| (vmullbq_int_m_u32): Likewise. |
| (vmullbq_int_m_u16): Likewise. |
| (vmulltq_int_m_s8): Likewise. |
| (vmulltq_int_m_s32): Likewise. |
| (vmulltq_int_m_s16): Likewise. |
| (vmulltq_int_m_u8): Likewise. |
| (vmulltq_int_m_u32): Likewise. |
| (vmulltq_int_m_u16): Likewise. |
| (vmulq_m_n_s8): Likewise. |
| (vmulq_m_n_s32): Likewise. |
| (vmulq_m_n_s16): Likewise. |
| (vmulq_m_n_u8): Likewise. |
| (vmulq_m_n_u32): Likewise. |
| (vmulq_m_n_u16): Likewise. |
| (vmulq_m_s8): Likewise. |
| (vmulq_m_s32): Likewise. |
| (vmulq_m_s16): Likewise. |
| (vmulq_m_u8): Likewise. |
| (vmulq_m_u32): Likewise. |
| (vmulq_m_u16): Likewise. |
| (vornq_m_s8): Likewise. |
| (vornq_m_s32): Likewise. |
| (vornq_m_s16): Likewise. |
| (vornq_m_u8): Likewise. |
| (vornq_m_u32): Likewise. |
| (vornq_m_u16): Likewise. |
| (vorrq_m_s8): Likewise. |
| (vorrq_m_s32): Likewise. |
| (vorrq_m_s16): Likewise. |
| (vorrq_m_u8): Likewise. |
| (vorrq_m_u32): Likewise. |
| (vorrq_m_u16): Likewise. |
| (vqaddq_m_n_s8): Likewise. |
| (vqaddq_m_n_s32): Likewise. |
| (vqaddq_m_n_s16): Likewise. |
| (vqaddq_m_n_u8): Likewise. |
| (vqaddq_m_n_u32): Likewise. |
| (vqaddq_m_n_u16): Likewise. |
| (vqaddq_m_s8): Likewise. |
| (vqaddq_m_s32): Likewise. |
| (vqaddq_m_s16): Likewise. |
| (vqaddq_m_u8): Likewise. |
| (vqaddq_m_u32): Likewise. |
| (vqaddq_m_u16): Likewise. |
| (vqdmladhq_m_s8): Likewise. |
| (vqdmladhq_m_s32): Likewise. |
| (vqdmladhq_m_s16): Likewise. |
| (vqdmladhxq_m_s8): Likewise. |
| (vqdmladhxq_m_s32): Likewise. |
| (vqdmladhxq_m_s16): Likewise. |
| (vqdmlahq_m_n_s8): Likewise. |
| (vqdmlahq_m_n_s32): Likewise. |
| (vqdmlahq_m_n_s16): Likewise. |
| (vqdmlahq_m_n_u8): Likewise. |
| (vqdmlahq_m_n_u32): Likewise. |
| (vqdmlahq_m_n_u16): Likewise. |
| (vqdmlsdhq_m_s8): Likewise. |
| (vqdmlsdhq_m_s32): Likewise. |
| (vqdmlsdhq_m_s16): Likewise. |
| (vqdmlsdhxq_m_s8): Likewise. |
| (vqdmlsdhxq_m_s32): Likewise. |
| (vqdmlsdhxq_m_s16): Likewise. |
| (vqdmulhq_m_n_s8): Likewise. |
| (vqdmulhq_m_n_s32): Likewise. |
| (vqdmulhq_m_n_s16): Likewise. |
| (vqdmulhq_m_s8): Likewise. |
| (vqdmulhq_m_s32): Likewise. |
| (vqdmulhq_m_s16): Likewise. |
| (vqrdmladhq_m_s8): Likewise. |
| (vqrdmladhq_m_s32): Likewise. |
| (vqrdmladhq_m_s16): Likewise. |
| (vqrdmladhxq_m_s8): Likewise. |
| (vqrdmladhxq_m_s32): Likewise. |
| (vqrdmladhxq_m_s16): Likewise. |
| (vqrdmlahq_m_n_s8): Likewise. |
| (vqrdmlahq_m_n_s32): Likewise. |
| (vqrdmlahq_m_n_s16): Likewise. |
| (vqrdmlahq_m_n_u8): Likewise. |
| (vqrdmlahq_m_n_u32): Likewise. |
| (vqrdmlahq_m_n_u16): Likewise. |
| (vqrdmlashq_m_n_s8): Likewise. |
| (vqrdmlashq_m_n_s32): Likewise. |
| (vqrdmlashq_m_n_s16): Likewise. |
| (vqrdmlashq_m_n_u8): Likewise. |
| (vqrdmlashq_m_n_u32): Likewise. |
| (vqrdmlashq_m_n_u16): Likewise. |
| (vqrdmlsdhq_m_s8): Likewise. |
| (vqrdmlsdhq_m_s32): Likewise. |
| (vqrdmlsdhq_m_s16): Likewise. |
| (vqrdmlsdhxq_m_s8): Likewise. |
| (vqrdmlsdhxq_m_s32): Likewise. |
| (vqrdmlsdhxq_m_s16): Likewise. |
| (vqrdmulhq_m_n_s8): Likewise. |
| (vqrdmulhq_m_n_s32): Likewise. |
| (vqrdmulhq_m_n_s16): Likewise. |
| (vqrdmulhq_m_s8): Likewise. |
| (vqrdmulhq_m_s32): Likewise. |
| (vqrdmulhq_m_s16): Likewise. |
| (vqrshlq_m_s8): Likewise. |
| (vqrshlq_m_s32): Likewise. |
| (vqrshlq_m_s16): Likewise. |
| (vqrshlq_m_u8): Likewise. |
| (vqrshlq_m_u32): Likewise. |
| (vqrshlq_m_u16): Likewise. |
| (vqshlq_m_n_s8): Likewise. |
| (vqshlq_m_n_s32): Likewise. |
| (vqshlq_m_n_s16): Likewise. |
| (vqshlq_m_n_u8): Likewise. |
| (vqshlq_m_n_u32): Likewise. |
| (vqshlq_m_n_u16): Likewise. |
| (vqshlq_m_s8): Likewise. |
| (vqshlq_m_s32): Likewise. |
| (vqshlq_m_s16): Likewise. |
| (vqshlq_m_u8): Likewise. |
| (vqshlq_m_u32): Likewise. |
| (vqshlq_m_u16): Likewise. |
| (vqsubq_m_n_s8): Likewise. |
| (vqsubq_m_n_s32): Likewise. |
| (vqsubq_m_n_s16): Likewise. |
| (vqsubq_m_n_u8): Likewise. |
| (vqsubq_m_n_u32): Likewise. |
| (vqsubq_m_n_u16): Likewise. |
| (vqsubq_m_s8): Likewise. |
| (vqsubq_m_s32): Likewise. |
| (vqsubq_m_s16): Likewise. |
| (vqsubq_m_u8): Likewise. |
| (vqsubq_m_u32): Likewise. |
| (vqsubq_m_u16): Likewise. |
| (vrhaddq_m_s8): Likewise. |
| (vrhaddq_m_s32): Likewise. |
| (vrhaddq_m_s16): Likewise. |
| (vrhaddq_m_u8): Likewise. |
| (vrhaddq_m_u32): Likewise. |
| (vrhaddq_m_u16): Likewise. |
| (vrmulhq_m_s8): Likewise. |
| (vrmulhq_m_s32): Likewise. |
| (vrmulhq_m_s16): Likewise. |
| (vrmulhq_m_u8): Likewise. |
| (vrmulhq_m_u32): Likewise. |
| (vrmulhq_m_u16): Likewise. |
| (vrshlq_m_s8): Likewise. |
| (vrshlq_m_s32): Likewise. |
| (vrshlq_m_s16): Likewise. |
| (vrshlq_m_u8): Likewise. |
| (vrshlq_m_u32): Likewise. |
| (vrshlq_m_u16): Likewise. |
| (vrshrq_m_n_s8): Likewise. |
| (vrshrq_m_n_s32): Likewise. |
| (vrshrq_m_n_s16): Likewise. |
| (vrshrq_m_n_u8): Likewise. |
| (vrshrq_m_n_u32): Likewise. |
| (vrshrq_m_n_u16): Likewise. |
| (vshlq_m_n_s8): Likewise. |
| (vshlq_m_n_s32): Likewise. |
| (vshlq_m_n_s16): Likewise. |
| (vshlq_m_n_u8): Likewise. |
| (vshlq_m_n_u32): Likewise. |
| (vshlq_m_n_u16): Likewise. |
| (vshrq_m_n_s8): Likewise. |
| (vshrq_m_n_s32): Likewise. |
| (vshrq_m_n_s16): Likewise. |
| (vshrq_m_n_u8): Likewise. |
| (vshrq_m_n_u32): Likewise. |
| (vshrq_m_n_u16): Likewise. |
| (vsliq_m_n_s8): Likewise. |
| (vsliq_m_n_s32): Likewise. |
| (vsliq_m_n_s16): Likewise. |
| (vsliq_m_n_u8): Likewise. |
| (vsliq_m_n_u32): Likewise. |
| (vsliq_m_n_u16): Likewise. |
| (vsubq_m_n_s8): Likewise. |
| (vsubq_m_n_s32): Likewise. |
| (vsubq_m_n_s16): Likewise. |
| (vsubq_m_n_u8): Likewise. |
| (vsubq_m_n_u32): Likewise. |
| (vsubq_m_n_u16): Likewise. |
| (__arm_vabdq_m_s8): Define intrinsic. |
| (__arm_vabdq_m_s32): Likewise. |
| (__arm_vabdq_m_s16): Likewise. |
| (__arm_vabdq_m_u8): Likewise. |
| (__arm_vabdq_m_u32): Likewise. |
| (__arm_vabdq_m_u16): Likewise. |
| (__arm_vaddq_m_n_s8): Likewise. |
| (__arm_vaddq_m_n_s32): Likewise. |
| (__arm_vaddq_m_n_s16): Likewise. |
| (__arm_vaddq_m_n_u8): Likewise. |
| (__arm_vaddq_m_n_u32): Likewise. |
| (__arm_vaddq_m_n_u16): Likewise. |
| (__arm_vaddq_m_s8): Likewise. |
| (__arm_vaddq_m_s32): Likewise. |
| (__arm_vaddq_m_s16): Likewise. |
| (__arm_vaddq_m_u8): Likewise. |
| (__arm_vaddq_m_u32): Likewise. |
| (__arm_vaddq_m_u16): Likewise. |
| (__arm_vandq_m_s8): Likewise. |
| (__arm_vandq_m_s32): Likewise. |
| (__arm_vandq_m_s16): Likewise. |
| (__arm_vandq_m_u8): Likewise. |
| (__arm_vandq_m_u32): Likewise. |
| (__arm_vandq_m_u16): Likewise. |
| (__arm_vbicq_m_s8): Likewise. |
| (__arm_vbicq_m_s32): Likewise. |
| (__arm_vbicq_m_s16): Likewise. |
| (__arm_vbicq_m_u8): Likewise. |
| (__arm_vbicq_m_u32): Likewise. |
| (__arm_vbicq_m_u16): Likewise. |
| (__arm_vbrsrq_m_n_s8): Likewise. |
| (__arm_vbrsrq_m_n_s32): Likewise. |
| (__arm_vbrsrq_m_n_s16): Likewise. |
| (__arm_vbrsrq_m_n_u8): Likewise. |
| (__arm_vbrsrq_m_n_u32): Likewise. |
| (__arm_vbrsrq_m_n_u16): Likewise. |
| (__arm_vcaddq_rot270_m_s8): Likewise. |
| (__arm_vcaddq_rot270_m_s32): Likewise. |
| (__arm_vcaddq_rot270_m_s16): Likewise. |
| (__arm_vcaddq_rot270_m_u8): Likewise. |
| (__arm_vcaddq_rot270_m_u32): Likewise. |
| (__arm_vcaddq_rot270_m_u16): Likewise. |
| (__arm_vcaddq_rot90_m_s8): Likewise. |
| (__arm_vcaddq_rot90_m_s32): Likewise. |
| (__arm_vcaddq_rot90_m_s16): Likewise. |
| (__arm_vcaddq_rot90_m_u8): Likewise. |
| (__arm_vcaddq_rot90_m_u32): Likewise. |
| (__arm_vcaddq_rot90_m_u16): Likewise. |
| (__arm_veorq_m_s8): Likewise. |
| (__arm_veorq_m_s32): Likewise. |
| (__arm_veorq_m_s16): Likewise. |
| (__arm_veorq_m_u8): Likewise. |
| (__arm_veorq_m_u32): Likewise. |
| (__arm_veorq_m_u16): Likewise. |
| (__arm_vhaddq_m_n_s8): Likewise. |
| (__arm_vhaddq_m_n_s32): Likewise. |
| (__arm_vhaddq_m_n_s16): Likewise. |
| (__arm_vhaddq_m_n_u8): Likewise. |
| (__arm_vhaddq_m_n_u32): Likewise. |
| (__arm_vhaddq_m_n_u16): Likewise. |
| (__arm_vhaddq_m_s8): Likewise. |
| (__arm_vhaddq_m_s32): Likewise. |
| (__arm_vhaddq_m_s16): Likewise. |
| (__arm_vhaddq_m_u8): Likewise. |
| (__arm_vhaddq_m_u32): Likewise. |
| (__arm_vhaddq_m_u16): Likewise. |
| (__arm_vhcaddq_rot270_m_s8): Likewise. |
| (__arm_vhcaddq_rot270_m_s32): Likewise. |
| (__arm_vhcaddq_rot270_m_s16): Likewise. |
| (__arm_vhcaddq_rot90_m_s8): Likewise. |
| (__arm_vhcaddq_rot90_m_s32): Likewise. |
| (__arm_vhcaddq_rot90_m_s16): Likewise. |
| (__arm_vhsubq_m_n_s8): Likewise. |
| (__arm_vhsubq_m_n_s32): Likewise. |
| (__arm_vhsubq_m_n_s16): Likewise. |
| (__arm_vhsubq_m_n_u8): Likewise. |
| (__arm_vhsubq_m_n_u32): Likewise. |
| (__arm_vhsubq_m_n_u16): Likewise. |
| (__arm_vhsubq_m_s8): Likewise. |
| (__arm_vhsubq_m_s32): Likewise. |
| (__arm_vhsubq_m_s16): Likewise. |
| (__arm_vhsubq_m_u8): Likewise. |
| (__arm_vhsubq_m_u32): Likewise. |
| (__arm_vhsubq_m_u16): Likewise. |
| (__arm_vmaxq_m_s8): Likewise. |
| (__arm_vmaxq_m_s32): Likewise. |
| (__arm_vmaxq_m_s16): Likewise. |
| (__arm_vmaxq_m_u8): Likewise. |
| (__arm_vmaxq_m_u32): Likewise. |
| (__arm_vmaxq_m_u16): Likewise. |
| (__arm_vminq_m_s8): Likewise. |
| (__arm_vminq_m_s32): Likewise. |
| (__arm_vminq_m_s16): Likewise. |
| (__arm_vminq_m_u8): Likewise. |
| (__arm_vminq_m_u32): Likewise. |
| (__arm_vminq_m_u16): Likewise. |
| (__arm_vmladavaq_p_s8): Likewise. |
| (__arm_vmladavaq_p_s32): Likewise. |
| (__arm_vmladavaq_p_s16): Likewise. |
| (__arm_vmladavaq_p_u8): Likewise. |
| (__arm_vmladavaq_p_u32): Likewise. |
| (__arm_vmladavaq_p_u16): Likewise. |
| (__arm_vmladavaxq_p_s8): Likewise. |
| (__arm_vmladavaxq_p_s32): Likewise. |
| (__arm_vmladavaxq_p_s16): Likewise. |
| (__arm_vmlaq_m_n_s8): Likewise. |
| (__arm_vmlaq_m_n_s32): Likewise. |
| (__arm_vmlaq_m_n_s16): Likewise. |
| (__arm_vmlaq_m_n_u8): Likewise. |
| (__arm_vmlaq_m_n_u32): Likewise. |
| (__arm_vmlaq_m_n_u16): Likewise. |
| (__arm_vmlasq_m_n_s8): Likewise. |
| (__arm_vmlasq_m_n_s32): Likewise. |
| (__arm_vmlasq_m_n_s16): Likewise. |
| (__arm_vmlasq_m_n_u8): Likewise. |
| (__arm_vmlasq_m_n_u32): Likewise. |
| (__arm_vmlasq_m_n_u16): Likewise. |
| (__arm_vmlsdavaq_p_s8): Likewise. |
| (__arm_vmlsdavaq_p_s32): Likewise. |
| (__arm_vmlsdavaq_p_s16): Likewise. |
| (__arm_vmlsdavaxq_p_s8): Likewise. |
| (__arm_vmlsdavaxq_p_s32): Likewise. |
| (__arm_vmlsdavaxq_p_s16): Likewise. |
| (__arm_vmulhq_m_s8): Likewise. |
| (__arm_vmulhq_m_s32): Likewise. |
| (__arm_vmulhq_m_s16): Likewise. |
| (__arm_vmulhq_m_u8): Likewise. |
| (__arm_vmulhq_m_u32): Likewise. |
| (__arm_vmulhq_m_u16): Likewise. |
| (__arm_vmullbq_int_m_s8): Likewise. |
| (__arm_vmullbq_int_m_s32): Likewise. |
| (__arm_vmullbq_int_m_s16): Likewise. |
| (__arm_vmullbq_int_m_u8): Likewise. |
| (__arm_vmullbq_int_m_u32): Likewise. |
| (__arm_vmullbq_int_m_u16): Likewise. |
| (__arm_vmulltq_int_m_s8): Likewise. |
| (__arm_vmulltq_int_m_s32): Likewise. |
| (__arm_vmulltq_int_m_s16): Likewise. |
| (__arm_vmulltq_int_m_u8): Likewise. |
| (__arm_vmulltq_int_m_u32): Likewise. |
| (__arm_vmulltq_int_m_u16): Likewise. |
| (__arm_vmulq_m_n_s8): Likewise. |
| (__arm_vmulq_m_n_s32): Likewise. |
| (__arm_vmulq_m_n_s16): Likewise. |
| (__arm_vmulq_m_n_u8): Likewise. |
| (__arm_vmulq_m_n_u32): Likewise. |
| (__arm_vmulq_m_n_u16): Likewise. |
| (__arm_vmulq_m_s8): Likewise. |
| (__arm_vmulq_m_s32): Likewise. |
| (__arm_vmulq_m_s16): Likewise. |
| (__arm_vmulq_m_u8): Likewise. |
| (__arm_vmulq_m_u32): Likewise. |
| (__arm_vmulq_m_u16): Likewise. |
| (__arm_vornq_m_s8): Likewise. |
| (__arm_vornq_m_s32): Likewise. |
| (__arm_vornq_m_s16): Likewise. |
| (__arm_vornq_m_u8): Likewise. |
| (__arm_vornq_m_u32): Likewise. |
| (__arm_vornq_m_u16): Likewise. |
| (__arm_vorrq_m_s8): Likewise. |
| (__arm_vorrq_m_s32): Likewise. |
| (__arm_vorrq_m_s16): Likewise. |
| (__arm_vorrq_m_u8): Likewise. |
| (__arm_vorrq_m_u32): Likewise. |
| (__arm_vorrq_m_u16): Likewise. |
| (__arm_vqaddq_m_n_s8): Likewise. |
| (__arm_vqaddq_m_n_s32): Likewise. |
| (__arm_vqaddq_m_n_s16): Likewise. |
| (__arm_vqaddq_m_n_u8): Likewise. |
| (__arm_vqaddq_m_n_u32): Likewise. |
| (__arm_vqaddq_m_n_u16): Likewise. |
| (__arm_vqaddq_m_s8): Likewise. |
| (__arm_vqaddq_m_s32): Likewise. |
| (__arm_vqaddq_m_s16): Likewise. |
| (__arm_vqaddq_m_u8): Likewise. |
| (__arm_vqaddq_m_u32): Likewise. |
| (__arm_vqaddq_m_u16): Likewise. |
| (__arm_vqdmladhq_m_s8): Likewise. |
| (__arm_vqdmladhq_m_s32): Likewise. |
| (__arm_vqdmladhq_m_s16): Likewise. |
| (__arm_vqdmladhxq_m_s8): Likewise. |
| (__arm_vqdmladhxq_m_s32): Likewise. |
| (__arm_vqdmladhxq_m_s16): Likewise. |
| (__arm_vqdmlahq_m_n_s8): Likewise. |
| (__arm_vqdmlahq_m_n_s32): Likewise. |
| (__arm_vqdmlahq_m_n_s16): Likewise. |
| (__arm_vqdmlahq_m_n_u8): Likewise. |
| (__arm_vqdmlahq_m_n_u32): Likewise. |
| (__arm_vqdmlahq_m_n_u16): Likewise. |
| (__arm_vqdmlsdhq_m_s8): Likewise. |
| (__arm_vqdmlsdhq_m_s32): Likewise. |
| (__arm_vqdmlsdhq_m_s16): Likewise. |
| (__arm_vqdmlsdhxq_m_s8): Likewise. |
| (__arm_vqdmlsdhxq_m_s32): Likewise. |
| (__arm_vqdmlsdhxq_m_s16): Likewise. |
| (__arm_vqdmulhq_m_n_s8): Likewise. |
| (__arm_vqdmulhq_m_n_s32): Likewise. |
| (__arm_vqdmulhq_m_n_s16): Likewise. |
| (__arm_vqdmulhq_m_s8): Likewise. |
| (__arm_vqdmulhq_m_s32): Likewise. |
| (__arm_vqdmulhq_m_s16): Likewise. |
| (__arm_vqrdmladhq_m_s8): Likewise. |
| (__arm_vqrdmladhq_m_s32): Likewise. |
| (__arm_vqrdmladhq_m_s16): Likewise. |
| (__arm_vqrdmladhxq_m_s8): Likewise. |
| (__arm_vqrdmladhxq_m_s32): Likewise. |
| (__arm_vqrdmladhxq_m_s16): Likewise. |
| (__arm_vqrdmlahq_m_n_s8): Likewise. |
| (__arm_vqrdmlahq_m_n_s32): Likewise. |
| (__arm_vqrdmlahq_m_n_s16): Likewise. |
| (__arm_vqrdmlahq_m_n_u8): Likewise. |
| (__arm_vqrdmlahq_m_n_u32): Likewise. |
| (__arm_vqrdmlahq_m_n_u16): Likewise. |
| (__arm_vqrdmlashq_m_n_s8): Likewise. |
| (__arm_vqrdmlashq_m_n_s32): Likewise. |
| (__arm_vqrdmlashq_m_n_s16): Likewise. |
| (__arm_vqrdmlashq_m_n_u8): Likewise. |
| (__arm_vqrdmlashq_m_n_u32): Likewise. |
| (__arm_vqrdmlashq_m_n_u16): Likewise. |
| (__arm_vqrdmlsdhq_m_s8): Likewise. |
| (__arm_vqrdmlsdhq_m_s32): Likewise. |
| (__arm_vqrdmlsdhq_m_s16): Likewise. |
| (__arm_vqrdmlsdhxq_m_s8): Likewise. |
| (__arm_vqrdmlsdhxq_m_s32): Likewise. |
| (__arm_vqrdmlsdhxq_m_s16): Likewise. |
| (__arm_vqrdmulhq_m_n_s8): Likewise. |
| (__arm_vqrdmulhq_m_n_s32): Likewise. |
| (__arm_vqrdmulhq_m_n_s16): Likewise. |
| (__arm_vqrdmulhq_m_s8): Likewise. |
| (__arm_vqrdmulhq_m_s32): Likewise. |
| (__arm_vqrdmulhq_m_s16): Likewise. |
| (__arm_vqrshlq_m_s8): Likewise. |
| (__arm_vqrshlq_m_s32): Likewise. |
| (__arm_vqrshlq_m_s16): Likewise. |
| (__arm_vqrshlq_m_u8): Likewise. |
| (__arm_vqrshlq_m_u32): Likewise. |
| (__arm_vqrshlq_m_u16): Likewise. |
| (__arm_vqshlq_m_n_s8): Likewise. |
| (__arm_vqshlq_m_n_s32): Likewise. |
| (__arm_vqshlq_m_n_s16): Likewise. |
| (__arm_vqshlq_m_n_u8): Likewise. |
| (__arm_vqshlq_m_n_u32): Likewise. |
| (__arm_vqshlq_m_n_u16): Likewise. |
| (__arm_vqshlq_m_s8): Likewise. |
| (__arm_vqshlq_m_s32): Likewise. |
| (__arm_vqshlq_m_s16): Likewise. |
| (__arm_vqshlq_m_u8): Likewise. |
| (__arm_vqshlq_m_u32): Likewise. |
| (__arm_vqshlq_m_u16): Likewise. |
| (__arm_vqsubq_m_n_s8): Likewise. |
| (__arm_vqsubq_m_n_s32): Likewise. |
| (__arm_vqsubq_m_n_s16): Likewise. |
| (__arm_vqsubq_m_n_u8): Likewise. |
| (__arm_vqsubq_m_n_u32): Likewise. |
| (__arm_vqsubq_m_n_u16): Likewise. |
| (__arm_vqsubq_m_s8): Likewise. |
| (__arm_vqsubq_m_s32): Likewise. |
| (__arm_vqsubq_m_s16): Likewise. |
| (__arm_vqsubq_m_u8): Likewise. |
| (__arm_vqsubq_m_u32): Likewise. |
| (__arm_vqsubq_m_u16): Likewise. |
| (__arm_vrhaddq_m_s8): Likewise. |
| (__arm_vrhaddq_m_s32): Likewise. |
| (__arm_vrhaddq_m_s16): Likewise. |
| (__arm_vrhaddq_m_u8): Likewise. |
| (__arm_vrhaddq_m_u32): Likewise. |
| (__arm_vrhaddq_m_u16): Likewise. |
| (__arm_vrmulhq_m_s8): Likewise. |
| (__arm_vrmulhq_m_s32): Likewise. |
| (__arm_vrmulhq_m_s16): Likewise. |
| (__arm_vrmulhq_m_u8): Likewise. |
| (__arm_vrmulhq_m_u32): Likewise. |
| (__arm_vrmulhq_m_u16): Likewise. |
| (__arm_vrshlq_m_s8): Likewise. |
| (__arm_vrshlq_m_s32): Likewise. |
| (__arm_vrshlq_m_s16): Likewise. |
| (__arm_vrshlq_m_u8): Likewise. |
| (__arm_vrshlq_m_u32): Likewise. |
| (__arm_vrshlq_m_u16): Likewise. |
| (__arm_vrshrq_m_n_s8): Likewise. |
| (__arm_vrshrq_m_n_s32): Likewise. |
| (__arm_vrshrq_m_n_s16): Likewise. |
| (__arm_vrshrq_m_n_u8): Likewise. |
| (__arm_vrshrq_m_n_u32): Likewise. |
| (__arm_vrshrq_m_n_u16): Likewise. |
| (__arm_vshlq_m_n_s8): Likewise. |
| (__arm_vshlq_m_n_s32): Likewise. |
| (__arm_vshlq_m_n_s16): Likewise. |
| (__arm_vshlq_m_n_u8): Likewise. |
| (__arm_vshlq_m_n_u32): Likewise. |
| (__arm_vshlq_m_n_u16): Likewise. |
| (__arm_vshrq_m_n_s8): Likewise. |
| (__arm_vshrq_m_n_s32): Likewise. |
| (__arm_vshrq_m_n_s16): Likewise. |
| (__arm_vshrq_m_n_u8): Likewise. |
| (__arm_vshrq_m_n_u32): Likewise. |
| (__arm_vshrq_m_n_u16): Likewise. |
| (__arm_vsliq_m_n_s8): Likewise. |
| (__arm_vsliq_m_n_s32): Likewise. |
| (__arm_vsliq_m_n_s16): Likewise. |
| (__arm_vsliq_m_n_u8): Likewise. |
| (__arm_vsliq_m_n_u32): Likewise. |
| (__arm_vsliq_m_n_u16): Likewise. |
| (__arm_vsubq_m_n_s8): Likewise. |
| (__arm_vsubq_m_n_s32): Likewise. |
| (__arm_vsubq_m_n_s16): Likewise. |
| (__arm_vsubq_m_n_u8): Likewise. |
| (__arm_vsubq_m_n_u32): Likewise. |
| (__arm_vsubq_m_n_u16): Likewise. |
| (vqdmladhq_m): Define polymorphic variant. |
| (vqdmladhxq_m): Likewise. |
| (vqdmlsdhq_m): Likewise. |
| (vqdmlsdhxq_m): Likewise. |
| (vabdq_m): Likewise. |
| (vandq_m): Likewise. |
| (vbicq_m): Likewise. |
| (vbrsrq_m_n): Likewise. |
| (vcaddq_rot270_m): Likewise. |
| (vcaddq_rot90_m): Likewise. |
| (veorq_m): Likewise. |
| (vmaxq_m): Likewise. |
| (vminq_m): Likewise. |
| (vmladavaq_p): Likewise. |
| (vmlaq_m_n): Likewise. |
| (vmlasq_m_n): Likewise. |
| (vmulhq_m): Likewise. |
| (vmullbq_int_m): Likewise. |
| (vmulltq_int_m): Likewise. |
| (vornq_m): Likewise. |
| (vorrq_m): Likewise. |
| (vqdmlahq_m_n): Likewise. |
| (vqrdmlahq_m_n): Likewise. |
| (vqrdmlashq_m_n): Likewise. |
| (vqrshlq_m): Likewise. |
| (vqshlq_m_n): Likewise. |
| (vqshlq_m): Likewise. |
| (vrhaddq_m): Likewise. |
| (vrmulhq_m): Likewise. |
| (vrshlq_m): Likewise. |
| (vrshrq_m_n): Likewise. |
| (vshlq_m_n): Likewise. |
| (vshrq_m_n): Likewise. |
| (vsliq_m): Likewise. |
| (vaddq_m_n): Likewise. |
| (vaddq_m): Likewise. |
| (vhaddq_m_n): Likewise. |
| (vhaddq_m): Likewise. |
| (vhcaddq_rot270_m): Likewise. |
| (vhcaddq_rot90_m): Likewise. |
| (vhsubq_m): Likewise. |
| (vhsubq_m_n): Likewise. |
| (vmulq_m_n): Likewise. |
| (vmulq_m): Likewise. |
| (vqaddq_m_n): Likewise. |
| (vqaddq_m): Likewise. |
| (vqdmulhq_m_n): Likewise. |
| (vqdmulhq_m): Likewise. |
| (vsubq_m_n): Likewise. |
| (vsliq_m_n): Likewise. |
| (vqsubq_m_n): Likewise. |
| (vqsubq_m): Likewise. |
| (vqrdmulhq_m): Likewise. |
| (vqrdmulhq_m_n): Likewise. |
| (vqrdmlsdhxq_m): Likewise. |
| (vqrdmlsdhq_m): Likewise. |
| (vqrdmladhq_m): Likewise. |
| (vqrdmladhxq_m): Likewise. |
| (vmlsdavaxq_p): Likewise. |
| (vmlsdavaq_p): Likewise. |
| (vmladavaxq_p): Likewise. |
| * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use |
| builtin qualifier. |
| (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise. |
| * config/arm/mve.md (VHSUBQ_M): Define iterators. |
| (VSLIQ_M_N): Likewise. |
| (VQRDMLAHQ_M_N): Likewise. |
| (VRSHLQ_M): Likewise. |
| (VMINQ_M): Likewise. |
| (VMULLBQ_INT_M): Likewise. |
| (VMULHQ_M): Likewise. |
| (VMULQ_M): Likewise. |
| (VHSUBQ_M_N): Likewise. |
| (VHADDQ_M_N): Likewise. |
| (VORRQ_M): Likewise. |
| (VRMULHQ_M): Likewise. |
| (VQADDQ_M): Likewise. |
| (VRSHRQ_M_N): Likewise. |
| (VQSUBQ_M_N): Likewise. |
| (VADDQ_M): Likewise. |
| (VORNQ_M): Likewise. |
| (VQDMLAHQ_M_N): Likewise. |
| (VRHADDQ_M): Likewise. |
| (VQSHLQ_M): Likewise. |
| (VANDQ_M): Likewise. |
| (VBICQ_M): Likewise. |
| (VSHLQ_M_N): Likewise. |
| (VCADDQ_ROT270_M): Likewise. |
| (VQRSHLQ_M): Likewise. |
| (VQADDQ_M_N): Likewise. |
| (VADDQ_M_N): Likewise. |
| (VMAXQ_M): Likewise. |
| (VQSUBQ_M): Likewise. |
| (VMLASQ_M_N): Likewise. |
| (VMLADAVAQ_P): Likewise. |
| (VBRSRQ_M_N): Likewise. |
| (VMULQ_M_N): Likewise. |
| (VCADDQ_ROT90_M): Likewise. |
| (VMULLTQ_INT_M): Likewise. |
| (VEORQ_M): Likewise. |
| (VSHRQ_M_N): Likewise. |
| (VSUBQ_M_N): Likewise. |
| (VHADDQ_M): Likewise. |
| (VABDQ_M): Likewise. |
| (VQRDMLASHQ_M_N): Likewise. |
| (VMLAQ_M_N): Likewise. |
| (VQSHLQ_M_N): Likewise. |
| (mve_vabdq_m_<supf><mode>): Define RTL pattern. |
| (mve_vaddq_m_n_<supf><mode>): Likewise. |
| (mve_vaddq_m_<supf><mode>): Likewise. |
| (mve_vandq_m_<supf><mode>): Likewise. |
| (mve_vbicq_m_<supf><mode>): Likewise. |
| (mve_vbrsrq_m_n_<supf><mode>): Likewise. |
| (mve_vcaddq_rot270_m_<supf><mode>): Likewise. |
| (mve_vcaddq_rot90_m_<supf><mode>): Likewise. |
| (mve_veorq_m_<supf><mode>): Likewise. |
| (mve_vhaddq_m_n_<supf><mode>): Likewise. |
| (mve_vhaddq_m_<supf><mode>): Likewise. |
| (mve_vhsubq_m_n_<supf><mode>): Likewise. |
| (mve_vhsubq_m_<supf><mode>): Likewise. |
| (mve_vmaxq_m_<supf><mode>): Likewise. |
| (mve_vminq_m_<supf><mode>): Likewise. |
| (mve_vmladavaq_p_<supf><mode>): Likewise. |
| (mve_vmlaq_m_n_<supf><mode>): Likewise. |
| (mve_vmlasq_m_n_<supf><mode>): Likewise. |
| (mve_vmulhq_m_<supf><mode>): Likewise. |
| (mve_vmullbq_int_m_<supf><mode>): Likewise. |
| (mve_vmulltq_int_m_<supf><mode>): Likewise. |
| (mve_vmulq_m_n_<supf><mode>): Likewise. |
| (mve_vmulq_m_<supf><mode>): Likewise. |
| (mve_vornq_m_<supf><mode>): Likewise. |
| (mve_vorrq_m_<supf><mode>): Likewise. |
| (mve_vqaddq_m_n_<supf><mode>): Likewise. |
| (mve_vqaddq_m_<supf><mode>): Likewise. |
| (mve_vqdmlahq_m_n_<supf><mode>): Likewise. |
| (mve_vqrdmlahq_m_n_<supf><mode>): Likewise. |
| (mve_vqrdmlashq_m_n_<supf><mode>): Likewise. |
| (mve_vqrshlq_m_<supf><mode>): Likewise. |
| (mve_vqshlq_m_n_<supf><mode>): Likewise. |
| (mve_vqshlq_m_<supf><mode>): Likewise. |
| (mve_vqsubq_m_n_<supf><mode>): Likewise. |
| (mve_vqsubq_m_<supf><mode>): Likewise. |
| (mve_vrhaddq_m_<supf><mode>): Likewise. |
| (mve_vrmulhq_m_<supf><mode>): Likewise. |
| (mve_vrshlq_m_<supf><mode>): Likewise. |
| (mve_vrshrq_m_n_<supf><mode>): Likewise. |
| (mve_vshlq_m_n_<supf><mode>): Likewise. |
| (mve_vshrq_m_n_<supf><mode>): Likewise. |
| (mve_vsliq_m_n_<supf><mode>): Likewise. |
| (mve_vsubq_m_n_<supf><mode>): Likewise. |
| (mve_vhcaddq_rot270_m_s<mode>): Likewise. |
| (mve_vhcaddq_rot90_m_s<mode>): Likewise. |
| (mve_vmladavaxq_p_s<mode>): Likewise. |
| (mve_vmlsdavaq_p_s<mode>): Likewise. |
| (mve_vmlsdavaxq_p_s<mode>): Likewise. |
| (mve_vqdmladhq_m_s<mode>): Likewise. |
| (mve_vqdmladhxq_m_s<mode>): Likewise. |
| (mve_vqdmlsdhq_m_s<mode>): Likewise. |
| (mve_vqdmlsdhxq_m_s<mode>): Likewise. |
| (mve_vqdmulhq_m_n_s<mode>): Likewise. |
| (mve_vqdmulhq_m_s<mode>): Likewise. |
| (mve_vqrdmladhq_m_s<mode>): Likewise. |
| (mve_vqrdmladhxq_m_s<mode>): Likewise. |
| (mve_vqrdmlsdhq_m_s<mode>): Likewise. |
| (mve_vqrdmlsdhxq_m_s<mode>): Likewise. |
| (mve_vqrdmulhq_m_n_s<mode>): Likewise. |
| (mve_vqrdmulhq_m_s<mode>): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): |
| Define builtin qualifier. |
| (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro. |
| (vsubq_m_s8): Likewise. |
| (vcvtq_m_n_f16_u16): Likewise. |
| (vqshluq_m_n_s8): Likewise. |
| (vabavq_p_s8): Likewise. |
| (vsriq_m_n_u8): Likewise. |
| (vshlq_m_u8): Likewise. |
| (vsubq_m_u8): Likewise. |
| (vabavq_p_u8): Likewise. |
| (vshlq_m_s8): Likewise. |
| (vcvtq_m_n_f16_s16): Likewise. |
| (vsriq_m_n_s16): Likewise. |
| (vsubq_m_s16): Likewise. |
| (vcvtq_m_n_f32_u32): Likewise. |
| (vqshluq_m_n_s16): Likewise. |
| (vabavq_p_s16): Likewise. |
| (vsriq_m_n_u16): Likewise. |
| (vshlq_m_u16): Likewise. |
| (vsubq_m_u16): Likewise. |
| (vabavq_p_u16): Likewise. |
| (vshlq_m_s16): Likewise. |
| (vcvtq_m_n_f32_s32): Likewise. |
| (vsriq_m_n_s32): Likewise. |
| (vsubq_m_s32): Likewise. |
| (vqshluq_m_n_s32): Likewise. |
| (vabavq_p_s32): Likewise. |
| (vsriq_m_n_u32): Likewise. |
| (vshlq_m_u32): Likewise. |
| (vsubq_m_u32): Likewise. |
| (vabavq_p_u32): Likewise. |
| (vshlq_m_s32): Likewise. |
| (__arm_vsriq_m_n_s8): Define intrinsic. |
| (__arm_vsubq_m_s8): Likewise. |
| (__arm_vqshluq_m_n_s8): Likewise. |
| (__arm_vabavq_p_s8): Likewise. |
| (__arm_vsriq_m_n_u8): Likewise. |
| (__arm_vshlq_m_u8): Likewise. |
| (__arm_vsubq_m_u8): Likewise. |
| (__arm_vabavq_p_u8): Likewise. |
| (__arm_vshlq_m_s8): Likewise. |
| (__arm_vsriq_m_n_s16): Likewise. |
| (__arm_vsubq_m_s16): Likewise. |
| (__arm_vqshluq_m_n_s16): Likewise. |
| (__arm_vabavq_p_s16): Likewise. |
| (__arm_vsriq_m_n_u16): Likewise. |
| (__arm_vshlq_m_u16): Likewise. |
| (__arm_vsubq_m_u16): Likewise. |
| (__arm_vabavq_p_u16): Likewise. |
| (__arm_vshlq_m_s16): Likewise. |
| (__arm_vsriq_m_n_s32): Likewise. |
| (__arm_vsubq_m_s32): Likewise. |
| (__arm_vqshluq_m_n_s32): Likewise. |
| (__arm_vabavq_p_s32): Likewise. |
| (__arm_vsriq_m_n_u32): Likewise. |
| (__arm_vshlq_m_u32): Likewise. |
| (__arm_vsubq_m_u32): Likewise. |
| (__arm_vabavq_p_u32): Likewise. |
| (__arm_vshlq_m_s32): Likewise. |
| (__arm_vcvtq_m_n_f16_u16): Likewise. |
| (__arm_vcvtq_m_n_f16_s16): Likewise. |
| (__arm_vcvtq_m_n_f32_u32): Likewise. |
| (__arm_vcvtq_m_n_f32_s32): Likewise. |
| (vcvtq_m_n): Define polymorphic variant. |
| (vqshluq_m_n): Likewise. |
| (vshlq_m): Likewise. |
| (vsriq_m_n): Likewise. |
| (vsubq_m): Likewise. |
| (vabavq_p): Likewise. |
| * config/arm/arm_mve_builtins.def |
| (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier. |
| (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise. |
| * config/arm/mve.md (VABAVQ_P): Define iterator. |
| (VSHLQ_M): Likewise. |
| (VSRIQ_M_N): Likewise. |
| (VSUBQ_M): Likewise. |
| (VCVTQ_M_N_TO_F): Likewise. |
| (mve_vabavq_p_<supf><mode>): Define RTL pattern. |
| (mve_vqshluq_m_n_s<mode>): Likewise. |
| (mve_vshlq_m_<supf><mode>): Likewise. |
| (mve_vsriq_m_n_<supf><mode>): Likewise. |
| (mve_vsubq_m_<supf><mode>): Likewise. |
| (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro. |
| (vrmlsldavhaq_s32): Likewise. |
| (vrmlsldavhaxq_s32): Likewise. |
| (vaddlvaq_p_s32): Likewise. |
| (vcvtbq_m_f16_f32): Likewise. |
| (vcvtbq_m_f32_f16): Likewise. |
| (vcvttq_m_f16_f32): Likewise. |
| (vcvttq_m_f32_f16): Likewise. |
| (vrev16q_m_s8): Likewise. |
| (vrev32q_m_f16): Likewise. |
| (vrmlaldavhq_p_s32): Likewise. |
| (vrmlaldavhxq_p_s32): Likewise. |
| (vrmlsldavhq_p_s32): Likewise. |
| (vrmlsldavhxq_p_s32): Likewise. |
| (vaddlvaq_p_u32): Likewise. |
| (vrev16q_m_u8): Likewise. |
| (vrmlaldavhq_p_u32): Likewise. |
| (vmvnq_m_n_s16): Likewise. |
| (vorrq_m_n_s16): Likewise. |
| (vqrshrntq_n_s16): Likewise. |
| (vqshrnbq_n_s16): Likewise. |
| (vqshrntq_n_s16): Likewise. |
| (vrshrnbq_n_s16): Likewise. |
| (vrshrntq_n_s16): Likewise. |
| (vshrnbq_n_s16): Likewise. |
| (vshrntq_n_s16): Likewise. |
| (vcmlaq_f16): Likewise. |
| (vcmlaq_rot180_f16): Likewise. |
| (vcmlaq_rot270_f16): Likewise. |
| (vcmlaq_rot90_f16): Likewise. |
| (vfmaq_f16): Likewise. |
| (vfmaq_n_f16): Likewise. |
| (vfmasq_n_f16): Likewise. |
| (vfmsq_f16): Likewise. |
| (vmlaldavaq_s16): Likewise. |
| (vmlaldavaxq_s16): Likewise. |
| (vmlsldavaq_s16): Likewise. |
| (vmlsldavaxq_s16): Likewise. |
| (vabsq_m_f16): Likewise. |
| (vcvtmq_m_s16_f16): Likewise. |
| (vcvtnq_m_s16_f16): Likewise. |
| (vcvtpq_m_s16_f16): Likewise. |
| (vcvtq_m_s16_f16): Likewise. |
| (vdupq_m_n_f16): Likewise. |
| (vmaxnmaq_m_f16): Likewise. |
| (vmaxnmavq_p_f16): Likewise. |
| (vmaxnmvq_p_f16): Likewise. |
| (vminnmaq_m_f16): Likewise. |
| (vminnmavq_p_f16): Likewise. |
| (vminnmvq_p_f16): Likewise. |
| (vmlaldavq_p_s16): Likewise. |
| (vmlaldavxq_p_s16): Likewise. |
| (vmlsldavq_p_s16): Likewise. |
| (vmlsldavxq_p_s16): Likewise. |
| (vmovlbq_m_s8): Likewise. |
| (vmovltq_m_s8): Likewise. |
| (vmovnbq_m_s16): Likewise. |
| (vmovntq_m_s16): Likewise. |
| (vnegq_m_f16): Likewise. |
| (vpselq_f16): Likewise. |
| (vqmovnbq_m_s16): Likewise. |
| (vqmovntq_m_s16): Likewise. |
| (vrev32q_m_s8): Likewise. |
| (vrev64q_m_f16): Likewise. |
| (vrndaq_m_f16): Likewise. |
| (vrndmq_m_f16): Likewise. |
| (vrndnq_m_f16): Likewise. |
| (vrndpq_m_f16): Likewise. |
| (vrndq_m_f16): Likewise. |
| (vrndxq_m_f16): Likewise. |
| (vcmpeqq_m_n_f16): Likewise. |
| (vcmpgeq_m_f16): Likewise. |
| (vcmpgeq_m_n_f16): Likewise. |
| (vcmpgtq_m_f16): Likewise. |
| (vcmpgtq_m_n_f16): Likewise. |
| (vcmpleq_m_f16): Likewise. |
| (vcmpleq_m_n_f16): Likewise. |
| (vcmpltq_m_f16): Likewise. |
| (vcmpltq_m_n_f16): Likewise. |
| (vcmpneq_m_f16): Likewise. |
| (vcmpneq_m_n_f16): Likewise. |
| (vmvnq_m_n_u16): Likewise. |
| (vorrq_m_n_u16): Likewise. |
| (vqrshruntq_n_s16): Likewise. |
| (vqshrunbq_n_s16): Likewise. |
| (vqshruntq_n_s16): Likewise. |
| (vcvtmq_m_u16_f16): Likewise. |
| (vcvtnq_m_u16_f16): Likewise. |
| (vcvtpq_m_u16_f16): Likewise. |
| (vcvtq_m_u16_f16): Likewise. |
| (vqmovunbq_m_s16): Likewise. |
| (vqmovuntq_m_s16): Likewise. |
| (vqrshrntq_n_u16): Likewise. |
| (vqshrnbq_n_u16): Likewise. |
| (vqshrntq_n_u16): Likewise. |
| (vrshrnbq_n_u16): Likewise. |
| (vrshrntq_n_u16): Likewise. |
| (vshrnbq_n_u16): Likewise. |
| (vshrntq_n_u16): Likewise. |
| (vmlaldavaq_u16): Likewise. |
| (vmlaldavaxq_u16): Likewise. |
| (vmlaldavq_p_u16): Likewise. |
| (vmlaldavxq_p_u16): Likewise. |
| (vmovlbq_m_u8): Likewise. |
| (vmovltq_m_u8): Likewise. |
| (vmovnbq_m_u16): Likewise. |
| (vmovntq_m_u16): Likewise. |
| (vqmovnbq_m_u16): Likewise. |
| (vqmovntq_m_u16): Likewise. |
| (vrev32q_m_u8): Likewise. |
| (vmvnq_m_n_s32): Likewise. |
| (vorrq_m_n_s32): Likewise. |
| (vqrshrntq_n_s32): Likewise. |
| (vqshrnbq_n_s32): Likewise. |
| (vqshrntq_n_s32): Likewise. |
| (vrshrnbq_n_s32): Likewise. |
| (vrshrntq_n_s32): Likewise. |
| (vshrnbq_n_s32): Likewise. |
| (vshrntq_n_s32): Likewise. |
| (vcmlaq_f32): Likewise. |
| (vcmlaq_rot180_f32): Likewise. |
| (vcmlaq_rot270_f32): Likewise. |
| (vcmlaq_rot90_f32): Likewise. |
| (vfmaq_f32): Likewise. |
| (vfmaq_n_f32): Likewise. |
| (vfmasq_n_f32): Likewise. |
| (vfmsq_f32): Likewise. |
| (vmlaldavaq_s32): Likewise. |
| (vmlaldavaxq_s32): Likewise. |
| (vmlsldavaq_s32): Likewise. |
| (vmlsldavaxq_s32): Likewise. |
| (vabsq_m_f32): Likewise. |
| (vcvtmq_m_s32_f32): Likewise. |
| (vcvtnq_m_s32_f32): Likewise. |
| (vcvtpq_m_s32_f32): Likewise. |
| (vcvtq_m_s32_f32): Likewise. |
| (vdupq_m_n_f32): Likewise. |
| (vmaxnmaq_m_f32): Likewise. |
| (vmaxnmavq_p_f32): Likewise. |
| (vmaxnmvq_p_f32): Likewise. |
| (vminnmaq_m_f32): Likewise. |
| (vminnmavq_p_f32): Likewise. |
| (vminnmvq_p_f32): Likewise. |
| (vmlaldavq_p_s32): Likewise. |
| (vmlaldavxq_p_s32): Likewise. |
| (vmlsldavq_p_s32): Likewise. |
| (vmlsldavxq_p_s32): Likewise. |
| (vmovlbq_m_s16): Likewise. |
| (vmovltq_m_s16): Likewise. |
| (vmovnbq_m_s32): Likewise. |
| (vmovntq_m_s32): Likewise. |
| (vnegq_m_f32): Likewise. |
| (vpselq_f32): Likewise. |
| (vqmovnbq_m_s32): Likewise. |
| (vqmovntq_m_s32): Likewise. |
| (vrev32q_m_s16): Likewise. |
| (vrev64q_m_f32): Likewise. |
| (vrndaq_m_f32): Likewise. |
| (vrndmq_m_f32): Likewise. |
| (vrndnq_m_f32): Likewise. |
| (vrndpq_m_f32): Likewise. |
| (vrndq_m_f32): Likewise. |
| (vrndxq_m_f32): Likewise. |
| (vcmpeqq_m_n_f32): Likewise. |
| (vcmpgeq_m_f32): Likewise. |
| (vcmpgeq_m_n_f32): Likewise. |
| (vcmpgtq_m_f32): Likewise. |
| (vcmpgtq_m_n_f32): Likewise. |
| (vcmpleq_m_f32): Likewise. |
| (vcmpleq_m_n_f32): Likewise. |
| (vcmpltq_m_f32): Likewise. |
| (vcmpltq_m_n_f32): Likewise. |
| (vcmpneq_m_f32): Likewise. |
| (vcmpneq_m_n_f32): Likewise. |
| (vmvnq_m_n_u32): Likewise. |
| (vorrq_m_n_u32): Likewise. |
| (vqrshruntq_n_s32): Likewise. |
| (vqshrunbq_n_s32): Likewise. |
| (vqshruntq_n_s32): Likewise. |
| (vcvtmq_m_u32_f32): Likewise. |
| (vcvtnq_m_u32_f32): Likewise. |
| (vcvtpq_m_u32_f32): Likewise. |
| (vcvtq_m_u32_f32): Likewise. |
| (vqmovunbq_m_s32): Likewise. |
| (vqmovuntq_m_s32): Likewise. |
| (vqrshrntq_n_u32): Likewise. |
| (vqshrnbq_n_u32): Likewise. |
| (vqshrntq_n_u32): Likewise. |
| (vrshrnbq_n_u32): Likewise. |
| (vrshrntq_n_u32): Likewise. |
| (vshrnbq_n_u32): Likewise. |
| (vshrntq_n_u32): Likewise. |
| (vmlaldavaq_u32): Likewise. |
| (vmlaldavaxq_u32): Likewise. |
| (vmlaldavq_p_u32): Likewise. |
| (vmlaldavxq_p_u32): Likewise. |
| (vmovlbq_m_u16): Likewise. |
| (vmovltq_m_u16): Likewise. |
| (vmovnbq_m_u32): Likewise. |
| (vmovntq_m_u32): Likewise. |
| (vqmovnbq_m_u32): Likewise. |
| (vqmovntq_m_u32): Likewise. |
| (vrev32q_m_u16): Likewise. |
| (__arm_vrmlaldavhaxq_s32): Define intrinsic. |
| (__arm_vrmlsldavhaq_s32): Likewise. |
| (__arm_vrmlsldavhaxq_s32): Likewise. |
| (__arm_vaddlvaq_p_s32): Likewise. |
| (__arm_vrev16q_m_s8): Likewise. |
| (__arm_vrmlaldavhq_p_s32): Likewise. |
| (__arm_vrmlaldavhxq_p_s32): Likewise. |
| (__arm_vrmlsldavhq_p_s32): Likewise. |
| (__arm_vrmlsldavhxq_p_s32): Likewise. |
| (__arm_vaddlvaq_p_u32): Likewise. |
| (__arm_vrev16q_m_u8): Likewise. |
| (__arm_vrmlaldavhq_p_u32): Likewise. |
| (__arm_vmvnq_m_n_s16): Likewise. |
| (__arm_vorrq_m_n_s16): Likewise. |
| (__arm_vqrshrntq_n_s16): Likewise. |
| (__arm_vqshrnbq_n_s16): Likewise. |
| (__arm_vqshrntq_n_s16): Likewise. |
| (__arm_vrshrnbq_n_s16): Likewise. |
| (__arm_vrshrntq_n_s16): Likewise. |
| (__arm_vshrnbq_n_s16): Likewise. |
| (__arm_vshrntq_n_s16): Likewise. |
| (__arm_vmlaldavaq_s16): Likewise. |
| (__arm_vmlaldavaxq_s16): Likewise. |
| (__arm_vmlsldavaq_s16): Likewise. |
| (__arm_vmlsldavaxq_s16): Likewise. |
| (__arm_vmlaldavq_p_s16): Likewise. |
| (__arm_vmlaldavxq_p_s16): Likewise. |
| (__arm_vmlsldavq_p_s16): Likewise. |
| (__arm_vmlsldavxq_p_s16): Likewise. |
| (__arm_vmovlbq_m_s8): Likewise. |
| (__arm_vmovltq_m_s8): Likewise. |
| (__arm_vmovnbq_m_s16): Likewise. |
| (__arm_vmovntq_m_s16): Likewise. |
| (__arm_vqmovnbq_m_s16): Likewise. |
| (__arm_vqmovntq_m_s16): Likewise. |
| (__arm_vrev32q_m_s8): Likewise. |
| (__arm_vmvnq_m_n_u16): Likewise. |
| (__arm_vorrq_m_n_u16): Likewise. |
| (__arm_vqrshruntq_n_s16): Likewise. |
| (__arm_vqshrunbq_n_s16): Likewise. |
| (__arm_vqshruntq_n_s16): Likewise. |
| (__arm_vqmovunbq_m_s16): Likewise. |
| (__arm_vqmovuntq_m_s16): Likewise. |
| (__arm_vqrshrntq_n_u16): Likewise. |
| (__arm_vqshrnbq_n_u16): Likewise. |
| (__arm_vqshrntq_n_u16): Likewise. |
| (__arm_vrshrnbq_n_u16): Likewise. |
| (__arm_vrshrntq_n_u16): Likewise. |
| (__arm_vshrnbq_n_u16): Likewise. |
| (__arm_vshrntq_n_u16): Likewise. |
| (__arm_vmlaldavaq_u16): Likewise. |
| (__arm_vmlaldavaxq_u16): Likewise. |
| (__arm_vmlaldavq_p_u16): Likewise. |
| (__arm_vmlaldavxq_p_u16): Likewise. |
| (__arm_vmovlbq_m_u8): Likewise. |
| (__arm_vmovltq_m_u8): Likewise. |
| (__arm_vmovnbq_m_u16): Likewise. |
| (__arm_vmovntq_m_u16): Likewise. |
| (__arm_vqmovnbq_m_u16): Likewise. |
| (__arm_vqmovntq_m_u16): Likewise. |
| (__arm_vrev32q_m_u8): Likewise. |
| (__arm_vmvnq_m_n_s32): Likewise. |
| (__arm_vorrq_m_n_s32): Likewise. |
| (__arm_vqrshrntq_n_s32): Likewise. |
| (__arm_vqshrnbq_n_s32): Likewise. |
| (__arm_vqshrntq_n_s32): Likewise. |
| (__arm_vrshrnbq_n_s32): Likewise. |
| (__arm_vrshrntq_n_s32): Likewise. |
| (__arm_vshrnbq_n_s32): Likewise. |
| (__arm_vshrntq_n_s32): Likewise. |
| (__arm_vmlaldavaq_s32): Likewise. |
| (__arm_vmlaldavaxq_s32): Likewise. |
| (__arm_vmlsldavaq_s32): Likewise. |
| (__arm_vmlsldavaxq_s32): Likewise. |
| (__arm_vmlaldavq_p_s32): Likewise. |
| (__arm_vmlaldavxq_p_s32): Likewise. |
| (__arm_vmlsldavq_p_s32): Likewise. |
| (__arm_vmlsldavxq_p_s32): Likewise. |
| (__arm_vmovlbq_m_s16): Likewise. |
| (__arm_vmovltq_m_s16): Likewise. |
| (__arm_vmovnbq_m_s32): Likewise. |
| (__arm_vmovntq_m_s32): Likewise. |
| (__arm_vqmovnbq_m_s32): Likewise. |
| (__arm_vqmovntq_m_s32): Likewise. |
| (__arm_vrev32q_m_s16): Likewise. |
| (__arm_vmvnq_m_n_u32): Likewise. |
| (__arm_vorrq_m_n_u32): Likewise. |
| (__arm_vqrshruntq_n_s32): Likewise. |
| (__arm_vqshrunbq_n_s32): Likewise. |
| (__arm_vqshruntq_n_s32): Likewise. |
| (__arm_vqmovunbq_m_s32): Likewise. |
| (__arm_vqmovuntq_m_s32): Likewise. |
| (__arm_vqrshrntq_n_u32): Likewise. |
| (__arm_vqshrnbq_n_u32): Likewise. |
| (__arm_vqshrntq_n_u32): Likewise. |
| (__arm_vrshrnbq_n_u32): Likewise. |
| (__arm_vrshrntq_n_u32): Likewise. |
| (__arm_vshrnbq_n_u32): Likewise. |
| (__arm_vshrntq_n_u32): Likewise. |
| (__arm_vmlaldavaq_u32): Likewise. |
| (__arm_vmlaldavaxq_u32): Likewise. |
| (__arm_vmlaldavq_p_u32): Likewise. |
| (__arm_vmlaldavxq_p_u32): Likewise. |
| (__arm_vmovlbq_m_u16): Likewise. |
| (__arm_vmovltq_m_u16): Likewise. |
| (__arm_vmovnbq_m_u32): Likewise. |
| (__arm_vmovntq_m_u32): Likewise. |
| (__arm_vqmovnbq_m_u32): Likewise. |
| (__arm_vqmovntq_m_u32): Likewise. |
| (__arm_vrev32q_m_u16): Likewise. |
| (__arm_vcvtbq_m_f16_f32): Likewise. |
| (__arm_vcvtbq_m_f32_f16): Likewise. |
| (__arm_vcvttq_m_f16_f32): Likewise. |
| (__arm_vcvttq_m_f32_f16): Likewise. |
| (__arm_vrev32q_m_f16): Likewise. |
| (__arm_vcmlaq_f16): Likewise. |
| (__arm_vcmlaq_rot180_f16): Likewise. |
| (__arm_vcmlaq_rot270_f16): Likewise. |
| (__arm_vcmlaq_rot90_f16): Likewise. |
| (__arm_vfmaq_f16): Likewise. |
| (__arm_vfmaq_n_f16): Likewise. |
| (__arm_vfmasq_n_f16): Likewise. |
| (__arm_vfmsq_f16): Likewise. |
| (__arm_vabsq_m_f16): Likewise. |
| (__arm_vcvtmq_m_s16_f16): Likewise. |
| (__arm_vcvtnq_m_s16_f16): Likewise. |
| (__arm_vcvtpq_m_s16_f16): Likewise. |
| (__arm_vcvtq_m_s16_f16): Likewise. |
| (__arm_vdupq_m_n_f16): Likewise. |
| (__arm_vmaxnmaq_m_f16): Likewise. |
| (__arm_vmaxnmavq_p_f16): Likewise. |
| (__arm_vmaxnmvq_p_f16): Likewise. |
| (__arm_vminnmaq_m_f16): Likewise. |
| (__arm_vminnmavq_p_f16): Likewise. |
| (__arm_vminnmvq_p_f16): Likewise. |
| (__arm_vnegq_m_f16): Likewise. |
| (__arm_vpselq_f16): Likewise. |
| (__arm_vrev64q_m_f16): Likewise. |
| (__arm_vrndaq_m_f16): Likewise. |
| (__arm_vrndmq_m_f16): Likewise. |
| (__arm_vrndnq_m_f16): Likewise. |
| (__arm_vrndpq_m_f16): Likewise. |
| (__arm_vrndq_m_f16): Likewise. |
| (__arm_vrndxq_m_f16): Likewise. |
| (__arm_vcmpeqq_m_n_f16): Likewise. |
| (__arm_vcmpgeq_m_f16): Likewise. |
| (__arm_vcmpgeq_m_n_f16): Likewise. |
| (__arm_vcmpgtq_m_f16): Likewise. |
| (__arm_vcmpgtq_m_n_f16): Likewise. |
| (__arm_vcmpleq_m_f16): Likewise. |
| (__arm_vcmpleq_m_n_f16): Likewise. |
| (__arm_vcmpltq_m_f16): Likewise. |
| (__arm_vcmpltq_m_n_f16): Likewise. |
| (__arm_vcmpneq_m_f16): Likewise. |
| (__arm_vcmpneq_m_n_f16): Likewise. |
| (__arm_vcvtmq_m_u16_f16): Likewise. |
| (__arm_vcvtnq_m_u16_f16): Likewise. |
| (__arm_vcvtpq_m_u16_f16): Likewise. |
| (__arm_vcvtq_m_u16_f16): Likewise. |
| (__arm_vcmlaq_f32): Likewise. |
| (__arm_vcmlaq_rot180_f32): Likewise. |
| (__arm_vcmlaq_rot270_f32): Likewise. |
| (__arm_vcmlaq_rot90_f32): Likewise. |
| (__arm_vfmaq_f32): Likewise. |
| (__arm_vfmaq_n_f32): Likewise. |
| (__arm_vfmasq_n_f32): Likewise. |
| (__arm_vfmsq_f32): Likewise. |
| (__arm_vabsq_m_f32): Likewise. |
| (__arm_vcvtmq_m_s32_f32): Likewise. |
| (__arm_vcvtnq_m_s32_f32): Likewise. |
| (__arm_vcvtpq_m_s32_f32): Likewise. |
| (__arm_vcvtq_m_s32_f32): Likewise. |
| (__arm_vdupq_m_n_f32): Likewise. |
| (__arm_vmaxnmaq_m_f32): Likewise. |
| (__arm_vmaxnmavq_p_f32): Likewise. |
| (__arm_vmaxnmvq_p_f32): Likewise. |
| (__arm_vminnmaq_m_f32): Likewise. |
| (__arm_vminnmavq_p_f32): Likewise. |
| (__arm_vminnmvq_p_f32): Likewise. |
| (__arm_vnegq_m_f32): Likewise. |
| (__arm_vpselq_f32): Likewise. |
| (__arm_vrev64q_m_f32): Likewise. |
| (__arm_vrndaq_m_f32): Likewise. |
| (__arm_vrndmq_m_f32): Likewise. |
| (__arm_vrndnq_m_f32): Likewise. |
| (__arm_vrndpq_m_f32): Likewise. |
| (__arm_vrndq_m_f32): Likewise. |
| (__arm_vrndxq_m_f32): Likewise. |
| (__arm_vcmpeqq_m_n_f32): Likewise. |
| (__arm_vcmpgeq_m_f32): Likewise. |
| (__arm_vcmpgeq_m_n_f32): Likewise. |
| (__arm_vcmpgtq_m_f32): Likewise. |
| (__arm_vcmpgtq_m_n_f32): Likewise. |
| (__arm_vcmpleq_m_f32): Likewise. |
| (__arm_vcmpleq_m_n_f32): Likewise. |
| (__arm_vcmpltq_m_f32): Likewise. |
| (__arm_vcmpltq_m_n_f32): Likewise. |
| (__arm_vcmpneq_m_f32): Likewise. |
| (__arm_vcmpneq_m_n_f32): Likewise. |
| (__arm_vcvtmq_m_u32_f32): Likewise. |
| (__arm_vcvtnq_m_u32_f32): Likewise. |
| (__arm_vcvtpq_m_u32_f32): Likewise. |
| (__arm_vcvtq_m_u32_f32): Likewise. |
| (vcvtq_m): Define polymorphic variant. |
| (vabsq_m): Likewise. |
| (vcmlaq): Likewise. |
| (vcmlaq_rot180): Likewise. |
| (vcmlaq_rot270): Likewise. |
| (vcmlaq_rot90): Likewise. |
| (vcmpeqq_m_n): Likewise. |
| (vcmpgeq_m_n): Likewise. |
| (vrndxq_m): Likewise. |
| (vrndq_m): Likewise. |
| (vrndpq_m): Likewise. |
| (vcmpgtq_m_n): Likewise. |
| (vcmpgtq_m): Likewise. |
| (vcmpleq_m): Likewise. |
| (vcmpleq_m_n): Likewise. |
| (vcmpltq_m_n): Likewise. |
| (vcmpltq_m): Likewise. |
| (vcmpneq_m): Likewise. |
| (vcmpneq_m_n): Likewise. |
| (vcvtbq_m): Likewise. |
| (vcvttq_m): Likewise. |
| (vcvtmq_m): Likewise. |
| (vcvtnq_m): Likewise. |
| (vcvtpq_m): Likewise. |
| (vdupq_m_n): Likewise. |
| (vfmaq_n): Likewise. |
| (vfmaq): Likewise. |
| (vfmasq_n): Likewise. |
| (vfmsq): Likewise. |
| (vmaxnmaq_m): Likewise. |
| (vmaxnmavq_m): Likewise. |
| (vmaxnmvq_m): Likewise. |
| (vmaxnmavq_p): Likewise. |
| (vmaxnmvq_p): Likewise. |
| (vminnmaq_m): Likewise. |
| (vminnmavq_p): Likewise. |
| (vminnmvq_p): Likewise. |
| (vrndnq_m): Likewise. |
| (vrndaq_m): Likewise. |
| (vrndmq_m): Likewise. |
| (vrev64q_m): Likewise. |
| (vrev32q_m): Likewise. |
| (vpselq): Likewise. |
| (vnegq_m): Likewise. |
| (vcmpgeq_m): Likewise. |
| (vshrntq_n): Likewise. |
| (vrshrntq_n): Likewise. |
| (vmovlbq_m): Likewise. |
| (vmovnbq_m): Likewise. |
| (vmovntq_m): Likewise. |
| (vmvnq_m_n): Likewise. |
| (vmvnq_m): Likewise. |
| (vshrnbq_n): Likewise. |
| (vrshrnbq_n): Likewise. |
| (vqshruntq_n): Likewise. |
| (vrev16q_m): Likewise. |
| (vqshrunbq_n): Likewise. |
| (vqshrntq_n): Likewise. |
| (vqrshruntq_n): Likewise. |
| (vqrshrntq_n): Likewise. |
| (vqshrnbq_n): Likewise. |
| (vqmovuntq_m): Likewise. |
| (vqmovntq_m): Likewise. |
| (vqmovnbq_m): Likewise. |
| (vorrq_m_n): Likewise. |
| (vmovltq_m): Likewise. |
| (vqmovunbq_m): Likewise. |
| (vaddlvaq_p): Likewise. |
| (vmlaldavaq): Likewise. |
| (vmlaldavaxq): Likewise. |
| (vmlaldavq_p): Likewise. |
| (vmlaldavxq_p): Likewise. |
| (vmlsldavaq): Likewise. |
| (vmlsldavaxq): Likewise. |
| (vmlsldavq_p): Likewise. |
| (vmlsldavxq_p): Likewise. |
| (vrmlaldavhaxq): Likewise. |
| (vrmlaldavhq_p): Likewise. |
| (vrmlaldavhxq_p): Likewise. |
| (vrmlsldavhaq): Likewise. |
| (vrmlsldavhaxq): Likewise. |
| (vrmlsldavhq_p): Likewise. |
| (vrmlsldavhxq_p): Likewise. |
| * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use |
| builtin qualifier. |
| (TERNOP_NONE_NONE_NONE_IMM): Likewise. |
| (TERNOP_NONE_NONE_NONE_NONE): Likewise. |
| (TERNOP_NONE_NONE_NONE_UNONE): Likewise. |
| (TERNOP_UNONE_NONE_NONE_UNONE): Likewise. |
| (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise. |
| (TERNOP_UNONE_UNONE_NONE_IMM): Likewise. |
| (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise. |
| (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise. |
| (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise. |
| * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator. |
| (MVE_pred3): Likewise. |
| (MVE_constraint1): Likewise. |
| (MVE_pred1): Likewise. |
| (VMLALDAVQ_P): Define iterator. |
| (VQMOVNBQ_M): Likewise. |
| (VMOVLTQ_M): Likewise. |
| (VMOVNBQ_M): Likewise. |
| (VRSHRNTQ_N): Likewise. |
| (VORRQ_M_N): Likewise. |
| (VREV32Q_M): Likewise. |
| (VREV16Q_M): Likewise. |
| (VQRSHRNTQ_N): Likewise. |
| (VMOVNTQ_M): Likewise. |
| (VMOVLBQ_M): Likewise. |
| (VMLALDAVAQ): Likewise. |
| (VQSHRNBQ_N): Likewise. |
| (VSHRNBQ_N): Likewise. |
| (VRSHRNBQ_N): Likewise. |
| (VMLALDAVXQ_P): Likewise. |
| (VQMOVNTQ_M): Likewise. |
| (VMVNQ_M_N): Likewise. |
| (VQSHRNTQ_N): Likewise. |
| (VMLALDAVAXQ): Likewise. |
| (VSHRNTQ_N): Likewise. |
| (VCVTMQ_M): Likewise. |
| (VCVTNQ_M): Likewise. |
| (VCVTPQ_M): Likewise. |
| (VCVTQ_M_N_FROM_F): Likewise. |
| (VCVTQ_M_FROM_F): Likewise. |
| (VRMLALDAVHQ_P): Likewise. |
| (VADDLVAQ_P): Likewise. |
| (mve_vrndq_m_f<mode>): Define RTL pattern. |
| (mve_vabsq_m_f<mode>): Likewise. |
| (mve_vaddlvaq_p_<supf>v4si): Likewise. |
| (mve_vcmlaq_f<mode>): Likewise. |
| (mve_vcmlaq_rot180_f<mode>): Likewise. |
| (mve_vcmlaq_rot270_f<mode>): Likewise. |
| (mve_vcmlaq_rot90_f<mode>): Likewise. |
| (mve_vcmpeqq_m_n_f<mode>): Likewise. |
| (mve_vcmpgeq_m_f<mode>): Likewise. |
| (mve_vcmpgeq_m_n_f<mode>): Likewise. |
| (mve_vcmpgtq_m_f<mode>): Likewise. |
| (mve_vcmpgtq_m_n_f<mode>): Likewise. |
| (mve_vcmpleq_m_f<mode>): Likewise. |
| (mve_vcmpleq_m_n_f<mode>): Likewise. |
| (mve_vcmpltq_m_f<mode>): Likewise. |
| (mve_vcmpltq_m_n_f<mode>): Likewise. |
| (mve_vcmpneq_m_f<mode>): Likewise. |
| (mve_vcmpneq_m_n_f<mode>): Likewise. |
| (mve_vcvtbq_m_f16_f32v8hf): Likewise. |
| (mve_vcvtbq_m_f32_f16v4sf): Likewise. |
| (mve_vcvttq_m_f16_f32v8hf): Likewise. |
| (mve_vcvttq_m_f32_f16v4sf): Likewise. |
| (mve_vdupq_m_n_f<mode>): Likewise. |
| (mve_vfmaq_f<mode>): Likewise. |
| (mve_vfmaq_n_f<mode>): Likewise. |
| (mve_vfmasq_n_f<mode>): Likewise. |
| (mve_vfmsq_f<mode>): Likewise. |
| (mve_vmaxnmaq_m_f<mode>): Likewise. |
| (mve_vmaxnmavq_p_f<mode>): Likewise. |
| (mve_vmaxnmvq_p_f<mode>): Likewise. |
| (mve_vminnmaq_m_f<mode>): Likewise. |
| (mve_vminnmavq_p_f<mode>): Likewise. |
| (mve_vminnmvq_p_f<mode>): Likewise. |
| (mve_vmlaldavaq_<supf><mode>): Likewise. |
| (mve_vmlaldavaxq_<supf><mode>): Likewise. |
| (mve_vmlaldavq_p_<supf><mode>): Likewise. |
| (mve_vmlaldavxq_p_<supf><mode>): Likewise. |
| (mve_vmlsldavaq_s<mode>): Likewise. |
| (mve_vmlsldavaxq_s<mode>): Likewise. |
| (mve_vmlsldavq_p_s<mode>): Likewise. |
| (mve_vmlsldavxq_p_s<mode>): Likewise. |
| (mve_vmovlbq_m_<supf><mode>): Likewise. |
| (mve_vmovltq_m_<supf><mode>): Likewise. |
| (mve_vmovnbq_m_<supf><mode>): Likewise. |
| (mve_vmovntq_m_<supf><mode>): Likewise. |
| (mve_vmvnq_m_n_<supf><mode>): Likewise. |
| (mve_vnegq_m_f<mode>): Likewise. |
| (mve_vorrq_m_n_<supf><mode>): Likewise. |
| (mve_vpselq_f<mode>): Likewise. |
| (mve_vqmovnbq_m_<supf><mode>): Likewise. |
| (mve_vqmovntq_m_<supf><mode>): Likewise. |
| (mve_vqmovunbq_m_s<mode>): Likewise. |
| (mve_vqmovuntq_m_s<mode>): Likewise. |
| (mve_vqrshrntq_n_<supf><mode>): Likewise. |
| (mve_vqrshruntq_n_s<mode>): Likewise. |
| (mve_vqshrnbq_n_<supf><mode>): Likewise. |
| (mve_vqshrntq_n_<supf><mode>): Likewise. |
| (mve_vqshrunbq_n_s<mode>): Likewise. |
| (mve_vqshruntq_n_s<mode>): Likewise. |
| (mve_vrev32q_m_fv8hf): Likewise. |
| (mve_vrev32q_m_<supf><mode>): Likewise. |
| (mve_vrev64q_m_f<mode>): Likewise. |
| (mve_vrmlaldavhaxq_sv4si): Likewise. |
| (mve_vrmlaldavhxq_p_sv4si): Likewise. |
| (mve_vrmlsldavhaxq_sv4si): Likewise. |
| (mve_vrmlsldavhq_p_sv4si): Likewise. |
| (mve_vrmlsldavhxq_p_sv4si): Likewise. |
| (mve_vrndaq_m_f<mode>): Likewise. |
| (mve_vrndmq_m_f<mode>): Likewise. |
| (mve_vrndnq_m_f<mode>): Likewise. |
| (mve_vrndpq_m_f<mode>): Likewise. |
| (mve_vrndxq_m_f<mode>): Likewise. |
| (mve_vrshrnbq_n_<supf><mode>): Likewise. |
| (mve_vrshrntq_n_<supf><mode>): Likewise. |
| (mve_vshrnbq_n_<supf><mode>): Likewise. |
| (mve_vshrntq_n_<supf><mode>): Likewise. |
| (mve_vcvtmq_m_<supf><mode>): Likewise. |
| (mve_vcvtpq_m_<supf><mode>): Likewise. |
| (mve_vcvtnq_m_<supf><mode>): Likewise. |
| (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise. |
| (mve_vrev16q_m_<supf>v16qi): Likewise. |
| (mve_vcvtq_m_from_f_<supf><mode>): Likewise. |
| (mve_vrmlaldavhq_p_<supf>v4si): Likewise. |
| (mve_vrmlsldavhaq_sv4si): Likewise. |
| |
| 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vpselq_u8): Define macro. |
| (vpselq_s8): Likewise. |
| (vrev64q_m_u8): Likewise. |
| (vqrdmlashq_n_u8): Likewise. |
| (vqrdmlahq_n_u8): Likewise. |
| (vqdmlahq_n_u8): Likewise. |
| (vmvnq_m_u8): Likewise. |
| (vmlasq_n_u8): Likewise. |
| (vmlaq_n_u8): Likewise. |
| (vmladavq_p_u8): Likewise. |
| (vmladavaq_u8): Likewise. |
| (vminvq_p_u8): Likewise. |
| (vmaxvq_p_u8): Likewise. |
| (vdupq_m_n_u8): Likewise. |
| (vcmpneq_m_u8): Likewise. |
| (vcmpneq_m_n_u8): Likewise. |
| (vcmphiq_m_u8): Likewise. |
| (vcmphiq_m_n_u8): Likewise. |
| (vcmpeqq_m_u8): Likewise. |
| (vcmpeqq_m_n_u8): Likewise. |
| (vcmpcsq_m_u8): Likewise. |
| (vcmpcsq_m_n_u8): Likewise. |
| (vclzq_m_u8): Likewise. |
| (vaddvaq_p_u8): Likewise. |
| (vsriq_n_u8): Likewise. |
| (vsliq_n_u8): Likewise. |
| (vshlq_m_r_u8): Likewise. |
| (vrshlq_m_n_u8): Likewise. |
| (vqshlq_m_r_u8): Likewise. |
| (vqrshlq_m_n_u8): Likewise. |
| (vminavq_p_s8): Likewise. |
| (vminaq_m_s8): Likewise. |
| (vmaxavq_p_s8): Likewise. |
| (vmaxaq_m_s8): Likewise. |
| (vcmpneq_m_s8): Likewise. |
| (vcmpneq_m_n_s8): Likewise. |
| (vcmpltq_m_s8): Likewise. |
| (vcmpltq_m_n_s8): Likewise. |
| (vcmpleq_m_s8): Likewise. |
| (vcmpleq_m_n_s8): Likewise. |
| (vcmpgtq_m_s8): Likewise. |
| (vcmpgtq_m_n_s8): Likewise. |
| (vcmpgeq_m_s8): Likewise. |
| (vcmpgeq_m_n_s8): Likewise. |
| (vcmpeqq_m_s8): Likewise. |
| (vcmpeqq_m_n_s8): Likewise. |
| (vshlq_m_r_s8): Likewise. |
| (vrshlq_m_n_s8): Likewise. |
| (vrev64q_m_s8): Likewise. |
| (vqshlq_m_r_s8): Likewise. |
| (vqrshlq_m_n_s8): Likewise. |
| (vqnegq_m_s8): Likewise. |
| (vqabsq_m_s8): Likewise. |
| (vnegq_m_s8): Likewise. |
| (vmvnq_m_s8): Likewise. |
| (vmlsdavxq_p_s8): Likewise. |
| (vmlsdavq_p_s8): Likewise. |
| (vmladavxq_p_s8): Likewise. |
| (vmladavq_p_s8): Likewise. |
| (vminvq_p_s8): Likewise. |
| (vmaxvq_p_s8): Likewise. |
| (vdupq_m_n_s8): Likewise. |
| (vclzq_m_s8): Likewise. |
| (vclsq_m_s8): Likewise. |
| (vaddvaq_p_s8): Likewise. |
| (vabsq_m_s8): Likewise. |
| (vqrdmlsdhxq_s8): Likewise. |
| (vqrdmlsdhq_s8): Likewise. |
| (vqrdmlashq_n_s8): Likewise. |
| (vqrdmlahq_n_s8): Likewise. |
| (vqrdmladhxq_s8): Likewise. |
| (vqrdmladhq_s8): Likewise. |
| (vqdmlsdhxq_s8): Likewise. |
| (vqdmlsdhq_s8): Likewise. |
| (vqdmlahq_n_s8): Likewise. |
| (vqdmladhxq_s8): Likewise. |
| (vqdmladhq_s8): Likewise. |
| (vmlsdavaxq_s8): Likewise. |
| (vmlsdavaq_s8): Likewise. |
| (vmlasq_n_s8): Likewise. |
| (vmlaq_n_s8): Likewise. |
| (vmladavaxq_s8): Likewise. |
| (vmladavaq_s8): Likewise. |
| (vsriq_n_s8): Likewise. |
| (vsliq_n_s8): Likewise. |
| (vpselq_u16): Likewise. |
| (vpselq_s16): Likewise. |
| (vrev64q_m_u16): Likewise. |
| (vqrdmlashq_n_u16): Likewise. |
| (vqrdmlahq_n_u16): Likewise. |
| (vqdmlahq_n_u16): Likewise. |
| (vmvnq_m_u16): Likewise. |
| (vmlasq_n_u16): Likewise. |
| (vmlaq_n_u16): Likewise. |
| (vmladavq_p_u16): Likewise. |
| (vmladavaq_u16): Likewise. |
| (vminvq_p_u16): Likewise. |
| (vmaxvq_p_u16): Likewise. |
| (vdupq_m_n_u16): Likewise. |
| (vcmpneq_m_u16): Likewise. |
| (vcmpneq_m_n_u16): Likewise. |
| (vcmphiq_m_u16): Likewise. |
| (vcmphiq_m_n_u16): Likewise. |
| (vcmpeqq_m_u16): Likewise. |
| (vcmpeqq_m_n_u16): Likewise. |
| (vcmpcsq_m_u16): Likewise. |
| (vcmpcsq_m_n_u16): Likewise. |
| (vclzq_m_u16): Likewise. |
| (vaddvaq_p_u16): Likewise. |
| (vsriq_n_u16): Likewise. |
| (vsliq_n_u16): Likewise. |
| (vshlq_m_r_u16): Likewise. |
| (vrshlq_m_n_u16): Likewise. |
| (vqshlq_m_r_u16): Likewise. |
| (vqrshlq_m_n_u16): Likewise. |
| (vminavq_p_s16): Likewise. |
| (vminaq_m_s16): Likewise. |
| (vmaxavq_p_s16): Likewise. |
| (vmaxaq_m_s16): Likewise. |
| (vcmpneq_m_s16): Likewise. |
| (vcmpneq_m_n_s16): Likewise. |
| (vcmpltq_m_s16): Likewise. |
| (vcmpltq_m_n_s16): Likewise. |
| (vcmpleq_m_s16): Likewise. |
| (vcmpleq_m_n_s16): Likewise. |
| (vcmpgtq_m_s16): Likewise. |
| (vcmpgtq_m_n_s16): Likewise. |
| (vcmpgeq_m_s16): Likewise. |
| (vcmpgeq_m_n_s16): Likewise. |
| (vcmpeqq_m_s16): Likewise. |
| (vcmpeqq_m_n_s16): Likewise. |
| (vshlq_m_r_s16): Likewise. |
| (vrshlq_m_n_s16): Likewise. |
| (vrev64q_m_s16): Likewise. |
| (vqshlq_m_r_s16): Likewise. |
| (vqrshlq_m_n_s16): Likewise. |
| (vqnegq_m_s16): Likewise. |
| (vqabsq_m_s16): Likewise. |
| (vnegq_m_s16): Likewise. |
| (vmvnq_m_s16): Likewise. |
| (vmlsdavxq_p_s16): Likewise. |
| (vmlsdavq_p_s16): Likewise. |
| (vmladavxq_p_s16): Likewise. |
| (vmladavq_p_s16): Likewise. |
| (vminvq_p_s16): Likewise. |
| (vmaxvq_p_s16): Likewise. |
| (vdupq_m_n_s16): Likewise. |
| (vclzq_m_s16): Likewise. |
| (vclsq_m_s16): Likewise. |
| (vaddvaq_p_s16): Likewise. |
| (vabsq_m_s16): Likewise. |
| (vqrdmlsdhxq_s16): Likewise. |
| (vqrdmlsdhq_s16): Likewise. |
| (vqrdmlashq_n_s16): Likewise. |
| (vqrdmlahq_n_s16): Likewise. |
| (vqrdmladhxq_s16): Likewise. |
| (vqrdmladhq_s16): Likewise. |
| (vqdmlsdhxq_s16): Likewise. |
| (vqdmlsdhq_s16): Likewise. |
| (vqdmlahq_n_s16): Likewise. |
| (vqdmladhxq_s16): Likewise. |
| (vqdmladhq_s16): Likewise. |
| (vmlsdavaxq_s16): Likewise. |
| (vmlsdavaq_s16): Likewise. |
| (vmlasq_n_s16): Likewise. |
| (vmlaq_n_s16): Likewise. |
| (vmladavaxq_s16): Likewise. |
| (vmladavaq_s16): Likewise. |
| (vsriq_n_s16): Likewise. |
| (vsliq_n_s16): Likewise. |
| (vpselq_u32): Likewise. |
| (vpselq_s32): Likewise. |
| (vrev64q_m_u32): Likewise. |
| (vqrdmlashq_n_u32): Likewise. |
| (vqrdmlahq_n_u32): Likewise. |
| (vqdmlahq_n_u32): Likewise. |
| (vmvnq_m_u32): Likewise. |
| (vmlasq_n_u32): Likewise. |
| (vmlaq_n_u32): Likewise. |
| (vmladavq_p_u32): Likewise. |
| (vmladavaq_u32): Likewise. |
| (vminvq_p_u32): Likewise. |
| (vmaxvq_p_u32): Likewise. |
| (vdupq_m_n_u32): Likewise. |
| (vcmpneq_m_u32): Likewise. |
| (vcmpneq_m_n_u32): Likewise. |
| (vcmphiq_m_u32): Likewise. |
| (vcmphiq_m_n_u32): Likewise. |
| (vcmpeqq_m_u32): Likewise. |
| (vcmpeqq_m_n_u32): Likewise. |
| (vcmpcsq_m_u32): Likewise. |
| (vcmpcsq_m_n_u32): Likewise. |
| (vclzq_m_u32): Likewise. |
| (vaddvaq_p_u32): Likewise. |
| (vsriq_n_u32): Likewise. |
| (vsliq_n_u32): Likewise. |
| (vshlq_m_r_u32): Likewise. |
| (vrshlq_m_n_u32): Likewise. |
| (vqshlq_m_r_u32): Likewise. |
| (vqrshlq_m_n_u32): Likewise. |
| (vminavq_p_s32): Likewise. |
| (vminaq_m_s32): Likewise. |
| (vmaxavq_p_s32): Likewise. |
| (vmaxaq_m_s32): Likewise. |
| (vcmpneq_m_s32): Likewise. |
| (vcmpneq_m_n_s32): Likewise. |
| (vcmpltq_m_s32): Likewise. |
| (vcmpltq_m_n_s32): Likewise. |
| (vcmpleq_m_s32): Likewise. |
| (vcmpleq_m_n_s32): Likewise. |
| (vcmpgtq_m_s32): Likewise. |
| (vcmpgtq_m_n_s32): Likewise. |
| (vcmpgeq_m_s32): Likewise. |
| (vcmpgeq_m_n_s32): Likewise. |
| (vcmpeqq_m_s32): Likewise. |
| (vcmpeqq_m_n_s32): Likewise. |
| (vshlq_m_r_s32): Likewise. |
| (vrshlq_m_n_s32): Likewise. |
| (vrev64q_m_s32): Likewise. |
| (vqshlq_m_r_s32): Likewise. |
| (vqrshlq_m_n_s32): Likewise. |
| (vqnegq_m_s32): Likewise. |
| (vqabsq_m_s32): Likewise. |
| (vnegq_m_s32): Likewise. |
| (vmvnq_m_s32): Likewise. |
| (vmlsdavxq_p_s32): Likewise. |
| (vmlsdavq_p_s32): Likewise. |
| (vmladavxq_p_s32): Likewise. |
| (vmladavq_p_s32): Likewise. |
| (vminvq_p_s32): Likewise. |
| (vmaxvq_p_s32): Likewise. |
| (vdupq_m_n_s32): Likewise. |
| (vclzq_m_s32): Likewise. |
| (vclsq_m_s32): Likewise. |
| (vaddvaq_p_s32): Likewise. |
| (vabsq_m_s32): Likewise. |
| (vqrdmlsdhxq_s32): Likewise. |
| (vqrdmlsdhq_s32): Likewise. |
| (vqrdmlashq_n_s32): Likewise. |
| (vqrdmlahq_n_s32): Likewise. |
| (vqrdmladhxq_s32): Likewise. |
| (vqrdmladhq_s32): Likewise. |
| (vqdmlsdhxq_s32): Likewise. |
| (vqdmlsdhq_s32): Likewise. |
| (vqdmlahq_n_s32): Likewise. |
| (vqdmladhxq_s32): Likewise. |
| (vqdmladhq_s32): Likewise. |
| (vmlsdavaxq_s32): Likewise. |
| (vmlsdavaq_s32): Likewise. |
| (vmlasq_n_s32): Likewise. |
| (vmlaq_n_s32): Likewise. |
| (vmladavaxq_s32): Likewise. |
| (vmladavaq_s32): Likewise. |
| (vsriq_n_s32): Likewise. |
| (vsliq_n_s32): Likewise. |
| (vpselq_u64): Likewise. |
| (vpselq_s64): Likewise. |
| (__arm_vpselq_u8): Define intrinsic. |
| (__arm_vpselq_s8): Likewise. |
| (__arm_vrev64q_m_u8): Likewise. |
| (__arm_vqrdmlashq_n_u8): Likewise. |
| (__arm_vqrdmlahq_n_u8): Likewise. |
| (__arm_vqdmlahq_n_u8): Likewise. |
| (__arm_vmvnq_m_u8): Likewise. |
| (__arm_vmlasq_n_u8): Likewise. |
| (__arm_vmlaq_n_u8): Likewise. |
| (__arm_vmladavq_p_u8): Likewise. |
| (__arm_vmladavaq_u8): Likewise. |
| (__arm_vminvq_p_u8): Likewise. |
| (__arm_vmaxvq_p_u8): Likewise. |
| (__arm_vdupq_m_n_u8): Likewise. |
| (__arm_vcmpneq_m_u8): Likewise. |
| (__arm_vcmpneq_m_n_u8): Likewise. |
| (__arm_vcmphiq_m_u8): Likewise. |
| (__arm_vcmphiq_m_n_u8): Likewise. |
| (__arm_vcmpeqq_m_u8): Likewise. |
| (__arm_vcmpeqq_m_n_u8): Likewise. |
| (__arm_vcmpcsq_m_u8): Likewise. |
| (__arm_vcmpcsq_m_n_u8): Likewise. |
| (__arm_vclzq_m_u8): Likewise. |
| (__arm_vaddvaq_p_u8): Likewise. |
| (__arm_vsriq_n_u8): Likewise. |
| (__arm_vsliq_n_u8): Likewise. |
| (__arm_vshlq_m_r_u8): Likewise. |
| (__arm_vrshlq_m_n_u8): Likewise. |
| (__arm_vqshlq_m_r_u8): Likewise. |
| (__arm_vqrshlq_m_n_u8): Likewise. |
| (__arm_vminavq_p_s8): Likewise. |
| (__arm_vminaq_m_s8): Likewise. |
| (__arm_vmaxavq_p_s8): Likewise. |
| (__arm_vmaxaq_m_s8): Likewise. |
| (__arm_vcmpneq_m_s8): Likewise. |
| (__arm_vcmpneq_m_n_s8): Likewise. |
| (__arm_vcmpltq_m_s8): Likewise. |
| (__arm_vcmpltq_m_n_s8): Likewise. |
| (__arm_vcmpleq_m_s8): Likewise. |
| (__arm_vcmpleq_m_n_s8): Likewise. |
| (__arm_vcmpgtq_m_s8): Likewise. |
| (__arm_vcmpgtq_m_n_s8): Likewise. |
| (__arm_vcmpgeq_m_s8): Likewise. |
| (__arm_vcmpgeq_m_n_s8): Likewise. |
| (__arm_vcmpeqq_m_s8): Likewise. |
| (__arm_vcmpeqq_m_n_s8): Likewise. |
| (__arm_vshlq_m_r_s8): Likewise. |
| (__arm_vrshlq_m_n_s8): Likewise. |
| (__arm_vrev64q_m_s8): Likewise. |
| (__arm_vqshlq_m_r_s8): Likewise. |
| (__arm_vqrshlq_m_n_s8): Likewise. |
| (__arm_vqnegq_m_s8): Likewise. |
| (__arm_vqabsq_m_s8): Likewise. |
| (__arm_vnegq_m_s8): Likewise. |
| (__arm_vmvnq_m_s8): Likewise. |
| (__arm_vmlsdavxq_p_s8): Likewise. |
| (__arm_vmlsdavq_p_s8): Likewise. |
| (__arm_vmladavxq_p_s8): Likewise. |
| (__arm_vmladavq_p_s8): Likewise. |
| (__arm_vminvq_p_s8): Likewise. |
| (__arm_vmaxvq_p_s8): Likewise. |
| (__arm_vdupq_m_n_s8): Likewise. |
| (__arm_vclzq_m_s8): Likewise. |
| (__arm_vclsq_m_s8): Likewise. |
| (__arm_vaddvaq_p_s8): Likewise. |
| (__arm_vabsq_m_s8): Likewise. |
| (__arm_vqrdmlsdhxq_s8): Likewise. |
| (__arm_vqrdmlsdhq_s8): Likewise. |
| (__arm_vqrdmlashq_n_s8): Likewise. |
| (__arm_vqrdmlahq_n_s8): Likewise. |
| (__arm_vqrdmladhxq_s8): Likewise. |
| (__arm_vqrdmladhq_s8): Likewise. |
| (__arm_vqdmlsdhxq_s8): Likewise. |
| (__arm_vqdmlsdhq_s8): Likewise. |
| (__arm_vqdmlahq_n_s8): Likewise. |
| (__arm_vqdmladhxq_s8): Likewise. |
| (__arm_vqdmladhq_s8): Likewise. |
| (__arm_vmlsdavaxq_s8): Likewise. |
| (__arm_vmlsdavaq_s8): Likewise. |
| (__arm_vmlasq_n_s8): Likewise. |
| (__arm_vmlaq_n_s8): Likewise. |
| (__arm_vmladavaxq_s8): Likewise. |
| (__arm_vmladavaq_s8): Likewise. |
| (__arm_vsriq_n_s8): Likewise. |
| (__arm_vsliq_n_s8): Likewise. |
| (__arm_vpselq_u16): Likewise. |
| (__arm_vpselq_s16): Likewise. |
| (__arm_vrev64q_m_u16): Likewise. |
| (__arm_vqrdmlashq_n_u16): Likewise. |
| (__arm_vqrdmlahq_n_u16): Likewise. |
| (__arm_vqdmlahq_n_u16): Likewise. |
| (__arm_vmvnq_m_u16): Likewise. |
| (__arm_vmlasq_n_u16): Likewise. |
| (__arm_vmlaq_n_u16): Likewise. |
| (__arm_vmladavq_p_u16): Likewise. |
| (__arm_vmladavaq_u16): Likewise. |
| (__arm_vminvq_p_u16): Likewise. |
| (__arm_vmaxvq_p_u16): Likewise. |
| (__arm_vdupq_m_n_u16): Likewise. |
| (__arm_vcmpneq_m_u16): Likewise. |
| (__arm_vcmpneq_m_n_u16): Likewise. |
| (__arm_vcmphiq_m_u16): Likewise. |
| (__arm_vcmphiq_m_n_u16): Likewise. |
| (__arm_vcmpeqq_m_u16): Likewise. |
| (__arm_vcmpeqq_m_n_u16): Likewise. |
| (__arm_vcmpcsq_m_u16): Likewise. |
| (__arm_vcmpcsq_m_n_u16): Likewise. |
| (__arm_vclzq_m_u16): Likewise. |
| (__arm_vaddvaq_p_u16): Likewise. |
| (__arm_vsriq_n_u16): Likewise. |
| (__arm_vsliq_n_u16): Likewise. |
| (__arm_vshlq_m_r_u16): Likewise. |
| (__arm_vrshlq_m_n_u16): Likewise. |
| (__arm_vqshlq_m_r_u16): Likewise. |
| (__arm_vqrshlq_m_n_u16): Likewise. |
| (__arm_vminavq_p_s16): Likewise. |
| (__arm_vminaq_m_s16): Likewise. |
| (__arm_vmaxavq_p_s16): Likewise. |
| (__arm_vmaxaq_m_s16): Likewise. |
| (__arm_vcmpneq_m_s16): Likewise. |
| (__arm_vcmpneq_m_n_s16): Likewise. |
| (__arm_vcmpltq_m_s16): Likewise. |
| (__arm_vcmpltq_m_n_s16): Likewise. |
| (__arm_vcmpleq_m_s16): Likewise. |
| (__arm_vcmpleq_m_n_s16): Likewise. |
| (__arm_vcmpgtq_m_s16): Likewise. |
| (__arm_vcmpgtq_m_n_s16): Likewise. |
| (__arm_vcmpgeq_m_s16): Likewise. |
| (__arm_vcmpgeq_m_n_s16): Likewise. |
| (__arm_vcmpeqq_m_s16): Likewise. |
| (__arm_vcmpeqq_m_n_s16): Likewise. |
| (__arm_vshlq_m_r_s16): Likewise. |
| (__arm_vrshlq_m_n_s16): Likewise. |
| (__arm_vrev64q_m_s16): Likewise. |
| (__arm_vqshlq_m_r_s16): Likewise. |
| (__arm_vqrshlq_m_n_s16): Likewise. |
| (__arm_vqnegq_m_s16): Likewise. |
| (__arm_vqabsq_m_s16): Likewise. |
| (__arm_vnegq_m_s16): Likewise. |
| (__arm_vmvnq_m_s16): Likewise. |
| (__arm_vmlsdavxq_p_s16): Likewise. |
| (__arm_vmlsdavq_p_s16): Likewise. |
| (__arm_vmladavxq_p_s16): Likewise. |
| (__arm_vmladavq_p_s16): Likewise. |
| (__arm_vminvq_p_s16): Likewise. |
| (__arm_vmaxvq_p_s16): Likewise. |
| (__arm_vdupq_m_n_s16): Likewise. |
| (__arm_vclzq_m_s16): Likewise. |
| (__arm_vclsq_m_s16): Likewise. |
| (__arm_vaddvaq_p_s16): Likewise. |
| (__arm_vabsq_m_s16): Likewise. |
| (__arm_vqrdmlsdhxq_s16): Likewise. |
| (__arm_vqrdmlsdhq_s16): Likewise. |
| (__arm_vqrdmlashq_n_s16): Likewise. |
| (__arm_vqrdmlahq_n_s16): Likewise. |
| (__arm_vqrdmladhxq_s16): Likewise. |
| (__arm_vqrdmladhq_s16): Likewise. |
| (__arm_vqdmlsdhxq_s16): Likewise. |
| (__arm_vqdmlsdhq_s16): Likewise. |
| (__arm_vqdmlahq_n_s16): Likewise. |
| (__arm_vqdmladhxq_s16): Likewise. |
| (__arm_vqdmladhq_s16): Likewise. |
| (__arm_vmlsdavaxq_s16): Likewise. |
| (__arm_vmlsdavaq_s16): Likewise. |
| (__arm_vmlasq_n_s16): Likewise. |
| (__arm_vmlaq_n_s16): Likewise. |
| (__arm_vmladavaxq_s16): Likewise. |
| (__arm_vmladavaq_s16): Likewise. |
| (__arm_vsriq_n_s16): Likewise. |
| (__arm_vsliq_n_s16): Likewise. |
| (__arm_vpselq_u32): Likewise. |
| (__arm_vpselq_s32): Likewise. |
| (__arm_vrev64q_m_u32): Likewise. |
| (__arm_vqrdmlashq_n_u32): Likewise. |
| (__arm_vqrdmlahq_n_u32): Likewise. |
| (__arm_vqdmlahq_n_u32): Likewise. |
| (__arm_vmvnq_m_u32): Likewise. |
| (__arm_vmlasq_n_u32): Likewise. |
| (__arm_vmlaq_n_u32): Likewise. |
| (__arm_vmladavq_p_u32): Likewise. |
| (__arm_vmladavaq_u32): Likewise. |
| (__arm_vminvq_p_u32): Likewise. |
| (__arm_vmaxvq_p_u32): Likewise. |
| (__arm_vdupq_m_n_u32): Likewise. |
| (__arm_vcmpneq_m_u32): Likewise. |
| (__arm_vcmpneq_m_n_u32): Likewise. |
| (__arm_vcmphiq_m_u32): Likewise. |
| (__arm_vcmphiq_m_n_u32): Likewise. |
| (__arm_vcmpeqq_m_u32): Likewise. |
| (__arm_vcmpeqq_m_n_u32): Likewise. |
| (__arm_vcmpcsq_m_u32): Likewise. |
| (__arm_vcmpcsq_m_n_u32): Likewise. |
| (__arm_vclzq_m_u32): Likewise. |
| (__arm_vaddvaq_p_u32): Likewise. |
| (__arm_vsriq_n_u32): Likewise. |
| (__arm_vsliq_n_u32): Likewise. |
| (__arm_vshlq_m_r_u32): Likewise. |
| (__arm_vrshlq_m_n_u32): Likewise. |
| (__arm_vqshlq_m_r_u32): Likewise. |
| (__arm_vqrshlq_m_n_u32): Likewise. |
| (__arm_vminavq_p_s32): Likewise. |
| (__arm_vminaq_m_s32): Likewise. |
| (__arm_vmaxavq_p_s32): Likewise. |
| (__arm_vmaxaq_m_s32): Likewise. |
| (__arm_vcmpneq_m_s32): Likewise. |
| (__arm_vcmpneq_m_n_s32): Likewise. |
| (__arm_vcmpltq_m_s32): Likewise. |
| (__arm_vcmpltq_m_n_s32): Likewise. |
| (__arm_vcmpleq_m_s32): Likewise. |
| (__arm_vcmpleq_m_n_s32): Likewise. |
| (__arm_vcmpgtq_m_s32): Likewise. |
| (__arm_vcmpgtq_m_n_s32): Likewise. |
| (__arm_vcmpgeq_m_s32): Likewise. |
| (__arm_vcmpgeq_m_n_s32): Likewise. |
| (__arm_vcmpeqq_m_s32): Likewise. |
| (__arm_vcmpeqq_m_n_s32): Likewise. |
| (__arm_vshlq_m_r_s32): Likewise. |
| (__arm_vrshlq_m_n_s32): Likewise. |
| (__arm_vrev64q_m_s32): Likewise. |
| (__arm_vqshlq_m_r_s32): Likewise. |
| (__arm_vqrshlq_m_n_s32): Likewise. |
| (__arm_vqnegq_m_s32): Likewise. |
| (__arm_vqabsq_m_s32): Likewise. |
| (__arm_vnegq_m_s32): Likewise. |
| (__arm_vmvnq_m_s32): Likewise. |
| (__arm_vmlsdavxq_p_s32): Likewise. |
| (__arm_vmlsdavq_p_s32): Likewise. |
| (__arm_vmladavxq_p_s32): Likewise. |
| (__arm_vmladavq_p_s32): Likewise. |
| (__arm_vminvq_p_s32): Likewise. |
| (__arm_vmaxvq_p_s32): Likewise. |
| (__arm_vdupq_m_n_s32): Likewise. |
| (__arm_vclzq_m_s32): Likewise. |
| (__arm_vclsq_m_s32): Likewise. |
| (__arm_vaddvaq_p_s32): Likewise. |
| (__arm_vabsq_m_s32): Likewise. |
| (__arm_vqrdmlsdhxq_s32): Likewise. |
| (__arm_vqrdmlsdhq_s32): Likewise. |
| (__arm_vqrdmlashq_n_s32): Likewise. |
| (__arm_vqrdmlahq_n_s32): Likewise. |
| (__arm_vqrdmladhxq_s32): Likewise. |
| (__arm_vqrdmladhq_s32): Likewise. |
| (__arm_vqdmlsdhxq_s32): Likewise. |
| (__arm_vqdmlsdhq_s32): Likewise. |
| (__arm_vqdmlahq_n_s32): Likewise. |
| (__arm_vqdmladhxq_s32): Likewise. |
| (__arm_vqdmladhq_s32): Likewise. |
| (__arm_vmlsdavaxq_s32): Likewise. |
| (__arm_vmlsdavaq_s32): Likewise. |
| (__arm_vmlasq_n_s32): Likewise. |
| (__arm_vmlaq_n_s32): Likewise. |
| (__arm_vmladavaxq_s32): Likewise. |
| (__arm_vmladavaq_s32): Likewise. |
| (__arm_vsriq_n_s32): Likewise. |
| (__arm_vsliq_n_s32): Likewise. |
| (__arm_vpselq_u64): Likewise. |
| (__arm_vpselq_s64): Likewise. |
| (vcmpneq_m_n): Define polymorphic variant. |
| (vcmpneq_m): Likewise. |
| (vqrdmlsdhq): Likewise. |
| (vqrdmlsdhxq): Likewise. |
| (vqrshlq_m_n): Likewise. |
| (vqshlq_m_r): Likewise. |
| (vrev64q_m): Likewise. |
| (vrshlq_m_n): Likewise. |
| (vshlq_m_r): Likewise. |
| (vsliq_n): Likewise. |
| (vsriq_n): Likewise. |
| (vqrdmlashq_n): Likewise. |
| (vqrdmlahq): Likewise. |
| (vqrdmladhxq): Likewise. |
| (vqrdmladhq): Likewise. |
| (vqnegq_m): Likewise. |
| (vqdmlsdhxq): Likewise. |
| (vabsq_m): Likewise. |
| (vclsq_m): Likewise. |
| (vclzq_m): Likewise. |
| (vcmpgeq_m): Likewise. |
| (vcmpgeq_m_n): Likewise. |
| (vdupq_m_n): Likewise. |
| (vmaxaq_m): Likewise. |
| (vmlaq_n): Likewise. |
| (vmlasq_n): Likewise. |
| (vmvnq_m): Likewise. |
| (vnegq_m): Likewise. |
| (vpselq): Likewise. |
| (vqdmlahq_n): Likewise. |
| (vqrdmlahq_n): Likewise. |
| (vqdmlsdhq): Likewise. |
| (vqdmladhq): Likewise. |
| (vqabsq_m): Likewise. |
| (vminaq_m): Likewise. |
| (vrmlaldavhaq): Likewise. |
| (vmlsdavxq_p): Likewise. |
| (vmlsdavq_p): Likewise. |
| (vmlsdavaxq): Likewise. |
| (vmlsdavaq): Likewise. |
| (vaddvaq_p): Likewise. |
| (vcmpcsq_m_n): Likewise. |
| (vcmpcsq_m): Likewise. |
| (vcmpeqq_m_n): Likewise. |
| (vcmpeqq_m): Likewise. |
| (vmladavxq_p): Likewise. |
| (vmladavq_p): Likewise. |
| (vmladavaxq): Likewise. |
| (vmladavaq): Likewise. |
| (vminvq_p): Likewise. |
| (vminavq_p): Likewise. |
| (vmaxvq_p): Likewise. |
| (vmaxavq_p): Likewise. |
| (vcmpltq_m_n): Likewise. |
| (vcmpltq_m): Likewise. |
| (vcmpleq_m): Likewise. |
| (vcmpleq_m_n): Likewise. |
| (vcmphiq_m_n): Likewise. |
| (vcmphiq_m): Likewise. |
| (vcmpgtq_m_n): Likewise. |
| (vcmpgtq_m): Likewise. |
| * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use |
| builtin qualifier. |
| (TERNOP_NONE_NONE_NONE_NONE): Likewise. |
| (TERNOP_NONE_NONE_NONE_UNONE): Likewise. |
| (TERNOP_UNONE_NONE_NONE_UNONE): Likewise. |
| (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise. |
| (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise. |
| (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise. |
| * config/arm/constraints.md (Rc): Define constraint to check constant is |
| in the range of 0 to 15. |
| (Re): Define constraint to check constant is in the range of 0 to 31. |
| * config/arm/mve.md (VADDVAQ_P): Define iterator. |
| (VCLZQ_M): Likewise. |
| (VCMPEQQ_M_N): Likewise. |
| (VCMPEQQ_M): Likewise. |
| (VCMPNEQ_M_N): Likewise. |
| (VCMPNEQ_M): Likewise. |
| (VDUPQ_M_N): Likewise. |
| (VMAXVQ_P): Likewise. |
| (VMINVQ_P): Likewise. |
| (VMLADAVAQ): Likewise. |
| (VMLADAVQ_P): Likewise. |
| (VMLAQ_N): Likewise. |
| (VMLASQ_N): Likewise. |
| (VMVNQ_M): Likewise. |
| (VPSELQ): Likewise. |
| (VQDMLAHQ_N): Likewise. |
| (VQRDMLAHQ_N): Likewise. |
| (VQRDMLASHQ_N): Likewise. |
| (VQRSHLQ_M_N): Likewise. |
| (VQSHLQ_M_R): Likewise. |
| (VREV64Q_M): Likewise. |
| (VRSHLQ_M_N): Likewise. |
| (VSHLQ_M_R): Likewise. |
| (VSLIQ_N): Likewise. |
| (VSRIQ_N): Likewise. |
| (mve_vabsq_m_s<mode>): Define RTL pattern. |
| (mve_vaddvaq_p_<supf><mode>): Likewise. |
| (mve_vclsq_m_s<mode>): Likewise. |
| (mve_vclzq_m_<supf><mode>): Likewise. |
| (mve_vcmpcsq_m_n_u<mode>): Likewise. |
| (mve_vcmpcsq_m_u<mode>): Likewise. |
| (mve_vcmpeqq_m_n_<supf><mode>): Likewise. |
| (mve_vcmpeqq_m_<supf><mode>): Likewise. |
| (mve_vcmpgeq_m_n_s<mode>): Likewise. |
| (mve_vcmpgeq_m_s<mode>): Likewise. |
| (mve_vcmpgtq_m_n_s<mode>): Likewise. |
| (mve_vcmpgtq_m_s<mode>): Likewise. |
| (mve_vcmphiq_m_n_u<mode>): Likewise. |
| (mve_vcmphiq_m_u<mode>): Likewise. |
| (mve_vcmpleq_m_n_s<mode>): Likewise. |
| (mve_vcmpleq_m_s<mode>): Likewise. |
| (mve_vcmpltq_m_n_s<mode>): Likewise. |
| (mve_vcmpltq_m_s<mode>): Likewise. |
| (mve_vcmpneq_m_n_<supf><mode>): Likewise. |
| (mve_vcmpneq_m_<supf><mode>): Likewise. |
| (mve_vdupq_m_n_<supf><mode>): Likewise. |
| (mve_vmaxaq_m_s<mode>): Likewise. |
| (mve_vmaxavq_p_s<mode>): Likewise. |
| (mve_vmaxvq_p_<supf><mode>): Likewise. |
| (mve_vminaq_m_s<mode>): Likewise. |
| (mve_vminavq_p_s<mode>): Likewise. |
| (mve_vminvq_p_<supf><mode>): Likewise. |
| (mve_vmladavaq_<supf><mode>): Likewise. |
| (mve_vmladavq_p_<supf><mode>): Likewise. |
| (mve_vmladavxq_p_s<mode>): Likewise. |
| (mve_vmlaq_n_<supf><mode>): Likewise. |
| (mve_vmlasq_n_<supf><mode>): Likewise. |
| (mve_vmlsdavq_p_s<mode>): Likewise. |
| (mve_vmlsdavxq_p_s<mode>): Likewise. |
| (mve_vmvnq_m_<supf><mode>): Likewise. |
| (mve_vnegq_m_s<mode>): Likewise. |
| (mve_vpselq_<supf><mode>): Likewise. |
| (mve_vqabsq_m_s<mode>): Likewise. |
| (mve_vqdmlahq_n_<supf><mode>): Likewise. |
| (mve_vqnegq_m_s<mode>): Likewise. |
| (mve_vqrdmladhq_s<mode>): Likewise. |
| (mve_vqrdmladhxq_s<mode>): Likewise. |
| (mve_vqrdmlahq_n_<supf><mode>): Likewise. |
| (mve_vqrdmlashq_n_<supf><mode>): Likewise. |
| (mve_vqrdmlsdhq_s<mode>): Likewise. |
| (mve_vqrdmlsdhxq_s<mode>): Likewise. |
| (mve_vqrshlq_m_n_<supf><mode>): Likewise. |
| (mve_vqshlq_m_r_<supf><mode>): Likewise. |
| (mve_vrev64q_m_<supf><mode>): Likewise. |
| (mve_vrshlq_m_n_<supf><mode>): Likewise. |
| (mve_vshlq_m_r_<supf><mode>): Likewise. |
| (mve_vsliq_n_<supf><mode>): Likewise. |
| (mve_vsriq_n_<supf><mode>): Likewise. |
| (mve_vqdmlsdhxq_s<mode>): Likewise. |
| (mve_vqdmlsdhq_s<mode>): Likewise. |
| (mve_vqdmladhxq_s<mode>): Likewise. |
| (mve_vqdmladhq_s<mode>): Likewise. |
| (mve_vmlsdavaxq_s<mode>): Likewise. |
| (mve_vmlsdavaq_s<mode>): Likewise. |
| (mve_vmladavaxq_s<mode>): Likewise. |
| * config/arm/predicates.md (mve_imm_15):Define predicate to check the |
| matching constraint Rc. |
| (mve_imm_31): Define predicate to check the matching constraint Re. |
| |
| 2020-03-18 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode. |
| (vec_cmp<mode>di_dup): Likewise. |
| * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1. |
| |
| 2020-03-18 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (COND_MODE): Delete. |
| (COND_INT_MODE): Delete. |
| (cond_op): Add "mult". |
| (cond_<expander><mode>): Use VEC_ALLREG_MODE. |
| (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE. |
| |
| 2020-03-18 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94206 |
| * gimple-fold.c (gimple_fold_builtin_memset): Avoid using |
| partial int modes or not mode-precision integer types for |
| the store. |
| |
| 2020-03-18 Jakub Jelinek <jakub@redhat.com> |
| |
| * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue |
| in a comment. |
| * config/arc/arc.c (frame_stack_add): Likewise. |
| * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term): |
| Likewise. |
| * ipa-predicate.c (predicate::remap_after_inlining): Likewise. |
| * tree-ssa-strlen.h (handle_printf_call): Likewise. |
| * tree-ssa-strlen.c (is_strlen_related_p): Likewise. |
| * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise. |
| |
| 2020-03-18 Duan bo <duanbo3@huawei.com> |
| |
| PR target/94201 |
| * config/aarch64/aarch64.md (ldr_got_tiny): Delete. |
| (@ldr_got_tiny_<mode>): New pattern. |
| (ldr_got_tiny_sidi): Likewise. |
| * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use |
| them to handle SYMBOL_TINY_GOT for ILP32. |
| |
| 2020-03-18 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as |
| call-preserved for SVE PCS functions. |
| (aarch64_layout_frame): Cope with up to 12 predicate save slots. |
| Optimize the case in which there are no following vector save slots. |
| |
| 2020-03-18 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/94188 |
| * fold-const.c (build_fold_addr_expr): Convert address to |
| correct type. |
| * asan.c (maybe_create_ssa_name): Strip useless type conversions. |
| * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1 |
| to build the ADDR_EXPR which we don't really want to simplify. |
| * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise. |
| * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise. |
| * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise. |
| (simplify_builtin_call): Strip useless type conversions. |
| * tree-ssa-strlen.c (new_strinfo): Likewise. |
| |
| 2020-03-17 Alexey Neyman <stilor@att.net> |
| |
| PR debug/93751 |
| * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if |
| the debug level is terse and the declaration is public. Do not |
| generate type info. |
| (dwarf2out_decl): Same. |
| (add_type_attribute): Return immediately if debug level is |
| terse. |
| |
| 2020-03-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): |
| Define qualifier for ternary operands. |
| (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vabavq_s8): Define macro. |
| (vabavq_s16): Likewise. |
| (vabavq_s32): Likewise. |
| (vbicq_m_n_s16): Likewise. |
| (vbicq_m_n_s32): Likewise. |
| (vbicq_m_n_u16): Likewise. |
| (vbicq_m_n_u32): Likewise. |
| (vcmpeqq_m_f16): Likewise. |
| (vcmpeqq_m_f32): Likewise. |
| (vcvtaq_m_s16_f16): Likewise. |
| (vcvtaq_m_u16_f16): Likewise. |
| (vcvtaq_m_s32_f32): Likewise. |
| (vcvtaq_m_u32_f32): Likewise. |
| (vcvtq_m_f16_s16): Likewise. |
| (vcvtq_m_f16_u16): Likewise. |
| (vcvtq_m_f32_s32): Likewise. |
| (vcvtq_m_f32_u32): Likewise. |
| (vqrshrnbq_n_s16): Likewise. |
| (vqrshrnbq_n_u16): Likewise. |
| (vqrshrnbq_n_s32): Likewise. |
| (vqrshrnbq_n_u32): Likewise. |
| (vqrshrunbq_n_s16): Likewise. |
| (vqrshrunbq_n_s32): Likewise. |
| (vrmlaldavhaq_s32): Likewise. |
| (vrmlaldavhaq_u32): Likewise. |
| (vshlcq_s8): Likewise. |
| (vshlcq_u8): Likewise. |
| (vshlcq_s16): Likewise. |
| (vshlcq_u16): Likewise. |
| (vshlcq_s32): Likewise. |
| (vshlcq_u32): Likewise. |
| (vabavq_u8): Likewise. |
| (vabavq_u16): Likewise. |
| (vabavq_u32): Likewise. |
| (__arm_vabavq_s8): Define intrinsic. |
| (__arm_vabavq_s16): Likewise. |
| (__arm_vabavq_s32): Likewise. |
| (__arm_vabavq_u8): Likewise. |
| (__arm_vabavq_u16): Likewise. |
| (__arm_vabavq_u32): Likewise. |
| (__arm_vbicq_m_n_s16): Likewise. |
| (__arm_vbicq_m_n_s32): Likewise. |
| (__arm_vbicq_m_n_u16): Likewise. |
| (__arm_vbicq_m_n_u32): Likewise. |
| (__arm_vqrshrnbq_n_s16): Likewise. |
| (__arm_vqrshrnbq_n_u16): Likewise. |
| (__arm_vqrshrnbq_n_s32): Likewise. |
| (__arm_vqrshrnbq_n_u32): Likewise. |
| (__arm_vqrshrunbq_n_s16): Likewise. |
| (__arm_vqrshrunbq_n_s32): Likewise. |
| (__arm_vrmlaldavhaq_s32): Likewise. |
| (__arm_vrmlaldavhaq_u32): Likewise. |
| (__arm_vshlcq_s8): Likewise. |
| (__arm_vshlcq_u8): Likewise. |
| (__arm_vshlcq_s16): Likewise. |
| (__arm_vshlcq_u16): Likewise. |
| (__arm_vshlcq_s32): Likewise. |
| (__arm_vshlcq_u32): Likewise. |
| (__arm_vcmpeqq_m_f16): Likewise. |
| (__arm_vcmpeqq_m_f32): Likewise. |
| (__arm_vcvtaq_m_s16_f16): Likewise. |
| (__arm_vcvtaq_m_u16_f16): Likewise. |
| (__arm_vcvtaq_m_s32_f32): Likewise. |
| (__arm_vcvtaq_m_u32_f32): Likewise. |
| (__arm_vcvtq_m_f16_s16): Likewise. |
| (__arm_vcvtq_m_f16_u16): Likewise. |
| (__arm_vcvtq_m_f32_s32): Likewise. |
| (__arm_vcvtq_m_f32_u32): Likewise. |
| (vcvtaq_m): Define polymorphic variant. |
| (vcvtq_m): Likewise. |
| (vabavq): Likewise. |
| (vshlcq): Likewise. |
| (vbicq_m_n): Likewise. |
| (vqrshrnbq_n): Likewise. |
| (vqrshrunbq_n): Likewise. |
| * config/arm/arm_mve_builtins.def |
| (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer. |
| (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise. |
| * config/arm/mve.md (VBICQ_M_N): Define iterator. |
| (VCVTAQ_M): Likewise. |
| (VCVTQ_M_TO_F): Likewise. |
| (VQRSHRNBQ_N): Likewise. |
| (VABAVQ): Likewise. |
| (VSHLCQ): Likewise. |
| (VRMLALDAVHAQ): Likewise. |
| (mve_vbicq_m_n_<supf><mode>): Define RTL pattern. |
| (mve_vcmpeqq_m_f<mode>): Likewise. |
| (mve_vcvtaq_m_<supf><mode>): Likewise. |
| (mve_vcvtq_m_to_f_<supf><mode>): Likewise. |
| (mve_vqrshrnbq_n_<supf><mode>): Likewise. |
| (mve_vqrshrunbq_n_s<mode>): Likewise. |
| (mve_vrmlaldavhaq_<supf>v4si): Likewise. |
| (mve_vabavq_<supf><mode>): Likewise. |
| (mve_vshlcq_<supf><mode>): Likewise. |
| (mve_vshlcq_<supf><mode>): Likewise. |
| (mve_vshlcq_vec_<supf><mode>): Define RTL expand. |
| (mve_vshlcq_carry_<supf><mode>): Likewise. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vqmovntq_u16): Define macro. |
| (vqmovnbq_u16): Likewise. |
| (vmulltq_poly_p8): Likewise. |
| (vmullbq_poly_p8): Likewise. |
| (vmovntq_u16): Likewise. |
| (vmovnbq_u16): Likewise. |
| (vmlaldavxq_u16): Likewise. |
| (vmlaldavq_u16): Likewise. |
| (vqmovuntq_s16): Likewise. |
| (vqmovunbq_s16): Likewise. |
| (vshlltq_n_u8): Likewise. |
| (vshllbq_n_u8): Likewise. |
| (vorrq_n_u16): Likewise. |
| (vbicq_n_u16): Likewise. |
| (vcmpneq_n_f16): Likewise. |
| (vcmpneq_f16): Likewise. |
| (vcmpltq_n_f16): Likewise. |
| (vcmpltq_f16): Likewise. |
| (vcmpleq_n_f16): Likewise. |
| (vcmpleq_f16): Likewise. |
| (vcmpgtq_n_f16): Likewise. |
| (vcmpgtq_f16): Likewise. |
| (vcmpgeq_n_f16): Likewise. |
| (vcmpgeq_f16): Likewise. |
| (vcmpeqq_n_f16): Likewise. |
| (vcmpeqq_f16): Likewise. |
| (vsubq_f16): Likewise. |
| (vqmovntq_s16): Likewise. |
| (vqmovnbq_s16): Likewise. |
| (vqdmulltq_s16): Likewise. |
| (vqdmulltq_n_s16): Likewise. |
| (vqdmullbq_s16): Likewise. |
| (vqdmullbq_n_s16): Likewise. |
| (vorrq_f16): Likewise. |
| (vornq_f16): Likewise. |
| (vmulq_n_f16): Likewise. |
| (vmulq_f16): Likewise. |
| (vmovntq_s16): Likewise. |
| (vmovnbq_s16): Likewise. |
| (vmlsldavxq_s16): Likewise. |
| (vmlsldavq_s16): Likewise. |
| (vmlaldavxq_s16): Likewise. |
| (vmlaldavq_s16): Likewise. |
| (vminnmvq_f16): Likewise. |
| (vminnmq_f16): Likewise. |
| (vminnmavq_f16): Likewise. |
| (vminnmaq_f16): Likewise. |
| (vmaxnmvq_f16): Likewise. |
| (vmaxnmq_f16): Likewise. |
| (vmaxnmavq_f16): Likewise. |
| (vmaxnmaq_f16): Likewise. |
| (veorq_f16): Likewise. |
| (vcmulq_rot90_f16): Likewise. |
| (vcmulq_rot270_f16): Likewise. |
| (vcmulq_rot180_f16): Likewise. |
| (vcmulq_f16): Likewise. |
| (vcaddq_rot90_f16): Likewise. |
| (vcaddq_rot270_f16): Likewise. |
| (vbicq_f16): Likewise. |
| (vandq_f16): Likewise. |
| (vaddq_n_f16): Likewise. |
| (vabdq_f16): Likewise. |
| (vshlltq_n_s8): Likewise. |
| (vshllbq_n_s8): Likewise. |
| (vorrq_n_s16): Likewise. |
| (vbicq_n_s16): Likewise. |
| (vqmovntq_u32): Likewise. |
| (vqmovnbq_u32): Likewise. |
| (vmulltq_poly_p16): Likewise. |
| (vmullbq_poly_p16): Likewise. |
| (vmovntq_u32): Likewise. |
| (vmovnbq_u32): Likewise. |
| (vmlaldavxq_u32): Likewise. |
| (vmlaldavq_u32): Likewise. |
| (vqmovuntq_s32): Likewise. |
| (vqmovunbq_s32): Likewise. |
| (vshlltq_n_u16): Likewise. |
| (vshllbq_n_u16): Likewise. |
| (vorrq_n_u32): Likewise. |
| (vbicq_n_u32): Likewise. |
| (vcmpneq_n_f32): Likewise. |
| (vcmpneq_f32): Likewise. |
| (vcmpltq_n_f32): Likewise. |
| (vcmpltq_f32): Likewise. |
| (vcmpleq_n_f32): Likewise. |
| (vcmpleq_f32): Likewise. |
| (vcmpgtq_n_f32): Likewise. |
| (vcmpgtq_f32): Likewise. |
| (vcmpgeq_n_f32): Likewise. |
| (vcmpgeq_f32): Likewise. |
| (vcmpeqq_n_f32): Likewise. |
| (vcmpeqq_f32): Likewise. |
| (vsubq_f32): Likewise. |
| (vqmovntq_s32): Likewise. |
| (vqmovnbq_s32): Likewise. |
| (vqdmulltq_s32): Likewise. |
| (vqdmulltq_n_s32): Likewise. |
| (vqdmullbq_s32): Likewise. |
| (vqdmullbq_n_s32): Likewise. |
| (vorrq_f32): Likewise. |
| (vornq_f32): Likewise. |
| (vmulq_n_f32): Likewise. |
| (vmulq_f32): Likewise. |
| (vmovntq_s32): Likewise. |
| (vmovnbq_s32): Likewise. |
| (vmlsldavxq_s32): Likewise. |
| (vmlsldavq_s32): Likewise. |
| (vmlaldavxq_s32): Likewise. |
| (vmlaldavq_s32): Likewise. |
| (vminnmvq_f32): Likewise. |
| (vminnmq_f32): Likewise. |
| (vminnmavq_f32): Likewise. |
| (vminnmaq_f32): Likewise. |
| (vmaxnmvq_f32): Likewise. |
| (vmaxnmq_f32): Likewise. |
| (vmaxnmavq_f32): Likewise. |
| (vmaxnmaq_f32): Likewise. |
| (veorq_f32): Likewise. |
| (vcmulq_rot90_f32): Likewise. |
| (vcmulq_rot270_f32): Likewise. |
| (vcmulq_rot180_f32): Likewise. |
| (vcmulq_f32): Likewise. |
| (vcaddq_rot90_f32): Likewise. |
| (vcaddq_rot270_f32): Likewise. |
| (vbicq_f32): Likewise. |
| (vandq_f32): Likewise. |
| (vaddq_n_f32): Likewise. |
| (vabdq_f32): Likewise. |
| (vshlltq_n_s16): Likewise. |
| (vshllbq_n_s16): Likewise. |
| (vorrq_n_s32): Likewise. |
| (vbicq_n_s32): Likewise. |
| (vrmlaldavhq_u32): Likewise. |
| (vctp8q_m): Likewise. |
| (vctp64q_m): Likewise. |
| (vctp32q_m): Likewise. |
| (vctp16q_m): Likewise. |
| (vaddlvaq_u32): Likewise. |
| (vrmlsldavhxq_s32): Likewise. |
| (vrmlsldavhq_s32): Likewise. |
| (vrmlaldavhxq_s32): Likewise. |
| (vrmlaldavhq_s32): Likewise. |
| (vcvttq_f16_f32): Likewise. |
| (vcvtbq_f16_f32): Likewise. |
| (vaddlvaq_s32): Likewise. |
| (__arm_vqmovntq_u16): Define intrinsic. |
| (__arm_vqmovnbq_u16): Likewise. |
| (__arm_vmulltq_poly_p8): Likewise. |
| (__arm_vmullbq_poly_p8): Likewise. |
| (__arm_vmovntq_u16): Likewise. |
| (__arm_vmovnbq_u16): Likewise. |
| (__arm_vmlaldavxq_u16): Likewise. |
| (__arm_vmlaldavq_u16): Likewise. |
| (__arm_vqmovuntq_s16): Likewise. |
| (__arm_vqmovunbq_s16): Likewise. |
| (__arm_vshlltq_n_u8): Likewise. |
| (__arm_vshllbq_n_u8): Likewise. |
| (__arm_vorrq_n_u16): Likewise. |
| (__arm_vbicq_n_u16): Likewise. |
| (__arm_vcmpneq_n_f16): Likewise. |
| (__arm_vcmpneq_f16): Likewise. |
| (__arm_vcmpltq_n_f16): Likewise. |
| (__arm_vcmpltq_f16): Likewise. |
| (__arm_vcmpleq_n_f16): Likewise. |
| (__arm_vcmpleq_f16): Likewise. |
| (__arm_vcmpgtq_n_f16): Likewise. |
| (__arm_vcmpgtq_f16): Likewise. |
| (__arm_vcmpgeq_n_f16): Likewise. |
| (__arm_vcmpgeq_f16): Likewise. |
| (__arm_vcmpeqq_n_f16): Likewise. |
| (__arm_vcmpeqq_f16): Likewise. |
| (__arm_vsubq_f16): Likewise. |
| (__arm_vqmovntq_s16): Likewise. |
| (__arm_vqmovnbq_s16): Likewise. |
| (__arm_vqdmulltq_s16): Likewise. |
| (__arm_vqdmulltq_n_s16): Likewise. |
| (__arm_vqdmullbq_s16): Likewise. |
| (__arm_vqdmullbq_n_s16): Likewise. |
| (__arm_vorrq_f16): Likewise. |
| (__arm_vornq_f16): Likewise. |
| (__arm_vmulq_n_f16): Likewise. |
| (__arm_vmulq_f16): Likewise. |
| (__arm_vmovntq_s16): Likewise. |
| (__arm_vmovnbq_s16): Likewise. |
| (__arm_vmlsldavxq_s16): Likewise. |
| (__arm_vmlsldavq_s16): Likewise. |
| (__arm_vmlaldavxq_s16): Likewise. |
| (__arm_vmlaldavq_s16): Likewise. |
| (__arm_vminnmvq_f16): Likewise. |
| (__arm_vminnmq_f16): Likewise. |
| (__arm_vminnmavq_f16): Likewise. |
| (__arm_vminnmaq_f16): Likewise. |
| (__arm_vmaxnmvq_f16): Likewise. |
| (__arm_vmaxnmq_f16): Likewise. |
| (__arm_vmaxnmavq_f16): Likewise. |
| (__arm_vmaxnmaq_f16): Likewise. |
| (__arm_veorq_f16): Likewise. |
| (__arm_vcmulq_rot90_f16): Likewise. |
| (__arm_vcmulq_rot270_f16): Likewise. |
| (__arm_vcmulq_rot180_f16): Likewise. |
| (__arm_vcmulq_f16): Likewise. |
| (__arm_vcaddq_rot90_f16): Likewise. |
| (__arm_vcaddq_rot270_f16): Likewise. |
| (__arm_vbicq_f16): Likewise. |
| (__arm_vandq_f16): Likewise. |
| (__arm_vaddq_n_f16): Likewise. |
| (__arm_vabdq_f16): Likewise. |
| (__arm_vshlltq_n_s8): Likewise. |
| (__arm_vshllbq_n_s8): Likewise. |
| (__arm_vorrq_n_s16): Likewise. |
| (__arm_vbicq_n_s16): Likewise. |
| (__arm_vqmovntq_u32): Likewise. |
| (__arm_vqmovnbq_u32): Likewise. |
| (__arm_vmulltq_poly_p16): Likewise. |
| (__arm_vmullbq_poly_p16): Likewise. |
| (__arm_vmovntq_u32): Likewise. |
| (__arm_vmovnbq_u32): Likewise. |
| (__arm_vmlaldavxq_u32): Likewise. |
| (__arm_vmlaldavq_u32): Likewise. |
| (__arm_vqmovuntq_s32): Likewise. |
| (__arm_vqmovunbq_s32): Likewise. |
| (__arm_vshlltq_n_u16): Likewise. |
| (__arm_vshllbq_n_u16): Likewise. |
| (__arm_vorrq_n_u32): Likewise. |
| (__arm_vbicq_n_u32): Likewise. |
| (__arm_vcmpneq_n_f32): Likewise. |
| (__arm_vcmpneq_f32): Likewise. |
| (__arm_vcmpltq_n_f32): Likewise. |
| (__arm_vcmpltq_f32): Likewise. |
| (__arm_vcmpleq_n_f32): Likewise. |
| (__arm_vcmpleq_f32): Likewise. |
| (__arm_vcmpgtq_n_f32): Likewise. |
| (__arm_vcmpgtq_f32): Likewise. |
| (__arm_vcmpgeq_n_f32): Likewise. |
| (__arm_vcmpgeq_f32): Likewise. |
| (__arm_vcmpeqq_n_f32): Likewise. |
| (__arm_vcmpeqq_f32): Likewise. |
| (__arm_vsubq_f32): Likewise. |
| (__arm_vqmovntq_s32): Likewise. |
| (__arm_vqmovnbq_s32): Likewise. |
| (__arm_vqdmulltq_s32): Likewise. |
| (__arm_vqdmulltq_n_s32): Likewise. |
| (__arm_vqdmullbq_s32): Likewise. |
| (__arm_vqdmullbq_n_s32): Likewise. |
| (__arm_vorrq_f32): Likewise. |
| (__arm_vornq_f32): Likewise. |
| (__arm_vmulq_n_f32): Likewise. |
| (__arm_vmulq_f32): Likewise. |
| (__arm_vmovntq_s32): Likewise. |
| (__arm_vmovnbq_s32): Likewise. |
| (__arm_vmlsldavxq_s32): Likewise. |
| (__arm_vmlsldavq_s32): Likewise. |
| (__arm_vmlaldavxq_s32): Likewise. |
| (__arm_vmlaldavq_s32): Likewise. |
| (__arm_vminnmvq_f32): Likewise. |
| (__arm_vminnmq_f32): Likewise. |
| (__arm_vminnmavq_f32): Likewise. |
| (__arm_vminnmaq_f32): Likewise. |
| (__arm_vmaxnmvq_f32): Likewise. |
| (__arm_vmaxnmq_f32): Likewise. |
| (__arm_vmaxnmavq_f32): Likewise. |
| (__arm_vmaxnmaq_f32): Likewise. |
| (__arm_veorq_f32): Likewise. |
| (__arm_vcmulq_rot90_f32): Likewise. |
| (__arm_vcmulq_rot270_f32): Likewise. |
| (__arm_vcmulq_rot180_f32): Likewise. |
| (__arm_vcmulq_f32): Likewise. |
| (__arm_vcaddq_rot90_f32): Likewise. |
| (__arm_vcaddq_rot270_f32): Likewise. |
| (__arm_vbicq_f32): Likewise. |
| (__arm_vandq_f32): Likewise. |
| (__arm_vaddq_n_f32): Likewise. |
| (__arm_vabdq_f32): Likewise. |
| (__arm_vshlltq_n_s16): Likewise. |
| (__arm_vshllbq_n_s16): Likewise. |
| (__arm_vorrq_n_s32): Likewise. |
| (__arm_vbicq_n_s32): Likewise. |
| (__arm_vrmlaldavhq_u32): Likewise. |
| (__arm_vctp8q_m): Likewise. |
| (__arm_vctp64q_m): Likewise. |
| (__arm_vctp32q_m): Likewise. |
| (__arm_vctp16q_m): Likewise. |
| (__arm_vaddlvaq_u32): Likewise. |
| (__arm_vrmlsldavhxq_s32): Likewise. |
| (__arm_vrmlsldavhq_s32): Likewise. |
| (__arm_vrmlaldavhxq_s32): Likewise. |
| (__arm_vrmlaldavhq_s32): Likewise. |
| (__arm_vcvttq_f16_f32): Likewise. |
| (__arm_vcvtbq_f16_f32): Likewise. |
| (__arm_vaddlvaq_s32): Likewise. |
| (vst4q): Define polymorphic variant. |
| (vrndxq): Likewise. |
| (vrndq): Likewise. |
| (vrndpq): Likewise. |
| (vrndnq): Likewise. |
| (vrndmq): Likewise. |
| (vrndaq): Likewise. |
| (vrev64q): Likewise. |
| (vnegq): Likewise. |
| (vdupq_n): Likewise. |
| (vabsq): Likewise. |
| (vrev32q): Likewise. |
| (vcvtbq_f32): Likewise. |
| (vcvttq_f32): Likewise. |
| (vcvtq): Likewise. |
| (vsubq_n): Likewise. |
| (vbrsrq_n): Likewise. |
| (vcvtq_n): Likewise. |
| (vsubq): Likewise. |
| (vorrq): Likewise. |
| (vabdq): Likewise. |
| (vaddq_n): Likewise. |
| (vandq): Likewise. |
| (vbicq): Likewise. |
| (vornq): Likewise. |
| (vmulq_n): Likewise. |
| (vmulq): Likewise. |
| (vcaddq_rot270): Likewise. |
| (vcmpeqq_n): Likewise. |
| (vcmpeqq): Likewise. |
| (vcaddq_rot90): Likewise. |
| (vcmpgeq_n): Likewise. |
| (vcmpgeq): Likewise. |
| (vcmpgtq_n): Likewise. |
| (vcmpgtq): Likewise. |
| (vcmpgtq): Likewise. |
| (vcmpleq_n): Likewise. |
| (vcmpleq_n): Likewise. |
| (vcmpleq): Likewise. |
| (vcmpleq): Likewise. |
| (vcmpltq_n): Likewise. |
| (vcmpltq_n): Likewise. |
| (vcmpltq): Likewise. |
| (vcmpltq): Likewise. |
| (vcmpneq_n): Likewise. |
| (vcmpneq_n): Likewise. |
| (vcmpneq): Likewise. |
| (vcmpneq): Likewise. |
| (vcmulq): Likewise. |
| (vcmulq): Likewise. |
| (vcmulq_rot180): Likewise. |
| (vcmulq_rot180): Likewise. |
| (vcmulq_rot270): Likewise. |
| (vcmulq_rot270): Likewise. |
| (vcmulq_rot90): Likewise. |
| (vcmulq_rot90): Likewise. |
| (veorq): Likewise. |
| (veorq): Likewise. |
| (vmaxnmaq): Likewise. |
| (vmaxnmaq): Likewise. |
| (vmaxnmavq): Likewise. |
| (vmaxnmavq): Likewise. |
| (vmaxnmq): Likewise. |
| (vmaxnmq): Likewise. |
| (vmaxnmvq): Likewise. |
| (vmaxnmvq): Likewise. |
| (vminnmaq): Likewise. |
| (vminnmaq): Likewise. |
| (vminnmavq): Likewise. |
| (vminnmavq): Likewise. |
| (vminnmq): Likewise. |
| (vminnmq): Likewise. |
| (vminnmvq): Likewise. |
| (vminnmvq): Likewise. |
| (vbicq_n): Likewise. |
| (vqmovntq): Likewise. |
| (vqmovntq): Likewise. |
| (vqmovnbq): Likewise. |
| (vqmovnbq): Likewise. |
| (vmulltq_poly): Likewise. |
| (vmulltq_poly): Likewise. |
| (vmullbq_poly): Likewise. |
| (vmullbq_poly): Likewise. |
| (vmovntq): Likewise. |
| (vmovntq): Likewise. |
| (vmovnbq): Likewise. |
| (vmovnbq): Likewise. |
| (vmlaldavxq): Likewise. |
| (vmlaldavxq): Likewise. |
| (vqmovuntq): Likewise. |
| (vqmovuntq): Likewise. |
| (vshlltq_n): Likewise. |
| (vshlltq_n): Likewise. |
| (vshllbq_n): Likewise. |
| (vshllbq_n): Likewise. |
| (vorrq_n): Likewise. |
| (vorrq_n): Likewise. |
| (vmlaldavq): Likewise. |
| (vmlaldavq): Likewise. |
| (vqmovunbq): Likewise. |
| (vqmovunbq): Likewise. |
| (vqdmulltq_n): Likewise. |
| (vqdmulltq_n): Likewise. |
| (vqdmulltq): Likewise. |
| (vqdmulltq): Likewise. |
| (vqdmullbq_n): Likewise. |
| (vqdmullbq_n): Likewise. |
| (vqdmullbq): Likewise. |
| (vqdmullbq): Likewise. |
| (vaddlvaq): Likewise. |
| (vaddlvaq): Likewise. |
| (vrmlaldavhq): Likewise. |
| (vrmlaldavhq): Likewise. |
| (vrmlaldavhxq): Likewise. |
| (vrmlaldavhxq): Likewise. |
| (vrmlsldavhq): Likewise. |
| (vrmlsldavhq): Likewise. |
| (vrmlsldavhxq): Likewise. |
| (vrmlsldavhxq): Likewise. |
| (vmlsldavxq): Likewise. |
| (vmlsldavxq): Likewise. |
| (vmlsldavq): Likewise. |
| (vmlsldavq): Likewise. |
| * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it. |
| (BINOP_NONE_NONE_NONE): Likewise. |
| (BINOP_UNONE_NONE_NONE): Likewise. |
| (BINOP_UNONE_UNONE_IMM): Likewise. |
| (BINOP_UNONE_UNONE_NONE): Likewise. |
| (BINOP_UNONE_UNONE_UNONE): Likewise. |
| * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern. |
| (mve_vaddlvaq_<supf>v4si): Likewise. |
| (mve_vaddq_n_f<mode>): Likewise. |
| (mve_vandq_f<mode>): Likewise. |
| (mve_vbicq_f<mode>): Likewise. |
| (mve_vbicq_n_<supf><mode>): Likewise. |
| (mve_vcaddq_rot270_f<mode>): Likewise. |
| (mve_vcaddq_rot90_f<mode>): Likewise. |
| (mve_vcmpeqq_f<mode>): Likewise. |
| (mve_vcmpeqq_n_f<mode>): Likewise. |
| (mve_vcmpgeq_f<mode>): Likewise. |
| (mve_vcmpgeq_n_f<mode>): Likewise. |
| (mve_vcmpgtq_f<mode>): Likewise. |
| (mve_vcmpgtq_n_f<mode>): Likewise. |
| (mve_vcmpleq_f<mode>): Likewise. |
| (mve_vcmpleq_n_f<mode>): Likewise. |
| (mve_vcmpltq_f<mode>): Likewise. |
| (mve_vcmpltq_n_f<mode>): Likewise. |
| (mve_vcmpneq_f<mode>): Likewise. |
| (mve_vcmpneq_n_f<mode>): Likewise. |
| (mve_vcmulq_f<mode>): Likewise. |
| (mve_vcmulq_rot180_f<mode>): Likewise. |
| (mve_vcmulq_rot270_f<mode>): Likewise. |
| (mve_vcmulq_rot90_f<mode>): Likewise. |
| (mve_vctp<mode1>q_mhi): Likewise. |
| (mve_vcvtbq_f16_f32v8hf): Likewise. |
| (mve_vcvttq_f16_f32v8hf): Likewise. |
| (mve_veorq_f<mode>): Likewise. |
| (mve_vmaxnmaq_f<mode>): Likewise. |
| (mve_vmaxnmavq_f<mode>): Likewise. |
| (mve_vmaxnmq_f<mode>): Likewise. |
| (mve_vmaxnmvq_f<mode>): Likewise. |
| (mve_vminnmaq_f<mode>): Likewise. |
| (mve_vminnmavq_f<mode>): Likewise. |
| (mve_vminnmq_f<mode>): Likewise. |
| (mve_vminnmvq_f<mode>): Likewise. |
| (mve_vmlaldavq_<supf><mode>): Likewise. |
| (mve_vmlaldavxq_<supf><mode>): Likewise. |
| (mve_vmlsldavq_s<mode>): Likewise. |
| (mve_vmlsldavxq_s<mode>): Likewise. |
| (mve_vmovnbq_<supf><mode>): Likewise. |
| (mve_vmovntq_<supf><mode>): Likewise. |
| (mve_vmulq_f<mode>): Likewise. |
| (mve_vmulq_n_f<mode>): Likewise. |
| (mve_vornq_f<mode>): Likewise. |
| (mve_vorrq_f<mode>): Likewise. |
| (mve_vorrq_n_<supf><mode>): Likewise. |
| (mve_vqdmullbq_n_s<mode>): Likewise. |
| (mve_vqdmullbq_s<mode>): Likewise. |
| (mve_vqdmulltq_n_s<mode>): Likewise. |
| (mve_vqdmulltq_s<mode>): Likewise. |
| (mve_vqmovnbq_<supf><mode>): Likewise. |
| (mve_vqmovntq_<supf><mode>): Likewise. |
| (mve_vqmovunbq_s<mode>): Likewise. |
| (mve_vqmovuntq_s<mode>): Likewise. |
| (mve_vrmlaldavhxq_sv4si): Likewise. |
| (mve_vrmlsldavhq_sv4si): Likewise. |
| (mve_vrmlsldavhxq_sv4si): Likewise. |
| (mve_vshllbq_n_<supf><mode>): Likewise. |
| (mve_vshlltq_n_<supf><mode>): Likewise. |
| (mve_vsubq_f<mode>): Likewise. |
| (mve_vmulltq_poly_p<mode>): Likewise. |
| (mve_vmullbq_poly_p<mode>): Likewise. |
| (mve_vrmlaldavhq_<supf>v4si): Likewise. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm_mve.h (vsubq_u8): Define macro. |
| (vsubq_n_u8): Likewise. |
| (vrmulhq_u8): Likewise. |
| (vrhaddq_u8): Likewise. |
| (vqsubq_u8): Likewise. |
| (vqsubq_n_u8): Likewise. |
| (vqaddq_u8): Likewise. |
| (vqaddq_n_u8): Likewise. |
| (vorrq_u8): Likewise. |
| (vornq_u8): Likewise. |
| (vmulq_u8): Likewise. |
| (vmulq_n_u8): Likewise. |
| (vmulltq_int_u8): Likewise. |
| (vmullbq_int_u8): Likewise. |
| (vmulhq_u8): Likewise. |
| (vmladavq_u8): Likewise. |
| (vminvq_u8): Likewise. |
| (vminq_u8): Likewise. |
| (vmaxvq_u8): Likewise. |
| (vmaxq_u8): Likewise. |
| (vhsubq_u8): Likewise. |
| (vhsubq_n_u8): Likewise. |
| (vhaddq_u8): Likewise. |
| (vhaddq_n_u8): Likewise. |
| (veorq_u8): Likewise. |
| (vcmpneq_n_u8): Likewise. |
| (vcmphiq_u8): Likewise. |
| (vcmphiq_n_u8): Likewise. |
| (vcmpeqq_u8): Likewise. |
| (vcmpeqq_n_u8): Likewise. |
| (vcmpcsq_u8): Likewise. |
| (vcmpcsq_n_u8): Likewise. |
| (vcaddq_rot90_u8): Likewise. |
| (vcaddq_rot270_u8): Likewise. |
| (vbicq_u8): Likewise. |
| (vandq_u8): Likewise. |
| (vaddvq_p_u8): Likewise. |
| (vaddvaq_u8): Likewise. |
| (vaddq_n_u8): Likewise. |
| (vabdq_u8): Likewise. |
| (vshlq_r_u8): Likewise. |
| (vrshlq_u8): Likewise. |
| (vrshlq_n_u8): Likewise. |
| (vqshlq_u8): Likewise. |
| (vqshlq_r_u8): Likewise. |
| (vqrshlq_u8): Likewise. |
| (vqrshlq_n_u8): Likewise. |
| (vminavq_s8): Likewise. |
| (vminaq_s8): Likewise. |
| (vmaxavq_s8): Likewise. |
| (vmaxaq_s8): Likewise. |
| (vbrsrq_n_u8): Likewise. |
| (vshlq_n_u8): Likewise. |
| (vrshrq_n_u8): Likewise. |
| (vqshlq_n_u8): Likewise. |
| (vcmpneq_n_s8): Likewise. |
| (vcmpltq_s8): Likewise. |
| (vcmpltq_n_s8): Likewise. |
| (vcmpleq_s8): Likewise. |
| (vcmpleq_n_s8): Likewise. |
| (vcmpgtq_s8): Likewise. |
| (vcmpgtq_n_s8): Likewise. |
| (vcmpgeq_s8): Likewise. |
| (vcmpgeq_n_s8): Likewise. |
| (vcmpeqq_s8): Likewise. |
| (vcmpeqq_n_s8): Likewise. |
| (vqshluq_n_s8): Likewise. |
| (vaddvq_p_s8): Likewise. |
| (vsubq_s8): Likewise. |
| (vsubq_n_s8): Likewise. |
| (vshlq_r_s8): Likewise. |
| (vrshlq_s8): Likewise. |
| (vrshlq_n_s8): Likewise. |
| (vrmulhq_s8): Likewise. |
| (vrhaddq_s8): Likewise. |
| (vqsubq_s8): Likewise. |
| (vqsubq_n_s8): Likewise. |
| (vqshlq_s8): Likewise. |
| (vqshlq_r_s8): Likewise. |
| (vqrshlq_s8): Likewise. |
| (vqrshlq_n_s8): Likewise. |
| (vqrdmulhq_s8): Likewise. |
| (vqrdmulhq_n_s8): Likewise. |
| (vqdmulhq_s8): Likewise. |
| (vqdmulhq_n_s8): Likewise. |
| (vqaddq_s8): Likewise. |
| (vqaddq_n_s8): Likewise. |
| (vorrq_s8): Likewise. |
| (vornq_s8): Likewise. |
| (vmulq_s8): Likewise. |
| (vmulq_n_s8): Likewise. |
| (vmulltq_int_s8): Likewise. |
| (vmullbq_int_s8): Likewise. |
| (vmulhq_s8): Likewise. |
| (vmlsdavxq_s8): Likewise. |
| (vmlsdavq_s8): Likewise. |
| (vmladavxq_s8): Likewise. |
| (vmladavq_s8): Likewise. |
| (vminvq_s8): Likewise. |
| (vminq_s8): Likewise. |
| (vmaxvq_s8): Likewise. |
| (vmaxq_s8): Likewise. |
| (vhsubq_s8): Likewise. |
| (vhsubq_n_s8): Likewise. |
| (vhcaddq_rot90_s8): Likewise. |
| (vhcaddq_rot270_s8): Likewise. |
| (vhaddq_s8): Likewise. |
| (vhaddq_n_s8): Likewise. |
| (veorq_s8): Likewise. |
| (vcaddq_rot90_s8): Likewise. |
| (vcaddq_rot270_s8): Likewise. |
| (vbrsrq_n_s8): Likewise. |
| (vbicq_s8): Likewise. |
| (vandq_s8): Likewise. |
| (vaddvaq_s8): Likewise. |
| (vaddq_n_s8): Likewise. |
| (vabdq_s8): Likewise. |
| (vshlq_n_s8): Likewise. |
| (vrshrq_n_s8): Likewise. |
| (vqshlq_n_s8): Likewise. |
| (vsubq_u16): Likewise. |
| (vsubq_n_u16): Likewise. |
| (vrmulhq_u16): Likewise. |
| (vrhaddq_u16): Likewise. |
| (vqsubq_u16): Likewise. |
| (vqsubq_n_u16): Likewise. |
| (vqaddq_u16): Likewise. |
| (vqaddq_n_u16): Likewise. |
| (vorrq_u16): Likewise. |
| (vornq_u16): Likewise. |
| (vmulq_u16): Likewise. |
| (vmulq_n_u16): Likewise. |
| (vmulltq_int_u16): Likewise. |
| (vmullbq_int_u16): Likewise. |
| (vmulhq_u16): Likewise. |
| (vmladavq_u16): Likewise. |
| (vminvq_u16): Likewise. |
| (vminq_u16): Likewise. |
| (vmaxvq_u16): Likewise. |
| (vmaxq_u16): Likewise. |
| (vhsubq_u16): Likewise. |
| (vhsubq_n_u16): Likewise. |
| (vhaddq_u16): Likewise. |
| (vhaddq_n_u16): Likewise. |
| (veorq_u16): Likewise. |
| (vcmpneq_n_u16): Likewise. |
| (vcmphiq_u16): Likewise. |
| (vcmphiq_n_u16): Likewise. |
| (vcmpeqq_u16): Likewise. |
| (vcmpeqq_n_u16): Likewise. |
| (vcmpcsq_u16): Likewise. |
| (vcmpcsq_n_u16): Likewise. |
| (vcaddq_rot90_u16): Likewise. |
| (vcaddq_rot270_u16): Likewise. |
| (vbicq_u16): Likewise. |
| (vandq_u16): Likewise. |
| (vaddvq_p_u16): Likewise. |
| (vaddvaq_u16): Likewise. |
| (vaddq_n_u16): Likewise. |
| (vabdq_u16): Likewise. |
| (vshlq_r_u16): Likewise. |
| (vrshlq_u16): Likewise. |
| (vrshlq_n_u16): Likewise. |
| (vqshlq_u16): Likewise. |
| (vqshlq_r_u16): Likewise. |
| (vqrshlq_u16): Likewise. |
| (vqrshlq_n_u16): Likewise. |
| (vminavq_s16): Likewise. |
| (vminaq_s16): Likewise. |
| (vmaxavq_s16): Likewise. |
| (vmaxaq_s16): Likewise. |
| (vbrsrq_n_u16): Likewise. |
| (vshlq_n_u16): Likewise. |
| (vrshrq_n_u16): Likewise. |
| (vqshlq_n_u16): Likewise. |
| (vcmpneq_n_s16): Likewise. |
| (vcmpltq_s16): Likewise. |
| (vcmpltq_n_s16): Likewise. |
| (vcmpleq_s16): Likewise. |
| (vcmpleq_n_s16): Likewise. |
| (vcmpgtq_s16): Likewise. |
| (vcmpgtq_n_s16): Likewise. |
| (vcmpgeq_s16): Likewise. |
| (vcmpgeq_n_s16): Likewise. |
| (vcmpeqq_s16): Likewise. |
| (vcmpeqq_n_s16): Likewise. |
| (vqshluq_n_s16): Likewise. |
| (vaddvq_p_s16): Likewise. |
| (vsubq_s16): Likewise. |
| (vsubq_n_s16): Likewise. |
| (vshlq_r_s16): Likewise. |
| (vrshlq_s16): Likewise. |
| (vrshlq_n_s16): Likewise. |
| (vrmulhq_s16): Likewise. |
| (vrhaddq_s16): Likewise. |
| (vqsubq_s16): Likewise. |
| (vqsubq_n_s16): Likewise. |
| (vqshlq_s16): Likewise. |
| (vqshlq_r_s16): Likewise. |
| (vqrshlq_s16): Likewise. |
| (vqrshlq_n_s16): Likewise. |
| (vqrdmulhq_s16): Likewise. |
| (vqrdmulhq_n_s16): Likewise. |
| (vqdmulhq_s16): Likewise. |
| (vqdmulhq_n_s16): Likewise. |
| (vqaddq_s16): Likewise. |
| (vqaddq_n_s16): Likewise. |
| (vorrq_s16): Likewise. |
| (vornq_s16): Likewise. |
| (vmulq_s16): Likewise. |
| (vmulq_n_s16): Likewise. |
| (vmulltq_int_s16): Likewise. |
| (vmullbq_int_s16): Likewise. |
| (vmulhq_s16): Likewise. |
| (vmlsdavxq_s16): Likewise. |
| (vmlsdavq_s16): Likewise. |
| (vmladavxq_s16): Likewise. |
| (vmladavq_s16): Likewise. |
| (vminvq_s16): Likewise. |
| (vminq_s16): Likewise. |
| (vmaxvq_s16): Likewise. |
| (vmaxq_s16): Likewise. |
| (vhsubq_s16): Likewise. |
| (vhsubq_n_s16): Likewise. |
| (vhcaddq_rot90_s16): Likewise. |
| (vhcaddq_rot270_s16): Likewise. |
| (vhaddq_s16): Likewise. |
| (vhaddq_n_s16): Likewise. |
| (veorq_s16): Likewise. |
| (vcaddq_rot90_s16): Likewise. |
| (vcaddq_rot270_s16): Likewise. |
| (vbrsrq_n_s16): Likewise. |
| (vbicq_s16): Likewise. |
| (vandq_s16): Likewise. |
| (vaddvaq_s16): Likewise. |
| (vaddq_n_s16): Likewise. |
| (vabdq_s16): Likewise. |
| (vshlq_n_s16): Likewise. |
| (vrshrq_n_s16): Likewise. |
| (vqshlq_n_s16): Likewise. |
| (vsubq_u32): Likewise. |
| (vsubq_n_u32): Likewise. |
| (vrmulhq_u32): Likewise. |
| (vrhaddq_u32): Likewise. |
| (vqsubq_u32): Likewise. |
| (vqsubq_n_u32): Likewise. |
| (vqaddq_u32): Likewise. |
| (vqaddq_n_u32): Likewise. |
| (vorrq_u32): Likewise. |
| (vornq_u32): Likewise. |
| (vmulq_u32): Likewise. |
| (vmulq_n_u32): Likewise. |
| (vmulltq_int_u32): Likewise. |
| (vmullbq_int_u32): Likewise. |
| (vmulhq_u32): Likewise. |
| (vmladavq_u32): Likewise. |
| (vminvq_u32): Likewise. |
| (vminq_u32): Likewise. |
| (vmaxvq_u32): Likewise. |
| (vmaxq_u32): Likewise. |
| (vhsubq_u32): Likewise. |
| (vhsubq_n_u32): Likewise. |
| (vhaddq_u32): Likewise. |
| (vhaddq_n_u32): Likewise. |
| (veorq_u32): Likewise. |
| (vcmpneq_n_u32): Likewise. |
| (vcmphiq_u32): Likewise. |
| (vcmphiq_n_u32): Likewise. |
| (vcmpeqq_u32): Likewise. |
| (vcmpeqq_n_u32): Likewise. |
| (vcmpcsq_u32): Likewise. |
| (vcmpcsq_n_u32): Likewise. |
| (vcaddq_rot90_u32): Likewise. |
| (vcaddq_rot270_u32): Likewise. |
| (vbicq_u32): Likewise. |
| (vandq_u32): Likewise. |
| (vaddvq_p_u32): Likewise. |
| (vaddvaq_u32): Likewise. |
| (vaddq_n_u32): Likewise. |
| (vabdq_u32): Likewise. |
| (vshlq_r_u32): Likewise. |
| (vrshlq_u32): Likewise. |
| (vrshlq_n_u32): Likewise. |
| (vqshlq_u32): Likewise. |
| (vqshlq_r_u32): Likewise. |
| (vqrshlq_u32): Likewise. |
| (vqrshlq_n_u32): Likewise. |
| (vminavq_s32): Likewise. |
| (vminaq_s32): Likewise. |
| (vmaxavq_s32): Likewise. |
| (vmaxaq_s32): Likewise. |
| (vbrsrq_n_u32): Likewise. |
| (vshlq_n_u32): Likewise. |
| (vrshrq_n_u32): Likewise. |
| (vqshlq_n_u32): Likewise. |
| (vcmpneq_n_s32): Likewise. |
| (vcmpltq_s32): Likewise. |
| (vcmpltq_n_s32): Likewise. |
| (vcmpleq_s32): Likewise. |
| (vcmpleq_n_s32): Likewise. |
| (vcmpgtq_s32): Likewise. |
| (vcmpgtq_n_s32): Likewise. |
| (vcmpgeq_s32): Likewise. |
| (vcmpgeq_n_s32): Likewise. |
| (vcmpeqq_s32): Likewise. |
| (vcmpeqq_n_s32): Likewise. |
| (vqshluq_n_s32): Likewise. |
| (vaddvq_p_s32): Likewise. |
| (vsubq_s32): Likewise. |
| (vsubq_n_s32): Likewise. |
| (vshlq_r_s32): Likewise. |
| (vrshlq_s32): Likewise. |
| (vrshlq_n_s32): Likewise. |
| (vrmulhq_s32): Likewise. |
| (vrhaddq_s32): Likewise. |
| (vqsubq_s32): Likewise. |
| (vqsubq_n_s32): Likewise. |
| (vqshlq_s32): Likewise. |
| (vqshlq_r_s32): Likewise. |
| (vqrshlq_s32): Likewise. |
| (vqrshlq_n_s32): Likewise. |
| (vqrdmulhq_s32): Likewise. |
| (vqrdmulhq_n_s32): Likewise. |
| (vqdmulhq_s32): Likewise. |
| (vqdmulhq_n_s32): Likewise. |
| (vqaddq_s32): Likewise. |
| (vqaddq_n_s32): Likewise. |
| (vorrq_s32): Likewise. |
| (vornq_s32): Likewise. |
| (vmulq_s32): Likewise. |
| (vmulq_n_s32): Likewise. |
| (vmulltq_int_s32): Likewise. |
| (vmullbq_int_s32): Likewise. |
| (vmulhq_s32): Likewise. |
| (vmlsdavxq_s32): Likewise. |
| (vmlsdavq_s32): Likewise. |
| (vmladavxq_s32): Likewise. |
| (vmladavq_s32): Likewise. |
| (vminvq_s32): Likewise. |
| (vminq_s32): Likewise. |
| (vmaxvq_s32): Likewise. |
| (vmaxq_s32): Likewise. |
| (vhsubq_s32): Likewise. |
| (vhsubq_n_s32): Likewise. |
| (vhcaddq_rot90_s32): Likewise. |
| (vhcaddq_rot270_s32): Likewise. |
| (vhaddq_s32): Likewise. |
| (vhaddq_n_s32): Likewise. |
| (veorq_s32): Likewise. |
| (vcaddq_rot90_s32): Likewise. |
| (vcaddq_rot270_s32): Likewise. |
| (vbrsrq_n_s32): Likewise. |
| (vbicq_s32): Likewise. |
| (vandq_s32): Likewise. |
| (vaddvaq_s32): Likewise. |
| (vaddq_n_s32): Likewise. |
| (vabdq_s32): Likewise. |
| (vshlq_n_s32): Likewise. |
| (vrshrq_n_s32): Likewise. |
| (vqshlq_n_s32): Likewise. |
| (__arm_vsubq_u8): Define intrinsic. |
| (__arm_vsubq_n_u8): Likewise. |
| (__arm_vrmulhq_u8): Likewise. |
| (__arm_vrhaddq_u8): Likewise. |
| (__arm_vqsubq_u8): Likewise. |
| (__arm_vqsubq_n_u8): Likewise. |
| (__arm_vqaddq_u8): Likewise. |
| (__arm_vqaddq_n_u8): Likewise. |
| (__arm_vorrq_u8): Likewise. |
| (__arm_vornq_u8): Likewise. |
| (__arm_vmulq_u8): Likewise. |
| (__arm_vmulq_n_u8): Likewise. |
| (__arm_vmulltq_int_u8): Likewise. |
| (__arm_vmullbq_int_u8): Likewise. |
| (__arm_vmulhq_u8): Likewise. |
| (__arm_vmladavq_u8): Likewise. |
| (__arm_vminvq_u8): Likewise. |
| (__arm_vminq_u8): Likewise. |
| (__arm_vmaxvq_u8): Likewise. |
| (__arm_vmaxq_u8): Likewise. |
| (__arm_vhsubq_u8): Likewise. |
| (__arm_vhsubq_n_u8): Likewise. |
| (__arm_vhaddq_u8): Likewise. |
| (__arm_vhaddq_n_u8): Likewise. |
| (__arm_veorq_u8): Likewise. |
| (__arm_vcmpneq_n_u8): Likewise. |
| (__arm_vcmphiq_u8): Likewise. |
| (__arm_vcmphiq_n_u8): Likewise. |
| (__arm_vcmpeqq_u8): Likewise. |
| (__arm_vcmpeqq_n_u8): Likewise. |
| (__arm_vcmpcsq_u8): Likewise. |
| (__arm_vcmpcsq_n_u8): Likewise. |
| (__arm_vcaddq_rot90_u8): Likewise. |
| (__arm_vcaddq_rot270_u8): Likewise. |
| (__arm_vbicq_u8): Likewise. |
| (__arm_vandq_u8): Likewise. |
| (__arm_vaddvq_p_u8): Likewise. |
| (__arm_vaddvaq_u8): Likewise. |
| (__arm_vaddq_n_u8): Likewise. |
| (__arm_vabdq_u8): Likewise. |
| (__arm_vshlq_r_u8): Likewise. |
| (__arm_vrshlq_u8): Likewise. |
| (__arm_vrshlq_n_u8): Likewise. |
| (__arm_vqshlq_u8): Likewise. |
| (__arm_vqshlq_r_u8): Likewise. |
| (__arm_vqrshlq_u8): Likewise. |
| (__arm_vqrshlq_n_u8): Likewise. |
| (__arm_vminavq_s8): Likewise. |
| (__arm_vminaq_s8): Likewise. |
| (__arm_vmaxavq_s8): Likewise. |
| (__arm_vmaxaq_s8): Likewise. |
| (__arm_vbrsrq_n_u8): Likewise. |
| (__arm_vshlq_n_u8): Likewise. |
| (__arm_vrshrq_n_u8): Likewise. |
| (__arm_vqshlq_n_u8): Likewise. |
| (__arm_vcmpneq_n_s8): Likewise. |
| (__arm_vcmpltq_s8): Likewise. |
| (__arm_vcmpltq_n_s8): Likewise. |
| (__arm_vcmpleq_s8): Likewise. |
| (__arm_vcmpleq_n_s8): Likewise. |
| (__arm_vcmpgtq_s8): Likewise. |
| (__arm_vcmpgtq_n_s8): Likewise. |
| (__arm_vcmpgeq_s8): Likewise. |
| (__arm_vcmpgeq_n_s8): Likewise. |
| (__arm_vcmpeqq_s8): Likewise. |
| (__arm_vcmpeqq_n_s8): Likewise. |
| (__arm_vqshluq_n_s8): Likewise. |
| (__arm_vaddvq_p_s8): Likewise. |
| (__arm_vsubq_s8): Likewise. |
| (__arm_vsubq_n_s8): Likewise. |
| (__arm_vshlq_r_s8): Likewise. |
| (__arm_vrshlq_s8): Likewise. |
| (__arm_vrshlq_n_s8): Likewise. |
| (__arm_vrmulhq_s8): Likewise. |
| (__arm_vrhaddq_s8): Likewise. |
| (__arm_vqsubq_s8): Likewise. |
| (__arm_vqsubq_n_s8): Likewise. |
| (__arm_vqshlq_s8): Likewise. |
| (__arm_vqshlq_r_s8): Likewise. |
| (__arm_vqrshlq_s8): Likewise. |
| (__arm_vqrshlq_n_s8): Likewise. |
| (__arm_vqrdmulhq_s8): Likewise. |
| (__arm_vqrdmulhq_n_s8): Likewise. |
| (__arm_vqdmulhq_s8): Likewise. |
| (__arm_vqdmulhq_n_s8): Likewise. |
| (__arm_vqaddq_s8): Likewise. |
| (__arm_vqaddq_n_s8): Likewise. |
| (__arm_vorrq_s8): Likewise. |
| (__arm_vornq_s8): Likewise. |
| (__arm_vmulq_s8): Likewise. |
| (__arm_vmulq_n_s8): Likewise. |
| (__arm_vmulltq_int_s8): Likewise. |
| (__arm_vmullbq_int_s8): Likewise. |
| (__arm_vmulhq_s8): Likewise. |
| (__arm_vmlsdavxq_s8): Likewise. |
| (__arm_vmlsdavq_s8): Likewise. |
| (__arm_vmladavxq_s8): Likewise. |
| (__arm_vmladavq_s8): Likewise. |
| (__arm_vminvq_s8): Likewise. |
| (__arm_vminq_s8): Likewise. |
| (__arm_vmaxvq_s8): Likewise. |
| (__arm_vmaxq_s8): Likewise. |
| (__arm_vhsubq_s8): Likewise. |
| (__arm_vhsubq_n_s8): Likewise. |
| (__arm_vhcaddq_rot90_s8): Likewise. |
| (__arm_vhcaddq_rot270_s8): Likewise. |
| (__arm_vhaddq_s8): Likewise. |
| (__arm_vhaddq_n_s8): Likewise. |
| (__arm_veorq_s8): Likewise. |
| (__arm_vcaddq_rot90_s8): Likewise. |
| (__arm_vcaddq_rot270_s8): Likewise. |
| (__arm_vbrsrq_n_s8): Likewise. |
| (__arm_vbicq_s8): Likewise. |
| (__arm_vandq_s8): Likewise. |
| (__arm_vaddvaq_s8): Likewise. |
| (__arm_vaddq_n_s8): Likewise. |
| (__arm_vabdq_s8): Likewise. |
| (__arm_vshlq_n_s8): Likewise. |
| (__arm_vrshrq_n_s8): Likewise. |
| (__arm_vqshlq_n_s8): Likewise. |
| (__arm_vsubq_u16): Likewise. |
| (__arm_vsubq_n_u16): Likewise. |
| (__arm_vrmulhq_u16): Likewise. |
| (__arm_vrhaddq_u16): Likewise. |
| (__arm_vqsubq_u16): Likewise. |
| (__arm_vqsubq_n_u16): Likewise. |
| (__arm_vqaddq_u16): Likewise. |
| (__arm_vqaddq_n_u16): Likewise. |
| (__arm_vorrq_u16): Likewise. |
| (__arm_vornq_u16): Likewise. |
| (__arm_vmulq_u16): Likewise. |
| (__arm_vmulq_n_u16): Likewise. |
| (__arm_vmulltq_int_u16): Likewise. |
| (__arm_vmullbq_int_u16): Likewise. |
| (__arm_vmulhq_u16): Likewise. |
| (__arm_vmladavq_u16): Likewise. |
| (__arm_vminvq_u16): Likewise. |
| (__arm_vminq_u16): Likewise. |
| (__arm_vmaxvq_u16): Likewise. |
| (__arm_vmaxq_u16): Likewise. |
| (__arm_vhsubq_u16): Likewise. |
| (__arm_vhsubq_n_u16): Likewise. |
| (__arm_vhaddq_u16): Likewise. |
| (__arm_vhaddq_n_u16): Likewise. |
| (__arm_veorq_u16): Likewise. |
| (__arm_vcmpneq_n_u16): Likewise. |
| (__arm_vcmphiq_u16): Likewise. |
| (__arm_vcmphiq_n_u16): Likewise. |
| (__arm_vcmpeqq_u16): Likewise. |
| (__arm_vcmpeqq_n_u16): Likewise. |
| (__arm_vcmpcsq_u16): Likewise. |
| (__arm_vcmpcsq_n_u16): Likewise. |
| (__arm_vcaddq_rot90_u16): Likewise. |
| (__arm_vcaddq_rot270_u16): Likewise. |
| (__arm_vbicq_u16): Likewise. |
| (__arm_vandq_u16): Likewise. |
| (__arm_vaddvq_p_u16): Likewise. |
| (__arm_vaddvaq_u16): Likewise. |
| (__arm_vaddq_n_u16): Likewise. |
| (__arm_vabdq_u16): Likewise. |
| (__arm_vshlq_r_u16): Likewise. |
| (__arm_vrshlq_u16): Likewise. |
| (__arm_vrshlq_n_u16): Likewise. |
| (__arm_vqshlq_u16): Likewise. |
| (__arm_vqshlq_r_u16): Likewise. |
| (__arm_vqrshlq_u16): Likewise. |
| (__arm_vqrshlq_n_u16): Likewise. |
| (__arm_vminavq_s16): Likewise. |
| (__arm_vminaq_s16): Likewise. |
| (__arm_vmaxavq_s16): Likewise. |
| (__arm_vmaxaq_s16): Likewise. |
| (__arm_vbrsrq_n_u16): Likewise. |
| (__arm_vshlq_n_u16): Likewise. |
| (__arm_vrshrq_n_u16): Likewise. |
| (__arm_vqshlq_n_u16): Likewise. |
| (__arm_vcmpneq_n_s16): Likewise. |
| (__arm_vcmpltq_s16): Likewise. |
| (__arm_vcmpltq_n_s16): Likewise. |
| (__arm_vcmpleq_s16): Likewise. |
| (__arm_vcmpleq_n_s16): Likewise. |
| (__arm_vcmpgtq_s16): Likewise. |
| (__arm_vcmpgtq_n_s16): Likewise. |
| (__arm_vcmpgeq_s16): Likewise. |
| (__arm_vcmpgeq_n_s16): Likewise. |
| (__arm_vcmpeqq_s16): Likewise. |
| (__arm_vcmpeqq_n_s16): Likewise. |
| (__arm_vqshluq_n_s16): Likewise. |
| (__arm_vaddvq_p_s16): Likewise. |
| (__arm_vsubq_s16): Likewise. |
| (__arm_vsubq_n_s16): Likewise. |
| (__arm_vshlq_r_s16): Likewise. |
| (__arm_vrshlq_s16): Likewise. |
| (__arm_vrshlq_n_s16): Likewise. |
| (__arm_vrmulhq_s16): Likewise. |
| (__arm_vrhaddq_s16): Likewise. |
| (__arm_vqsubq_s16): Likewise. |
| (__arm_vqsubq_n_s16): Likewise. |
| (__arm_vqshlq_s16): Likewise. |
| (__arm_vqshlq_r_s16): Likewise. |
| (__arm_vqrshlq_s16): Likewise. |
| (__arm_vqrshlq_n_s16): Likewise. |
| (__arm_vqrdmulhq_s16): Likewise. |
| (__arm_vqrdmulhq_n_s16): Likewise. |
| (__arm_vqdmulhq_s16): Likewise. |
| (__arm_vqdmulhq_n_s16): Likewise. |
| (__arm_vqaddq_s16): Likewise. |
| (__arm_vqaddq_n_s16): Likewise. |
| (__arm_vorrq_s16): Likewise. |
| (__arm_vornq_s16): Likewise. |
| (__arm_vmulq_s16): Likewise. |
| (__arm_vmulq_n_s16): Likewise. |
| (__arm_vmulltq_int_s16): Likewise. |
| (__arm_vmullbq_int_s16): Likewise. |
| (__arm_vmulhq_s16): Likewise. |
| (__arm_vmlsdavxq_s16): Likewise. |
| (__arm_vmlsdavq_s16): Likewise. |
| (__arm_vmladavxq_s16): Likewise. |
| (__arm_vmladavq_s16): Likewise. |
| (__arm_vminvq_s16): Likewise. |
| (__arm_vminq_s16): Likewise. |
| (__arm_vmaxvq_s16): Likewise. |
| (__arm_vmaxq_s16): Likewise. |
| (__arm_vhsubq_s16): Likewise. |
| (__arm_vhsubq_n_s16): Likewise. |
| (__arm_vhcaddq_rot90_s16): Likewise. |
| (__arm_vhcaddq_rot270_s16): Likewise. |
| (__arm_vhaddq_s16): Likewise. |
| (__arm_vhaddq_n_s16): Likewise. |
| (__arm_veorq_s16): Likewise. |
| (__arm_vcaddq_rot90_s16): Likewise. |
| (__arm_vcaddq_rot270_s16): Likewise. |
| (__arm_vbrsrq_n_s16): Likewise. |
| (__arm_vbicq_s16): Likewise. |
| (__arm_vandq_s16): Likewise. |
| (__arm_vaddvaq_s16): Likewise. |
| (__arm_vaddq_n_s16): Likewise. |
| (__arm_vabdq_s16): Likewise. |
| (__arm_vshlq_n_s16): Likewise. |
| (__arm_vrshrq_n_s16): Likewise. |
| (__arm_vqshlq_n_s16): Likewise. |
| (__arm_vsubq_u32): Likewise. |
| (__arm_vsubq_n_u32): Likewise. |
| (__arm_vrmulhq_u32): Likewise. |
| (__arm_vrhaddq_u32): Likewise. |
| (__arm_vqsubq_u32): Likewise. |
| (__arm_vqsubq_n_u32): Likewise. |
| (__arm_vqaddq_u32): Likewise. |
| (__arm_vqaddq_n_u32): Likewise. |
| (__arm_vorrq_u32): Likewise. |
| (__arm_vornq_u32): Likewise. |
| (__arm_vmulq_u32): Likewise. |
| (__arm_vmulq_n_u32): Likewise. |
| (__arm_vmulltq_int_u32): Likewise. |
| (__arm_vmullbq_int_u32): Likewise. |
| (__arm_vmulhq_u32): Likewise. |
| (__arm_vmladavq_u32): Likewise. |
| (__arm_vminvq_u32): Likewise. |
| (__arm_vminq_u32): Likewise. |
| (__arm_vmaxvq_u32): Likewise. |
| (__arm_vmaxq_u32): Likewise. |
| (__arm_vhsubq_u32): Likewise. |
| (__arm_vhsubq_n_u32): Likewise. |
| (__arm_vhaddq_u32): Likewise. |
| (__arm_vhaddq_n_u32): Likewise. |
| (__arm_veorq_u32): Likewise. |
| (__arm_vcmpneq_n_u32): Likewise. |
| (__arm_vcmphiq_u32): Likewise. |
| (__arm_vcmphiq_n_u32): Likewise. |
| (__arm_vcmpeqq_u32): Likewise. |
| (__arm_vcmpeqq_n_u32): Likewise. |
| (__arm_vcmpcsq_u32): Likewise. |
| (__arm_vcmpcsq_n_u32): Likewise. |
| (__arm_vcaddq_rot90_u32): Likewise. |
| (__arm_vcaddq_rot270_u32): Likewise. |
| (__arm_vbicq_u32): Likewise. |
| (__arm_vandq_u32): Likewise. |
| (__arm_vaddvq_p_u32): Likewise. |
| (__arm_vaddvaq_u32): Likewise. |
| (__arm_vaddq_n_u32): Likewise. |
| (__arm_vabdq_u32): Likewise. |
| (__arm_vshlq_r_u32): Likewise. |
| (__arm_vrshlq_u32): Likewise. |
| (__arm_vrshlq_n_u32): Likewise. |
| (__arm_vqshlq_u32): Likewise. |
| (__arm_vqshlq_r_u32): Likewise. |
| (__arm_vqrshlq_u32): Likewise. |
| (__arm_vqrshlq_n_u32): Likewise. |
| (__arm_vminavq_s32): Likewise. |
| (__arm_vminaq_s32): Likewise. |
| (__arm_vmaxavq_s32): Likewise. |
| (__arm_vmaxaq_s32): Likewise. |
| (__arm_vbrsrq_n_u32): Likewise. |
| (__arm_vshlq_n_u32): Likewise. |
| (__arm_vrshrq_n_u32): Likewise. |
| (__arm_vqshlq_n_u32): Likewise. |
| (__arm_vcmpneq_n_s32): Likewise. |
| (__arm_vcmpltq_s32): Likewise. |
| (__arm_vcmpltq_n_s32): Likewise. |
| (__arm_vcmpleq_s32): Likewise. |
| (__arm_vcmpleq_n_s32): Likewise. |
| (__arm_vcmpgtq_s32): Likewise. |
| (__arm_vcmpgtq_n_s32): Likewise. |
| (__arm_vcmpgeq_s32): Likewise. |
| (__arm_vcmpgeq_n_s32): Likewise. |
| (__arm_vcmpeqq_s32): Likewise. |
| (__arm_vcmpeqq_n_s32): Likewise. |
| (__arm_vqshluq_n_s32): Likewise. |
| (__arm_vaddvq_p_s32): Likewise. |
| (__arm_vsubq_s32): Likewise. |
| (__arm_vsubq_n_s32): Likewise. |
| (__arm_vshlq_r_s32): Likewise. |
| (__arm_vrshlq_s32): Likewise. |
| (__arm_vrshlq_n_s32): Likewise. |
| (__arm_vrmulhq_s32): Likewise. |
| (__arm_vrhaddq_s32): Likewise. |
| (__arm_vqsubq_s32): Likewise. |
| (__arm_vqsubq_n_s32): Likewise. |
| (__arm_vqshlq_s32): Likewise. |
| (__arm_vqshlq_r_s32): Likewise. |
| (__arm_vqrshlq_s32): Likewise. |
| (__arm_vqrshlq_n_s32): Likewise. |
| (__arm_vqrdmulhq_s32): Likewise. |
| (__arm_vqrdmulhq_n_s32): Likewise. |
| (__arm_vqdmulhq_s32): Likewise. |
| (__arm_vqdmulhq_n_s32): Likewise. |
| (__arm_vqaddq_s32): Likewise. |
| (__arm_vqaddq_n_s32): Likewise. |
| (__arm_vorrq_s32): Likewise. |
| (__arm_vornq_s32): Likewise. |
| (__arm_vmulq_s32): Likewise. |
| (__arm_vmulq_n_s32): Likewise. |
| (__arm_vmulltq_int_s32): Likewise. |
| (__arm_vmullbq_int_s32): Likewise. |
| (__arm_vmulhq_s32): Likewise. |
| (__arm_vmlsdavxq_s32): Likewise. |
| (__arm_vmlsdavq_s32): Likewise. |
| (__arm_vmladavxq_s32): Likewise. |
| (__arm_vmladavq_s32): Likewise. |
| (__arm_vminvq_s32): Likewise. |
| (__arm_vminq_s32): Likewise. |
| (__arm_vmaxvq_s32): Likewise. |
| (__arm_vmaxq_s32): Likewise. |
| (__arm_vhsubq_s32): Likewise. |
| (__arm_vhsubq_n_s32): Likewise. |
| (__arm_vhcaddq_rot90_s32): Likewise. |
| (__arm_vhcaddq_rot270_s32): Likewise. |
| (__arm_vhaddq_s32): Likewise. |
| (__arm_vhaddq_n_s32): Likewise. |
| (__arm_veorq_s32): Likewise. |
| (__arm_vcaddq_rot90_s32): Likewise. |
| (__arm_vcaddq_rot270_s32): Likewise. |
| (__arm_vbrsrq_n_s32): Likewise. |
| (__arm_vbicq_s32): Likewise. |
| (__arm_vandq_s32): Likewise. |
| (__arm_vaddvaq_s32): Likewise. |
| (__arm_vaddq_n_s32): Likewise. |
| (__arm_vabdq_s32): Likewise. |
| (__arm_vshlq_n_s32): Likewise. |
| (__arm_vrshrq_n_s32): Likewise. |
| (__arm_vqshlq_n_s32): Likewise. |
| (vsubq): Define polymorphic variant. |
| (vsubq_n): Likewise. |
| (vshlq_r): Likewise. |
| (vrshlq_n): Likewise. |
| (vrshlq): Likewise. |
| (vrmulhq): Likewise. |
| (vrhaddq): Likewise. |
| (vqsubq_n): Likewise. |
| (vqsubq): Likewise. |
| (vqshlq): Likewise. |
| (vqshlq_r): Likewise. |
| (vqshluq): Likewise. |
| (vrshrq_n): Likewise. |
| (vshlq_n): Likewise. |
| (vqshluq_n): Likewise. |
| (vqshlq_n): Likewise. |
| (vqrshlq_n): Likewise. |
| (vqrshlq): Likewise. |
| (vqrdmulhq_n): Likewise. |
| (vqrdmulhq): Likewise. |
| (vqdmulhq_n): Likewise. |
| (vqdmulhq): Likewise. |
| (vqaddq_n): Likewise. |
| (vqaddq): Likewise. |
| (vorrq_n): Likewise. |
| (vorrq): Likewise. |
| (vornq): Likewise. |
| (vmulq_n): Likewise. |
| (vmulq): Likewise. |
| (vmulltq_int): Likewise. |
| (vmullbq_int): Likewise. |
| (vmulhq): Likewise. |
| (vminq): Likewise. |
| (vminaq): Likewise. |
| (vmaxq): Likewise. |
| (vmaxaq): Likewise. |
| (vhsubq_n): Likewise. |
| (vhsubq): Likewise. |
| (vhcaddq_rot90): Likewise. |
| (vhcaddq_rot270): Likewise. |
| (vhaddq_n): Likewise. |
| (vhaddq): Likewise. |
| (veorq): Likewise. |
| (vcaddq_rot90): Likewise. |
| (vcaddq_rot270): Likewise. |
| (vbrsrq_n): Likewise. |
| (vbicq_n): Likewise. |
| (vbicq): Likewise. |
| (vaddq): Likewise. |
| (vaddq_n): Likewise. |
| (vandq): Likewise. |
| (vabdq): Likewise. |
| * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it. |
| (BINOP_NONE_NONE_NONE): Likewise. |
| (BINOP_NONE_NONE_UNONE): Likewise. |
| (BINOP_UNONE_NONE_IMM): Likewise. |
| (BINOP_UNONE_NONE_NONE): Likewise. |
| (BINOP_UNONE_UNONE_IMM): Likewise. |
| (BINOP_UNONE_UNONE_NONE): Likewise. |
| (BINOP_UNONE_UNONE_UNONE): Likewise. |
| * config/arm/constraints.md (Ra): Define constraint to check constant is |
| in the range of 0 to 7. |
| (Rg): Define constriant to check the constant is one among 1, 2, 4 |
| and 8. |
| * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern. |
| (mve_vaddq_n_<supf>): Likewise. |
| (mve_vaddvaq_<supf>): Likewise. |
| (mve_vaddvq_p_<supf>): Likewise. |
| (mve_vandq_<supf>): Likewise. |
| (mve_vbicq_<supf>): Likewise. |
| (mve_vbrsrq_n_<supf>): Likewise. |
| (mve_vcaddq_rot270_<supf>): Likewise. |
| (mve_vcaddq_rot90_<supf>): Likewise. |
| (mve_vcmpcsq_n_u): Likewise. |
| (mve_vcmpcsq_u): Likewise. |
| (mve_vcmpeqq_n_<supf>): Likewise. |
| (mve_vcmpeqq_<supf>): Likewise. |
| (mve_vcmpgeq_n_s): Likewise. |
| (mve_vcmpgeq_s): Likewise. |
| (mve_vcmpgtq_n_s): Likewise. |
| (mve_vcmpgtq_s): Likewise. |
| (mve_vcmphiq_n_u): Likewise. |
| (mve_vcmphiq_u): Likewise. |
| (mve_vcmpleq_n_s): Likewise. |
| (mve_vcmpleq_s): Likewise. |
| (mve_vcmpltq_n_s): Likewise. |
| (mve_vcmpltq_s): Likewise. |
| (mve_vcmpneq_n_<supf>): Likewise. |
| (mve_vddupq_n_u): Likewise. |
| (mve_veorq_<supf>): Likewise. |
| (mve_vhaddq_n_<supf>): Likewise. |
| (mve_vhaddq_<supf>): Likewise. |
| (mve_vhcaddq_rot270_s): Likewise. |
| (mve_vhcaddq_rot90_s): Likewise. |
| (mve_vhsubq_n_<supf>): Likewise. |
| (mve_vhsubq_<supf>): Likewise. |
| (mve_vidupq_n_u): Likewise. |
| (mve_vmaxaq_s): Likewise. |
| (mve_vmaxavq_s): Likewise. |
| (mve_vmaxq_<supf>): Likewise. |
| (mve_vmaxvq_<supf>): Likewise. |
| (mve_vminaq_s): Likewise. |
| (mve_vminavq_s): Likewise. |
| (mve_vminq_<supf>): Likewise. |
| (mve_vminvq_<supf>): Likewise. |
| (mve_vmladavq_<supf>): Likewise. |
| (mve_vmladavxq_s): Likewise. |
| (mve_vmlsdavq_s): Likewise. |
| (mve_vmlsdavxq_s): Likewise. |
| (mve_vmulhq_<supf>): Likewise. |
| (mve_vmullbq_int_<supf>): Likewise. |
| (mve_vmulltq_int_<supf>): Likewise. |
| (mve_vmulq_n_<supf>): Likewise. |
| (mve_vmulq_<supf>): Likewise. |
| (mve_vornq_<supf>): Likewise. |
| (mve_vorrq_<supf>): Likewise. |
| (mve_vqaddq_n_<supf>): Likewise. |
| (mve_vqaddq_<supf>): Likewise. |
| (mve_vqdmulhq_n_s): Likewise. |
| (mve_vqdmulhq_s): Likewise. |
| (mve_vqrdmulhq_n_s): Likewise. |
| (mve_vqrdmulhq_s): Likewise. |
| (mve_vqrshlq_n_<supf>): Likewise. |
| (mve_vqrshlq_<supf>): Likewise. |
| (mve_vqshlq_n_<supf>): Likewise. |
| (mve_vqshlq_r_<supf>): Likewise. |
| (mve_vqshlq_<supf>): Likewise. |
| (mve_vqshluq_n_s): Likewise. |
| (mve_vqsubq_n_<supf>): Likewise. |
| (mve_vqsubq_<supf>): Likewise. |
| (mve_vrhaddq_<supf>): Likewise. |
| (mve_vrmulhq_<supf>): Likewise. |
| (mve_vrshlq_n_<supf>): Likewise. |
| (mve_vrshlq_<supf>): Likewise. |
| (mve_vrshrq_n_<supf>): Likewise. |
| (mve_vshlq_n_<supf>): Likewise. |
| (mve_vshlq_r_<supf>): Likewise. |
| (mve_vsubq_n_<supf>): Likewise. |
| (mve_vsubq_<supf>): Likewise. |
| * config/arm/predicates.md (mve_imm_7): Define predicate to check |
| the matching constraint Ra. |
| (mve_imm_selective_upto_8): Define predicate to check the matching |
| constraint Rg. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define |
| qualifier for binary operands. |
| (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise. |
| (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro. |
| (vaddlvq_p_u32): Likewise. |
| (vcmpneq_s8): Likewise. |
| (vcmpneq_s16): Likewise. |
| (vcmpneq_s32): Likewise. |
| (vcmpneq_u8): Likewise. |
| (vcmpneq_u16): Likewise. |
| (vcmpneq_u32): Likewise. |
| (vshlq_s8): Likewise. |
| (vshlq_s16): Likewise. |
| (vshlq_s32): Likewise. |
| (vshlq_u8): Likewise. |
| (vshlq_u16): Likewise. |
| (vshlq_u32): Likewise. |
| (__arm_vaddlvq_p_s32): Define intrinsic. |
| (__arm_vaddlvq_p_u32): Likewise. |
| (__arm_vcmpneq_s8): Likewise. |
| (__arm_vcmpneq_s16): Likewise. |
| (__arm_vcmpneq_s32): Likewise. |
| (__arm_vcmpneq_u8): Likewise. |
| (__arm_vcmpneq_u16): Likewise. |
| (__arm_vcmpneq_u32): Likewise. |
| (__arm_vshlq_s8): Likewise. |
| (__arm_vshlq_s16): Likewise. |
| (__arm_vshlq_s32): Likewise. |
| (__arm_vshlq_u8): Likewise. |
| (__arm_vshlq_u16): Likewise. |
| (__arm_vshlq_u32): Likewise. |
| (vaddlvq_p): Define polymorphic variant. |
| (vcmpneq): Likewise. |
| (vshlq): Likewise. |
| * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS): |
| Use it. |
| (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise. |
| (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise. |
| * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern. |
| (mve_vcmpneq_<supf><mode>): Likewise. |
| (mve_vshlq_<supf><mode>): Likewise. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define |
| qualifier for binary operands. |
| (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro. |
| (vcvtq_n_s32_f32): Likewise. |
| (vcvtq_n_u16_f16): Likewise. |
| (vcvtq_n_u32_f32): Likewise. |
| (vcreateq_u8): Likewise. |
| (vcreateq_u16): Likewise. |
| (vcreateq_u32): Likewise. |
| (vcreateq_u64): Likewise. |
| (vcreateq_s8): Likewise. |
| (vcreateq_s16): Likewise. |
| (vcreateq_s32): Likewise. |
| (vcreateq_s64): Likewise. |
| (vshrq_n_s8): Likewise. |
| (vshrq_n_s16): Likewise. |
| (vshrq_n_s32): Likewise. |
| (vshrq_n_u8): Likewise. |
| (vshrq_n_u16): Likewise. |
| (vshrq_n_u32): Likewise. |
| (__arm_vcreateq_u8): Define intrinsic. |
| (__arm_vcreateq_u16): Likewise. |
| (__arm_vcreateq_u32): Likewise. |
| (__arm_vcreateq_u64): Likewise. |
| (__arm_vcreateq_s8): Likewise. |
| (__arm_vcreateq_s16): Likewise. |
| (__arm_vcreateq_s32): Likewise. |
| (__arm_vcreateq_s64): Likewise. |
| (__arm_vshrq_n_s8): Likewise. |
| (__arm_vshrq_n_s16): Likewise. |
| (__arm_vshrq_n_s32): Likewise. |
| (__arm_vshrq_n_u8): Likewise. |
| (__arm_vshrq_n_u16): Likewise. |
| (__arm_vshrq_n_u32): Likewise. |
| (__arm_vcvtq_n_s16_f16): Likewise. |
| (__arm_vcvtq_n_s32_f32): Likewise. |
| (__arm_vcvtq_n_u16_f16): Likewise. |
| (__arm_vcvtq_n_u32_f32): Likewise. |
| (vshrq_n): Define polymorphic variant. |
| * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS): |
| Use it. |
| (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise. |
| * config/arm/constraints.md (Rb): Define constraint to check constant is |
| in the range of 1 to 8. |
| (Rf): Define constraint to check constant is in the range of 1 to 32. |
| * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern. |
| (mve_vshrq_n_<supf><mode>): Likewise. |
| (mve_vcvtq_n_from_f_<supf><mode>): Likewise. |
| * config/arm/predicates.md (mve_imm_8): Define predicate to check |
| the matching constraint Rb. |
| (mve_imm_32): Define predicate to check the matching constraint Rf. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define |
| qualifier for binary operands. |
| (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise. |
| (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise. |
| (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vsubq_n_f16): Define macro. |
| (vsubq_n_f32): Likewise. |
| (vbrsrq_n_f16): Likewise. |
| (vbrsrq_n_f32): Likewise. |
| (vcvtq_n_f16_s16): Likewise. |
| (vcvtq_n_f32_s32): Likewise. |
| (vcvtq_n_f16_u16): Likewise. |
| (vcvtq_n_f32_u32): Likewise. |
| (vcreateq_f16): Likewise. |
| (vcreateq_f32): Likewise. |
| (__arm_vsubq_n_f16): Define intrinsic. |
| (__arm_vsubq_n_f32): Likewise. |
| (__arm_vbrsrq_n_f16): Likewise. |
| (__arm_vbrsrq_n_f32): Likewise. |
| (__arm_vcvtq_n_f16_s16): Likewise. |
| (__arm_vcvtq_n_f32_s32): Likewise. |
| (__arm_vcvtq_n_f16_u16): Likewise. |
| (__arm_vcvtq_n_f32_u32): Likewise. |
| (__arm_vcreateq_f16): Likewise. |
| (__arm_vcreateq_f32): Likewise. |
| (vsubq): Define polymorphic variant. |
| (vbrsrq): Likewise. |
| (vcvtq_n): Likewise. |
| * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use |
| it. |
| (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise. |
| (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise. |
| (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise. |
| * config/arm/constraints.md (Rd): Define constraint to check constant is |
| in the range of 1 to 16. |
| * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern. |
| mve_vbrsrq_n_f<mode>: Likewise. |
| mve_vcvtq_n_to_f_<supf><mode>: Likewise. |
| mve_vcreateq_f<mode>: Likewise. |
| * config/arm/predicates.md (mve_imm_16): Define predicate to check |
| the matching constraint Rd. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (hi_UP): Define mode. |
| * config/arm/arm.h (IS_VPR_REGNUM): Move. |
| * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM. |
| (APSRQ_REGNUM): Modify. |
| (APSRGE_REGNUM): Modify. |
| * config/arm/arm_mve.h (vctp16q): Define macro. |
| (vctp32q): Likewise. |
| (vctp64q): Likewise. |
| (vctp8q): Likewise. |
| (vpnot): Likewise. |
| (__arm_vctp16q): Define intrinsic. |
| (__arm_vctp32q): Likewise. |
| (__arm_vctp64q): Likewise. |
| (__arm_vctp8q): Likewise. |
| (__arm_vpnot): Likewise. |
| * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin |
| qualifier. |
| * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern. |
| (mve_vpnothi): Likewise. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS. |
| * config/arm/arm_mve.h (vdupq_n_s8): Define macro. |
| (vdupq_n_s16): Likewise. |
| (vdupq_n_s32): Likewise. |
| (vabsq_s8): Likewise. |
| (vabsq_s16): Likewise. |
| (vabsq_s32): Likewise. |
| (vclsq_s8): Likewise. |
| (vclsq_s16): Likewise. |
| (vclsq_s32): Likewise. |
| (vclzq_s8): Likewise. |
| (vclzq_s16): Likewise. |
| (vclzq_s32): Likewise. |
| (vnegq_s8): Likewise. |
| (vnegq_s16): Likewise. |
| (vnegq_s32): Likewise. |
| (vaddlvq_s32): Likewise. |
| (vaddvq_s8): Likewise. |
| (vaddvq_s16): Likewise. |
| (vaddvq_s32): Likewise. |
| (vmovlbq_s8): Likewise. |
| (vmovlbq_s16): Likewise. |
| (vmovltq_s8): Likewise. |
| (vmovltq_s16): Likewise. |
| (vmvnq_s8): Likewise. |
| (vmvnq_s16): Likewise. |
| (vmvnq_s32): Likewise. |
| (vrev16q_s8): Likewise. |
| (vrev32q_s8): Likewise. |
| (vrev32q_s16): Likewise. |
| (vqabsq_s8): Likewise. |
| (vqabsq_s16): Likewise. |
| (vqabsq_s32): Likewise. |
| (vqnegq_s8): Likewise. |
| (vqnegq_s16): Likewise. |
| (vqnegq_s32): Likewise. |
| (vcvtaq_s16_f16): Likewise. |
| (vcvtaq_s32_f32): Likewise. |
| (vcvtnq_s16_f16): Likewise. |
| (vcvtnq_s32_f32): Likewise. |
| (vcvtpq_s16_f16): Likewise. |
| (vcvtpq_s32_f32): Likewise. |
| (vcvtmq_s16_f16): Likewise. |
| (vcvtmq_s32_f32): Likewise. |
| (vmvnq_u8): Likewise. |
| (vmvnq_u16): Likewise. |
| (vmvnq_u32): Likewise. |
| (vdupq_n_u8): Likewise. |
| (vdupq_n_u16): Likewise. |
| (vdupq_n_u32): Likewise. |
| (vclzq_u8): Likewise. |
| (vclzq_u16): Likewise. |
| (vclzq_u32): Likewise. |
| (vaddvq_u8): Likewise. |
| (vaddvq_u16): Likewise. |
| (vaddvq_u32): Likewise. |
| (vrev32q_u8): Likewise. |
| (vrev32q_u16): Likewise. |
| (vmovltq_u8): Likewise. |
| (vmovltq_u16): Likewise. |
| (vmovlbq_u8): Likewise. |
| (vmovlbq_u16): Likewise. |
| (vrev16q_u8): Likewise. |
| (vaddlvq_u32): Likewise. |
| (vcvtpq_u16_f16): Likewise. |
| (vcvtpq_u32_f32): Likewise. |
| (vcvtnq_u16_f16): Likewise. |
| (vcvtmq_u16_f16): Likewise. |
| (vcvtmq_u32_f32): Likewise. |
| (vcvtaq_u16_f16): Likewise. |
| (vcvtaq_u32_f32): Likewise. |
| (__arm_vdupq_n_s8): Define intrinsic. |
| (__arm_vdupq_n_s16): Likewise. |
| (__arm_vdupq_n_s32): Likewise. |
| (__arm_vabsq_s8): Likewise. |
| (__arm_vabsq_s16): Likewise. |
| (__arm_vabsq_s32): Likewise. |
| (__arm_vclsq_s8): Likewise. |
| (__arm_vclsq_s16): Likewise. |
| (__arm_vclsq_s32): Likewise. |
| (__arm_vclzq_s8): Likewise. |
| (__arm_vclzq_s16): Likewise. |
| (__arm_vclzq_s32): Likewise. |
| (__arm_vnegq_s8): Likewise. |
| (__arm_vnegq_s16): Likewise. |
| (__arm_vnegq_s32): Likewise. |
| (__arm_vaddlvq_s32): Likewise. |
| (__arm_vaddvq_s8): Likewise. |
| (__arm_vaddvq_s16): Likewise. |
| (__arm_vaddvq_s32): Likewise. |
| (__arm_vmovlbq_s8): Likewise. |
| (__arm_vmovlbq_s16): Likewise. |
| (__arm_vmovltq_s8): Likewise. |
| (__arm_vmovltq_s16): Likewise. |
| (__arm_vmvnq_s8): Likewise. |
| (__arm_vmvnq_s16): Likewise. |
| (__arm_vmvnq_s32): Likewise. |
| (__arm_vrev16q_s8): Likewise. |
| (__arm_vrev32q_s8): Likewise. |
| (__arm_vrev32q_s16): Likewise. |
| (__arm_vqabsq_s8): Likewise. |
| (__arm_vqabsq_s16): Likewise. |
| (__arm_vqabsq_s32): Likewise. |
| (__arm_vqnegq_s8): Likewise. |
| (__arm_vqnegq_s16): Likewise. |
| (__arm_vqnegq_s32): Likewise. |
| (__arm_vmvnq_u8): Likewise. |
| (__arm_vmvnq_u16): Likewise. |
| (__arm_vmvnq_u32): Likewise. |
| (__arm_vdupq_n_u8): Likewise. |
| (__arm_vdupq_n_u16): Likewise. |
| (__arm_vdupq_n_u32): Likewise. |
| (__arm_vclzq_u8): Likewise. |
| (__arm_vclzq_u16): Likewise. |
| (__arm_vclzq_u32): Likewise. |
| (__arm_vaddvq_u8): Likewise. |
| (__arm_vaddvq_u16): Likewise. |
| (__arm_vaddvq_u32): Likewise. |
| (__arm_vrev32q_u8): Likewise. |
| (__arm_vrev32q_u16): Likewise. |
| (__arm_vmovltq_u8): Likewise. |
| (__arm_vmovltq_u16): Likewise. |
| (__arm_vmovlbq_u8): Likewise. |
| (__arm_vmovlbq_u16): Likewise. |
| (__arm_vrev16q_u8): Likewise. |
| (__arm_vaddlvq_u32): Likewise. |
| (__arm_vcvtpq_u16_f16): Likewise. |
| (__arm_vcvtpq_u32_f32): Likewise. |
| (__arm_vcvtnq_u16_f16): Likewise. |
| (__arm_vcvtmq_u16_f16): Likewise. |
| (__arm_vcvtmq_u32_f32): Likewise. |
| (__arm_vcvtaq_u16_f16): Likewise. |
| (__arm_vcvtaq_u32_f32): Likewise. |
| (__arm_vcvtaq_s16_f16): Likewise. |
| (__arm_vcvtaq_s32_f32): Likewise. |
| (__arm_vcvtnq_s16_f16): Likewise. |
| (__arm_vcvtnq_s32_f32): Likewise. |
| (__arm_vcvtpq_s16_f16): Likewise. |
| (__arm_vcvtpq_s32_f32): Likewise. |
| (__arm_vcvtmq_s16_f16): Likewise. |
| (__arm_vcvtmq_s32_f32): Likewise. |
| (vdupq_n): Define polymorphic variant. |
| (vabsq): Likewise. |
| (vclsq): Likewise. |
| (vclzq): Likewise. |
| (vnegq): Likewise. |
| (vaddlvq): Likewise. |
| (vaddvq): Likewise. |
| (vmovlbq): Likewise. |
| (vmovltq): Likewise. |
| (vmvnq): Likewise. |
| (vrev16q): Likewise. |
| (vrev32q): Likewise. |
| (vqabsq): Likewise. |
| (vqnegq): Likewise. |
| * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it. |
| (UNOP_SNONE_NONE): Likewise. |
| (UNOP_UNONE_UNONE): Likewise. |
| (UNOP_UNONE_NONE): Likewise. |
| * config/arm/constraints.md (e): Define new constriant to allow only |
| even registers. |
| * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern. |
| (mve_vnegq_s<mode>): Likewise. |
| (mve_vmvnq_<supf><mode>): Likewise. |
| (mve_vdupq_n_<supf><mode>): Likewise. |
| (mve_vclzq_<supf><mode>): Likewise. |
| (mve_vclsq_s<mode>): Likewise. |
| (mve_vaddvq_<supf><mode>): Likewise. |
| (mve_vabsq_s<mode>): Likewise. |
| (mve_vrev32q_<supf><mode>): Likewise. |
| (mve_vmovltq_<supf><mode>): Likewise. |
| (mve_vmovlbq_<supf><mode>): Likewise. |
| (mve_vcvtpq_<supf><mode>): Likewise. |
| (mve_vcvtnq_<supf><mode>): Likewise. |
| (mve_vcvtmq_<supf><mode>): Likewise. |
| (mve_vcvtaq_<supf><mode>): Likewise. |
| (mve_vrev16q_<supf>v16qi): Likewise. |
| (mve_vaddlvq_<supf>v4si): Likewise. |
| |
| 2020-03-17 Jakub Jelinek <jakub@redhat.com> |
| |
| * lra-spills.c (remove_pseudos): Fix up duplicated word issue in |
| a dump message. |
| * tree-sra.c (create_access_replacement): Fix up duplicated word issue |
| in a comment. |
| * read-rtl-function.c (find_param_by_name, |
| function_reader::parse_enum_value, function_reader::get_insn_by_uid): |
| Likewise. |
| * spellcheck.c (get_edit_distance_cutoff): Likewise. |
| * tree-data-ref.c (create_ifn_alias_checks): Likewise. |
| * tree.def (SWITCH_EXPR): Likewise. |
| * selftest.c (assert_str_contains): Likewise. |
| * ipa-param-manipulation.h (class ipa_param_body_adjustments): |
| Likewise. |
| * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise. |
| * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise. |
| * langhooks.h (struct lang_hooks_for_decls): Likewise. |
| * ipa-prop.h (struct ipa_param_descriptor): Likewise. |
| * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store): |
| Likewise. |
| * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise. |
| * tree-ssa-reassoc.c (reassociate_bb): Likewise. |
| * tree.c (component_ref_size): Likewise. |
| * hsa-common.c (hsa_init_compilation_unit_data): Likewise. |
| * gimple-ssa-sprintf.c (get_string_length, format_string, |
| format_directive): Likewise. |
| * omp-grid.c (grid_process_kernel_body_copy): Likewise. |
| * input.c (string_concat_db::get_string_concatenation, |
| test_lexer_string_locations_ucn4): Likewise. |
| * cfgexpand.c (pass_expand::execute): Likewise. |
| * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds, |
| maybe_diag_overlap): Likewise. |
| * rtl.c (RTX_CODE_HWINT_P_1): Likewise. |
| * shrink-wrap.c (spread_components): Likewise. |
| * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse): |
| Likewise. |
| * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds): |
| Likewise. |
| * dwarf2out.c (dwarf2out_early_finish): Likewise. |
| * gimple-ssa-store-merging.c: Likewise. |
| * ira-costs.c (record_operand_costs): Likewise. |
| * tree-vect-loop.c (vectorizable_reduction): Likewise. |
| * target.def (dispatch): Likewise. |
| (validate_dims, gen_ccmp_first): Fix up duplicated word issue |
| in documentation text. |
| * doc/tm.texi: Regenerated. |
| * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up |
| duplicated word issue in a comment. |
| * config/i386/i386.c (ix86_test_loading_unspec): Likewise. |
| * config/i386/i386-features.c (remove_partial_avx_dependency): |
| Likewise. |
| * config/msp430/msp430.c (msp430_select_section): Likewise. |
| * config/gcn/gcn-run.c (load_image): Likewise. |
| * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise. |
| * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise. |
| * config/aarch64/falkor-tag-collision-avoidance.c |
| (single_dest_per_chain): Likewise. |
| * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise. |
| * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise. |
| * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise. |
| * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant): |
| Likewise. |
| * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise. |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise. |
| * config/rs6000/rs6000-logue.c |
| (rs6000_emit_probe_stack_range_stack_clash): Likewise. |
| * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise. |
| Fix various other issues in the comment. |
| |
| 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/t-rmprofile: create new multilib for |
| armv8.1-m.main+mve hard float and reuse v8-m.main ones for |
| v8.1-m.main+mve. |
| |
| 2020-03-17 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94015 |
| * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the |
| function where EXP is address of the bytes being stored rather than |
| the bytes themselves into count_nonzero_bytes_addr. Punt on zero |
| sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs. |
| Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before |
| calling native_encode_expr if host or target doesn't have 8-bit |
| chars. Formatting fixes. |
| (count_nonzero_bytes_addr): New function. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define. |
| (UNOP_SNONE_NONE_QUALIFIERS): Likewise. |
| (UNOP_SNONE_IMM_QUALIFIERS): Likewise. |
| (UNOP_UNONE_NONE_QUALIFIERS): Likewise. |
| (UNOP_UNONE_UNONE_QUALIFIERS): Likewise. |
| (UNOP_UNONE_IMM_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vmvnq_n_s16): Define macro. |
| (vmvnq_n_s32): Likewise. |
| (vrev64q_s8): Likewise. |
| (vrev64q_s16): Likewise. |
| (vrev64q_s32): Likewise. |
| (vcvtq_s16_f16): Likewise. |
| (vcvtq_s32_f32): Likewise. |
| (vrev64q_u8): Likewise. |
| (vrev64q_u16): Likewise. |
| (vrev64q_u32): Likewise. |
| (vmvnq_n_u16): Likewise. |
| (vmvnq_n_u32): Likewise. |
| (vcvtq_u16_f16): Likewise. |
| (vcvtq_u32_f32): Likewise. |
| (__arm_vmvnq_n_s16): Define intrinsic. |
| (__arm_vmvnq_n_s32): Likewise. |
| (__arm_vrev64q_s8): Likewise. |
| (__arm_vrev64q_s16): Likewise. |
| (__arm_vrev64q_s32): Likewise. |
| (__arm_vrev64q_u8): Likewise. |
| (__arm_vrev64q_u16): Likewise. |
| (__arm_vrev64q_u32): Likewise. |
| (__arm_vmvnq_n_u16): Likewise. |
| (__arm_vmvnq_n_u32): Likewise. |
| (__arm_vcvtq_s16_f16): Likewise. |
| (__arm_vcvtq_s32_f32): Likewise. |
| (__arm_vcvtq_u16_f16): Likewise. |
| (__arm_vcvtq_u32_f32): Likewise. |
| (vrev64q): Define polymorphic variant. |
| * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it. |
| (UNOP_SNONE_NONE): Likewise. |
| (UNOP_SNONE_IMM): Likewise. |
| (UNOP_UNONE_UNONE): Likewise. |
| (UNOP_UNONE_NONE): Likewise. |
| (UNOP_UNONE_IMM): Likewise. |
| * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern. |
| (mve_vcvtq_from_f_<supf><mode>): Likewise. |
| (mve_vmvnq_n_<supf><mode>): Likewise. |
| |
| 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro. |
| (UNOP_NONE_SNONE_QUALIFIERS): Likewise. |
| (UNOP_NONE_UNONE_QUALIFIERS): Likewise. |
| * config/arm/arm_mve.h (vrndxq_f16): Define macro. |
| (vrndxq_f32): Likewise. |
| (vrndq_f16) Likewise. |
| (vrndq_f32): Likewise. |
| (vrndpq_f16): Likewise. |
| (vrndpq_f32): Likewise. |
| (vrndnq_f16): Likewise. |
| (vrndnq_f32): Likewise. |
| (vrndmq_f16): Likewise. |
| (vrndmq_f32): Likewise. |
| (vrndaq_f16): Likewise. |
| (vrndaq_f32): Likewise. |
| (vrev64q_f16): Likewise. |
| (vrev64q_f32): Likewise. |
| (vnegq_f16): Likewise. |
| (vnegq_f32): Likewise. |
| (vdupq_n_f16): Likewise. |
| (vdupq_n_f32): Likewise. |
| (vabsq_f16): Likewise. |
| (vabsq_f32): Likewise. |
| (vrev32q_f16): Likewise. |
| (vcvttq_f32_f16): Likewise. |
| (vcvtbq_f32_f16): Likewise. |
| (vcvtq_f16_s16): Likewise. |
| (vcvtq_f32_s32): Likewise. |
| (vcvtq_f16_u16): Likewise. |
| (vcvtq_f32_u32): Likewise. |
| (__arm_vrndxq_f16): Define intrinsic. |
| (__arm_vrndxq_f32): Likewise. |
| (__arm_vrndq_f16): Likewise. |
| (__arm_vrndq_f32): Likewise. |
| (__arm_vrndpq_f16): Likewise. |
| (__arm_vrndpq_f32): Likewise. |
| (__arm_vrndnq_f16): Likewise. |
| (__arm_vrndnq_f32): Likewise. |
| (__arm_vrndmq_f16): Likewise. |
| (__arm_vrndmq_f32): Likewise. |
| (__arm_vrndaq_f16): Likewise. |
| (__arm_vrndaq_f32): Likewise. |
| (__arm_vrev64q_f16): Likewise. |
| (__arm_vrev64q_f32): Likewise. |
| (__arm_vnegq_f16): Likewise. |
| (__arm_vnegq_f32): Likewise. |
| (__arm_vdupq_n_f16): Likewise. |
| (__arm_vdupq_n_f32): Likewise. |
| (__arm_vabsq_f16): Likewise. |
| (__arm_vabsq_f32): Likewise. |
| (__arm_vrev32q_f16): Likewise. |
| (__arm_vcvttq_f32_f16): Likewise. |
| (__arm_vcvtbq_f32_f16): Likewise. |
| (__arm_vcvtq_f16_s16): Likewise. |
| (__arm_vcvtq_f32_s32): Likewise. |
| (__arm_vcvtq_f16_u16): Likewise. |
| (__arm_vcvtq_f32_u32): Likewise. |
| (vrndxq): Define polymorphic variants. |
| (vrndq): Likewise. |
| (vrndpq): Likewise. |
| (vrndnq): Likewise. |
| (vrndmq): Likewise. |
| (vrndaq): Likewise. |
| (vrev64q): Likewise. |
| (vnegq): Likewise. |
| (vabsq): Likewise. |
| (vrev32q): Likewise. |
| (vcvtbq_f32): Likewise. |
| (vcvttq_f32): Likewise. |
| (vcvtq): Likewise. |
| * config/arm/arm_mve_builtins.def (VAR2): Define. |
| (VAR1): Define. |
| * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern. |
| (mve_vrndq_f<mode>): Likewise. |
| (mve_vrndpq_f<mode>): Likewise. |
| (mve_vrndnq_f<mode>): Likewise. |
| (mve_vrndmq_f<mode>): Likewise. |
| (mve_vrndaq_f<mode>): Likewise. |
| (mve_vrev64q_f<mode>): Likewise. |
| (mve_vnegq_f<mode>): Likewise. |
| (mve_vdupq_n_f<mode>): Likewise. |
| (mve_vabsq_f<mode>): Likewise. |
| (mve_vrev32q_fv8hf): Likewise. |
| (mve_vcvttq_f32_f16v4sf): Likewise. |
| (mve_vcvtbq_f32_f16v4sf): Likewise. |
| (mve_vcvtq_to_f_<supf><mode>): Likewise. |
| |
| 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm-builtins.c (CF): Define mve_builtin_data. |
| (VAR1): Define. |
| (ARM_BUILTIN_MVE_PATTERN_START): Define. |
| (arm_init_mve_builtins): Define function. |
| (arm_init_builtins): Add TARGET_HAVE_MVE check. |
| (arm_expand_builtin_1): Check the range of fcode. |
| (arm_expand_mve_builtin): Define function to expand MVE builtins. |
| (arm_expand_builtin): Check the range of fcode. |
| * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point |
| types. |
| (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace. |
| (vst4q_s8): Define macro. |
| (vst4q_s16): Likewise. |
| (vst4q_s32): Likewise. |
| (vst4q_u8): Likewise. |
| (vst4q_u16): Likewise. |
| (vst4q_u32): Likewise. |
| (vst4q_f16): Likewise. |
| (vst4q_f32): Likewise. |
| (__arm_vst4q_s8): Define inline builtin. |
| (__arm_vst4q_s16): Likewise. |
| (__arm_vst4q_s32): Likewise. |
| (__arm_vst4q_u8): Likewise. |
| (__arm_vst4q_u16): Likewise. |
| (__arm_vst4q_u32): Likewise. |
| (__arm_vst4q_f16): Likewise. |
| (__arm_vst4q_f32): Likewise. |
| (__ARM_mve_typeid): Define macro with MVE types. |
| (__ARM_mve_coerce): Define macro with _Generic feature. |
| (vst4q): Define polymorphic variant for different vst4q builtins. |
| * config/arm/arm_mve_builtins.def: New file. |
| * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI |
| modes in MVE. |
| * config/arm/mve.md (MVE_VLD_ST): Define iterator. |
| (unspec): Define unspec. |
| (mve_vst4q<mode>): Define RTL pattern. |
| * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI |
| modes in MVE. |
| (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes |
| in MVE. |
| (define_split): Allow OI mode split for MVE after reload. |
| (define_split): Allow XI mode split for MVE after reload. |
| * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def. |
| (arm-builtins.o): Likewise. |
| |
| 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * c-typeck.c (process_init_element): Handle constructor_type with |
| type size represented by POLY_INT_CST. |
| |
| 2020-03-17 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94187 |
| * tree-ssa-strlen.c (count_nonzero_bytes): Punt if |
| nchars - offset < nbytes. |
| |
| PR middle-end/94189 |
| * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would |
| emit a warning if it was enabled and don't depend on TREE_NO_WARNING |
| for code-generation. |
| |
| 2020-03-16 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR target/94185 |
| * lra-spills.c (remove_pseudos): Do not reuse insn alternative |
| after changing memory subreg. |
| |
| 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add |
| emulator calls for dobule precision arithmetic operations for MVE. |
| |
| 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base |
| feature bit is on and -mfpu=auto is passed as compiler option, do not |
| generate error on not finding any matching fpu. Because in this case |
| fpu is not required. |
| * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is |
| enabled for MVE and also for all VFP extensions. |
| (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2 |
| is enabled. |
| (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em. |
| (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5 |
| along with feature bits mve_float. |
| (mve): Modify add options in armv8.1-m.main arch for MVE. |
| (mve.fp): Modify add options in armv8.1-m.main arch for MVE with |
| floating point. |
| * config/arm/arm.c (use_return_insn): Replace the |
| check with TARGET_VFP_BASE. |
| (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with |
| TARGET_VFP_BASE. |
| (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE" |
| with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as |
| well. |
| (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with |
| TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE |
| as well. |
| (arm_compute_frame_layout): Likewise. |
| (arm_save_coproc_regs): Likewise. |
| (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM |
| in MVE as well. |
| (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE" |
| with equivalent macro TARGET_VFP_BASE. |
| (arm_expand_epilogue_apcs_frame): Likewise. |
| (arm_expand_epilogue): Likewise. |
| (arm_conditional_register_usage): Likewise. |
| (arm_declare_function_name): Add check to skip printing .fpu directive |
| in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is |
| "softvfp". |
| * config/arm/arm.h (TARGET_VFP_BASE): Define. |
| * config/arm/arm.md (arch): Add "mve" to arch. |
| (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true. |
| (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT |
| || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE. |
| * config/arm/constraints.md (Uf): Define to allow modification to FPCCR |
| in MVE. |
| * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard |
| to not allow for MVE. |
| * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs |
| enum. |
| (VUNSPEC_GET_FPSCR): Define. |
| * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS |
| instructions which move to general-purpose Register from Floating-point |
| Special register and vice-versa. |
| (thumb2_movhi_fp16): Likewise. |
| (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along |
| with MCR and MRC instructions which set and get Floating-point Status |
| and Control Register (FPSCR). |
| (movdi_vfp): Modify pattern to enable Single-precision scalar float move |
| in MVE. |
| (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar |
| float move patterns in MVE. |
| (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional |
| code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check. |
| (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional |
| code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check. |
| (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding |
| TARGET_VFP_BASE check. |
| (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern |
| using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR |
| register. |
| (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern |
| using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR |
| register. |
| |
| |
| 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| Mihail Ionescu <mihail.ionescu@arm.com> |
| Srinath Parvathaneni <srinath.parvathaneni@arm.com> |
| |
| * config.gcc (arm_mve.h): Include mve intrinsics header file. |
| * config/arm/aout.h (p0): Add new register name for MVE predicated |
| cases. |
| * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro |
| common to Neon and MVE. |
| (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK. |
| (arm_init_simd_builtin_types): Disable poly types for MVE. |
| (arm_init_neon_builtins): Move a check to arm_init_builtins function. |
| (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of |
| ARM_BUILTIN_NEON_LANE_CHECK. |
| (mve_dereference_pointer): Add function. |
| (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is |
| enabled. |
| (arm_expand_neon_builtin): Moved to arm_expand_builtin function. |
| (arm_expand_builtin): Moved from arm_expand_neon_builtin function. |
| * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE |
| with floating point enabled. |
| * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to |
| simd_immediate_valid_for_move. |
| (simd_immediate_valid_for_move): Renamed from |
| neon_immediate_valid_for_move function. |
| * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate |
| error if vfpv2 feature bit is disabled and mve feature bit is also |
| disabled for HARD_FLOAT_ABI. |
| (use_return_insn): Check to not push VFP regs for MVE. |
| (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard |
| as Neon. |
| (aapcs_vfp_allocate_return_reg): Likewise. |
| (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2 |
| address operand for MVE. |
| (arm_rtx_costs_internal): MVE check to determine cost of rtx. |
| (neon_valid_immediate): Rename to simd_valid_immediate. |
| (simd_valid_immediate): Rename from neon_valid_immediate. |
| (simd_valid_immediate): MVE check on size of vector is 128 bits. |
| (neon_immediate_valid_for_move): Rename to |
| simd_immediate_valid_for_move. |
| (simd_immediate_valid_for_move): Rename from |
| neon_immediate_valid_for_move. |
| (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate |
| function. |
| (neon_make_constant): Modify call to neon_valid_immediate function. |
| (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC |
| for MVE. |
| (output_move_neon): Add MVE check to generate vldm/vstm instrcutions. |
| (arm_compute_frame_layout): Calculate space for saved VFP registers for |
| MVE. |
| (arm_save_coproc_regs): Save coproc registers for MVE. |
| (arm_print_operand): Add case 'E' to print memory operands for MVE. |
| (arm_print_operand_address): Check to print register number for MVE. |
| (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE. |
| (arm_modes_tieable_p): Check to allow structure mode for MVE. |
| (arm_regno_class): Add VPR_REGNUM check. |
| (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code |
| for APCS frame. |
| (arm_expand_epilogue): MVE check for enabling pop instructions in |
| epilogue. |
| (arm_print_asm_arch_directives): Modify function to disable print of |
| .arch_extension "mve" and "fp" for cases where MVE is enabled with |
| "SOFT FLOAT ABI". |
| (arm_vector_mode_supported_p): Check for modes available in MVE interger |
| and MVE floating point. |
| (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode |
| pointer support. |
| (arm_conditional_register_usage): Enable usage of conditional regsiter |
| for MVE. |
| (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE. |
| (arm_declare_function_name): Modify function to disable print of |
| .arch_extension "mve" and "fp" for cases where MVE is enabled with |
| "SOFT FLOAT ABI". |
| * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and |
| when target general registers are required. |
| (TARGET_HAVE_MVE_FLOAT): Likewise. |
| (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c |
| for MVE. |
| (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS |
| which indicate this is not available for across function calls. |
| (FIRST_PSEUDO_REGISTER): Modify. |
| (VALID_MVE_MODE): Define valid MVE mode. |
| (VALID_MVE_SI_MODE): Define valid MVE SI mode. |
| (VALID_MVE_SF_MODE): Define valid MVE SF mode. |
| (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode. |
| (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence |
| for MVE. |
| (IS_VPR_REGNUM): Macro to check for VPR_REG register. |
| (REG_ALLOC_ORDER): Add VPR_REGNUM entry. |
| (enum reg_class): Add VPR_REG entry. |
| (REG_CLASS_NAMES): Add VPR_REG entry. |
| * config/arm/arm.md (VPR_REGNUM): Define. |
| (conds): Check is_mve_type attrbiute to differentiate "conditional" and |
| "unconditional" instructions. |
| (arm_movsf_soft_insn): Modify RTL to not allow for MVE. |
| (movdf_soft_insn): Modify RTL to not allow for MVE. |
| (vfp_pop_multiple_with_writeback): Enable for MVE. |
| (include "mve.md"): Include mve.md file. |
| * config/arm/arm_mve.h: Add MVE intrinsics head file. |
| * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE |
| for vector predicated operands. |
| * config/arm/iterators.md (VNIM1): Define. |
| (VNINOTM1): Define. |
| (VHFBF_split): Define |
| * config/arm/mve.md: New file. |
| (mve_mov<mode>): Define RTL for move, store and load in MVE. |
| (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for |
| second operand. |
| * config/arm/neon.md (neon_immediate_valid_for_move): Rename with |
| simd_immediate_valid_for_move. |
| (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which |
| is common to MVE and NEON to vec-common.md file. |
| (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check. |
| * config/arm/predicates.md (vpr_register_operand): Define. |
| * config/arm/t-arm: Add mve.md file. |
| * config/arm/types.md (mve_move): Add MVE instructions mve_move to |
| attribute "type". |
| (mve_store): Add MVE instructions mve_store to attribute "type". |
| (mve_load): Add MVE instructions mve_load to attribute "type". |
| (is_mve_type): Define attribute. |
| * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support |
| standard move patterns in MVE along with NEON and IWMMXT with mode |
| iterator VNIM1. |
| (mov<mode>): Modify RTL expand to support standard move patterns in NEON |
| and IWMMXT with mode iterator V8HF. |
| (movv8hf): Define RTL expand to support standard "movv8hf" pattern in |
| NEON and MVE. |
| * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to |
| simd_immediate_valid_for_move. |
| |
| |
| 2020-03-16 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/89229 |
| * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov |
| for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL |
| check. |
| * config/i386/predicates.md (ext_sse_reg_operand): Removed. |
| |
| 2020-03-16 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/94167 |
| * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands |
| DEBUG_STMTs. |
| |
| PR tree-optimization/94166 |
| * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION |
| as secondary comparison key. |
| |
| 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com> |
| |
| PR tree-optimization/94125 |
| * tree-loop-distribution.c |
| (loop_distribution::break_alias_scc_partitions): Update post order |
| number for merged scc. |
| |
| 2020-03-15 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/89229 |
| * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and |
| MODE_SF. |
| * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov |
| for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL |
| and ext_sse_reg_operand check. |
| |
| 2020-03-15 Lewis Hyatt <lhyatt@gmail.com> |
| |
| * common.opt: Avoid redundancy in the help text. |
| * config/arc/arc.opt: Likewise. |
| * config/cr16/cr16.opt: Likewise. |
| |
| 2020-03-14 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/93566 |
| * tree-nested.c (convert_nonlocal_omp_clauses, |
| convert_local_omp_clauses): Handle {,in_,task_}reduction clauses |
| with C/C++ array sections. |
| |
| 2020-03-14 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/89229 |
| * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov |
| for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL |
| check. |
| |
| 2020-03-14 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimple-fold.c (gimple_fold_builtin_strncpy): Change |
| "a an" to "an" in a comment. |
| * hsa-common.h (is_a_helper): Likewise. |
| * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise. |
| * config/arc/arc.c (arc600_corereg_hazard): Likewise. |
| * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise. |
| |
| 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com> |
| |
| PR target/92379 |
| * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a |
| 64-bit value by 64 bits (UB). |
| |
| 2020-03-13 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR rtl-optimization/92303 |
| * lra-spills.c (remove_pseudos): Try to simplify memory subreg. |
| |
| 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| PR rtl-optimization/94148 |
| PR rtl-optimization/94042 |
| * df-core.c (BB_LAST_CHANGE_AGE): Delete. |
| (df_worklist_propagate_forward): New parameter last_change_age, use |
| that instead of bb->aux. |
| (df_worklist_propagate_backward): Ditto. |
| (df_worklist_dataflow_doublequeue): Use a local array last_change_age. |
| |
| 2020-03-13 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94163 |
| * tree-ssa-pre.c (create_expression_by_pieces): Check |
| whether alignment would be zero. |
| |
| 2020-03-13 Martin Liska <mliska@suse.cz> |
| |
| PR lto/94157 |
| * lto-wrapper.c (run_gcc): Use concat for appending |
| to collect_gcc_options. |
| |
| 2020-03-13 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94121 |
| * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode |
| instead of GEN_INT. |
| |
| 2020-03-13 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/89229 |
| * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF. |
| * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov |
| for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256, |
| TARGET_AVX512VL and ext_sse_reg_operand check. |
| |
| 2020-03-13 Bu Le <bule1@huawei.com> |
| |
| PR target/94154 |
| * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=) |
| (-param=aarch64-double-recp-precision=): New options. |
| * doc/invoke.texi: Document them. |
| * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them |
| instead of hard-coding the choice of 1 for float and 2 for double. |
| |
| 2020-03-13 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR rtl-optimization/94119 |
| * resource.h (clear_hashed_info_until_next_barrier): Declare. |
| * resource.c (clear_hashed_info_until_next_barrier): New function. |
| * reorg.c (add_to_delay_list): Fix formatting. |
| (relax_delay_slots): Call clear_hashed_info_until_next_barrier on |
| the next instruction after removing a BARRIER. |
| |
| 2020-03-13 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR middle-end/92071 |
| * expmed.c (store_integral_bit_field): For fields larger than a word, |
| call extract_bit_field on the value if the mode is BLKmode. Remove |
| specific path for big-endian targets and tidy things up a little bit. |
| |
| 2020-03-12 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/90275 |
| * cse.c (cse_insn): Delete no-op register moves too. |
| |
| 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com> |
| |
| * config/rx/rx.md (CTRLREG_CPEN): Remove. |
| * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support. |
| |
| 2020-03-12 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/94103 |
| * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type |
| punning when the mode precision is not sufficient. |
| |
| 2020-03-12 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/89229 |
| * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI, |
| MODE_V1DF and MODE_V2SF. |
| * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call |
| ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand |
| check. |
| |
| 2020-03-12 Jakub Jelinek <jakub@redhat.com> |
| |
| * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change |
| ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL |
| and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL. |
| * doc/tm.texi: Regenerated. |
| |
| PR tree-optimization/94130 |
| * tree-ssa-dse.c: Include gimplify.h. |
| (increment_start_addr): If stmt has lhs, drop the lhs from call and |
| set it after the call to the original value of the first argument. |
| Formatting fixes. |
| (decrement_count): Formatting fix. |
| |
| 2020-03-11 Delia Burduv <delia.burduv@arm.com> |
| |
| * config/arm/arm-builtins.c |
| (arm_init_simd_builtin_scalar_types): New. |
| * config/arm/arm_neon.h (vld2_bf16): Used new builtin type. |
| (vld2q_bf16): Used new builtin type. |
| (vld3_bf16): Used new builtin type. |
| (vld3q_bf16): Used new builtin type. |
| (vld4_bf16): Used new builtin type. |
| (vld4q_bf16): Used new builtin type. |
| (vld2_dup_bf16): Used new builtin type. |
| (vld2q_dup_bf16): Used new builtin type. |
| (vld3_dup_bf16): Used new builtin type. |
| (vld3q_dup_bf16): Used new builtin type. |
| (vld4_dup_bf16): Used new builtin type. |
| (vld4q_dup_bf16): Used new builtin type. |
| |
| 2020-03-11 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94134 |
| * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section |
| at the start to switch to data section. Don't print extra newline if |
| .globl directive has not been emitted. |
| |
| 2020-03-11 Richard Biener <rguenther@suse.de> |
| |
| * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]): |
| New pattern. |
| |
| 2020-03-11 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR middle-end/93961 |
| * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields |
| whose type is a qualified union. |
| |
| 2020-03-11 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94121 |
| * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi |
| instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT. |
| |
| PR bootstrap/93962 |
| * value-prof.c (dump_histogram_value): Use abs_hwi instead of |
| std::abs. |
| (get_nth_most_common_value): Use abs_hwi instead of abs. |
| |
| PR middle-end/94111 |
| * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl |
| is rvc_normal, otherwise use real_to_decimal to print the number to |
| string. |
| |
| PR tree-optimization/94114 |
| * tree-loop-distribution.c (generate_memset_builtin): Call |
| rewrite_to_non_trapping_overflow even on mem. |
| (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even |
| on dest and src. |
| |
| 2020-03-10 Jeff Law <law@redhat.com> |
| |
| * config/bfin/bfin.md (movsi_insv): Add length attribute. |
| |
| 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com> |
| |
| PR target/93709 |
| * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check |
| NAN and SIGNED_ZEROR for smax/smin. |
| |
| 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com> |
| |
| PR target/90763 |
| * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add |
| clause to handle P9V_BUILTIN_VEC_LXVL with const arguments. |
| |
| 2020-03-10 Roman Zhuykov <zhroma@ispras.ru> |
| |
| * loop-iv.c (find_simple_exit): Make it static. |
| * cfgloop.h: Remove the corresponding prototype. |
| |
| 2020-03-10 Roman Zhuykov <zhroma@ispras.ru> |
| |
| * ddg.c (create_ddg): Fix intendation. |
| (set_recurrence_length): Likewise. |
| (create_ddg_all_sccs): Likewise. |
| |
| 2020-03-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94088 |
| * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with |
| CCZmode instead of CCNOmode if operands[2] has DImode and pos + len |
| is 32. |
| |
| 2020-03-09 Jason Merrill <jason@redhat.com> |
| |
| * gdbinit.in (pgs): Fix typo in documentation. |
| |
| 2020-03-09 Vladimir Makarov <vmakarov@redhat.com> |
| |
| Revert: |
| |
| 2020-02-28 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR rtl-optimization/93564 |
| * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we |
| do not honor reg alloc order. |
| |
| 2020-03-09 Andrew Pinski <apinski@marvell.com> |
| |
| PR inline-asm/94095 |
| * doc/extend.texi (x86 Operand Modifiers): Fix column |
| for 'A' modifier. |
| |
| 2020-03-09 Martin Liska <mliska@suse.cz> |
| |
| PR target/93800 |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Remove set of str_align_loops and str_align_jumps as these |
| should be set in previous 2 conditions in the function. |
| |
| 2020-03-09 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/94045 |
| * params.opt (-param=max-find-base-term-values=): New option. |
| * alias.c (find_base_term): Add cut-off for number of visited VALUEs |
| in a single toplevel find_base_term call. |
| |
| 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| PR target/91598 |
| * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define. |
| * config/aarch64/aarch64-simd.md |
| (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul. |
| (aarch64_vec_<su>mlal_lane<Qlane>): Likewise. |
| * config/aarch64/aarch64-simd-builtins.def: Add intrinsics. |
| * config/aarch64/arm_neon.h: |
| (vmlal_lane_s16): Expand using intrinsics rather than inline asm. |
| (vmlal_lane_u16): Likewise. |
| (vmlal_lane_s32): Likewise. |
| (vmlal_lane_u32): Likewise. |
| (vmlal_laneq_s16): Likewise. |
| (vmlal_laneq_u16): Likewise. |
| (vmlal_laneq_s32): Likewise. |
| (vmlal_laneq_u32): Likewise. |
| (vmull_lane_s16): Likewise. |
| (vmull_lane_u16): Likewise. |
| (vmull_lane_s32): Likewise. |
| (vmull_lane_u32): Likewise. |
| (vmull_laneq_s16): Likewise. |
| (vmull_laneq_u16): Likewise. |
| (vmull_laneq_s32): Likewise. |
| (vmull_laneq_u32): Likewise. |
| * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul. |
| (Qlane): Likewise. |
| |
| 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax. |
| (aarch64_mla_elt_<vswap_width_name><mode>): Likewise. |
| (aarch64_mls_elt<mode>): Likewise. |
| (aarch64_mls_elt_<vswap_width_name><mode>): Likewise. |
| (aarch64_fma4_elt<mode>): Likewise. |
| (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise. |
| (aarch64_fma4_elt_to_64v2df): Likewise. |
| (aarch64_fnma4_elt<mode>): Likewise. |
| (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise. |
| (aarch64_fnma4_elt_to_64v2df): Likewise. |
| |
| 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
| |
| * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>: |
| Specify movprfx attribute. |
| (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise. |
| |
| 2020-03-06 David Edelsohn <dje.gcc@gmail.com> |
| |
| PR target/94065 |
| * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for |
| cmodel=large. |
| (TARGET_NO_FP_IN_TOC): Same. |
| * config/rs6000/aix71.h: Same. |
| * config/rs6000/aix72.h: Same. |
| |
| 2020-03-06 Andrew Pinski <apinski@marvell.com> |
| Jeff Law <law@redhat.com> |
| |
| PR rtl-optimization/93996 |
| * haifa-sched.c (remove_notes): Be more careful when adding |
| REG_SAVE_NOTE. |
| |
| 2020-03-06 Delia Burduv <delia.burduv@arm.com> |
| |
| * config/arm/arm_neon.h (vld2_bf16): New. |
| (vld2q_bf16): New. |
| (vld3_bf16): New. |
| (vld3q_bf16): New. |
| (vld4_bf16): New. |
| (vld4q_bf16): New. |
| (vld2_dup_bf16): New. |
| (vld2q_dup_bf16): New. |
| (vld3_dup_bf16): New. |
| (vld3q_dup_bf16): New. |
| (vld4_dup_bf16): New. |
| (vld4q_dup_bf16): New. |
| * config/arm/arm_neon_builtins.def |
| (vld2): Changed to VAR13 and added v4bf, v8bf |
| (vld2_dup): Changed to VAR8 and added v4bf, v8bf |
| (vld3): Changed to VAR13 and added v4bf, v8bf |
| (vld3_dup): Changed to VAR8 and added v4bf, v8bf |
| (vld4): Changed to VAR13 and added v4bf, v8bf |
| (vld4_dup): Changed to VAR8 and added v4bf, v8bf |
| * config/arm/iterators.md (VDXBF2): New iterator. |
| *config/arm/neon.md (neon_vld2): Use new iterators. |
| (neon_vld2_dup<mode): Use new iterators. |
| (neon_vld3<mode>): Likewise. |
| (neon_vld3qa<mode>): Likewise. |
| (neon_vld3qb<mode>): Likewise. |
| (neon_vld3_dup<mode>): Likewise. |
| (neon_vld4<mode>): Likewise. |
| (neon_vld4qa<mode>): Likewise. |
| (neon_vld4qb<mode>): Likewise. |
| (neon_vld4_dup<mode>): Likewise. |
| (neon_vld2_dupv8bf): New. |
| (neon_vld3_dupv8bf): Likewise. |
| (neon_vld4_dupv8bf): Likewise. |
| |
| 2020-03-06 Delia Burduv <delia.burduv@arm.com> |
| |
| * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef. |
| (bfloat16x8x2_t): New typedef. |
| (bfloat16x4x3_t): New typedef. |
| (bfloat16x8x3_t): New typedef. |
| (bfloat16x4x4_t): New typedef. |
| (bfloat16x8x4_t): New typedef. |
| (vst2_bf16): New. |
| (vst2q_bf16): New. |
| (vst3_bf16): New. |
| (vst3q_bf16): New. |
| (vst4_bf16): New. |
| (vst4q_bf16): New. |
| * config/arm/arm-builtins.c (v2bf_UP): Define. |
| (VAR13): New. |
| (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype. |
| * config/arm/arm-modes.def (V2BF): New mode. |
| * config/arm/arm-simd-builtin-types.def |
| (Bfloat16x2_t): New entry. |
| * config/arm/arm_neon_builtins.def |
| (vst2): Changed to VAR13 and added v4bf, v8bf |
| (vst3): Changed to VAR13 and added v4bf, v8bf |
| (vst4): Changed to VAR13 and added v4bf, v8bf |
| * config/arm/iterators.md (VDXBF): New iterator. |
| (VQ2BF): New iterator. |
| *config/arm/neon.md (neon_vst2<mode>): Used new iterators. |
| (neon_vst2<mode>): Used new iterators. |
| (neon_vst3<mode>): Used new iterators. |
| (neon_vst3<mode>): Used new iterators. |
| (neon_vst3qa<mode>): Used new iterators. |
| (neon_vst3qb<mode>): Used new iterators. |
| (neon_vst4<mode>): Used new iterators. |
| (neon_vst4<mode>): Used new iterators. |
| (neon_vst4qa<mode>): Used new iterators. |
| (neon_vst4qb<mode>): Used new iterators. |
| |
| 2020-03-06 Delia Burduv <delia.burduv@arm.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def |
| (bfcvtn): New built-in function. |
| (bfcvtn_q): New built-in function. |
| (bfcvtn2): New built-in function. |
| (bfcvt): New built-in function. |
| * config/aarch64/aarch64-simd.md |
| (aarch64_bfcvtn<q><mode>): New pattern. |
| (aarch64_bfcvtn2v8bf): New pattern. |
| (aarch64_bfcvtbf): New pattern. |
| * config/aarch64/arm_bf16.h (float32_t): New typedef. |
| (vcvth_bf16_f32): New intrinsic. |
| * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic. |
| (vcvtq_low_bf16_f32): New intrinsic. |
| (vcvtq_high_bf16_f32): New intrinsic. |
| * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator. |
| (UNSPEC_BFCVTN): New UNSPEC. |
| (UNSPEC_BFCVTN2): New UNSPEC. |
| (UNSPEC_BFCVT): New UNSPEC. |
| * config/arm/types.md (bf_cvt): New type. |
| |
| 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.md ("tabort"): Get rid of two consecutive |
| blanks in format string. |
| |
| 2020-03-05 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/89229 |
| PR target/89346 |
| * config/i386/i386-protos.h (ix86_output_ssemov): New prototype. |
| * config/i386/i386.c (ix86_get_ssemov): New function. |
| (ix86_output_ssemov): Likewise. |
| * config/i386/sse.md (VMOVE:mov<mode>_internal): Call |
| ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL |
| check. |
| (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV. |
| (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV. |
| Remove ext_sse_reg_operand and TARGET_AVX512VL check. |
| (*movti_internal): Likewise. |
| (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV. |
| |
| 2020-03-05 Jeff Law <law@redhat.com> |
| |
| PR tree-optimization/91890 |
| * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument. |
| Use gimple_or_expr_nonartificial_location. |
| (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds. |
| Use gimple_or_expr_nonartificial_location. |
| * gimple.c (gimple_or_expr_nonartificial_location): New function. |
| * gimple.h (gimple_or_expr_nonartificial_location): Declare it. |
| * tree-ssa-strlen.c (maybe_warn_overflow): Use |
| gimple_or_expr_nonartificial_location. |
| (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise. |
| (maybe_warn_pointless_strcmp): Likewise. |
| |
| 2020-03-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/94046 |
| * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of |
| SRC and MASK arguments to __m128 from __m128d. |
| (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256 |
| from __m256d. |
| (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128 |
| from __m128d. |
| * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C |
| argument to __m128i from __m128d. |
| (_mm256_permute2_pd): Fix first cast of C argument to __m256i from |
| __m256d. |
| (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128. |
| (_mm256_permute2_ps): Fix first cast of C argument to __m256i from |
| __m256. |
| |
| 2020-03-05 Delia Burduv <delia.burduv@arm.com> |
| |
| * config/arm/arm_neon.h (vbfmmlaq_f32): New. |
| (vbfmlalbq_f32): New. |
| (vbfmlaltq_f32): New. |
| (vbfmlalbq_lane_f32): New. |
| (vbfmlaltq_lane_f32): New. |
| (vbfmlalbq_laneq_f32): New. |
| (vbfmlaltq_laneq_f32): New. |
| * config/arm/arm_neon_builtins.def (vmmla): New. |
| (vfmab): New. |
| (vfmat): New. |
| (vfmab_lane): New. |
| (vfmat_lane): New. |
| (vfmab_laneq): New. |
| (vfmat_laneq): New. |
| * config/arm/iterators.md (BF_MA): New int iterator. |
| (bt): New int attribute. |
| (VQXBF): Copy of VQX with V8BF. |
| * config/arm/neon.md (neon_vmmlav8bf): New insn. |
| (neon_vfma<bt>v8bf): New insn. |
| (neon_vfma<bt>_lanev8bf): New insn. |
| (neon_vfma<bt>_laneqv8bf): New expand. |
| (neon_vget_high<mode>): Changed iterator to VQXBF. |
| * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC. |
| (UNSPEC_BFMAB): New UNSPEC. |
| (UNSPEC_BFMAT): New UNSPEC. |
| |
| 2020-03-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/93399 |
| * tree-pretty-print.h (pretty_print_string): Declare. |
| * tree-pretty-print.c (pretty_print_string): Remove forward |
| declaration, no longer static. Change nbytes parameter type |
| from unsigned to size_t. |
| * print-rtl.c (print_value) <case CONST_STRING>: Use |
| pretty_print_string and for shrink way too long strings. |
| |
| 2020-03-05 Richard Biener <rguenther@suse.de> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93582 |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR |
| last operand as signed when looking for memset offset. Formatting |
| fix. |
| |
| 2020-03-04 Andrew Pinski <apinski@marvell.com> |
| |
| PR bootstrap/93962 |
| * value-prof.c (dump_histogram_value): Use std::abs. |
| |
| 2020-03-04 Martin Sebor <msebor@redhat.com> |
| |
| PR tree-optimization/93986 |
| * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int |
| operands to the same precision widest_int to avoid ICEs. |
| |
| 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com> |
| |
| PR target/87560 |
| * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define. |
| * rs6000.c (rs6000_disable_incompatible_switches): Add table entry |
| for OPTION_MASK_ALTIVEC. |
| |
| 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config.gcc: Include the glibc-stdint.h header for zTPF. |
| |
| 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.c (s390_secondary_memory_needed): Disallow |
| direct FPR-GPR copies. |
| (s390_register_info_gprtofpr): Disallow GPR content to be saved in |
| FPRs. |
| |
| 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com> |
| |
| * config/s390/s390.c (s390_emit_prologue): Specify the 2 new |
| operands to the prologue_tpf expander. |
| (s390_emit_epilogue): Likewise. |
| (s390_option_override_internal): Do error checking and setup for |
| the new options. |
| * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK) |
| (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET) |
| (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET) |
| (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions. |
| * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new |
| operands for the check flag and the branch target. |
| * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check") |
| ("mtpf-trace-hook-prologue-target") |
| ("mtpf-trace-hook-epilogue-check") |
| ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New |
| options. |
| * doc/invoke.texi: Document -mtpf-trace-skip option. The other |
| options are for debugging purposes and will not be documented |
| here. |
| |
| 2020-03-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR debug/93888 |
| * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag. |
| |
| * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti |
| argument. Change pd argument so that it can be modified. Turn |
| constant non-CONSTRUCTOR store into non-constant if it is too large. |
| Adjust offset and size of CONSTRUCTOR or non-constant store to avoid |
| overflows. |
| (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust |
| callers. |
| |
| 2020-02-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93964 |
| * graphite-isl-ast-to-gimple.c |
| (gcc_expression_from_isl_ast_expr_id): Add intermediate |
| conversion for pointer to integer converts. |
| * graphite-scop-detection.c (assign_parameter_index_in_region): |
| Relax assert. |
| |
| 2020-03-04 Martin Liska <mliska@suse.cz> |
| |
| PR c/93886 |
| PR c/93887 |
| * doc/invoke.texi: Clarify --help=language and --help=common |
| interaction. |
| |
| 2020-03-04 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/94001 |
| * tree-tailcall.c (process_assignment): Before comparing op1 to |
| *ass_var, verify *ass_var is non-NULL. |
| |
| 2020-03-04 Kito Cheng <kito.cheng@sifive.com> |
| |
| PR target/93995 |
| * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare |
| the result of IOR. |
| |
| 2020-03-03 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New. |
| * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New. |
| (vcvtq_high_f32_bf16, vcvt_bf16_f32): New. |
| (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New. |
| * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries. |
| (vbfcvtv4sf, vbfcvtv4sf_high): Likewise. |
| * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators. |
| (V_bf_low, V_bf_cvt_m): New mode attributes. |
| * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New. |
| (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New. |
| (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New. |
| (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New |
| * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New. |
| |
| 2020-03-03 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93582 |
| * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument. |
| * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result |
| members, initialize them in the constructor and if mask is non-NULL, |
| artificially push_partial_def {} for the portions of the mask that |
| contain zeros. |
| (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to |
| val and return (void *)-1. Formatting fix. |
| (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization. |
| Formatting fix. |
| (vn_reference_lookup): Add mask argument. If non-NULL, don't call |
| fully_constant_vn_reference_p nor vn_reference_lookup_1 and return |
| data.mask_result. |
| (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST |
| mask. |
| (visit_stmt): Formatting fix. |
| |
| 2020-03-03 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93946 |
| * alias.h (refs_same_for_tbaa_p): Declare. |
| * alias.c (refs_same_for_tbaa_p): New function. |
| * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return |
| zero. |
| * tree-ssa-scopedtables.h |
| (avail_exprs_stack::lookup_avail_expr): Add output argument |
| giving access to the hashtable entry. |
| * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr): |
| Likewise. |
| * tree-ssa-dom.c: Include alias.h. |
| (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before |
| removing redundant store. |
| * tree-ssa-sccvn.h (vn_reference_s::base_set): New member. |
| (ao_ref_init_from_vn_reference): Adjust prototype. |
| (vn_reference_lookup_pieces): Likewise. |
| (vn_reference_insert_pieces): Likewise. |
| * tree-ssa-sccvn.c: Track base alias set in addition to alias |
| set everywhere. |
| (eliminate_dom_walker::eliminate_stmt): Also check base alias |
| set when removing redundant stores. |
| (visit_reference_op_store): Likewise. |
| * dse.c (record_store): Adjust valdity check for redundant |
| store removal. |
| |
| 2020-03-03 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/26877 |
| * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder. |
| |
| PR rtl-optimization/94002 |
| * explow.c (plus_constant): Punt if cst has VOIDmode and |
| get_pool_mode is different from mode. |
| |
| 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (leigitimate_small_data_address_p): Check if an |
| address has an offset which fits the scalling constraint for a |
| load/store operation. |
| (legitimate_scaled_address_p): Update use |
| leigitimate_small_data_address_p. |
| (arc_print_operand): Likewise. |
| (arc_legitimate_address_p): Likewise. |
| (legitimate_small_data_address_p): Likewise. |
| |
| 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate. |
| (fnmasf4_fpu): Likewise. |
| |
| 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.md (adddi3): Early expand the 64bit operation into |
| 32bit ops. |
| (subdi3): Likewise. |
| (adddi3_i): Remove pattern. |
| (subdi3_i): Likewise. |
| |
| 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.md (eh_return): Add length info. |
| |
| 2020-03-02 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/invoke.texi (-fanalyzer-show-duplicate-count): New. |
| |
| 2020-03-02 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/invoke.texi (Static Analyzer Options): Add |
| -Wanalyzer-stale-setjmp-buffer to the list of options enabled |
| by -fanalyzer. |
| |
| 2020-03-02 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/93997 |
| * config/i386/i386.md (movstrict<mode>): Allow only |
| registers with VALID_INT_MODE_P modes. |
| |
| 2020-03-02 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (dpp_move<mode>): New. |
| (reduc_insn): Use 'U' and 'B' operand codes. |
| (reduc_<reduc_op>_scal_<mode>): Allow all types. |
| (reduc_<reduc_op>_scal_v64di): Delete. |
| (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types. |
| (*plus_carry_dpp_shr_v64si): Change to ... |
| (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types. |
| (mov_from_lane63_v64di): Change to ... |
| (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes. |
| * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size. |
| Support UNSPEC_MOV_DPP_SHR output formats. |
| (gcn_expand_reduc_scalar): Add "use_moves" reductions. |
| Add "use_extends" reductions. |
| (print_operand_address): Add 'I' and 'U' codes. |
| * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR. |
| |
| 2020-03-02 Martin Liska <mliska@suse.cz> |
| |
| * lto-wrapper.c: Fix typo in comment about |
| C++ standard version. |
| |
| 2020-03-01 Martin Sebor <msebor@redhat.com> |
| |
| PR c++/92721 |
| * calls.c (init_attr_rdwr_indices): Correctly handle attribute. |
| |
| 2020-03-01 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/93829 |
| * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that |
| of a pointer in the outermost ADDR_EXPRs. |
| |
| 2020-02-28 Jeff Law <law@redhat.com> |
| |
| * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19. |
| * config/v850/v850.c (v850_asm_trampoline_template): Update |
| accordingly. |
| |
| 2020-02-28 Michael Meissner <meissner@linux.ibm.com> |
| |
| PR target/93937 |
| * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var): |
| Delete insn. |
| |
| 2020-02-28 Martin Liska <mliska@suse.cz> |
| |
| PR other/93965 |
| * configure.ac: Improve detection of ld_date by requiring |
| either two dashes or none. |
| * configure: Regenerate. |
| |
| 2020-02-28 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR rtl-optimization/93564 |
| * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we |
| do not honor reg alloc order. |
| |
| 2020-02-27 Joel Hutton <Joel.Hutton@arm.com> |
| |
| PR target/87612 |
| * config/aarch64/aarch64.c (aarch64_override_options): Fix |
| misleading warning string. |
| |
| 2020-02-27 Martin Sebor <msebor@redhat.com> |
| |
| * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo. |
| |
| 2020-02-27 Michael Meissner <meissner@linux.ibm.com> |
| |
| PR target/93932 |
| * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator): |
| Split the insn into two parts. This insn only does variable |
| extract from a register. |
| (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do |
| variable extract from memory. |
| (vsx_extract_v4sf_var): Split the insn into two parts. This insn |
| only does variable extract from a register. |
| (vsx_extract_v4sf_var_load): New insn, do variable extract from |
| memory. |
| (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn |
| into two parts. This insn only does variable extract from a |
| register. |
| (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn, |
| do variable extract from memory. |
| |
| 2020-02-27 Martin Jambor <mjambor@suse.cz> |
| Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR ipa/93707 |
| * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with |
| new function calls_same_node_or_its_all_contexts_clone_p. |
| (cgraph_edge_brings_value_p): Use it. |
| (cgraph_edge_brings_value_p): Likewise. |
| (self_recursive_pass_through_p): Return false if caller is a clone. |
| (self_recursive_agg_pass_through_p): Likewise. |
| |
| 2020-02-27 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR middle-end/92152 |
| * alias.c (ends_tbaa_access_path_p): Break out from ... |
| (component_uses_parent_alias_set_from): ... here. |
| * alias.h (ends_tbaa_access_path_p): Declare. |
| * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...; |
| handle trailing arrays past end of tbaa access path. |
| (aliasing_component_refs_p): ... here; likewise. |
| (nonoverlapping_refs_since_match_p): Track TBAA segment of the access |
| path; disambiguate also past end of it. |
| (nonoverlapping_component_refs_p): Use only TBAA segment of the access |
| path. |
| |
| 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the |
| beginning of the file. |
| (vcreate_bf16, vcombine_bf16): New. |
| (vdup_n_bf16, vdupq_n_bf16): New. |
| (vdup_lane_bf16, vdup_laneq_bf16): New. |
| (vdupq_lane_bf16, vdupq_laneq_bf16): New. |
| (vduph_lane_bf16, vduph_laneq_bf16): New. |
| (vset_lane_bf16, vsetq_lane_bf16): New. |
| (vget_lane_bf16, vgetq_lane_bf16): New. |
| (vget_high_bf16, vget_low_bf16): New. |
| (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New. |
| (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New. |
| (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New. |
| (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New. |
| (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New. |
| (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New. |
| (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New. |
| (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New. |
| (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New. |
| (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New. |
| (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New. |
| (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New. |
| (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New. |
| (vreinterpretq_bf16_p128): New. |
| (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New. |
| (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New. |
| (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New. |
| (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New. |
| (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New. |
| (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New. |
| (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New. |
| (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New. |
| (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New. |
| (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New. |
| (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New. |
| (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New. |
| (vreinterpretq_p128_bf16): New. |
| * config/arm/arm_neon_builtins.def (VDX): Add V4BF. |
| (V_elem): Likewise. |
| (V_elem_l): Likewise. |
| (VD_LANE): Likewise. |
| (VQX) Add V8BF. |
| (V_DOUBLE): Likewise. |
| (VDQX): Add V4BF and V8BF. |
| (V_two_elem, V_three_elem, V_four_elem): Likewise. |
| (V_reg): Likewise. |
| (V_HALF): Likewise. |
| (V_double_vector_mode): Likewise. |
| (V_cmp_result): Likewise. |
| (V_uf_sclr): Likewise. |
| (V_sz_elem): Likewise. |
| (Is_d_reg): Likewise. |
| (V_mode_nunits): Likewise. |
| * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16. |
| |
| 2020-02-27 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator. |
| (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE. |
| (<expander><mode>3<exec>): Likewise. |
| (<expander><mode>3): New. |
| (v<expander><mode>3): New. |
| (<expander><mode>3): New. |
| (<expander><mode>3<exec>): Rename to ... |
| (<expander>v64si3<exec>): ... this, and change modes to V64SI. |
| * config/gcn/gcn.md (mnemonic): Use '%B' for not. |
| |
| 2020-02-27 Alexandre Oliva <oliva@adacore.com> |
| |
| * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave |
| them alone on vx7. |
| |
| 2020-02-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93508 |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like |
| non-_CHK variants. Valueize their length arguments. |
| |
| 2020-02-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93953 |
| * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference |
| to the hash-map entry. |
| |
| 2020-02-27 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs. |
| |
| 2020-02-27 Mark Williams <mwilliams@fb.com> |
| |
| * dwarf2out.c (file_name_acquire): Call remap_debug_filename. |
| * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map, |
| -ffile-prefix-map and -fmacro-prefix-map. |
| * lto-streamer-out.c: Include file-prefix-map.h. |
| (lto_output_location): Remap the file part of locations. |
| |
| 2020-02-27 Jakub Jelinek <jakub@redhat.com> |
| |
| PR c/93949 |
| * gimplify.c (gimplify_init_constructor): Don't promote readonly |
| DECL_REGISTER variables to TREE_STATIC. |
| |
| PR tree-optimization/93582 |
| PR tree-optimization/93945 |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with |
| non-zero INTEGER_CST second argument and ref->offset or ref->size |
| not a multiple of BITS_PER_UNIT. |
| |
| 2020-02-27 Jonathan Wakely <jwakely@redhat.com> |
| |
| * doc/install.texi (Binaries): Update description of BullFreeware. |
| |
| 2020-02-26 Sandra Loosemore <sandra@codesourcery.com> |
| |
| PR c++/90467 |
| |
| * doc/invoke.texi (Option Summary): Re-alphabetize warnings in |
| C++ Language Options, Warning Options, and Static Analyzer |
| Options lists. Document negative form of options enabled by |
| default. Move some things around to more accurately sort |
| warnings by category. |
| (C++ Dialect Options, Warning Options, Static Analyzer |
| Options): Document negative form of options when enabled by |
| default. Move some things around to more accurately sort |
| warnings by category. Add some missing index entries. |
| Light copy-editing. |
| |
| 2020-02-26 Carl Love <cel@us.ibm.com> |
| |
| PR target/91276 |
| * doc/extend.texi (PowerPC AltiVec Built-in Functions available on |
| ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only |
| for the vector unsigned short arguments. It is also listed as the |
| name of the built-in for arguments vector unsigned short, |
| vector unsigned int and vector unsigned long long built-ins. The |
| name of the builtins for these arguments should be: |
| __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and |
| __builtin_crypto_vpmsumd respectively. |
| |
| 2020-02-26 Richard Biener <rguenther@suse.de> |
| |
| * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count |
| and load permutation. |
| |
| 2020-02-26 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR middle-end/93843 |
| * optabs-tree.c (supportable_convert_operation): Reject types with |
| scalar modes. |
| |
| 2020-02-26 David Malcolm <dmalcolm@redhat.com> |
| |
| * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o. |
| |
| 2020-02-26 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93820 |
| * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE |
| argument to ALL_INTEGER_CST_P boolean. |
| (imm_store_chain_info::try_coalesce_bswap): Adjust caller. |
| (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle |
| adjacent INTEGER_CST store into merged_store->only_constants like |
| overlapping one. |
| |
| 2020-02-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR other/93912 |
| * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity |
| -> probability. |
| * cfghooks.c (verify_flow_info): Likewise. |
| * predict.c (combine_predictions_for_bb): Likewise. |
| * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo, |
| sucessor -> successor. |
| (find_traces_1_round): Fix comment typo, destinarion -> destination. |
| * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors -> |
| successors. |
| * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump |
| message typo, sucessors -> successors. |
| |
| 2020-02-25 Martin Sebor <msebor@redhat.com> |
| |
| * doc/extend.texi (attribute access): Correct an example. |
| |
| 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types): |
| Add simd_bf. |
| (aarch64_init_simd_builtin_scalar_types): Register simd_bf. |
| (VAR15, VAR16): New. |
| * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF. |
| (VD): Enable for V4BF. |
| (VDC): Likewise. |
| (VQ): Enable for V8BF. |
| (VQ2): Likewise. |
| (VQ_NO2E): Likewise. |
| (VDBL, Vdbl): Add V4BF. |
| (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF. |
| * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef. |
| (bfloat16x8x2_t): Likewise. |
| (bfloat16x4x3_t): Likewise. |
| (bfloat16x8x3_t): Likewise. |
| (bfloat16x4x4_t): Likewise. |
| (bfloat16x8x4_t): Likewise. |
| (vcombine_bf16): New. |
| (vld1_bf16, vld1_bf16_x2): New. |
| (vld1_bf16_x3, vld1_bf16_x4): New. |
| (vld1q_bf16, vld1q_bf16_x2): New. |
| (vld1q_bf16_x3, vld1q_bf16_x4): New. |
| (vld1_lane_bf16): New. |
| (vld1q_lane_bf16): New. |
| (vld1_dup_bf16): New. |
| (vld1q_dup_bf16): New. |
| (vld2_bf16): New. |
| (vld2q_bf16): New. |
| (vld2_dup_bf16): New. |
| (vld2q_dup_bf16): New. |
| (vld3_bf16): New. |
| (vld3q_bf16): New. |
| (vld3_dup_bf16): New. |
| (vld3q_dup_bf16): New. |
| (vld4_bf16): New. |
| (vld4q_bf16): New. |
| (vld4_dup_bf16): New. |
| (vld4q_dup_bf16): New. |
| (vst1_bf16, vst1_bf16_x2): New. |
| (vst1_bf16_x3, vst1_bf16_x4): New. |
| (vst1q_bf16, vst1q_bf16_x2): New. |
| (vst1q_bf16_x3, vst1q_bf16_x4): New. |
| (vst1_lane_bf16): New. |
| (vst1q_lane_bf16): New. |
| (vst2_bf16): New. |
| (vst2q_bf16): New. |
| (vst3_bf16): New. |
| (vst3q_bf16): New. |
| (vst4_bf16): New. |
| (vst4q_bf16): New. |
| |
| 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF. |
| (VALL_F16): Likewise. |
| (VALLDI_F16): Likewise. |
| (Vtype): Likewise. |
| (Vetype): Likewise. |
| (vswap_width_name): Likewise. |
| (VSWAP_WIDTH): Likewise. |
| (Vel): Likewise. |
| (VEL): Likewise. |
| (q): Likewise. |
| * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New. |
| (vget_lane_bf16, vgetq_lane_bf16): New. |
| (vcreate_bf16): New. |
| (vdup_n_bf16, vdupq_n_bf16): New. |
| (vdup_lane_bf16, vdup_laneq_bf16): New. |
| (vdupq_lane_bf16, vdupq_laneq_bf16): New. |
| (vduph_lane_bf16, vduph_laneq_bf16): New. |
| (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New. |
| (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New. |
| (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New. |
| (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New. |
| (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New. |
| (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New. |
| (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New. |
| (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New. |
| (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New. |
| (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New. |
| (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New |
| (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New |
| (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New. |
| (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New. |
| (vreinterpretq_bf16_p128): New. |
| (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New. |
| (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New. |
| (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New. |
| (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New. |
| (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New. |
| (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New. |
| (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New. |
| (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New. |
| (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New. |
| (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New. |
| (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New. |
| (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New. |
| (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New. |
| (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New. |
| (vreinterpretq_p128_bf16): New. |
| |
| 2020-02-25 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New |
| (vbfdot_lane_f32, vbfdotq_laneq_f32): New. |
| (vbfdot_laneq_f32, vbfdotq_lane_f32): New. |
| * config/arm/arm_neon_builtins.def (vbfdot): New entry. |
| (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise. |
| * config/arm/iterators.md (VSF2BF): New attribute. |
| * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry. |
| (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise. |
| (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise. |
| |
| 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org> |
| |
| * config/arm/arm.md (required_for_purecode): New attribute. |
| (enabled): Handle required_for_purecode. |
| * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to |
| work with -mpure-code. |
| |
| 2020-02-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/93908 |
| * combine.c (find_split_point): For store into ZERO_EXTRACT, and src |
| with mask. |
| |
| 2019-02-25 Eric Botcazou <ebotcazou@adacore.com> |
| |
| * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode. |
| |
| 2020-02-25 Roman Zhuykov <zhroma@ispras.ru> |
| |
| * doc/install.texi (--enable-checking): Adjust wording. |
| |
| 2020-02-25 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93868 |
| * tree-vect-slp.c (slp_copy_subtree): New function. |
| (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before |
| re-arranging stmts in it. |
| |
| 2020-02-25 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/93874 |
| * passes.c (pass_manager::dump_passes): Create a cgraph node for the |
| dummy function and remove it at the end. |
| |
| PR translation/93864 |
| * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo |
| paramter -> parameter. |
| * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise. |
| * ipa-prop.h (struct ipa_agg_replacement_value): Likewise. |
| |
| 2020-02-24 Roman Zhuykov <zhroma@ispras.ru> |
| |
| * doc/install.texi (--enable-checking): Properly document current |
| behavior. |
| (--enable-stage1-checking): Minor clarification about bootstrap. |
| |
| 2020-02-24 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/93032 |
| * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that |
| -fanalyzer-checker=taint is also required. |
| (-fanalyzer-checker=): Note that providing this option enables the |
| given checker, and doing so may be required for checkers that are |
| disabled by default. |
| |
| 2020-02-24 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows |
| significant control flow events; add a "3" which shows all |
| control flow events; the old "3" becomes "4". |
| |
| 2020-02-24 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93582 |
| * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider |
| pd.offset and pd.size to be counted in bits rather than bytes, add |
| support for maxsizei that is not a multiple of BITS_PER_UNIT and |
| handle bitfield stores and loads. |
| (vn_reference_lookup_3): Don't call ranges_known_overlap_p with |
| uncomparable quantities - bytes vs. bits. Allow push_partial_def |
| on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust |
| pd.offset/pd.size to be counted in bits rather than bytes. |
| Formatting fix. Rename shadowed len variable to buflen. |
| |
| 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> |
| Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org> |
| |
| PR driver/47785 |
| * gcc.c (putenv_COLLECT_AS_OPTIONS): New function. |
| (driver::main): Call putenv_COLLECT_AS_OPTIONS. |
| * opts-common.c (parse_options_from_collect_gcc_options): New function. |
| (prepend_xassembler_to_collect_as_options): Likewise. |
| * opts.h (parse_options_from_collect_gcc_options): Declare prototype. |
| (prepend_xassembler_to_collect_as_options): Likewise. |
| * lto-opts.c (lto_write_options): Stream assembler options |
| in COLLECT_AS_OPTIONS. |
| * lto-wrapper.c (xassembler_options_error): New static variable. |
| (get_options_from_collect_gcc_options): Move parsing options code to |
| parse_options_from_collect_gcc_options and call it. |
| (merge_and_complain): Validate -Xassembler options. |
| (append_compiler_options): Handle OPT_Xassembler. |
| (run_gcc): Append command line -Xassembler options to |
| collect_gcc_options. |
| * doc/invoke.texi: Add documentation about using Xassembler |
| options with LTO. |
| |
| 2020-02-24 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen |
| for LTGT. |
| (riscv_rtx_costs): Update cost model for LTGT. |
| |
| 2020-02-23 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR rtl-optimization/93564 |
| * ira-color.c (struct update_cost_queue_elem): New member start. |
| (queue_update_cost, get_next_update_cost): Add new arg start. |
| (allocnos_conflict_p): New function. |
| (update_costs_from_allocno): Add new arg conflict_cost_update_p. |
| Add checking conflicts with allocnos_conflict_p. |
| (update_costs_from_prefs, restore_costs_from_copies): Adjust |
| update_costs_from_allocno calls. |
| (update_conflict_hard_regno_costs): Add checking conflicts with |
| allocnos_conflict_p. Adjust calls of queue_update_cost and |
| get_next_update_cost. |
| (assign_hard_reg): Adjust calls of queue_update_cost. Add |
| debugging print. |
| (bucket_allocno_compare_func): Restore previous version. |
| |
| 2020-02-21 John David Anglin <danglin@gcc.gnu.org> |
| |
| * config/pa/pa.c (pa_function_value): Fix check for word and |
| double-word size when handling aggregate return values. |
| * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate |
| that homogeneous SFmode and DFmode aggregates are passed and returned |
| in general registers. |
| |
| 2020-02-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR translation/93759 |
| * opts.c (print_filtered_help): Translate help before appending |
| messages to it rather than after that. |
| |
| 2020-02-19 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/PR92989 |
| * lra-lives.c (process_bb_lives): Restore the original order |
| of the bb liveness update. Call make_hard_regno_dead for each |
| register clobbered at the start of an EH receiver. |
| |
| 2020-02-18 Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR ipa/93763 |
| * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as |
| self-recursively generated. |
| |
| 2020-02-21 Iain Sandoe <iain@sandoe.co.uk> |
| |
| PR target/93860 |
| * config/darwin-c.c (pop_field_alignment): Adjust quoting of |
| error string. |
| |
| 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * doc/sourcebuild.texi (arm_v8_1m_mve_ok): |
| Document new target supports option. |
| |
| 2020-02-21 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New. |
| * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New. |
| * config/arm/iterators.md (MATMUL): New iterator. |
| (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US. |
| (mmla_sfx): New attribute. |
| * config/arm/neon.md (neon_<sup>mmlav16qi): New. |
| * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New. |
| (UNSPEC_MATMUL_US): New. |
| |
| 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm.md: Prevent scalar shifts from being used when big |
| endian is enabled. |
| |
| 2020-02-21 Jan Hubicka <hubicka@ucw.cz> |
| Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93586 |
| * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk |
| after mismatched array refs; do not sure type size information to |
| recover from unmatched referneces with !flag_strict_aliasing_p. |
| |
| 2020-02-21 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ... |
| (gather_load<mode>v64si): ... this and set operand 2 to V64SI. |
| (scatter_store<mode>): Rename to ... |
| (scatter_store<mode>v64si): ... this and set operand 1 to V64SI. |
| (scatter<mode>_exec): Delete. Move contents ... |
| (mask_scatter_store<mode>): ... here, and rename that to ... |
| (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI. |
| Remove mode conversion. |
| (mask_gather_load<mode>): Rename to ... |
| (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI. |
| Remove mode conversion. |
| * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion. |
| |
| 2020-02-21 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/93845 |
| * tree-sra.c (verify_sra_access_forest): Only test access size of |
| scalar types. |
| |
| 2020-02-21 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs. |
| * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber. |
| (addv64di3_exec): Likewise. |
| (subv64di3): Likewise. |
| (subv64di3_exec): Likewise. |
| (addv64di3_zext): Likewise. |
| (addv64di3_zext_exec): Likewise. |
| (addv64di3_zext_dup): Likewise. |
| (addv64di3_zext_dup_exec): Likewise. |
| (addv64di3_zext_dup2): Likewise. |
| (addv64di3_zext_dup2_exec): Likewise. |
| (addv64di3_sext_dup2): Likewise. |
| (addv64di3_sext_dup2_exec): Likewise. |
| (<expander>v64di3): Likewise. |
| (<expander>v64di3_exec): Likewise. |
| (*<reduc_op>_dpp_shr_v64di): Likewise. |
| (*plus_carry_dpp_shr_v64di): Likewise. |
| * config/gcn/gcn.md (adddi3): Likewise. |
| (addptrdi3): Likewise. |
| (<expander>di3): Likewise. |
| |
| 2020-02-21 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di. |
| |
| 2020-02-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE |
| support. Use aarch64_emit_mult instead of emitting multiplication |
| instructions directly. |
| * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2) |
| (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders. |
| |
| 2020-02-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_emit_mult): New function. |
| (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult |
| instead of emitting multiplication instructions directly. |
| * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator. |
| * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>) |
| (@aarch64_frecps<mode>): New expanders. |
| |
| 2020-02-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate |
| on and produce uint64_ts rather than ints. |
| (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts. |
| (cpu_approx_modes): Change the fields from unsigned int to uint64_t. |
| |
| 2020-02-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create |
| an unused xmsk register when handling approximate rsqrt. |
| |
| 2020-02-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted |
| flag_finite_math_only condition. |
| |
| 2020-02-20 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/93828 |
| * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand |
| to destination operand for shufps alternative. |
| (*vec_extractv2si_1): Ditto. |
| |
| 2020-02-20 Peter Bergner <bergner@linux.ibm.com> |
| |
| PR target/93658 |
| * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX |
| vector modes. |
| |
| 2020-02-20 Martin Liska <mliska@suse.cz> |
| |
| PR translation/93831 |
| * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode. |
| |
| 2020-02-20 Martin Liska <mliska@suse.cz> |
| |
| PR translation/93830 |
| * common/config/avr/avr-common.c: Remote trailing "|". |
| |
| 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de> |
| |
| * collect2.c (maybe_run_lto_and_relink): Fix typo in |
| comment. |
| |
| 2020-02-19 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/93767 |
| * tree-vect-data-refs.c (vect_compile_time_alias): Remove the |
| access-size bias from the offset calculations for negative strides. |
| |
| 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de> |
| |
| * collect2.c (c_file, o_file): Make const again. |
| (ldout,lderrout, dump_ld_file): Remove. |
| (tool_cleanup): Avoid calling not signal-safe functions. |
| (maybe_run_lto_and_relink): Avoid possible signal handler |
| access to unintialzed memory (lto_o_files). |
| (main): Avoid leaking temp files in $TMPDIR. |
| Initialize c_file/o_file with concat, which avoids exposing |
| uninitialized memory to signal handler, which calls unlink(!). |
| Avoid calling maybe_unlink when the main function returns, |
| since the atexit handler is already doing this. |
| * collect2.h (dump_ld_file, ldout, lderrout): Remove. |
| |
| 2020-02-19 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/93776 |
| * tree-sra.c (create_access): Do not create zero size accesses. |
| (get_access_for_expr): Do not search for zero sized accesses. |
| |
| 2020-02-19 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/93667 |
| * tree-sra.c (scalarizable_type_p): Return false if record fields |
| do not follow wach other. |
| |
| 2020-01-21 Kito Cheng <kito.cheng@sifive.com> |
| |
| * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x |
| rather than fmv.x.s/fmv.s.x. |
| |
| 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def |
| (intrinsic_vec_smult_lo_): New. |
| (intrinsic_vec_umult_lo_): Likewise. |
| (vec_widen_smult_hi_): Likewise. |
| (vec_widen_umult_hi_): Likewise. |
| * config/aarch64/aarch64-simd.md |
| (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New. |
| * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics. |
| (vmull_high_s16): Likewise. |
| (vmull_high_s32): Likewise. |
| (vmull_high_u8): Likewise. |
| (vmull_high_u16): Likewise. |
| (vmull_high_u32): Likewise. |
| (vmull_s8): Likewise. |
| (vmull_s16): Likewise. |
| (vmull_s32): Likewise. |
| (vmull_u8): Likewise. |
| (vmull_u16): Likewise. |
| (vmull_u32): Likewise. |
| |
| 2020-02-18 Martin Liska <mliska@suse.cz> |
| |
| * value-prof.c (stream_out_histogram_value): Restore LTO PGO |
| bootstrap by missing removal of invalid sanity check. |
| |
| 2020-02-18 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/92518 |
| * ipa-icf-gimple.c (func_checker::compare_gimple_assign): |
| Always compare LHS of gimple_assign. |
| |
| 2020-02-18 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/93583 |
| * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute |
| and return type of functions. |
| * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl): |
| Drop MALLOC attribute for void functions. |
| * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop |
| malloc_state for a new VOID clone. |
| |
| 2020-02-18 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/92924 |
| * common.opt: Add -fprofile-reproducibility. |
| * doc/invoke.texi: Document it. |
| * value-prof.c (dump_histogram_value): |
| Document and support behavior for counters[0] |
| being a negative value. |
| (get_nth_most_common_value): Handle negative |
| counters[0] in respect to flag_profile_reproducible. |
| |
| 2020-02-18 Jakub Jelinek <jakub@redhat.com> |
| |
| PR ipa/93797 |
| * cgraph.c (verify_speculative_call): Use speculative_id instead of |
| speculative_uid in messages. Remove trailing whitespace from error |
| message. Use num_speculative_call_targets instead of |
| num_speculative_targets in a message. |
| (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in |
| edge messages and stmt instead of cal_stmt in reference message. |
| |
| PR tree-optimization/93780 |
| * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p |
| before calling build_vector_type. |
| (execute_update_addresses_taken): Likewise. |
| |
| PR driver/93796 |
| * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help |
| typo, functoin -> function. |
| * tree.c (free_lang_data_in_decl): Fix comment typo, |
| functoin -> function. |
| * ipa-visibility.c (cgraph_externally_visible_p): Likewise. |
| |
| 2020-02-17 David Malcolm <dmalcolm@redhat.com> |
| |
| * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs |
| won't be printed. |
| (print_option_information): Don't call get_option_url if URLs |
| won't be printed. |
| |
| 2020-02-17 Alexandre Oliva <oliva@adacore.com> |
| |
| * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete |
| handling of register_common-less targets. |
| |
| 2020-02-17 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/93760 |
| * ipa-devirt.c (odr_types_equivalent_p): Fix grammar. |
| |
| 2020-02-17 Martin Liska <mliska@suse.cz> |
| |
| PR translation/93755 |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): |
| Fix double quotes. |
| |
| 2020-02-17 Martin Liska <mliska@suse.cz> |
| |
| PR other/93756 |
| * config/rx/elf.opt: Fix typo. |
| |
| 2020-02-17 Richard Biener <rguenther@suse.de> |
| |
| PR c/86134 |
| * opts-global.c (print_ignored_options): Use inform and |
| amend message. |
| |
| 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com> |
| |
| PR target/93047 |
| * config/rs6000/rs6000.md (untyped_call): Add emit_clobber. |
| |
| 2020-02-16 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/93743 |
| * config/i386/i386.md (atan2xf3): Swap operands 1 and 2. |
| (atan2<mode>3): Update operand order in the call to gen_atan2xf3. |
| |
| 2020-02-15 Jason Merrill <jason@redhat.com> |
| |
| * doc/invoke.texi (C Dialect Options): Add -std=c++20. |
| |
| 2020-02-15 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93744 |
| * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0, |
| A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A, |
| A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make |
| sure @2 in the first and @1 in the other patterns has no side-effects. |
| |
| 2020-02-15 David Malcolm <dmalcolm@redhat.com> |
| Bernd Edlinger <bernd.edlinger@hotmail.de> |
| |
| PR 87488 |
| PR other/93168 |
| * config.in (DIAGNOSTICS_URLS_DEFAULT): New define. |
| * configure.ac (--with-diagnostics-urls): New configuration |
| option, based on --with-diagnostics-color. |
| (DIAGNOSTICS_URLS_DEFAULT): New define. |
| * config.h: Regenerate. |
| * configure: Regenerate. |
| * diagnostic.c (diagnostic_urls_init): Handle -1 for |
| DIAGNOSTICS_URLS_DEFAULT from configure-time |
| --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS |
| and TERM_URLS environment variable. |
| * diagnostic-url.h (diagnostic_url_format): New enum type. |
| (diagnostic_urls_enabled_p): rename to... |
| (determine_url_format): ... this, and change return type. |
| * diagnostic-color.c (parse_env_vars_for_urls): New helper function. |
| (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal, |
| the linux console, and mingw. |
| (diagnostic_urls_enabled_p): rename to... |
| (determine_url_format): ... this, and adjust. |
| * pretty-print.h (pretty_printer::show_urls): rename to... |
| (pretty_printer::url_format): ... this, and change to enum. |
| * pretty-print.c (pretty_printer::pretty_printer, |
| pp_begin_url, pp_end_url, test_urls): Adjust. |
| * doc/install.texi (--with-diagnostics-urls): Document the new |
| configuration option. |
| (--with-diagnostics-color): Document the existing interaction |
| with GCC_COLORS better. |
| * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS |
| vindex reference. Update description of defaults based on the above. |
| (-fdiagnostics-color): Update description of how -fdiagnostics-color |
| interacts with GCC_COLORS. |
| |
| 2020-02-14 Eric Botcazou <ebotcazou@adacore.com> |
| |
| PR target/93704 |
| * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in |
| conjunction with TARGET_GNU_TLS in early return. |
| |
| 2020-02-14 Alexander Monakov <amonakov@ispras.ru> |
| |
| * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if |
| the mode is not wider than UNITS_PER_WORD. |
| |
| 2020-02-14 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/93516 |
| * tree-sra.c (propagate_subaccesses_from_rhs): Do not create |
| access of the same type as the parent. |
| (propagate_subaccesses_from_lhs): Likewise. |
| |
| 2020-02-14 Hongtao Liu <hongtao.liu@intel.com> |
| |
| PR target/93724 |
| * config/i386/avx512vbmi2intrin.h |
| (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16, |
| _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32, |
| _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32, |
| _m512_shrdi_epi64, _m512_mask_shrdi_epi64, |
| _m512_maskz_shrdi_epi64, _mm512_shldi_epi16, |
| _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16, |
| _mm512_shldi_epi32, _mm512_mask_shldi_epi32, |
| _mm512_maskz_shldi_epi32, _mm512_shldi_epi64, |
| _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo |
| of lacking a closing parenthesis. |
| * config/i386/avx512vbmi2vlintrin.h |
| (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16, |
| _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32, |
| _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32, |
| _m256_shrdi_epi64, _m256_mask_shrdi_epi64, |
| _m256_maskz_shrdi_epi64, _mm256_shldi_epi16, |
| _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16, |
| _mm256_shldi_epi32, _mm256_mask_shldi_epi32, |
| _mm256_maskz_shldi_epi32, _mm256_shldi_epi64, |
| _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64, |
| _mm_shrdi_epi16, _mm_mask_shrdi_epi16, |
| _mm_maskz_shrdi_epi16, _mm_shrdi_epi32, |
| _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32, |
| _mm_shrdi_epi64, _mm_mask_shrdi_epi64, |
| _m_maskz_shrdi_epi64, _mm_shldi_epi16, |
| _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16, |
| _mm_shldi_epi32, _mm_mask_shldi_epi32, |
| _mm_maskz_shldi_epi32, _mm_shldi_epi64, |
| _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto. |
| |
| 2020-02-13 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/93656 |
| * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at |
| the target function entry. |
| |
| 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * common/config/arc/arc-common.c (arc_option_optimization_table): |
| Disable if-conversion step when optimized for size. |
| |
| 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and |
| R12-R15 are always in ARCOMPACT16_REGS register class. |
| * config/arc/arc.opt (mq-class): Deprecate. |
| * config/arc/constraint.md ("q"): Remove dependency on mq-class |
| option. |
| * doc/invoke.texi (mq-class): Update text. |
| * common/config/arc/arc-common.c (arc_option_optimization_table): |
| Update list. |
| |
| 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (arc_insn_cost): New function. |
| (TARGET_INSN_COST): Define. |
| * config/arc/arc.md (cost): New attribute. |
| (add_n): Use arc_nonmemory_operand. |
| (ashlsi3_insn): Likewise, also update constraints. |
| (ashrsi3_insn): Likewise. |
| (rotrsi3): Likewise. |
| (add_shift): Likewise. |
| * config/arc/predicates.md (arc_nonmemory_operand): New predicate. |
| |
| 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi |
| registers. |
| (umulsidi_600): Likewise. |
| |
| 2020-02-13 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93696 |
| * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8, |
| _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8, |
| _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8, |
| _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W, |
| pass __A to the builtin followed by __W instead of __A followed by |
| __B. |
| * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32, |
| _mm512_mask_popcnt_epi64): Likewise. |
| * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32, |
| _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64, |
| _mm256_mask_popcnt_epi64): Likewise. |
| |
| PR tree-optimization/93582 |
| * fold-const.h (shift_bytes_in_array_left, |
| shift_bytes_in_array_right): Declare. |
| * fold-const.c (shift_bytes_in_array_left, |
| shift_bytes_in_array_right): New function, moved from |
| gimple-ssa-store-merging.c, no longer static. |
| * gimple-ssa-store-merging.c (shift_bytes_in_array): Move |
| to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left. |
| (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c. |
| (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of |
| shift_bytes_in_array. |
| (verify_shift_bytes_in_array): Rename to ... |
| (verify_shift_bytes_in_array_left): ... this. Use |
| shift_bytes_in_array_left instead of shift_bytes_in_array. |
| (store_merging_c_tests): Call verify_shift_bytes_in_array_left |
| instead of verify_shift_bytes_in_array. |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr |
| / native_interpret_expr where the store covers all needed bits, |
| punt on PDP-endian, otherwise allow all involved offsets and sizes |
| not to be byte-aligned. |
| |
| PR target/93673 |
| * config/i386/sse.md (k<code><mode>): Drop mode from last operand and |
| use const_0_to_255_operand predicate instead of immediate_operand. |
| (avx512dq_fpclass<mode><mask_scalar_merge_name>, |
| avx512dq_vmfpclass<mode><mask_scalar_merge_name>, |
| vgf2p8affineinvqb_<mode><mask_name>, |
| vgf2p8affineqb_<mode><mask_name>): Drop mode from |
| const_0_to_255_operand predicated operands. |
| |
| 2020-02-12 Jeff Law <law@redhat.com> |
| |
| * config/h8300/h8300.md (comparison shortening peepholes): Use |
| a mode iterator to merge the HImode and SImode peepholes. |
| |
| 2020-02-12 Jakub Jelinek <jakub@redhat.com> |
| |
| PR middle-end/93663 |
| * real.c (is_even): Make static. Function comment fix. |
| (is_halfway_below): Make static, don't assert R is not inf/nan, |
| instead return false for those. Small formatting fixes. |
| |
| 2020-02-12 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/93646 |
| * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename... |
| (handle_builtin_stxncpy_strncat): ...to this. Change first argument. |
| Issue only -Wstringop-overflow strncat, never -Wstringop-truncation. |
| (strlen_check_and_optimize_call): Adjust callee name. |
| |
| 2020-02-12 Jeff Law <law@redhat.com> |
| |
| * config/h8300/h8300.md (comparison shortening peepholes): Drop |
| (and (xor)) variant. Combine other two into single peephole. |
| |
| 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| PR rtl-optimization/93565 |
| * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs. |
| |
| 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| * config/aarch64/aarch64-simd.md |
| (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern. |
| * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of |
| generating separate ADDV and zero_extend patterns. |
| * config/aarch64/iterators.md (VDQV_E): New iterator. |
| |
| 2020-02-12 Jeff Law <law@redhat.com> |
| |
| * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns, |
| expanders, splits, etc. |
| (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise. |
| (stpcpy_internal_<mode>, stpcpy splitter): Likewise. |
| (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise. |
| * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function. |
| (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise |
| * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused |
| function prototype. |
| (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise. |
| |
| 2020-02-12 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93670 |
| * config/i386/sse.md (VI48F_256_DQ): New mode iterator. |
| (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove |
| TARGET_AVX512DQ from condition. |
| (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition> |
| instead of <mask_mode512bit_condition> in condition. If |
| TARGET_AVX512DQ is false, emit vextract*64x4 instead of |
| vextract*32x8. |
| (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition> |
| from condition. |
| |
| 2020-02-12 Kewen Lin <linkw@gcc.gnu.org> |
| |
| PR target/91052 |
| * ira.c (combine_and_move_insns): Skip multiple_sets def_insn. |
| |
| 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof |
| where strlen is more legible. |
| (rs6000_builtin_vectorized_libmass): Ditto. |
| (rs6000_print_options_internal): Ditto. |
| |
| 2020-02-11 Martin Sebor <msebor@redhat.com> |
| |
| PR tree-optimization/93683 |
| * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set. |
| |
| 2020-02-11 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/predicates.md (cint34_operand): Rename the |
| -mprefixed-addr option to be -mprefixed. |
| * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename |
| the -mprefixed-addr option to be -mprefixed. |
| (OTHER_FUTURE_MASKS): Likewise. |
| (POWERPC_MASKS): Likewise. |
| * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename |
| the -mprefixed-addr option to be -mprefixed. Change error |
| messages to refer to -mprefixed. |
| (num_insns_constant_gpr): Rename the -mprefixed-addr option to be |
| -mprefixed. |
| (rs6000_legitimate_offset_address_p): Likewise. |
| (rs6000_mode_dependent_address): Likewise. |
| (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be |
| "-mprefixed" for target attributes and pragmas. |
| (address_to_insn_form): Rename the -mprefixed-addr option to be |
| -mprefixed. |
| (rs6000_adjust_insn_length): Likewise. |
| * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the |
| -mprefixed-addr option to be -mprefixed. |
| (ASM_OUTPUT_OPCODE): Likewise. |
| * config/rs6000/rs6000.md (prefixed insn attribute): Rename the |
| -mprefixed-addr option to be -mprefixed. |
| * config/rs6000/rs6000.opt (-mprefixed): Rename the |
| -mprefixed-addr option to be prefixed. Change the option from |
| being undocumented to being documented. |
| * doc/invoke.texi (RS/6000 and PowerPC Options): Document the |
| -mprefixed option. Update the -mpcrel documentation to mention |
| -mprefixed. |
| |
| 2020-02-11 Hans-Peter Nilsson <hp@axis.com> |
| |
| * ira-conflicts.c (print_hard_reg_set): Correct output for sets |
| including FIRST_PSEUDO_REGISTER - 1. |
| * ira-color.c (print_hard_reg_set): Ditto. |
| |
| 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| |
| * config/arm/arm-builtins.c (enum arm_type_qualifiers): |
| (USTERNOP_QUALIFIERS): New define. |
| (USMAC_LANE_QUADTUP_QUALIFIERS): New define. |
| (SUMAC_LANE_QUADTUP_QUALIFIERS): New define. |
| (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX. |
| (arm_expand_builtin_1): Add qualifier_lane_quadtup_index. |
| * config/arm/arm_neon.h (vusdot_s32): New. |
| (vusdot_lane_s32): New. |
| (vusdotq_lane_s32): New. |
| (vsudot_lane_s32): New. |
| (vsudotq_lane_s32): New. |
| * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New. |
| * config/arm/iterators.md (DOTPROD_I8MM): New. |
| (sup, opsuffix): Add <us/su>. |
| * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New. |
| * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New. |
| |
| 2020-02-11 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93661 |
| PR tree-optimization/93662 |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard |
| tree_to_poly_int64. |
| * tree-sra.c (get_access_for_expr): Likewise. |
| |
| 2020-02-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93637 |
| * config/i386/sse.md (VI_256_AVX2): New mode iterator. |
| (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256. |
| Change condition from TARGET_AVX2 to TARGET_AVX. |
| |
| 2020-02-10 Iain Sandoe <iain@sandoe.co.uk> |
| |
| PR other/93641 |
| * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last |
| argument of strncmp. |
| |
| 2020-02-10 Hans-Peter Nilsson <hp@axis.com> |
| |
| Try to generate zero-based comparisons. |
| * config/cris/cris.c (cris_reduce_compare): New function. |
| * config/cris/cris-protos.h (cris_reduce_compare): Add prototype. |
| * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4") |
| (cstore<mode>4"): Apply cris_reduce_compare in expanders. |
| |
| 2020-02-10 Richard Earnshaw <rearnsha@arm.com> |
| |
| PR target/91913 |
| * config/arm/arm.md (movsi_compare0): Allow SP as a source register |
| in Thumb state and also as a destination in Arm state. Add T16 |
| variants. |
| |
| 2020-02-10 Hans-Peter Nilsson <hp@axis.com> |
| |
| * md.texi (Define Subst): Match closing paren in example. |
| |
| 2020-02-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/58218 |
| PR other/93641 |
| * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last |
| arguments of strncmp. |
| |
| 2020-02-10 Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR ipa/93203 |
| * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge |
| but different source value. |
| (adjust_callers_for_value_intersection): New function. |
| (gather_edges_for_value): Adjust order of callers to let a |
| non-self-recursive caller be the first element. |
| (self_recursive_pass_through_p): Add a new parameter "simple", and |
| check generalized self-recursive pass-through jump function. |
| (self_recursive_agg_pass_through_p): Likewise. |
| (find_more_scalar_values_for_callers_subset): Compute value from |
| pass-through jump function for self-recursive. |
| (intersect_with_plats): Cleanup previous implementation code for value |
| itersection with self-recursive call edge. |
| (intersect_with_agg_replacements): Likewise. |
| (intersect_aggregates_with_edge): Deduce value from pass-through jump |
| function for self-recursive call edge. Cleanup previous implementation |
| code for value intersection with self-recursive call edge. |
| (decide_whether_version_node): Remove dead callers and adjust order |
| to let a non-self-recursive caller be the first element. |
| |
| 2020-02-09 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * recog.c: Move pass_split_before_sched2 code in front of |
| pass_split_before_regstack. |
| (pass_data_split_before_sched2): Rename pass to split3 from split4. |
| (pass_data_split_before_regstack): Rename pass to split4 from split3. |
| (rest_of_handle_split_before_sched2): Remove. |
| (pass_split_before_sched2::execute): Unconditionally call |
| split_all_insns. |
| (enable_split_before_sched2): New function. |
| (pass_split_before_sched2::gate): Use enable_split_before_sched2. |
| (pass_split_before_regstack::gate): Ditto. |
| * config/nds32/nds32.c (nds32_split_double_word_load_store_p): |
| Update name check for renamed split4 pass. |
| * config/sh/sh.c (register_sh_passes): Update pass insertion |
| point for renamed split4 pass. |
| |
| 2020-02-09 Jakub Jelinek <jakub@redhat.com> |
| |
| * gimplify.c (gimplify_adjust_omp_clauses_1): Promote |
| DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid |
| copying them around between host and target. |
| |
| 2020-02-08 Andrew Pinski <apinski@marvell.com> |
| |
| PR target/91927 |
| * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check |
| STRICT_ALIGNMENT also. |
| |
| 2020-02-08 Jim Wilson <jimw@sifive.com> |
| |
| PR target/93532 |
| * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define. |
| |
| 2020-02-08 Uroš Bizjak <ubizjak@gmail.com> |
| Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/65782 |
| * config/i386/i386.h (CALL_USED_REGISTERS): Make |
| xmm16-xmm31 call-used even in 64-bit ms-abi. |
| |
| 2020-02-07 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry. |
| (simd_ummla, simd_usmmla): Likewise. |
| * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New. |
| * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New. |
| (vusmmlaq_s32): New. |
| |
| 2020-02-07 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/93519 |
| * tree-inline.c (fold_marked_statements): Do a PRE walk, |
| skipping unreachable regions. |
| (optimize_inline_calls): Skip folding stmts when we didn't |
| inline. |
| |
| 2020-02-07 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/85667 |
| * config/i386/i386.c (function_arg_ms_64): Add a type argument. |
| Don't return aggregates with only SFmode and DFmode in SSE |
| register. |
| (ix86_function_arg): Pass arg.type to function_arg_ms_64. |
| |
| 2020-02-07 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93122 |
| * config/rs6000/rs6000-logue.c |
| (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn, |
| if it fails, move rs into end_addr and retry. Add |
| REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or |
| the insn pattern doesn't describe well what exactly happens to |
| dwarf2cfi.c. |
| |
| PR target/93594 |
| * config/i386/predicates.md (avx_identity_operand): Remove. |
| * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove. |
| (avx_<castmode><avxsizesuffix>_<castmode>, |
| avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to |
| a VEC_CONCAT of the operand and UNSPEC_CAST. |
| (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to |
| a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with |
| UNSPEC_CAST. |
| |
| PR target/93611 |
| * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear |
| recog_data.insn if distance_non_agu_define changed it. |
| |
| 2020-02-06 Michael Meissner <meissner@linux.ibm.com> |
| |
| PR target/93569 |
| * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0 |
| we only had X-FORM (reg+reg) addressing for vectors. Also before |
| ISA 3.0, we only had X-FORM addressing for scalars in the |
| traditional Altivec registers. |
| |
| 2020-02-06 <zhongyunde@huawei.com> |
| Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR rtl-optimization/93561 |
| * lra-assigns.c (spill_for): Check that tested hard regno is not out of |
| hard register range. |
| |
| 2020-02-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type |
| attribute. |
| |
| 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case |
| where the low and the high 32 bits are equal to each other specially, |
| with an rldimi instruction. |
| |
| 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main. |
| |
| 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm-tables.opt: Regenerate. |
| |
| 2020-02-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/87763 |
| * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare. |
| * config/aarch64/aarch64.c (aarch64_movk_shift): New function. |
| * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern. |
| |
| 2020-02-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/87763 |
| * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern. |
| |
| 2020-02-06 Delia Burduv <delia.burduv@arm.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def |
| (bfmlaq): New built-in function. |
| (bfmlalb): New built-in function. |
| (bfmlalt): New built-in function. |
| (bfmlalb_lane): New built-in function. |
| (bfmlalt_lane): New built-in function. |
| * config/aarch64/aarch64-simd.md |
| (aarch64_bfmmlaqv4sf): New pattern. |
| (aarch64_bfmlal<bt>v4sf): New pattern. |
| (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern. |
| * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic. |
| (vbfmlalbq_f32): New intrinsic. |
| (vbfmlaltq_f32): New intrinsic. |
| (vbfmlalbq_lane_f32): New intrinsic. |
| (vbfmlaltq_lane_f32): New intrinsic. |
| (vbfmlalbq_laneq_f32): New intrinsic. |
| (vbfmlaltq_laneq_f32): New intrinsic. |
| * config/aarch64/iterators.md (BF_MLA): New int iterator. |
| (bt): New int attribute. |
| |
| 2020-02-06 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (*pushtf): Emit "#" instead of |
| calling gcc_unreachable in insn output. |
| (*pushxf): Ditto. |
| (*pushdf): Ditto. |
| (*pushsf_rex64): Ditto for alternatives other than 1. |
| (*pushsf): Ditto for alternatives other than 1. |
| |
| 2020-02-06 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/91971 |
| PR gcov-profile/93466 |
| * coverage.c (coverage_init): Revert mangling of |
| path into filename. It can lead to huge filename length. |
| Creation of subfolders seem more natural. |
| |
| 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| |
| PR target/93300 |
| * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New. |
| (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs. |
| Use arm_block_arith_comp_libfuncs_for_mode for HFmode. |
| |
| 2020-02-06 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93594 |
| * config/i386/predicates.md (avx_identity_operand): New predicate. |
| * config/i386/sse.md (*avx_vec_concat<mode>_1): New |
| define_insn_and_split. |
| |
| PR libgomp/93515 |
| * omp-low.c (use_pointer_for_field): For nested constructs, also |
| look for map clauses on target construct. |
| (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily |
| taskreg_nesting_level. |
| |
| PR libgomp/93515 |
| * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding |
| shared clause, call omp_notice_variable on outer context if any. |
| |
| 2020-02-05 Jason Merrill <jason@redhat.com> |
| |
| PR c++/92003 |
| * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has |
| non-zero address even if weak and not yet defined. |
| |
| 2020-02-05 Martin Sebor <msebor@redhat.com> |
| |
| PR tree-optimization/92765 |
| * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL. |
| * tree-ssa-strlen.c (compute_string_length): Remove. |
| (determine_min_objsize): Remove. |
| (get_len_or_size): Add an argument. Call get_range_strlen_dynamic. |
| Avoid using type size as the upper bound on string length. |
| (handle_builtin_string_cmp): Add an argument. Adjust. |
| (strlen_check_and_optimize_call): Pass additional argument to |
| handle_builtin_string_cmp. |
| |
| 2020-02-05 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove. |
| (*pushdi2_rex64 peephole2): Unconditionally split after |
| epilogue_completed. |
| (*ashl<mode>3_doubleword): Ditto. |
| (*<shift_insn><mode>3_doubleword): Ditto. |
| |
| 2020-02-05 Michael Meissner <meissner@linux.ibm.com> |
| |
| PR target/93568 |
| * config/rs6000/rs6000.c (get_vector_offset): Fix |
| |
| 2020-02-05 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space. |
| |
| 2020-02-05 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/analyzer.texi |
| (Special Functions for Debugging the Analyzer): Update description |
| of __analyzer_dump_exploded_nodes. |
| |
| 2020-02-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/92190 |
| * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only |
| include sets and not clobbers in the vzeroupper pattern. |
| * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that |
| the parallel has 17 (64-bit) or 9 (32-bit) elts. |
| (*avx_vzeroupper_1): New define_insn_and_split. |
| |
| PR target/92190 |
| * recog.c (pass_split_after_reload::gate): For STACK_REGS targets, |
| don't run when !optimize. |
| (pass_split_before_regstack::gate): For STACK_REGS targets, run even |
| when !optimize. |
| |
| 2020-02-05 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/90648 |
| * genmatch.c (dt_node::gen_kids_1): Emit number of argument |
| checks before matching calls. |
| |
| 2020-02-05 Jakub Jelinek <jakub@redhat.com> |
| |
| * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up |
| function comment typo. |
| |
| PR middle-end/93555 |
| * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or |
| simd_clone_create failed when i == 0, adjust clone->nargs by |
| clone->inbranch. |
| |
| 2020-02-05 Martin Liska <mliska@suse.cz> |
| |
| PR c++/92717 |
| * doc/invoke.texi: Document that one should |
| not combine ASLR and -fpch. |
| |
| 2020-02-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93538 |
| * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr. |
| |
| 2020-02-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/91123 |
| * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method. |
| (vn_walk_cb_data::last_vuse): New member. |
| (vn_walk_cb_data::saved_operands): Likewsie. |
| (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands. |
| (vn_walk_cb_data::push_partial_def): Use finish. |
| (vn_reference_lookup_2): Update last_vuse and use finish if |
| we've saved operands. |
| (vn_reference_lookup_3): Use finish and update calls to |
| push_partial_defs everywhere. When translating through |
| memcpy or aggregate copies save off operands and alias-set. |
| (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE |
| operation for redundant store removal. |
| |
| 2020-02-04 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/92819 |
| * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid |
| generating more stmts than before. |
| |
| 2020-02-04 Martin Liska <mliska@suse.cz> |
| |
| * config/arm/arm.c (arm_gen_far_branch): Move the function |
| outside of selftests. |
| |
| 2020-02-03 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper |
| function to adjust PC-relative vector addresses. |
| (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to |
| handle vectors with PC-relative addresses. |
| |
| 2020-02-03 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward |
| reference. |
| (hard_reg_and_mode_to_addr_mask): Delete. |
| (rs6000_adjust_vec_address): If the original vector address |
| was REG+REG or REG+OFFSET and the element is not zero, do the add |
| of the elements in the original address before adding the offset |
| for the vector element. Use address_to_insn_form to validate the |
| address using the register being loaded, rather than guessing |
| whether the address is a DS-FORM or DQ-FORM address. |
| |
| 2020-02-03 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (get_vector_offset): New helper function |
| to calculate the offset in memory from the start of a vector of a |
| particular element. Add code to keep the element number in |
| bounds if the element number is variable. |
| (rs6000_adjust_vec_address): Move calculation of offset of the |
| vector element to get_vector_offset. |
| (rs6000_split_vec_extract_var): Do not do the initial AND of |
| element here, move the code to get_vector_offset. |
| |
| 2020-02-03 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some |
| gcc_asserts. |
| |
| 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org> |
| |
| * config/rs6000/constraints.md: Improve documentation. |
| |
| 2020-02-03 Richard Earnshaw <rearnsha@arm.com> |
| |
| PR target/93548 |
| * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md) |
| ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change. |
| |
| 2020-02-03 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config.gcc: Remove "carrizo" support. |
| * config/gcn/gcn-opts.h (processor_type): Likewise. |
| * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise. |
| * config/gcn/gcn.opt (gpu_type): Likewise. |
| * config/gcn/t-omp-device: Likewise. |
| |
| 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| |
| PR target/91816 |
| * config/arm/arm-protos.h: New function arm_gen_far_branch prototype. |
| * config/arm/arm.c (arm_gen_far_branch): New function |
| arm_gen_far_branch. |
| * config/arm/arm.md: Update b<cond> for Thumb2 range checks. |
| |
| 2020-02-03 Julian Brown <julian@codesourcery.com> |
| Tobias Burnus <tobias@codesourcery.com> |
| |
| * doc/invoke.texi: Update mention of OpenACC version to 2.6. |
| |
| 2020-02-03 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93533 |
| * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit |
| valid RTL to sum up the lowest and second lowest bytes of the popcnt |
| result. |
| |
| 2020-02-02 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR rtl-optimization/91333 |
| * ira-color.c (struct allocno_color_data): Add member |
| hard_reg_prefs. |
| (init_allocno_threads): Set the member up. |
| (bucket_allocno_compare_func): Add compare hard reg |
| prefs. |
| |
| 2020-01-31 Sandra Loosemore <sandra@codesourcery.com> |
| |
| nios2: Support for GOT-relative DW_EH_PE_datarel encoding. |
| |
| * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION. |
| * config.in: Regenerated. |
| * configure: Regenerated. |
| * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling |
| for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION. |
| (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New. |
| |
| 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com> |
| |
| * configure: Regenerate. |
| |
| 2020-01-31 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR rtl-optimization/91333 |
| * ira-color.c (bucket_allocno_compare_func): Move conflict hard |
| reg preferences comparison up. |
| |
| 2020-01-31 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro. |
| * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to |
| aarch64-sve-builtins-base.h. |
| * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to |
| aarch64-sve-builtins-base.cc. |
| * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane) |
| (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla) |
| (svcvtnt): Declare. |
| * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane) |
| (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla) |
| (svcvtnt): New functions. |
| * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane) |
| (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla) |
| (svcvtnt): New functions. |
| (svcvt): Add a form that converts f32 to bf16. |
| * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat) |
| (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n): |
| Declare. |
| * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type): |
| Treat B as bfloat16_t. |
| (ternary_bfloat_lane_base): New class. |
| (ternary_bfloat_def): Likewise. |
| (ternary_bfloat): New shape. |
| (ternary_bfloat_lane_def): New class. |
| (ternary_bfloat_lane): New shape. |
| (ternary_bfloat_lanex2_def): New class. |
| (ternary_bfloat_lanex2): New shape. |
| (ternary_bfloat_opt_n_def): New class. |
| (ternary_bfloat_opt_n): New shape. |
| * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro. |
| * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf) |
| (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns. |
| (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>) |
| (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise. |
| (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise. |
| (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise. |
| * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key |
| the pattern off the narrow mode instead of the wider one. |
| * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator. |
| (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs. |
| (sve_fp_op): Handle them. |
| (SVE_BFLOAT_TERNARY_LONG): New int itertor. |
| (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise. |
| |
| 2020-01-31 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/arm_sve.h: Include arm_bf16.h. |
| * config/aarch64/aarch64-modes.def (BF): Move definition before |
| VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF. |
| (SVE_MODES): Handle BF modes. |
| * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle |
| BF modes. |
| (aarch64_full_sve_mode): Likewise. |
| * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF |
| and VNx32BF. |
| (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF. |
| (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore) |
| (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count) |
| (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the |
| new SVE BF modes. |
| * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New |
| type_class_index. |
| * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro. |
| (TYPES_all_data): Add bf16. |
| (TYPES_reinterpret1, TYPES_reinterpret): Likewise. |
| (register_tuple_type): Increase buffer size. |
| * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type. |
| (bf16): New type suffix. |
| * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv) |
| (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax) |
| (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr): |
| Change type from all_data to all_arith. |
| * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp) |
| (svminp): Likewise. |
| |
| 2020-01-31 Dennis Zhang <dennis.zhang@arm.com> |
| Matthew Malcomson <matthew.malcomson@arm.com> |
| Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/invoke.texi (f32mm): Document new AArch64 -march= extension. |
| * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define |
| __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and |
| __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define |
| __ARM_FEATURE_MATMUL_FP64. |
| * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16) |
| (sve): Add AARCH64_FL_F32MM to the list of extensions that should |
| be disabled at the same time. |
| (f32mm): New extension. |
| * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro. |
| (AARCH64_FL_F64MM): Bump to the next bit up. |
| (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM) |
| (TARGET_SVE_F64MM): New macros. |
| * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator. |
| (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL) |
| (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q) |
| (UNSPEC_ZIP2Q): New unspeccs. |
| (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators. |
| (optab, sur, perm_insn): Handle the new unspecs. |
| (sve_fp_op): Handle UNSPEC_FMMLA. Resort. |
| * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use |
| TARGET_SVE_F64MM instead of separate tests. |
| (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern. |
| (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise. |
| (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise. |
| (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise. |
| (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise. |
| * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro. |
| (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it. |
| (TYPES_s_signed): New macro. |
| (TYPES_s_integer): Use it. |
| (TYPES_d_float): New macro. |
| (TYPES_d_data): Use it. |
| * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare. |
| (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq) |
| (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise. |
| * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class. |
| (svmmla): New shape. |
| (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3 |
| template parameters. |
| (ternary_resize2_lane_base): Likewise. |
| (ternary_resize2_base): New class. |
| (ternary_qq_lane_base): Likewise. |
| (ternary_intq_uintq_lane_def): Likewise. |
| (ternary_intq_uintq_lane): New shape. |
| (ternary_intq_uintq_opt_n_def): New class |
| (ternary_intq_uintq_opt_n): New shape. |
| (ternary_qq_lane_def): Inherit from ternary_qq_lane_base. |
| (ternary_uintq_intq_def): New class. |
| (ternary_uintq_intq): New shape. |
| (ternary_uintq_intq_lane_def): New class. |
| (ternary_uintq_intq_lane): New shape. |
| (ternary_uintq_intq_opt_n_def): New class. |
| (ternary_uintq_intq_opt_n): New shape. |
| * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot) |
| (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla) |
| (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare. |
| * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl): |
| Generalize to... |
| (svdotprod_lane_impl): ...this new class. |
| (svmmla_impl, svusdot_impl): New classes. |
| (svdot_lane): Update to use svdotprod_lane_impl. |
| (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot) |
| (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New |
| functions. |
| * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base |
| function, with no types defined. |
| (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New |
| AARCH64_FL_I8MM functions. |
| (svmmla): New AARCH64_FL_F32MM function. |
| (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6. |
| (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New |
| AARCH64_FL_F64MM function. |
| (REQUIRED_EXTENSIONS): |
| |
| 2020-01-31 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each |
| alternative only. |
| |
| 2020-01-31 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (*movoi_internal_avx): Do not check for |
| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling. |
| (*movti_internal): Do not check for |
| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. |
| (*movtf_internal): Move check for TARGET_SSE2 and size optimization |
| just after check for TARGET_AVX. |
| (*movdf_internal): Ditto. |
| * config/i386/mmx.md (*mov<mode>_internal): Do not check for |
| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. |
| * config/i386/sse.md (mov<mode>_internal): Only check |
| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check |
| for TARGET_SSE2 and size optimization just after check for TARGET_AVX. |
| (<sse>_andnot<mode>3<mask_name>): Move check for |
| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX. |
| (<code><mode>3<mask_name>): Ditto. |
| (*andnot<mode>3): Ditto. |
| (*andnottf3): Ditto. |
| (*<code><mode>3): Ditto. |
| (*<code>tf3): Ditto. |
| (*andnot<VI:mode>3): Remove |
| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling. |
| (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto. |
| (*<code><VI12_AVX_AVX512F:mode>3): Ditto. |
| (sse4_1_blendv<ssemodesuffix>): Ditto. |
| * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): |
| Explain that tune applies to 128bit instructions only. |
| |
| 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com> |
| |
| * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count |
| to definition of hsa_kernel_description. Parse assembly to find SGPR |
| and VGPR count of kernel and store in hsa_kernel_description. |
| |
| 2020-01-31 Tamar Christina <tamar.christina@arm.com> |
| |
| PR rtl-optimization/91838 |
| * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case |
| to truncate if allowed or reject combination. |
| |
| 2020-01-31 Andrew Stubbs <ams@codesourcery.com> |
| |
| * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step. |
| (find_inv_vars_cb): Likewise. |
| |
| 2020-01-31 David Malcolm <dmalcolm@redhat.com> |
| |
| * calls.c (special_function_p): Split out the check for DECL_NAME |
| being non-NULL and fndecl being extern at file scope into a |
| new maybe_special_function_p and call it. Drop check for fndecl |
| being non-NULL that was after a usage of DECL_NAME (fndecl). |
| * tree.h (maybe_special_function_p): New inline function. |
| |
| 2020-01-30 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ... |
| (mask_gather_load<mode>): ... here, and zero-initialize the |
| destination. |
| (maskload<mode>di): Zero-initialize the destination. |
| * config/gcn/gcn.c: |
| |
| 2020-01-30 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/93356 |
| * doc/analyzer.texi (Limitations): Note that constraints on |
| floating-point values are currently ignored. |
| |
| 2020-01-30 Jakub Jelinek <jakub@redhat.com> |
| |
| PR lto/93384 |
| * symtab.c (symtab_node::noninterposable_alias): If localalias |
| already exists, but is not usable, append numbers after it until |
| a unique name is found. Formatting fix. |
| |
| PR middle-end/93505 |
| * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range |
| rotate counts. |
| |
| 2020-01-30 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.c (print_operand): Handle LTGT. |
| * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt. |
| |
| 2020-01-30 Richard Biener <rguenther@suse.de> |
| |
| * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST |
| and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE. |
| |
| 2020-01-30 John David Anglin <danglin@gcc.gnu.org> |
| |
| * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers |
| without a DECL in .data.rel.ro.local. |
| |
| 2020-01-30 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93494 |
| * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4 |
| returned. |
| |
| PR target/91824 |
| * config/i386/sse.md |
| (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ... |
| (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use |
| any_extend code iterator instead of always zero_extend. |
| (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ... |
| (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this. |
| Use any_extend code iterator instead of always zero_extend. |
| (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ... |
| (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this. |
| Use any_extend code iterator instead of always zero_extend. |
| (*sse2_pmovmskb_ext): New define_insn. |
| (*sse2_pmovmskb_ext_lt): New define_insn_and_split. |
| |
| PR target/91824 |
| * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split. |
| (*popcountsi2_zext_falsedep): New define_insn. |
| |
| 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com> |
| |
| * config.in: Regenerated. |
| * configure: Regenerated. |
| |
| 2020-01-29 Tobias Burnus <tobias@codesourcery.com> |
| |
| PR bootstrap/93409 |
| * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as |
| LLVM's assembler changed the default in version 9. |
| |
| 2020-01-24 Jeff Law <law@redhat.com> |
| |
| PR tree-optimization/89689 |
| * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure. |
| |
| 2020-01-29 Richard Sandiford <richard.sandiford@arm.com> |
| |
| Revert: |
| |
| 2020-01-28 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/87763 |
| * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract |
| simplification to handle subregs as well as bare regs. |
| * config/i386/i386.md (*testqi_ext_3): Match QI extracts too. |
| |
| 2020-01-29 Joel Hutton <Joel.Hutton@arm.com> |
| |
| PR target/93221 |
| * ira.c (ira): Revert use of simplified LRA algorithm. |
| |
| 2020-01-29 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/92706 |
| * tree-sra.c (struct access): Fields first_link, last_link, |
| next_queued and grp_queued renamed to first_rhs_link, last_rhs_link, |
| next_rhs_queued and grp_rhs_queued respectively, new fields |
| first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued. |
| (struct assign_link): Field next renamed to next_rhs, new field |
| next_lhs. Updated comment. |
| (work_queue_head): Renamed to rhs_work_queue_head. |
| (lhs_work_queue_head): New variable. |
| (add_link_to_lhs): New function. |
| (relink_to_new_repr): Also relink LHS lists. |
| (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue. |
| (add_access_to_lhs_work_queue): New function. |
| (pop_access_from_work_queue): Renamed to |
| pop_access_from_rhs_work_queue. |
| (pop_access_from_lhs_work_queue): New function. |
| (build_accesses_from_assign): Also add links to LHS lists and to LHS |
| work_queue. |
| (child_would_conflict_in_lacc): Renamed to |
| child_would_conflict_in_acc. Adjusted parameter names. |
| (create_artificial_child_access): New parameter set_grp_read, use it. |
| (subtree_mark_written_and_enqueue): Renamed to |
| subtree_mark_written_and_rhs_enqueue. |
| (propagate_subaccesses_across_link): Renamed to |
| propagate_subaccesses_from_rhs. |
| (propagate_subaccesses_from_lhs): New function. |
| (propagate_all_subaccesses): Also propagate subaccesses from LHSs to |
| RHSs. |
| |
| 2020-01-29 Martin Jambor <mjambor@suse.cz> |
| |
| PR tree-optimization/92706 |
| * tree-sra.c (struct access): Adjust comment of |
| grp_total_scalarization. |
| (find_access_in_subtree): Look for single children spanning an entire |
| access. |
| (scalarizable_type_p): Allow register accesses, adjust callers. |
| (completely_scalarize): Remove function. |
| (scalarize_elem): Likewise. |
| (create_total_scalarization_access): Likewise. |
| (sort_and_splice_var_accesses): Do not track total scalarization |
| flags. |
| (analyze_access_subtree): New parameter totally, adjust to new meaning |
| of grp_total_scalarization. |
| (analyze_access_trees): Pass new parameter to analyze_access_subtree. |
| (can_totally_scalarize_forest_p): New function. |
| (create_total_scalarization_access): Likewise. |
| (create_total_access_and_reshape): Likewise. |
| (total_should_skip_creating_access): Likewise. |
| (totally_scalarize_subtree): Likewise. |
| (analyze_all_variable_accesses): Perform total scalarization after |
| subaccess propagation using the new functions above. |
| (initialize_constant_pool_replacements): Output initializers by |
| traversing the access tree. |
| |
| 2020-01-29 Martin Jambor <mjambor@suse.cz> |
| |
| * tree-sra.c (verify_sra_access_forest): New function. |
| (verify_all_sra_access_forests): Likewise. |
| (create_artificial_child_access): Set parent. |
| (analyze_all_variable_accesses): Call the verifier. |
| |
| 2020-01-28 Jan Hubicka <hubicka@ucw.cz> |
| |
| * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge |
| if called on indirect edge. |
| (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of |
| speculative call if needed. |
| |
| 2020-01-29 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93428 |
| * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load |
| permutation when the load node is created. |
| (vect_analyze_slp_instance): Re-use it here. |
| |
| 2020-01-28 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning. |
| |
| 2020-01-28 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR rtl-optimization/93272 |
| * ira-lives.c (process_out_of_region_eh_regs): New function. |
| (process_bb_node_lives): Call it. |
| |
| 2020-01-28 Jan Hubicka <hubicka@ucw.cz> |
| |
| * coverage.c (read_counts_file): Make error message lowercase. |
| |
| 2020-01-28 Jan Hubicka <hubicka@ucw.cz> |
| |
| * profile-count.c (profile_quality_display_names): Fix ordering. |
| |
| 2020-01-28 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR lto/93318 |
| * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site |
| hash only when edge is first within the sequence. |
| (cgraph_edge::set_call_stmt): Update handling of speculative calls. |
| (symbol_table::create_edge): Do not set target_prob. |
| (cgraph_edge::remove_caller): Watch for speculative calls when updating |
| the call site hash. |
| (cgraph_edge::make_speculative): Drop target_prob parameter. |
| (cgraph_edge::speculative_call_info): Remove. |
| (cgraph_edge::first_speculative_call_target): New member function. |
| (update_call_stmt_hash_for_removing_direct_edge): New function. |
| (cgraph_edge::resolve_speculation): Rewrite to new API. |
| (cgraph_edge::speculative_call_for_target): New member function. |
| (cgraph_edge::make_direct): Rewrite to new API; fix handling of |
| multiple speculation targets. |
| (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating |
| of profile. |
| (verify_speculative_call): Verify that targets form an interval. |
| * cgraph.h (cgraph_edge::speculative_call_info): Remove. |
| (cgraph_edge::first_speculative_call_target): New member function. |
| (cgraph_edge::next_speculative_call_target): New member function. |
| (cgraph_edge::speculative_call_target_ref): New member function. |
| (cgraph_edge;:speculative_call_indirect_edge): New member funtion. |
| (cgraph_edge): Remove target_prob. |
| * cgraphclones.c (cgraph_node::set_call_stmt_including_clones): |
| Fix handling of speculative calls. |
| * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals. |
| * ipa-fnsummary.c (analyze_function_body): Likewise. |
| * ipa-inline.c (speculation_useful_p): Use new speculative call API. |
| * ipa-profile.c (dump_histogram): Fix formating. |
| (ipa_profile_generate_summary): Watch for overflows. |
| (ipa_profile): Do not require probablity to be 1/2; update to new API. |
| * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API. |
| (update_indirect_edges_after_inlining): Update to new API. |
| * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call |
| profiles. |
| * profile-count.h: (profile_probability::adjusted): New. |
| * tree-inline.c (copy_bb): Update to new speculative call API; fix |
| updating of profile. |
| * value-prof.c (gimple_ic_transform): Rename to ... |
| (dump_ic_profile): ... this one; update dumping. |
| (stream_in_histogram_value): Fix formating. |
| (gimple_value_profile_transformations): Update. |
| |
| 2020-01-28 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/91461 |
| * config/i386/i386.md (*movoi_internal_avx): Remove |
| TARGET_SSE_TYPELESS_STORES check. |
| (*movti_internal): Prefer TARGET_AVX over |
| TARGET_SSE_TYPELESS_STORES. |
| (*movtf_internal): Likewise. |
| * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over |
| TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check |
| from TARGET_SSE_TYPELESS_STORES. |
| |
| 2020-01-28 David Malcolm <dmalcolm@redhat.com> |
| |
| * diagnostic-core.h (warning_at): Rename overload to... |
| (warning_meta): ...this. |
| (emit_diagnostic_valist): Delete decl of overload taking |
| diagnostic_metadata. |
| * diagnostic.c (emit_diagnostic_valist): Likewise for defn. |
| (warning_at): Rename overload taking diagnostic_metadata to... |
| (warning_meta): ...this. |
| |
| 2020-01-28 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93439 |
| * tree-parloops.c (create_loop_fn): Move clique bookkeeping... |
| * tree-cfg.c (move_sese_region_to_fn): ... here. |
| (verify_types_in_gimple_reference): Verify used cliques are |
| tracked. |
| |
| 2020-01-28 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/91399 |
| * config/i386/i386-options.c (set_ix86_tune_features): Add an |
| argument of a pointer to struct gcc_options and pass it to |
| parse_mtune_ctrl_str. |
| (ix86_function_specific_restore): Pass opts to |
| set_ix86_tune_features. |
| (ix86_option_override_internal): Likewise. |
| (parse_mtune_ctrl_str): Add an argument of a pointer to struct |
| gcc_options and use it for x_ix86_tune_ctrl_string. |
| |
| 2020-01-28 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/87763 |
| * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract |
| simplification to handle subregs as well as bare regs. |
| * config/i386/i386.md (*testqi_ext_3): Match QI extracts too. |
| |
| 2020-01-28 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-vect-loop.c (vectorizable_reduction): Fail gracefully |
| for reduction chains that (now) include a call. |
| |
| 2020-01-28 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/92822 |
| * tree-ssa-forwprop.c (simplify_vector_constructor): When filling |
| out the don't-care elements of a vector whose significant elements |
| are duplicates, make the don't-care elements duplicates too. |
| |
| 2020-01-28 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/93434 |
| * tree-predcom.c (split_data_refs_to_components): Record which |
| components have had aliasing loads removed. Prevent store-store |
| commoning for all such components. |
| |
| 2020-01-28 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93418 |
| * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not |
| -1 or is_vshift is true, use new_vector with number of elts npatterns |
| rather than new_unary_operation. |
| |
| PR tree-optimization/93454 |
| * gimple-fold.c (fold_array_ctor_reference): Perform |
| elt_size.to_uhwi () just once, instead of calling it in every |
| iteration. Punt if that value is above size of the temporary |
| buffer. Decrease third native_encode_expr argument when |
| bufoff + elt_sz is above size of buf. |
| |
| 2020-01-27 Joseph Myers <joseph@codesourcery.com> |
| |
| * config/mips/mips.c (mips_declare_object_name) |
| [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object. |
| |
| 2020-01-27 Martin Liska <mliska@suse.cz> |
| |
| PR gcov-profile/93403 |
| * tree-profile.c (gimple_init_gcov_profiler): Generate |
| both __gcov_indirect_call_profiler_v4 and |
| __gcov_indirect_call_profiler_v4_atomic. |
| |
| 2020-01-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/92822 |
| * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New |
| expander. |
| (@aarch64_split_simd_mov<mode>): Use it. |
| (aarch64_simd_mov_from_<mode>low): Add a GPR alternative. |
| Leave the vec_extract patterns to handle 2-element vectors. |
| (aarch64_simd_mov_from_<mode>high): Likewise. |
| (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander. |
| (vec_extractv2dfv1df): Likewise. |
| |
| 2020-01-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match |
| jump conditions for *compare_condjump<GPI:mode>. |
| |
| 2020-01-27 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/93276 |
| * digraph.cc (test_edge::test_edge): Specify template for base |
| class initializer. |
| |
| 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc.c (arc_rtx_costs): Update mul64 cost. |
| |
| 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com> |
| |
| * config/arc/arc-protos.h (gen_mlo): Remove. |
| (gen_mhi): Likewise. |
| * config/arc/arc.c (AUX_MULHI): Define. |
| (arc_must_save_reister): Special handling for r58/59. |
| (arc_compute_frame_size): Consider mlo/mhi registers. |
| (arc_save_callee_saves): Emit fp/sp move only when emit_move |
| paramter is true. |
| (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from |
| mlo/mhi name selection. |
| (arc_restore_callee_saves): Don't early restore blink when ISR. |
| (arc_expand_prologue): Add mlo/mhi saving. |
| (arc_expand_epilogue): Add mlo/mhi restoring. |
| (gen_mlo): Remove. |
| (gen_mhi): Remove. |
| * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register |
| numbering when MUL64 option is used. |
| (DWARF2_FRAME_REG_OUT): Define. |
| * config/arc/arc.md (arc600_stall): New pattern. |
| (VUNSPEC_ARC_ARC600_STALL): Define. |
| (mulsi64): Use correct mlo/mhi registers. |
| (mulsi_600): Clean it up. |
| * config/arc/predicates.md (mlo_operand): Remove any dependency on |
| TARGET_BIG_ENDIAN. |
| (mhi_operand): Likewise. |
| |
| 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com> |
| Petro Karashchenko <petro.karashchenko@ring.com> |
| |
| * config/arc/arc.c (arc_is_uncached_mem_p): Check struct |
| attributes if needed. |
| (prepare_move_operands): Generate special unspec instruction for |
| direct access. |
| (arc_isuncached_mem_p): Propagate uncached attribute to each |
| structure member. |
| * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define. |
| (VUNSPEC_ARC_STDI): Likewise. |
| (ALLI): New mode iterator. |
| (mALLI): New mode attribute. |
| (lddi): New instruction pattern. |
| (stdi): Likewise. |
| (stdidi_split): Split instruction for architectures which are not |
| supporting ll64 option. |
| (lddidi_split): Likewise. |
| |
| 2020-01-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/92989 |
| * lra-lives.c (process_bb_lives): Update the live-in set before |
| processing additional clobbers. |
| |
| 2020-01-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/93170 |
| * cselib.c (cselib_invalidate_regno_val): New function, split out |
| from... |
| (cselib_invalidate_regno): ...here. |
| (cselib_invalidated_by_call_p): New function. |
| (cselib_process_insn): Iterate over all the hard-register entries in |
| REG_VALUES and invalidate any that cross call-clobbered registers. |
| |
| 2020-01-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * dojump.c (split_comparison): Use HONOR_NANS rather than |
| HONOR_SNANS when splitting LTGT. |
| |
| 2020-01-27 Martin Liska <mliska@suse.cz> |
| |
| PR driver/91220 |
| * opts.c (print_filtered_help): Exclude language-specific |
| options from --help=common unless enabled in all FEs. |
| |
| 2020-01-27 Martin Liska <mliska@suse.cz> |
| |
| * opts.c (print_help): Exclude params from |
| all except --help=param. |
| |
| 2020-01-27 Martin Liska <mliska@suse.cz> |
| |
| PR target/93274 |
| * config/i386/i386-features.c (make_resolver_func): |
| Align the code with ppc64 target implementation. |
| Do not generate a unique name for resolver function. |
| |
| 2020-01-27 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93397 |
| * tree-vect-slp.c (vect_analyze_slp_instance): Delay |
| converted reduction chain SLP graph adjustment. |
| |
| 2020-01-26 Marek Polacek <polacek@redhat.com> |
| |
| PR sanitizer/93436 |
| * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on |
| null DECL_NAME. |
| |
| 2020-01-26 Jason Merrill <jason@redhat.com> |
| |
| PR c++/92601 |
| * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING |
| of complete types. |
| |
| 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com> |
| |
| * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint |
| (rx_setmem): Likewise. |
| |
| 2020-01-26 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93412 |
| * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword): |
| Use nonimmediate_operand instead of x86_64_hilo_general_operand and |
| drop <di> from constraint of last operand. |
| |
| PR target/93430 |
| * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for |
| TARGET_AVX2 and V4DFmode not in the split condition, but in the |
| pattern condition, though allow { 0, 0, 0, 0 } broadcast always. |
| |
| 2020-01-25 Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR ipa/93166 |
| * ipa-cp.c (get_info_about_necessary_edges): Remove value |
| check assertion. |
| |
| 2020-01-24 Jeff Law <law@redhat.com> |
| |
| PR tree-optimization/92788 |
| * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX |
| not EDGE_ABNORMAL. |
| |
| 2020-01-24 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93395 |
| * config/i386/sse.md (*avx_vperm_broadcast_v4sf, |
| *avx_vperm_broadcast_<mode>, |
| <sse2_avx_avx512f>_vpermil<mode><mask_name>, |
| *<sse2_avx_avx512f>_vpermilp<mode><mask_name>): |
| Move before avx2_perm<mode>/avx512f_perm<mode>. |
| |
| PR target/93376 |
| * simplify-rtx.c (simplify_const_unary_operation, |
| simplify_const_binary_operation): Punt for mode precision above |
| MAX_BITSIZE_MODE_ANY_INT. |
| |
| 2020-01-24 Andrew Pinski <apinski@marvell.com> |
| |
| * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change |
| alu.shift_reg to 0. |
| |
| 2020-01-24 Jeff Law <law@redhat.com> |
| |
| PR target/13721 |
| * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg |
| for REGs. Call output_operand_lossage to get more reasonable |
| diagnostics. |
| |
| 2020-01-24 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use |
| gcn_fp_compare_operator. |
| (vec_cmpu<mode>di): Use gcn_compare_operator. |
| (vec_cmp<u>v64qidi): Use gcn_compare_operator. |
| (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator. |
| (vec_cmpu<mode>di_exec): Use gcn_compare_operator. |
| (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator. |
| (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator. |
| (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator. |
| (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use |
| gcn_fp_compare_operator. |
| (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use |
| gcn_fp_compare_operator. |
| (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use |
| gcn_fp_compare_operator. |
| (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use |
| gcn_fp_compare_operator. |
| |
| 2020-01-24 Maciej W. Rozycki <macro@wdc.com> |
| |
| * doc/install.texi (Cross-Compiler-Specific Options): Document |
| `--with-toolexeclibdir' option. |
| |
| 2020-01-24 Hans-Peter Nilsson <hp@axis.com> |
| |
| * target.def (flags_regnum): Also mention effect on delay slot filling. |
| * doc/tm.texi: Regenerate. |
| |
| 2020-01-23 Jeff Law <law@redhat.com> |
| |
| PR translation/90162 |
| * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text. |
| |
| 2020-01-23 Mikael Tillenius <mti-1@tillenius.com> |
| |
| PR target/92269 |
| * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of |
| profiling label |
| |
| 2020-01-23 Jakub Jelinek <jakub@redhat.com> |
| |
| PR rtl-optimization/93402 |
| * postreload.c (reload_combine_recognize_pattern): Don't try to adjust |
| USE insns. |
| |
| 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com> |
| |
| * config.in: Regenerated. |
| * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1 |
| for TARGET_LIBC_GNUSTACK. |
| * configure: Regenerated. |
| * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is |
| found to be 2.31 or greater. |
| |
| 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com> |
| |
| * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to |
| TARGET_SOFT_FLOAT. |
| * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ... |
| (mips_asm_file_end): New function. Delegate to |
| file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true. |
| * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0. |
| |
| 2020-01-23 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93376 |
| * config/i386/i386-modes.def (POImode): New mode. |
| (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160. |
| * config/i386/i386.md (DPWI): New mode attribute. |
| (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>. |
| (QWI): Rename to... |
| (QPWI): ... this. Use POI instead of OI for TImode. |
| (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1, |
| *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI> |
| instead of <QWI>. |
| |
| 2020-01-23 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/93341 |
| * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New |
| unspec. |
| (speculation_tracker_rev): New pattern. |
| * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation): |
| Use speculation_tracker_rev to track the inverse condition. |
| |
| 2020-01-23 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93381 |
| * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take |
| alias-set of the def as argument and record the first one. |
| (vn_walk_cb_data::first_set): New member. |
| (vn_reference_lookup_3): Pass the alias-set of the current def |
| to push_partial_def. Fix alias-set used in the aggregate copy |
| case. |
| (vn_reference_lookup): Consistently set *last_vuse_ptr. |
| * real.c (clear_significand_below): Fix out-of-bound access. |
| |
| 2020-01-23 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93346 |
| * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3): |
| New define_insn patterns. |
| |
| 2020-01-23 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/sourcebuild.texi (check-function-bodies): Add an |
| optional target/xfail selector. |
| |
| 2020-01-23 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR rtl-optimization/93124 |
| * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to |
| bare USE and CLOBBER insns. |
| |
| 2020-01-22 Andrew Pinski <apinski@marvell.com> |
| |
| * config/arc/arc.c (output_short_suffix): Check insn for nullness. |
| |
| 2020-01-22 David Malcolm <dmalcolm@redhat.com> |
| |
| PR analyzer/93307 |
| * gdbinit.in (break-on-saved-diagnostic): Update for move of |
| diagnostic_manager into "ana" namespace. |
| * selftest-run-tests.c (selftest::run_tests): Update for move of |
| selftest::run_analyzer_selftests to |
| ana::selftest::run_analyzer_selftests. |
| |
| 2020-01-22 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * cfgexpand.c (union_stack_vars): Update the size. |
| |
| 2020-01-22 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93381 |
| * tree-ssa-structalias.c (find_func_aliases): Assume offsetting |
| throughout, handle all conversions the same. |
| |
| 2020-01-22 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93335 |
| * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use |
| gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate |
| predicate, not whenever it is CONST_INT. Otherwise, force_reg it. |
| Call force_reg on high_in2 unconditionally. |
| |
| 2020-01-22 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/92924 |
| * profile.c (compute_value_histograms): Divide |
| all counter values. |
| |
| 2020-01-22 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/91298 |
| * output.h (assemble_name_resolve): Declare. |
| * varasm.c (assemble_name_resolve): New function. |
| (assemble_name): Use it. |
| * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define. |
| |
| 2020-01-22 Joseph Myers <joseph@codesourcery.com> |
| |
| * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to |
| update_web_docs_git instead of update_web_docs_svn. |
| |
| 2020-01-21 Andrew Pinski <apinski@marvell.com> |
| |
| PR target/9311 |
| * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0 |
| as PTR mode. Have operand 1 as being modeless, it can be P mode. |
| (*tlsgd_small_<mode>): Likewise. |
| * config/aarch64/aarch64.c (aarch64_load_symref_appropriately) |
| <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode |
| register. Convert that register back to dest using convert_mode. |
| |
| 2020-01-21 Jim Wilson <jimw@sifive.com> |
| |
| * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL |
| instead of XINT. |
| |
| 2020-01-21 H.J. Lu <hongjiu.lu@intel.com> |
| Uros Bizjak <ubizjak@gmail.com> |
| |
| PR target/93319 |
| * config/i386/i386.c (ix86_tls_module_base): Replace Pmode |
| with ptr_mode. |
| (legitimize_tls_address): Do GNU2 TLS address computation in |
| ptr_mode and zero-extend result to Pmode. |
| * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace |
| :P with :PTR and Pmode with ptr_mode. |
| (*tls_dynamic_gnu2_lea_64_<mode>): Likewise. |
| (*tls_dynamic_gnu2_call_64_<mode>): Likewise. |
| (*tls_dynamic_gnu2_combine_64_<mode>): Likewise. |
| |
| 2020-01-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93333 |
| * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify |
| the last two operands are CONST_INT_P before using them as such. |
| |
| 2020-01-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name |
| to get the integer element types. |
| |
| 2020-01-21 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins.h |
| (function_expander::convert_to_pmode): Declare. |
| * config/aarch64/aarch64-sve-builtins.cc |
| (function_expander::convert_to_pmode): New function. |
| (function_expander::get_contiguous_base): Use it. |
| (function_expander::prepare_gather_address_operands): Likewise. |
| * config/aarch64/aarch64-sve-builtins-sve2.cc |
| (svwhilerw_svwhilewr_impl::expand): Likewise. |
| |
| 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| PR target/92424 |
| * config/aarch64/aarch64.c (aarch64_declare_function_name): Set |
| cfun->machine->label_is_assembled. |
| (aarch64_print_patchable_function_entry): New. |
| (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define. |
| * config/aarch64/aarch64.h (struct machine_function): New field, |
| label_is_assembled. |
| |
| 2020-01-21 David Malcolm <dmalcolm@redhat.com> |
| |
| PR ipa/93315 |
| * ipa-profile.c (ipa_profile): Delete call_sums and set it to |
| NULL on exit. |
| |
| 2020-01-18 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR lto/93318 |
| * cgraph.c (cgraph_edge::resolve_speculation, |
| cgraph_edge::redirect_call_stmt_to_callee): Fix update of |
| call_stmt_site_hash. |
| |
| 2020-01-21 Martin Liska <mliska@suse.cz> |
| |
| * config/rs6000/rs6000.c (common_mode_defined): Remove |
| unused variable. |
| |
| 2020-01-21 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/92328 |
| * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve |
| type when value-numbering same-sized store by inserting a |
| VIEW_CONVERT_EXPR. |
| (eliminate_dom_walker::eliminate_stmt): When eliminating |
| a redundant store handle bit-reinterpretation of the same value. |
| |
| 2020-01-21 Andrew Pinski <apinski@marvel.com> |
| |
| PR tree-opt/93321 |
| * tree-into-ssa.c (prepare_block_for_update_1): Split out |
| from ... |
| (prepare_block_for_update): This. Use a worklist instead of |
| recursing. |
| |
| 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| |
| * config/arm/arm.c (clear_operation_p): |
| Initialise last_regno, skip first iteration |
| based on the first_set value and use ints instead |
| of the unnecessary HOST_WIDE_INTs. |
| |
| 2020-01-21 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93073 |
| * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for |
| compare_mode other than SFmode or DFmode. |
| |
| 2020-01-21 Kito Cheng <kito.cheng@sifive.com> |
| |
| PR target/93304 |
| * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New. |
| * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New. |
| * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined. |
| |
| 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4. |
| |
| 2020-01-20 Andrew Pinski <apinski@marvell.com> |
| |
| PR middle-end/93242 |
| * targhooks.c (default_print_patchable_function_entry): Use |
| output_asm_insn to emit the nop instruction. |
| |
| 2020-01-20 Fangrui Song <maskray@google.com> |
| |
| PR middle-end/93194 |
| * targhooks.c (default_print_patchable_function_entry): Align to |
| POINTER_SIZE. |
| |
| 2020-01-20 H.J. Lu <hongjiu.lu@intel.com> |
| |
| PR target/93319 |
| * config/i386/i386.c (legitimize_tls_address): Pass Pmode to |
| gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode. |
| * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ... |
| (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P. |
| (*tls_dynamic_gnu2_lea_64): Renamed to ... |
| (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P. |
| Remove the {q} suffix from lea. |
| (*tls_dynamic_gnu2_call_64): Renamed to ... |
| (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P. |
| (*tls_dynamic_gnu2_combine_64): Renamed to ... |
| (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P. |
| Pass Pmode to gen_tls_dynamic_gnu2_64. |
| |
| 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1. |
| |
| 2020-01-20 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins-base.cc |
| (svld1ro_impl::memory_vector_mode): Remove parameter name. |
| |
| 2020-01-20 Richard Biener <rguenther@suse.de> |
| |
| PR debug/92763 |
| * dwarf2out.c (prune_unused_types): Unconditionally mark |
| called function DIEs. |
| |
| 2020-01-20 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/93199 |
| * tree-eh.c (struct leh_state): Add |
| new field outer_non_cleanup. |
| (cleanup_is_dead_in): Pass leh_state instead |
| of eh_region. Add a checking that state->outer_non_cleanup |
| points to outer non-clean up region. |
| (lower_try_finally): Record outer_non_cleanup |
| for this_state. |
| (lower_catch): Likewise. |
| (lower_eh_filter): Likewise. |
| (lower_eh_must_not_throw): Likewise. |
| (lower_cleanup): Likewise. |
| |
| 2020-01-20 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93094 |
| * tree-vectorizer.h (vect_loop_versioning): Adjust. |
| (vect_transform_loop): Likewise. |
| * tree-vectorizer.c (try_vectorize_loop_1): Pass down |
| loop_vectorized_call to vect_transform_loop. |
| * tree-vect-loop.c (vect_transform_loop): Pass down |
| loop_vectorized_call to vect_loop_versioning. |
| * tree-vect-loop-manip.c (vect_loop_versioning): Use |
| the earlier discovered loop_vectorized_call. |
| |
| 2020-01-19 Eric S. Raymond <esr@thyrsus.com> |
| |
| * doc/contribute.texi: Update for SVN -> Git transition. |
| * doc/install.texi: Likewise. |
| |
| 2020-01-18 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR lto/93318 |
| * cgraph.c (cgraph_edge::make_speculative): Increase number of |
| speculative targets. |
| (verify_speculative_call): New function |
| (cgraph_node::verify_node): Use it. |
| * ipa-profile.c (ipa_profile): Fix formating; do not set number of |
| speculations. |
| |
| 2020-01-18 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR lto/93318 |
| * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting. |
| (cgraph_edge::make_direct): Remove all indirect targets. |
| (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct.. |
| (cgraph_node::verify_node): Verify that only one call_stmt or |
| lto_stmt_uid is set. |
| * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or |
| lto_stmt_uid. |
| * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt. |
| (lto_output_ref): Simplify streaming of stmt. |
| * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid. |
| |
| 2020-01-18 Tamar Christina <tamar.christina@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode): |
| Mark parameter unused. |
| |
| 2020-01-18 Hans-Peter Nilsson <hp@axis.com> |
| |
| * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux* |
| |
| 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com> |
| |
| * varpool.c (ctor_useable_for_folding_p): Fix grammar. |
| |
| 2020-01-18 Iain Sandoe <iain@sandoe.co.uk> |
| |
| * Makefile.in: Add coroutine-passes.o. |
| * builtin-types.def (BT_CONST_SIZE): New. |
| (BT_FN_BOOL_PTR): New. |
| (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New. |
| * builtins.def (DEF_COROUTINE_BUILTIN): New. |
| * coroutine-builtins.def: New file. |
| * coroutine-passes.cc: New file. |
| * function.h (struct GTY function): Add a bit to indicate that the |
| function is a coroutine component. |
| * internal-fn.c (expand_CO_FRAME): New. |
| (expand_CO_YIELD): New. |
| (expand_CO_SUSPN): New. |
| (expand_CO_ACTOR): New. |
| * internal-fn.def (CO_ACTOR): New. |
| (CO_YIELD): New. |
| (CO_SUSPN): New. |
| (CO_FRAME): New. |
| * passes.def: Add pass_coroutine_lower_builtins, |
| pass_coroutine_early_expand_ifns. |
| * tree-pass.h (make_pass_coroutine_lower_builtins): New. |
| (make_pass_coroutine_early_expand_ifns): New. |
| * doc/invoke.texi: Document the fcoroutines command line |
| switch. |
| |
| 2020-01-18 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable. |
| |
| PR target/93312 |
| * config/arm/arm.c (clear_operation_p): Don't use REGNO until |
| after checking the argument is a REG. Don't use REGNO (reg) |
| again to set last_regno, reuse regno variable instead. |
| |
| 2020-01-17 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/analyzer.texi (Limitations): Add note about NaN. |
| |
| 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Sudakshina Das <sudi.das@arm.com> |
| |
| * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg |
| and valid immediate. |
| (ashrdi3): Generate thumb2_asrl for both reg and valid immediate. |
| (lshrdi3): Generate thumb2_lsrl for valid immediates. |
| * config/arm/constraints.md (Pg): New. |
| * config/arm/predicates.md (long_shift_imm): New. |
| (arm_reg_or_long_shift_imm): Likewise. |
| * config/arm/thumb2.md (thumb2_asrl): New immediate alternative. |
| (thumb2_lsll): Likewise. |
| (thumb2_lsrl): New. |
| |
| 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Sudakshina Das <sudi.das@arm.com> |
| |
| * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE. |
| (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE. |
| * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd |
| register pairs for doubleword quantities for ARMv8.1M-Mainline. |
| * config/arm/thumb2.md (thumb2_asrl): New. |
| (thumb2_lsll): Likewise. |
| |
| 2020-01-17 Jakub Jelinek <jakub@redhat.com> |
| |
| * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove |
| unused variable. |
| |
| 2020-01-17 Alexander Monakov <amonakov@ispras.ru> |
| |
| * gdbinit.in (help-gcc-hooks): New command. |
| (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc, |
| pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update |
| documentation. |
| |
| 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the |
| correct target macro. |
| |
| 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * config/aarch64/aarch64-protos.h |
| (aarch64_sve_ld1ro_operand_p): New. |
| * config/aarch64/aarch64-sve-builtins-base.cc |
| (class load_replicate): New. |
| (class svld1ro_impl): New. |
| (class svld1rq_impl): Change to inherit from load_replicate. |
| (svld1ro): New sve intrinsic function base. |
| * config/aarch64/aarch64-sve-builtins-base.def (svld1ro): |
| New DEF_SVE_FUNCTION. |
| * config/aarch64/aarch64-sve-builtins-base.h |
| (svld1ro): New decl. |
| * config/aarch64/aarch64-sve-builtins.cc |
| (function_expander::add_mem_operand): Modify assert to allow |
| OImode. |
| * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New |
| pattern. |
| * config/aarch64/aarch64.c |
| (aarch64_sve_ld1rq_operand_p): Implement in terms of ... |
| (aarch64_sve_ld1rq_ld1ro_operand_p): This. |
| (aarch64_sve_ld1ro_operand_p): New. |
| * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec. |
| * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New. |
| * config/aarch64/predicates.md |
| (aarch64_sve_ld1ro_operand_{b,h,w,d}): New. |
| |
| 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com> |
| |
| * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64): |
| Introduce this ACLE specified predefined macro. |
| * config/aarch64/aarch64-option-extensions.def (f64mm): New. |
| (fp): Disabling this disables f64mm. |
| (simd): Disabling this disables f64mm. |
| (fp16): Disabling this disables f64mm. |
| (sve): Disabling this disables f64mm. |
| * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New. |
| (AARCH64_ISA_F64MM): New. |
| (TARGET_F64MM): New. |
| * doc/invoke.texi (f64mm): Document new option. |
| |
| 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| * config/aarch64/aarch64.c (generic_tunings): Add branch fusion. |
| (neoversen1_tunings): Likewise. |
| |
| 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| PR target/92692 |
| * config/aarch64/aarch64.c (aarch64_split_compare_and_swap) |
| Add assert to ensure prolog has been emitted. |
| (aarch64_split_atomic_op): Likewise. |
| * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>) |
| Use epilogue_completed rather than reload_completed. |
| (aarch64_atomic_exchange<mode>): Likewise. |
| (aarch64_atomic_<atomic_optab><mode>): Likewise. |
| (atomic_nand<mode>): Likewise. |
| (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise. |
| (atomic_fetch_nand<mode>): Likewise. |
| (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise. |
| (atomic_nand_fetch<mode>): Likewise. |
| |
| 2020-01-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR target/93133 |
| * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false |
| for FP modes. |
| (REVERSE_CONDITION): Delete. |
| * config/aarch64/iterators.md (CC_ONLY): New mode iterator. |
| (CCFP_CCFPE): Likewise. |
| (e): New mode attribute. |
| * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to... |
| (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC. |
| (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into... |
| (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern. |
| (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern. |
| (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise. |
| * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update |
| name of generator from gen_ccmpdi to gen_ccmpccdi. |
| (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse |
| the previous comparison but aren't able to, use the new ccmp_rev |
| patterns instead. |
| |
| 2020-01-17 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather |
| than testing directly for INTEGER_CST. |
| (gimplify_target_expr, gimplify_omp_depend): Likewise. |
| |
| 2020-01-17 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93292 |
| * tree-vect-stmts.c (vectorizable_comparison): Punt also if |
| get_vectype_for_scalar_type returns NULL. |
| |
| 2020-01-16 Jan Hubicka <hubicka@ucw.cz> |
| |
| * params.opt (-param=max-predicted-iterations): Increase range from 0. |
| * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations. |
| |
| 2020-01-16 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of |
| dump. |
| * params.opt: (max-predicted-iterations): Set bounds. |
| * predict.c (real_almost_one, real_br_prob_base, |
| real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove. |
| (propagate_freq): Add max_cyclic_prob parameter; cap cyclic |
| probabilities; do not truncate to reg_br_prob_bases. |
| (estimate_loops_at_level): Pass max_cyclic_prob. |
| (estimate_loops): Compute max_cyclic_prob. |
| (estimate_bb_frequencies): Do not initialize real_*; update calculation |
| of back edge prob. |
| * profile-count.c (profile_probability::to_sreal): New. |
| * profile-count.h (class sreal): Move up in file. |
| (profile_probability::to_sreal): Declare. |
| |
| 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| |
| * config/arm/arm.c |
| (arm_invalid_conversion): New function for target hook. |
| (arm_invalid_unary_op): New function for target hook. |
| (arm_invalid_binary_op): New function for target hook. |
| |
| 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| |
| * config.gcc: Add arm_bf16.h. |
| * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment. |
| (arm_simd_builtin_std_type): Add BFmode. |
| (arm_init_simd_builtin_types): Define element types for vector types. |
| (arm_init_bf16_types): New function. |
| (arm_init_builtins): Add arm_init_bf16_types function call. |
| * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes. |
| * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF. |
| * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode. |
| (arm_hard_regno_mode_ok): Add BFmode and tidy up statements. |
| (arm_vector_mode_supported_p): Add V4BF, V8BF. |
| (arm_mangle_type): Add __bf16. |
| * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE, |
| VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node, |
| arm_bf16_ptr_type_node. |
| * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and |
| define_split between ARM registers. |
| * config/arm/arm_bf16.h: New file. |
| * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types. |
| * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New. |
| (VQXMOV): Add V8BF. |
| * config/arm/neon.md: Add BF vector types to movhf NEON move patterns. |
| * config/arm/vfp.md: Add BFmode to movhf patterns. |
| |
| 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com> |
| Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * config/arm/arm-cpus.in (mve, mve_float): New features. |
| (dsp, mve, mve.fp): New options. |
| * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define. |
| * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M. |
| * doc/invoke.texi: Document the armv8.1-m mve and dps options. |
| |
| 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to |
| Armv8-M Mainline. |
| * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove |
| error for using -mcmse when targeting Armv8.1-M Mainline. |
| |
| 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/arm/arm.md (nonsecure_call_internal): Do not force memory |
| address in r4 when targeting Armv8.1-M Mainline. |
| (nonsecure_call_value_internal): Likewise. |
| * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address |
| a register match_operand again. Emit BLXNS when targeting |
| Armv8.1-M Mainline. |
| (nonsecure_call_value_reg_thumb2): Likewise. |
| |
| 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early. |
| (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear |
| variable as true when floating-point ABI is not hard. Replace |
| check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear. |
| Generate VLSTM and VLLDM instruction respectively before and |
| after a function call to cmse_nonsecure_call function. |
| * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec. |
| (VUNSPEC_VLLDM): Likewise. |
| * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn. |
| (lazy_load_multiple_insn): Likewise. |
| |
| 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/arm/arm.c (vfp_emit_fstmd): Declare early. |
| (arm_emit_vfp_multi_reg_pop): Likewise. |
| (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP |
| registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and |
| restore callee-saved VFP registers. |
| |
| 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early. |
| (cmse_nonsecure_call_clear_caller_saved): Rename into ... |
| (cmse_nonsecure_call_inline_register_clear): This. Save and clear |
| callee-saved GPRs as well as clear ip register before doing a nonsecure |
| call then restore callee-saved GPRs after it when targeting |
| Armv8.1-M Mainline. |
| (arm_reorg): Adapt to function rename. |
| |
| 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/arm/arm-protos.h (clear_operation_p): Adapt prototype. |
| * config/arm/arm.c (clear_operation_p): Extend to be able to check a |
| clear_vfp_multiple pattern based on a new vfp parameter. |
| (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when |
| targeting Armv8.1-M Mainline. |
| (cmse_nonsecure_entry_clear_before_return): Clear VFP registers |
| unconditionally when targeting Armv8.1-M Mainline architecture. Check |
| whether VFP registers are available before looking call_used_regs for a |
| VFP register. |
| * config/arm/predicates.md (clear_multiple_operation): Adapt to change |
| of prototype of clear_operation_p. |
| (clear_vfp_multiple_operation): New predicate. |
| * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec. |
| * config/arm/vfp.md (clear_vfp_multiple): New define_insn. |
| |
| 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/arm/arm-protos.h (clear_operation_p): Declare. |
| * config/arm/arm.c (clear_operation_p): New function. |
| (cmse_clear_registers): Generate clear_multiple instruction pattern if |
| targeting Armv8.1-M Mainline or successor. |
| (output_return_instruction): Only output APSR register clearing if |
| Armv8.1-M Mainline instructions not available. |
| (thumb_exit): Likewise. |
| * config/arm/predicates.md (clear_multiple_operation): New predicate. |
| * config/arm/thumb2.md (clear_apsr): New define_insn. |
| (clear_multiple): Likewise. |
| * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec. |
| |
| 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/arm/arm.c (fp_sysreg_names): Declare and define. |
| (use_return_insn): Also return false for Armv8.1-M Mainline. |
| (output_return_instruction): Skip FPSCR clearing if Armv8.1-M |
| Mainline instructions are available. |
| (arm_compute_frame_layout): Allocate space in frame for FPCXTNS |
| when targeting Armv8.1-M Mainline Security Extensions. |
| (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M |
| Mainline entry function. |
| (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if |
| targeting Armv8.1-M Mainline or successor. |
| (arm_expand_epilogue): Fix indentation of caller-saved register |
| clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline |
| entry function. |
| * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro. |
| (FP_SYSREGS): Likewise. |
| (enum vfp_sysregs_encoding): Define enum. |
| (fp_sysreg_names): Declare. |
| * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec. |
| * config/arm/vfp.md (push_fpsysreg_insn): New define_insn. |
| (pop_fpsysreg_insn): Likewise. |
| |
| 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> |
| Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/arm/arm-cpus.in (armv8_1m_main): New feature. |
| (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k, |
| ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve, |
| ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a, |
| ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent. |
| (ARMv8_1m_main): New feature group. |
| (armv8.1-m.main): New architecture. |
| * config/arm/arm-tables.opt: Regenerate. |
| * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize. |
| (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main. |
| (arm_options_perform_arch_sanity_checks): Error out when targeting |
| Armv8.1-M Mainline Security Extensions. |
| * config/arm/arm.h (arm_arch8_1m_main): Declare. |
| |
| 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| |
| * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot, |
| aarch64_bfdot_lane, aarch64_bfdot_laneq): New. |
| * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane, |
| aarch64_bfdot_laneq): New. |
| * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32, |
| vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32, |
| vbfdotq_laneq_f32): New. |
| * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype, |
| VBFMLA_W, VBF): New. |
| (isquadop): Add V4BF, V8BF. |
| |
| 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| |
| * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers): |
| New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS, |
| TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP. |
| (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX. |
| (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index. |
| * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane, |
| usdot_laneq, sudot_lane,sudot_laneq): New. |
| * config/aarch64/aarch64-simd.md (aarch64_usdot): New. |
| (aarch64_<sur>dot_lane): New. |
| * config/aarch64/arm_neon.h (vusdot_s32): New. |
| (vusdotq_s32): New. |
| (vusdot_lane_s32): New. |
| (vsudot_lane_s32): New. |
| * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator. |
| (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs. |
| |
| 2020-01-16 Martin Liska <mliska@suse.cz> |
| |
| * value-prof.c (dump_histogram_value): Fix |
| obvious spacing issue. |
| |
| 2020-01-16 Andrew Pinski <apinski@marvell.com> |
| |
| * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for |
| !storage_order_barrier_p. |
| |
| 2020-01-16 Andrew Pinski <apinski@marvell.com> |
| |
| * sched-int.h (_dep): Add unused bit-field field for the padding. |
| * sched-deps.c (init_dep_1): Init unused field. |
| |
| 2020-01-16 Andrew Pinski <apinski@marvell.com> |
| |
| * optabs.h (create_expand_operand): Initialize target field also. |
| |
| 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| PR tree-optimization/92429 |
| * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter. |
| * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to |
| control folding. |
| * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing |
| tree. |
| |
| 2020-01-16 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply |
| aarch64_sve_int_mode to each mode. |
| |
| 2020-01-15 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/analyzer.texi (Overview): Add note about |
| -fdump-ipa-analyzer. |
| |
| 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| PR tree-optimization/93231 |
| * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check |
| input_type is unsigned. Use tree_to_shwi for shift constant. |
| Check CST_STRING element size is CHAR_TYPE_SIZE bits. |
| (simplify_count_trailing_zeroes): Add test to handle known non-zero |
| inputs more efficiently. |
| |
| 2020-01-15 Uroš Bizjak <ubizjak@gmail.com> |
| |
| * config/i386/i386.md (*movsf_internal): Do not require |
| SSE2 ISA for alternatives 14 and 15. |
| |
| 2020-01-15 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/93273 |
| * tree-eh.c (sink_clobbers): If we already visited the destination |
| block do not defer insertion. |
| (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for |
| the purpose of defered insertion. |
| |
| 2020-01-15 Jakub Jelinek <jakub@redhat.com> |
| |
| * BASE-VER: Bump to 10.0.1. |
| |
| 2020-01-15 Richard Sandiford <richard.sandiford@arm.com> |
| |
| PR tree-optimization/93247 |
| * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access |
| type of the stmt that we're going to vectorize. |
| |
| 2020-01-15 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a |
| VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent |
| type from the lhs. |
| |
| 2020-01-15 Martin Liska <mliska@suse.cz> |
| |
| * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow |
| 2 calls of streamer_read_hwi in a function call. |
| |
| 2020-01-15 Richard Biener <rguenther@suse.de> |
| |
| * alias.c (record_alias_subset): Avoid redundant work when |
| subset is already recorded. |
| |
| 2020-01-14 David Malcolm <dmalcolm@redhat.com> |
| |
| * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of |
| the analyzer options provide CWE identifiers. |
| |
| 2020-01-14 David Malcolm <dmalcolm@redhat.com> |
| |
| * tree-diagnostic-path.cc (path_summary::event_range::print): |
| When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers |
| using get_pure_location. |
| |
| 2020-01-15 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93262 |
| * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins, |
| perform head trimming only if the last argument is constant, |
| either all ones, or larger or equal to head trim, in the latter |
| case decrease the last argument by head_trim. |
| |
| PR tree-optimization/93249 |
| * tree-ssa-dse.c: Include builtins.h and gimple-fold.h. |
| (maybe_trim_memstar_call): Move head_trim and tail_trim vars to |
| function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't |
| perform head trim unless we can prove there are no '\0' chars |
| from the source among the first head_trim chars. |
| |
| 2020-01-14 David Malcolm <dmalcolm@redhat.com> |
| |
| * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o. |
| |
| 2020-01-15 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93009 |
| * config/i386/sse.md |
| (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1, |
| *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1, |
| *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1, |
| *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use |
| just a single alternative instead of two, make operands 1 and 2 |
| commutative. |
| |
| 2020-01-14 Jan Hubicka <hubicka@ucw.cz> |
| |
| PR lto/91576 |
| * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and |
| TYPE_MODE. |
| |
| 2020-01-14 David Malcolm <dmalcolm@redhat.com> |
| |
| * Makefile.in (lang_opt_files): Add analyzer.opt. |
| (ANALYZER_OBJS): New. |
| (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o, |
| tristate.o and ANALYZER_OBJS. |
| (TEXI_GCCINT_FILES): Add analyzer.texi. |
| * common.opt (-fanalyzer): New driver option. |
| * config.in: Regenerate. |
| * configure: Regenerate. |
| * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option. |
| (gccdepdir): Also create depdir for "analyzer" subdir. |
| * digraph.cc: New file. |
| * digraph.h: New file. |
| * doc/analyzer.texi: New file. |
| * doc/gccint.texi ("Static Analyzer") New menu item. |
| (analyzer.texi): Include it. |
| * doc/invoke.texi ("Static Analyzer Options"): New list and new section. |
| ("Warning Options"): Add static analysis warnings to the list. |
| (-Wno-analyzer-double-fclose): New option. |
| (-Wno-analyzer-double-free): New option. |
| (-Wno-analyzer-exposure-through-output-file): New option. |
| (-Wno-analyzer-file-leak): New option. |
| (-Wno-analyzer-free-of-non-heap): New option. |
| (-Wno-analyzer-malloc-leak): New option. |
| (-Wno-analyzer-possible-null-argument): New option. |
| (-Wno-analyzer-possible-null-dereference): New option. |
| (-Wno-analyzer-null-argument): New option. |
| (-Wno-analyzer-null-dereference): New option. |
| (-Wno-analyzer-stale-setjmp-buffer): New option. |
| (-Wno-analyzer-tainted-array-index): New option. |
| (-Wno-analyzer-use-after-free): New option. |
| (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option. |
| (-Wno-analyzer-use-of-uninitialized-value): New option. |
| (-Wanalyzer-too-complex): New option. |
| (-fanalyzer-call-summaries): New warning. |
| (-fanalyzer-checker=): New warning. |
| (-fanalyzer-fine-grained): New warning. |
| (-fno-analyzer-state-merge): New warning. |
| (-fno-analyzer-state-purge): New warning. |
| (-fanalyzer-transitivity): New warning. |
| (-fanalyzer-verbose-edges): New warning. |
| (-fanalyzer-verbose-state-changes): New warning. |
| (-fanalyzer-verbosity=): New warning. |
| (-fdump-analyzer): New warning. |
| (-fdump-analyzer-callgraph): New warning. |
| (-fdump-analyzer-exploded-graph): New warning. |
| (-fdump-analyzer-exploded-nodes): New warning. |
| (-fdump-analyzer-exploded-nodes-2): New warning. |
| (-fdump-analyzer-exploded-nodes-3): New warning. |
| (-fdump-analyzer-supergraph): New warning. |
| * doc/sourcebuild.texi (dg-require-dot): New. |
| (dg-check-dot): New. |
| * gdbinit.in (break-on-saved-diagnostic): New command. |
| * graphviz.cc: New file. |
| * graphviz.h: New file. |
| * ordered-hash-map-tests.cc: New file. |
| * ordered-hash-map.h: New file. |
| * passes.def (pass_analyzer): Add before |
| pass_ipa_whole_program_visibility. |
| * selftest-run-tests.c (selftest::run_tests): Call |
| selftest::ordered_hash_map_tests_cc_tests. |
| * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New |
| decl. |
| * shortest-paths.h: New file. |
| * timevar.def (TV_ANALYZER): New timevar. |
| (TV_ANALYZER_SUPERGRAPH): Likewise. |
| (TV_ANALYZER_STATE_PURGE): Likewise. |
| (TV_ANALYZER_PLAN): Likewise. |
| (TV_ANALYZER_SCC): Likewise. |
| (TV_ANALYZER_WORKLIST): Likewise. |
| (TV_ANALYZER_DUMP): Likewise. |
| (TV_ANALYZER_DIAGNOSTICS): Likewise. |
| (TV_ANALYZER_SHORTEST_PATHS): Likewise. |
| * tree-pass.h (make_pass_analyzer): New decl. |
| * tristate.cc: New file. |
| * tristate.h: New file. |
| |
| 2020-01-14 Uroš Bizjak <ubizjak@gmail.com> |
| |
| PR target/93254 |
| * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for |
| alternatives 9 and 10. |
| |
| 2020-01-14 David Malcolm <dmalcolm@redhat.com> |
| |
| * attribs.c (excl_hash_traits::empty_zero_p): New static constant. |
| * gcov.c (function_start_pair_hash::empty_zero_p): Likewise. |
| * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise. |
| * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest. |
| (selftest::hash_map_tests_c_tests): Call it. |
| * hash-map-traits.h (simple_hashmap_traits::empty_zero_p): |
| New static constant, using the value of = H::empty_zero_p. |
| (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value |
| from default_hash_traits <Value>. |
| * hash-map.h (hash_map::empty_zero_p): Likewise, using the value |
| from Traits. |
| * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise. |
| * hash-table.h (hash_table::alloc_entries): Guard the loop of |
| calls to mark_empty with !Descriptor::empty_zero_p. |
| (hash_table::empty_slow): Conditionalize the memset call with a |
| check that Descriptor::empty_zero_p; otherwise, loop through the |
| entries calling mark_empty on them. |
| * hash-traits.h (int_hash::empty_zero_p): New static constant. |
| (pointer_hash::empty_zero_p): Likewise. |
| (pair_hash::empty_zero_p): Likewise. |
| * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p): |
| Likewise. |
| * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise. |
| (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise. |
| * profile.c (location_triplet_hash::empty_zero_p): Likewise. |
| * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise. |
| (sanopt_tree_couple_hash::empty_zero_p): Likewise. |
| * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise. |
| * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise. |
| * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise. |
| * tree-vectorizer.h |
| (default_hash_traits<scalar_cond_masked_key>::empty_zero_p): |
| Likewise. |
| |
| 2020-01-14 Kewen Lin <linkw@gcc.gnu.org> |
| |
| * cfgloopanal.c (average_num_loop_insns): Free bbs when early return, |
| fix typo on return value. |
| |
| 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com> |
| |
| PR ipa/69678 |
| * cgraph.c (symbol_table::create_edge): Init speculative_id and |
| target_prob. |
| (cgraph_edge::make_speculative): Add param for setting speculative_id |
| and target_prob. |
| (cgraph_edge::speculative_call_info): Update comments and find reference |
| by speculative_id for multiple indirect targets. |
| (cgraph_edge::resolve_speculation): Decrease the speculations |
| for indirect edge, drop it's speculative if not direct target |
| left. Update comments. |
| (cgraph_edge::redirect_call_stmt_to_callee): Likewise. |
| (cgraph_node::dump): Print num_speculative_call_targets. |
| (cgraph_node::verify_node): Don't report error if speculative |
| edge not include statement. |
| (cgraph_edge::num_speculative_call_targets_p): New function. |
| * cgraph.h (int common_target_id): Remove. |
| (int common_target_probability): Remove. |
| (num_speculative_call_targets): New variable. |
| (make_speculative): Add param for setting speculative_id. |
| (cgraph_edge::num_speculative_call_targets_p): New declare. |
| (target_prob): New variable. |
| (speculative_id): New variable. |
| * ipa-fnsummary.c (analyze_function_body): Create and duplicate |
| call summaries for multiple speculative call targets. |
| * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id. |
| * ipa-profile.c (struct speculative_call_target): New struct. |
| (class speculative_call_summary): New class. |
| (class speculative_call_summaries): New class. |
| (call_sums): New variable. |
| (ipa_profile_generate_summary): Generate indirect multiple targets summaries. |
| (ipa_profile_write_edge_summary): New function. |
| (ipa_profile_write_summary): Stream out indirect multiple targets summaries. |
| (ipa_profile_dump_all_summaries): New function. |
| (ipa_profile_read_edge_summary): New function. |
| (ipa_profile_read_summary_section): New function. |
| (ipa_profile_read_summary): Stream in indirect multiple targets summaries. |
| (ipa_profile): Generate num_speculative_call_targets from |
| profile summaries. |
| * ipa-ref.h (speculative_id): New variable. |
| * ipa-utils.c (ipa_merge_profiles): Update with target_prob. |
| * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and |
| common_target_probability. Stream out speculative_id and |
| num_speculative_call_targets. |
| (input_edge): Likewise. |
| * predict.c (dump_prediction): Remove edges count assert to be |
| precise. |
| * symtab.c (symtab_node::create_reference): Init speculative_id. |
| (symtab_node::clone_references): Clone speculative_id. |
| (symtab_node::clone_referring): Clone speculative_id. |
| (symtab_node::clone_reference): Clone speculative_id. |
| (symtab_node::clear_stmts_in_references): Clear speculative_id. |
| * tree-inline.c (copy_bb): Duplicate all the speculative edges |
| if indirect call contains multiple speculative targets. |
| * value-prof.h (check_ic_target): Remove. |
| * value-prof.c (gimple_value_profile_transformations): |
| Use void function gimple_ic_transform. |
| * value-prof.c (gimple_ic_transform): Handle topn case. |
| Fix comment typos. Change it to a void function. |
| |
| 2020-01-13 Andrew Pinski <apinski@marvell.com> |
| |
| * config/aarch64/aarch64-cores.def (octeontx2): New define. |
| (octeontx2t98): New define. |
| (octeontx2t96): New define. |
| (octeontx2t93): New define. |
| (octeontx2f95): New define. |
| (octeontx2f95n): New define. |
| (octeontx2f95mm): New define. |
| * config/aarch64/aarch64-tune.md: Regenerate. |
| * doc/invoke.texi (-mcpu=): Document the new cpu types. |
| |
| 2020-01-13 Jason Merrill <jason@redhat.com> |
| |
| PR c++/33799 - destroy return value if local cleanup throws. |
| * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR. |
| |
| 2020-01-13 Martin Liska <mliska@suse.cz> |
| |
| * ipa-cp.c (get_max_overall_size): Use newly |
| renamed param param_ipa_cp_unit_growth. |
| * params.opt: Remove legacy param name. |
| |
| 2020-01-13 Martin Sebor <msebor@redhat.com> |
| |
| PR tree-optimization/93213 |
| * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul |
| stores to be eliminated. |
| |
| 2020-01-13 Martin Liska <mliska@suse.cz> |
| |
| * opts.c (print_help): Do not print CL_PARAM |
| and CL_WARNING for CL_OPTIMIZATION. |
| |
| 2020-01-13 Jonathan Wakely <jwakely@redhat.com> |
| |
| PR driver/92757 |
| * doc/invoke.texi (Warning Options): Add caveat about some warnings |
| depending on optimization settings. |
| |
| 2020-01-13 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/90838 |
| * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use |
| SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro |
| argument rather than to initialize temporary for targets that |
| don't use the mode argument at all. Initialize ctzval to avoid |
| warning at -O0. |
| |
| 2020-01-10 Thomas Schwinge <thomas@codesourcery.com> |
| |
| * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition. |
| * tree-core.h: Document it. |
| * gimplify.c (gimplify_omp_workshare): Set it. |
| * omp-low.c (lower_omp_target): Use it. |
| * tree-pretty-print.c (dump_omp_clause): Print it. |
| |
| * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>: |
| Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'. |
| |
| 2020-01-10 David Malcolm <dmalcolm@redhat.com> |
| |
| * Makefile.in (OBJS): Add tree-diagnostic-path.o. |
| * common.opt (fdiagnostics-path-format=): New option. |
| (diagnostic_path_format): New enum. |
| (fdiagnostics-show-path-depths): New option. |
| * coretypes.h (diagnostic_event_id_t): New forward decl. |
| * diagnostic-color.c (color_dict): Add "path". |
| * diagnostic-event-id.h: New file. |
| * diagnostic-format-json.cc (json_from_expanded_location): Make |
| non-static. |
| (json_end_diagnostic): Call context->make_json_for_path if it |
| exists and the diagnostic has a path. |
| (diagnostic_output_format_init): Clear context->print_path. |
| * diagnostic-path.h: New file. |
| * diagnostic-show-locus.c (colorizer::set_range): Special-case |
| when printing a run of events in a diagnostic_path so that they |
| all get the same color. |
| (layout::m_diagnostic_path_p): New field. |
| (layout::layout): Initialize it. |
| (layout::print_any_labels): Don't colorize the label text for an |
| event in a diagnostic_path. |
| (gcc_rich_location::add_location_if_nearby): Add |
| "restrict_to_current_line_spans" and "label" params. Pass the |
| former to layout.maybe_add_location_range; pass the latter |
| when calling add_range. |
| * diagnostic.c: Include "diagnostic-path.h". |
| (diagnostic_initialize): Initialize context->path_format and |
| context->show_path_depths. |
| (diagnostic_show_any_path): New function. |
| (diagnostic_path::interprocedural_p): New function. |
| (diagnostic_report_diagnostic): Call diagnostic_show_any_path. |
| (simple_diagnostic_path::num_events): New function. |
| (simple_diagnostic_path::get_event): New function. |
| (simple_diagnostic_path::add_event): New function. |
| (simple_diagnostic_event::simple_diagnostic_event): New ctor. |
| (simple_diagnostic_event::~simple_diagnostic_event): New dtor. |
| (debug): New overload taking a diagnostic_path *. |
| * diagnostic.def (DK_DIAGNOSTIC_PATH): New. |
| * diagnostic.h (enum diagnostic_path_format): New enum. |
| (json::value): New forward decl. |
| (diagnostic_context::path_format): New field. |
| (diagnostic_context::show_path_depths): New field. |
| (diagnostic_context::print_path): New callback field. |
| (diagnostic_context::make_json_for_path): New callback field. |
| (diagnostic_show_any_path): New decl. |
| (json_from_expanded_location): New decl. |
| * doc/invoke.texi (-fdiagnostics-path-format=): New option. |
| (-fdiagnostics-show-path-depths): New option. |
| (-fdiagnostics-color): Add "path" to description of default |
| GCC_COLORS; describe it. |
| (-fdiagnostics-format=json): Document how diagnostic paths are |
| represented in the JSON output format. |
| * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby): |
| Add optional params "restrict_to_current_line_spans" and "label". |
| * opts.c (common_handle_option): Handle |
| OPT_fdiagnostics_path_format_ and |
| OPT_fdiagnostics_show_path_depths. |
| * pretty-print.c: Include "diagnostic-event-id.h". |
| (pp_format): Implement "%@" format code for printing |
| diagnostic_event_id_t *. |
| (selftest::test_pp_format): Add tests for "%@". |
| * selftest-run-tests.c (selftest::run_tests): Call |
| selftest::tree_diagnostic_path_cc_tests. |
| * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl. |
| * toplev.c (general_init): Initialize global_dc->path_format and |
| global_dc->show_path_depths. |
| * tree-diagnostic-path.cc: New file. |
| * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make |
| non-static. Drop "diagnostic" param in favor of storing the |
| original value of "where" and re-using it. |
| (virt_loc_aware_diagnostic_finalizer): Update for dropped param of |
| maybe_unwind_expanded_macro_loc. |
| (tree_diagnostics_defaults): Initialize context->print_path and |
| context->make_json_for_path. |
| * tree-diagnostic.h (default_tree_diagnostic_path_printer): New |
| decl. |
| (default_tree_make_json_for_path): New decl. |
| (maybe_unwind_expanded_macro_loc): New decl. |
| |
| 2020-01-10 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93210 |
| * fold-const.h (native_encode_initializer, |
| can_native_interpret_type_p): Declare. |
| * fold-const.c (native_encode_string): Fix up handling with off != -1, |
| simplify. |
| (native_encode_initializer): New function, moved from dwarf2out.c. |
| Adjust to native_encode_expr compatible arguments, including dry-run |
| and partial extraction modes. Don't handle STRING_CST. |
| (can_native_interpret_type_p): No longer static. |
| * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify |
| offset / BITS_PER_UNIT fits into int and don't call it if |
| can_native_interpret_type_p fails. If suboff is NULL and for |
| CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with |
| native_encode_initializer. |
| (fold_const_aggregate_ref_1): Formatting fix. |
| * dwarf2out.c (native_encode_initializer): Moved to fold-const.c. |
| (tree_add_const_value_attribute): Adjust caller. |
| |
| PR tree-optimization/90838 |
| * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use |
| SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of |
| CTZ_DEFINED_VALUE_AT_ZERO. |
| |
| 2020-01-10 Vladimir Makarov <vmakarov@redhat.com> |
| |
| PR inline-asm/93027 |
| * lra-constraints.c (match_reload): Permit input operands have the |
| same mode as output while other input operands have a different |
| mode. |
| |
| 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com> |
| |
| PR tree-optimization/90838 |
| * tree-ssa-forwprop.c (check_ctz_array): Add new function. |
| (check_ctz_string): Likewise. |
| (optimize_count_trailing_zeroes): Likewise. |
| (simplify_count_trailing_zeroes): Likewise. |
| (pass_forwprop::execute): Try ctz simplification. |
| * match.pd: Add matching for ctz idioms. |
| |
| 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function |
| for target hook. |
| (aarch64_invalid_unary_op): New function for target hook. |
| (aarch64_invalid_binary_op): New function for target hook. |
| |
| 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| |
| * config.gcc: Add arm_bf16.h. |
| * config/aarch64/aarch64-builtins.c |
| (aarch64_simd_builtin_std_type): Add BFmode. |
| (aarch64_init_simd_builtin_types): Define element types for vector |
| types. |
| (aarch64_init_bf16_types): New function. |
| (aarch64_general_init_builtins): Add arm_init_bf16_types function call. |
| * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector |
| modes. |
| * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types. |
| * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move |
| patterns. |
| * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF. |
| (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF. |
| * config/aarch64/aarch64.c |
| (aarch64_classify_vector_mode): Add support for BF types. |
| (aarch64_gimplify_va_arg_expr): Add support for BF types. |
| (aarch64_vq_mode): Add support for BF types. |
| (aarch64_simd_container_mode): Add support for BF types. |
| (aarch64_mangle_type): Add support for BF scalar type. |
| * config/aarch64/aarch64.md: Add BFmode to movhf pattern. |
| * config/aarch64/arm_bf16.h: New file. |
| * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types. |
| * config/aarch64/iterators.md: Add BF types to mode attributes. |
| (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New. |
| |
| 2020-01-10 Jason Merrill <jason@redhat.com> |
| |
| PR c++/93173 - incorrect tree sharing. |
| * gimplify.c (copy_if_shared): No longer static. |
| * gimplify.h: Declare it. |
| |
| 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/invoke.texi (-msve-vector-bits=): Document that |
| -msve-vector-bits=128 now generates VL-specific code for |
| little-endian targets. |
| * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use |
| build_vector_type_for_mode to construct the data vector types. |
| * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate |
| VL-specific code for -msve-vector-bits=128 on little-endian targets. |
| (aarch64_simd_container_mode): Always prefer Advanced SIMD modes |
| for 128-bit vectors. |
| |
| 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask |
| invocation. |
| |
| 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-builtins.c |
| (aarch64_builtin_vectorized_function): Check for specific vector modes, |
| rather than checking the number of elements and the element mode. |
| |
| 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-vect-loop.c (vect_create_epilog_for_reduction): Use |
| get_related_vectype_for_scalar_type rather than build_vector_type |
| to create the index type for a conditional reduction. |
| |
| 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF |
| for any type of gather or scatter, including strided accesses. |
| |
| 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function |
| comment. |
| |
| 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use |
| get_dr_vinfo_offset |
| * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init |
| parameter and its use to reset DR_OFFSET's. |
| (vect_transform_loop): Remove orig_drs_init argument. |
| * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset |
| member of dr_vec_info rather than the offset of the associated |
| data_reference's innermost_loop_behavior. |
| (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference. |
| (vect_do_peeling): Remove orig_drs_init parameter and its construction. |
| * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with |
| get_dr_vinfo_offset. |
| (vectorizable_store): Likewise. |
| (vectorizable_load): Likewise. |
| |
| 2020-01-10 Richard Biener <rguenther@suse.de> |
| |
| * gimple-ssa-store-merging |
| (pass_store_merging::terminate_all_aliasing_chains): Cache alias info. |
| |
| 2020-01-10 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/93217 |
| * ipa-inline-analysis.c (offline_size): Make proper parenthesis |
| encapsulation that was there before r280040. |
| |
| 2020-01-10 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/93199 |
| * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL |
| sequences to avoid walking them again for secondary opportunities. |
| (pass_lower_eh_dispatch::execute): Instead actually insert |
| them here. |
| |
| 2020-01-10 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/93199 |
| * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible. |
| (cleanup_all_empty_eh): Walk landing pads in reverse order to |
| avoid quadraticness. |
| |
| 2020-01-10 Martin Jambor <mjambor@suse.cz> |
| |
| * params.opt (param_ipa_sra_max_replacements): Mark as Optimization. |
| * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it |
| to get param_ipa_sra_max_replacements. |
| (param_splitting_across_edge): Pass the caller to |
| pull_accesses_from_callee. |
| |
| 2020-01-10 Martin Jambor <mjambor@suse.cz> |
| |
| * params.opt (param_ipcp_unit_growth): Mark as Optimization. |
| * ipa-cp.c (max_new_size): Removed. |
| (orig_overall_size): New variable. |
| (get_max_overall_size): New function. |
| (estimate_local_effects): Use it. Adjust dump. |
| (decide_about_value): Likewise. |
| (ipcp_propagate_stage): Do not calculate max_new_size, just store |
| orig_overall_size. Adjust dump. |
| (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size. |
| |
| 2020-01-10 Martin Jambor <mjambor@suse.cz> |
| |
| * params.opt (param_ipa_max_agg_items): Mark as Optimization |
| * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use |
| instead of param_ipa_max_agg_items. |
| (merge_aggregate_lattices): Extract param_ipa_max_agg_items from |
| optimization info for the callee. |
| |
| 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com> |
| |
| * lto-streamer-in.c (input_function): Remove streamed-in inline debug |
| markers if debug_inline_points is false. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to |
| extra_objs. |
| * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on |
| aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and |
| aarch64-sve-builtins-sve2.h. |
| (aarch64-sve-builtins-sve2.o): New rule. |
| * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro. |
| (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise. |
| (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise. |
| (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise. |
| * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle |
| TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and |
| TARGET_SVE2_SM4. |
| * config/aarch64/aarch64-sve.md: Update comments with SVE2 |
| instructions that are handled here. |
| (@cond_asrd<mode>): Generalize to... |
| (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this. |
| (*cond_asrd<mode>_2): Generalize to... |
| (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this. |
| (*cond_asrd<mode>_z): Generalize to... |
| (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this. |
| * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec. |
| (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise. |
| (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise. |
| * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New |
| pattern. |
| (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>) |
| (@aarch64_scatter_stnt<mode>): Likewise. |
| (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>) |
| (@aarch64_mul_lane_<mode>): Likewise. |
| (@aarch64_sve_suqadd<mode>_const): Likewise. |
| (*<sur>h<addsub><mode>): Generalize to... |
| (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this |
| new pattern. |
| (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander. |
| (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern. |
| (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise. |
| (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise. |
| (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise. |
| (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise. |
| (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise. |
| (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise. |
| (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander. |
| (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern. |
| (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise. |
| (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise. |
| (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise. |
| (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>) |
| (@aarch64_sve_add_mul_lane_<mode>): Likewise. |
| (@aarch64_sve_sub_mul_lane_<mode>): Likewise. |
| (@aarch64_sve2_xar<mode>): Likewise. |
| (@aarch64_sve2_bcax<mode>): Likewise. |
| (*aarch64_sve2_eor3<mode>): Rename to... |
| (@aarch64_sve2_eor3<mode>): ...this. |
| (@aarch64_sve2_bsl<mode>): New expander. |
| (@aarch64_sve2_nbsl<mode>): Likewise. |
| (@aarch64_sve2_bsl1n<mode>): Likewise. |
| (@aarch64_sve2_bsl2n<mode>): Likewise. |
| (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise. |
| (*aarch64_sve2_sra<mode>): Add MOVPRFX support. |
| (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern. |
| (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise. |
| (@aarch64_sve2_<USMAX:su>aba<mode>): New expander. |
| (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern. |
| (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise. |
| (<su>mull<bt><Vwide>): Generalize to... |
| (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new |
| pattern. |
| (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>) |
| (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>) |
| (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>) |
| (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>) |
| (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>) |
| (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>) |
| (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>) |
| (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>) |
| (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>) |
| (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>) |
| (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns. |
| (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>) |
| (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise. |
| (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise. |
| (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise. |
| (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise. |
| (<SHRNB:r>shrnb<mode>): Generalize to... |
| (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this |
| new pattern. |
| (<SHRNT:r>shrnt<mode>): Generalize to... |
| (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this |
| new pattern. |
| (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern. |
| (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise. |
| (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander. |
| (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern. |
| (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise. |
| (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise. |
| (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise. |
| (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise. |
| (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise. |
| (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise. |
| (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise. |
| (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander. |
| (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern. |
| (@aarch64_sve2_cvtnt<mode>): Likewise. |
| (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise. |
| (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander. |
| (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern. |
| (@aarch64_sve2_cvtxnt<mode>): Likewise. |
| (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise. |
| (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander. |
| (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern. |
| (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise. |
| (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander. |
| (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern. |
| (@aarch64_sve2_pmul<mode>): Likewise. |
| (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise. |
| (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise. |
| (@aarch64_sve2_tbl2<mode>): Likewise. |
| (@aarch64_sve2_tbx<mode>): Likewise. |
| (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise. |
| (@aarch64_sve2_histcnt<mode>): Likewise. |
| (@aarch64_sve2_histseg<mode>): Likewise. |
| (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise. |
| (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise. |
| (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise. |
| (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise. |
| (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise. |
| (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise. |
| (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise. |
| (<su>mulh<r>s<mode>3): Update after above pattern name changes. |
| * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY) |
| (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI) |
| (SVE2_PMULL_PAIR_I): New mode iterators. |
| (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP) |
| (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT) |
| (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA) |
| (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT) |
| (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT) |
| (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP) |
| (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT) |
| (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP) |
| (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH) |
| (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR) |
| (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT) |
| (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB) |
| (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT) |
| (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP) |
| (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT) |
| (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90) |
| (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB) |
| (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB) |
| (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB) |
| (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB) |
| (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT) |
| (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB) |
| (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT) |
| (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT) |
| (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT) |
| (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT) |
| (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT) |
| (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs. |
| (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT) |
| (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS) |
| (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move |
| further down file. |
| (VNARROW, Ventype): New mode attributes. |
| (Vewtype): Handle VNx2DI. Fix typo in comment. |
| (VDOUBLE): New mode attribute. |
| (sve_lane_con): Handle VNx8HI. |
| (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2. |
| (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus. |
| (sve_int_op, sve_int_op_rev): Handle the above codes. |
| (sve_pred_int_rhs2_operand): Likewise. |
| (MULLBT, SHRNB, SHRNT): Delete. |
| (SVE_INT_SHIFT_IMM): New int iterator. |
| (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI |
| and UNSPEC_WHILEHS for TARGET_SVE2. |
| (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT) |
| (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG) |
| (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB) |
| (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR) |
| (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators. |
| (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise. |
| (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD) |
| (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise. |
| (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA) |
| (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG) |
| (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise. |
| (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE) |
| (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE) |
| (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise. |
| (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise. |
| (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise. |
| (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise. |
| (optab): Handle the new unspecs. |
| (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB |
| and UNSPEC_RSHRNT. |
| (lr): Handle the new unspecs. |
| (bt): Delete. |
| (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs. |
| (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op) |
| (sve_int_qsub_op): New int attributes. |
| (sve_fp_op, rot): Handle the new unspecs. |
| * config/aarch64/aarch64-sve-builtins.h |
| (function_resolver::require_matching_pointer_type): Declare. |
| (function_resolver::resolve_unary): Add an optional boolean argument. |
| (function_resolver::finish_opt_n_resolution): Add an optional |
| type_suffix_index argument. |
| (gimple_folder::redirect_call): Declare. |
| (gimple_expander::prepare_gather_address_operands): Add an optional |
| bool parameter. |
| * config/aarch64/aarch64-sve-builtins.cc: Include |
| aarch64-sve-builtins-sve2.h. |
| (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros. |
| (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise. |
| (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise. |
| (TYPES_hsd_integer): Use TYPES_hsd_signed. |
| (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros. |
| (TYPES_s_unsigned): Likewise. |
| (TYPES_s_integer): Use TYPES_s_unsigned. |
| (TYPES_sd_signed, TYPES_sd_unsigned): New macros. |
| (TYPES_sd_integer): Use them. |
| (TYPES_d_unsigned): New macro. |
| (TYPES_d_integer): Use it. |
| (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros. |
| (TYPES_cvt_narrow): Likewise. |
| (DEF_SVE_TYPES_ARRAY): Include the new types macros above. |
| (preds_mx): New variable. |
| (function_builder::add_overloaded_function): Allow the new feature |
| set to be more restrictive than the original one. |
| (function_resolver::infer_pointer_type): Remove qualifiers from |
| the pointer type before printing it. |
| (function_resolver::require_matching_pointer_type): New function. |
| (function_resolver::resolve_sv_displacement): Handle functions |
| that don't support 32-bit vector indices or svint32_t vector offsets. |
| (function_resolver::finish_opt_n_resolution): Take the inferred type |
| as a separate argument. |
| (function_resolver::resolve_unary): Optionally treat all forms in |
| the same way as normal merging functions. |
| (gimple_folder::redirect_call): New function. |
| (function_expander::prepare_gather_address_operands): Add an argument |
| that says whether scaled forms are available. If they aren't, |
| handle scaling of vector indices and don't add the extension and |
| scaling operands. |
| (function_expander::map_to_unspecs): If aarch64_sve isn't available, |
| fall back to using cond_* instead. |
| * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function): |
| Split out the member variables into... |
| (rtx_code_function_base): ...this new base class. |
| (rtx_code_function_rotated): Inherit rtx_code_function_base. |
| (unspec_based_function): Split out the member variables into... |
| (unspec_based_function_base): ...this new base class. |
| (unspec_based_function_rotated): Inherit unspec_based_function_base. |
| (unspec_based_function_exact_insn): New class. |
| (unspec_based_add_function, unspec_based_add_lane_function) |
| (unspec_based_lane_function, unspec_based_pred_function) |
| (unspec_based_qadd_function, unspec_based_qadd_lane_function) |
| (unspec_based_qsub_function, unspec_based_qsub_lane_function) |
| (unspec_based_sub_function, unspec_based_sub_lane_function): New |
| typedefs. |
| (unspec_based_fused_function): New class. |
| (unspec_based_mla_function, unspec_based_mls_function): New typedefs. |
| (unspec_based_fused_lane_function): New class. |
| (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New |
| typedefs. |
| (CODE_FOR_MODE1): New macro. |
| (fixed_insn_function): New class. |
| (while_comparison): Likewise. |
| * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane) |
| (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n) |
| (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr) |
| (load_ext_gather_index_restricted, load_ext_gather_offset_restricted) |
| (load_gather_sv_restricted, shift_left_imm_long): Declare. |
| (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise. |
| (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise. |
| (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted) |
| (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane) |
| (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate) |
| (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint) |
| (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt) |
| (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise. |
| * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication): |
| Also add an initial argument for unary_convert_narrowt, regardless |
| of the predication type. |
| (build_32_64): Allow loads and stores to specify MODE_none. |
| (build_sv_index64, build_sv_uint_offset): New functions. |
| (long_type_suffix): New function. |
| (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes. |
| (binary_imm_long_base, load_gather_sv_base): Likewise. |
| (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise. |
| (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise. |
| (unary_narrowb_base, unary_narrowt_base): Likewise. |
| (binary_long_lane_def, binary_long_lane): New shape. |
| (binary_long_opt_n_def, binary_long_opt_n): Likewise. |
| (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise. |
| (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise. |
| (binary_to_uint_def, binary_to_uint): Likewise. |
| (binary_wide_def, binary_wide): Likewise. |
| (binary_wide_opt_n_def, binary_wide_opt_n): Likewise. |
| (compare_def, compare): Likewise. |
| (compare_ptr_def, compare_ptr): Likewise. |
| (load_ext_gather_index_restricted_def, |
| load_ext_gather_index_restricted): Likewise. |
| (load_ext_gather_offset_restricted_def, |
| load_ext_gather_offset_restricted): Likewise. |
| (load_gather_sv_def): Inherit from load_gather_sv_base. |
| (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape. |
| (shift_left_imm_def, shift_left_imm): Likewise. |
| (shift_left_imm_long_def, shift_left_imm_long): Likewise. |
| (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise. |
| (store_scatter_index_restricted_def, |
| store_scatter_index_restricted): Likewise. |
| (store_scatter_offset_restricted_def, |
| store_scatter_offset_restricted): Likewise. |
| (tbl_tuple_def, tbl_tuple): Likewise. |
| (ternary_long_lane_def, ternary_long_lane): Likewise. |
| (ternary_long_opt_n_def, ternary_long_opt_n): Likewise. |
| (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base. |
| (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape |
| (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base. |
| (ternary_qq_rotate_def, ternary_qq_rotate): New shape. |
| (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise. |
| (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise. |
| (ternary_uint_def, ternary_uint): Likewise. |
| (unary_convert): Fix typo in comment. |
| (unary_convert_narrowt_def, unary_convert_narrowt): New shape. |
| (unary_long_def, unary_long): Likewise. |
| (unary_narrowb_def, unary_narrowb): Likewise. |
| (unary_narrowt_def, unary_narrowt): Likewise. |
| (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise. |
| (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise. |
| (unary_to_int_def, unary_to_int): Likewise. |
| * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla) |
| (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions. |
| (svasrd_impl): Delete. |
| (svcadd_impl::expand): Handle integer operations too. |
| (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the |
| new functions to derive the unspec numbers. |
| (svmla_svmls_lane_impl): Replace with... |
| (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle |
| integer operations too. |
| (svwhile_impl): Rename to... |
| (svwhilelx_impl): ...this and inherit from while_comparison. |
| (svasrd): Use unspec_based_function. |
| (svmla_lane): Use svmla_lane_impl. |
| (svmls_lane): Use svmls_lane_impl. |
| (svrecpe, svrsqrte): Handle unsigned integer operations too. |
| (svwhilele, svwhilelt): Use svwhilelx_impl. |
| * config/aarch64/aarch64-sve-builtins-sve2.h: New file. |
| * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise. |
| * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise. |
| * config/aarch64/aarch64-sve-builtins.def: Include |
| aarch64-sve-builtins-sve2.def. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p) |
| (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument. |
| * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p) |
| (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar |
| immediates as well as vector ones. |
| * config/aarch64/predicates.md (aarch64_sve_arith_immediate) |
| (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate) |
| (aarch64_sve_qsub_immediate): Update calls accordingly. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve2.md: Add banner comments. |
| (<su>mulh<r>s<mode>3): Move further up file. |
| (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>) |
| (*aarch64_sve2_sra<mode>): Move further down file. |
| * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW |
| and UNSPEC_WHILEWR. |
| (while_optab_cmp): Handle them. |
| * config/aarch64/aarch64-sve.md |
| (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public |
| and add a "@" marker. |
| * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it |
| instead of gen_aarch64_sve2_while_ptest. |
| (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to... |
| (UNSPEC_WHILELE): ...this. |
| (UNSPEC_WHILE_LO): Rename to... |
| (UNSPEC_WHILELO): ...this. |
| (UNSPEC_WHILE_LS): Rename to... |
| (UNSPEC_WHILELS): ...this. |
| (UNSPEC_WHILE_LT): Rename to... |
| (UNSPEC_WHILELT): ...this. |
| * config/aarch64/iterators.md (SVE_WHILE): Update accordingly. |
| (cmp_op, while_optab_cmp): Likewise. |
| * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise. |
| * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise. |
| (svwhilelt): Likewise. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete. |
| (unary_to_uint): Define. |
| * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def) |
| (unary_count): Rename to... |
| (unary_to_uint_def, unary_to_uint): ...this. |
| * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve-builtins-functions.h |
| (code_for_mode_function): New class. |
| (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros. |
| * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl) |
| (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete. |
| (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0. |
| (svmul_lane, svtmad): Use CODE_FOR_MODE0. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/iterators.md (addsub): New code attribute. |
| * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>): |
| Re-express as... |
| (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change |
| in the asm string and attributes. Fix indentation. |
| * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>): |
| Re-express as... |
| (@aarch64_sve_<optab><mode>): ...this. |
| * config/aarch64/aarch64-sve-builtins.h |
| (function_expander::expand_signed_unpred_op): Delete. |
| * config/aarch64/aarch64-sve-builtins.cc |
| (function_expander::expand_signed_unpred_op): Likewise. |
| (function_expander::map_to_rtx_codes): If the optab isn't defined, |
| try using code_for_aarch64_sve instead. |
| * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete. |
| (svqsub_impl): Likewise. |
| (svqadd, svqsub): Use rtx_code_function instead. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete. |
| (HADDSUB, sur, addsub): Remove them. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-nrv.c (pass_return_slot::execute): Handle all internal |
| functions the same way, rather than singling out those that |
| aren't mapped directly to optabs. |
| |
| 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * target.def (compatible_vector_types_p): New target hook. |
| * hooks.h (hook_bool_const_tree_const_tree_true): Declare. |
| * hooks.c (hook_bool_const_tree_const_tree_true): New function. |
| * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook. |
| * doc/tm.texi: Regenerate. |
| * gimple-expr.c: Include target.h. |
| (useless_type_conversion_p): Use targetm.compatible_vector_types_p. |
| * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New |
| function. |
| (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define. |
| * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred): |
| Use the original predicate if it already has a suitable type. |
| |
| 2020-01-09 Martin Jambor <mjambor@suse.cz> |
| |
| * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct, |
| resolve_speculation and redirect_call_stmt_to_callee static. Change |
| return type of set_call_stmt to cgraph_edge *. |
| * auto-profile.c (afdo_indirect_call): Adjust call to |
| redirect_call_stmt_to_callee. |
| * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *, |
| make the this pointer explicit, adjust self-recursive calls and the |
| call top make_direct. Return the resulting edge. |
| (cgraph_edge::remove): Make this pointer explicit. |
| (cgraph_edge::resolve_speculation): Likewise, adjust call to remove. |
| (cgraph_edge::make_direct): Likewise, adjust call to |
| resolve_speculation. |
| (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust |
| call to set_call_stmt. |
| (cgraph_update_edges_for_call_stmt_node): Update call to |
| set_call_stmt and remove. |
| * cgraphclones.c (cgraph_node::set_call_stmt_including_clones): |
| Renamed edge to master_edge. Adjusted calls to set_call_stmt. |
| (cgraph_node::create_edge_including_clones): Moved "first" definition |
| of edge to the block where it was used. Adjusted calls to |
| set_call_stmt. |
| (cgraph_node::remove_symbol_and_inline_clones): Adjust call to |
| cgraph_edge::remove. |
| * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to |
| make_direct and redirect_call_stmt_to_callee. |
| * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to |
| resolve_speculation and make_direct. |
| * ipa-inline-transform.c (inline_transform): Adjust call to |
| redirect_call_stmt_to_callee. |
| (check_speculations_1):: Adjust call to resolve_speculation. |
| * ipa-inline.c (resolve_noninline_speculation): Adjust call to |
| resolve-speculation. |
| (inline_small_functions): Adjust call to resolve_speculation. |
| (ipa_inline): Likewise. |
| * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to |
| make_direct. |
| * ipa-visibility.c (function_and_variable_visibility): Make iteration |
| safe with regards to edge removal, adjust calls to |
| redirect_call_stmt_to_callee. |
| * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct |
| and redirect_call_stmt_to_callee. |
| * multiple_target.c (create_dispatcher_calls): Adjust call to |
| redirect_call_stmt_to_callee |
| (redirect_to_specific_clone): Likewise. |
| * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph): |
| Adjust calls to cgraph_edge::remove. |
| * tree-inline.c (copy_bb): Adjust call to set_call_stmt. |
| (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee. |
| (expand_call_inline): Adjust call to cgraph_edge::remove. |
| |
| 2020-01-09 Martin Liska <mliska@suse.cz> |
| |
| * params.opt: Set Optimization for |
| param_max_speculative_devirt_maydefs. |
| |
| 2020-01-09 Martin Sebor <msebor@redhat.com> |
| |
| PR middle-end/93200 |
| PR fortran/92956 |
| * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type. |
| |
| 2020-01-09 Martin Liska <mliska@suse.cz> |
| |
| * auto-profile.c (auto_profile): Use opt_for_fn |
| for a parameter. |
| * ipa-cp.c (ipcp_lattice::add_value): Likewise. |
| (propagate_vals_across_arith_jfunc): Likewise. |
| (hint_time_bonus): Likewise. |
| (incorporate_penalties): Likewise. |
| (good_cloning_opportunity_p): Likewise. |
| (perform_estimation_of_a_value): Likewise. |
| (estimate_local_effects): Likewise. |
| (ipcp_propagate_stage): Likewise. |
| * ipa-fnsummary.c (decompose_param_expr): Likewise. |
| (set_switch_stmt_execution_predicate): Likewise. |
| (analyze_function_body): Likewise. |
| * ipa-inline-analysis.c (offline_size): Likewise. |
| * ipa-inline.c (early_inliner): Likewise. |
| * ipa-prop.c (ipa_analyze_node): Likewise. |
| (ipcp_transform_function): Likewise. |
| * ipa-sra.c (process_scan_results): Likewise. |
| (ipa_sra_summarize_function): Likewise. |
| * params.opt: Rename ipcp-unit-growth to |
| ipa-cp-unit-growth. Add Optimization for various |
| IPA-related parameters. |
| |
| 2020-01-09 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/93054 |
| * gimplify.c (gimplify_expr): Deal with NOP definitions. |
| |
| 2020-01-09 Richard Biener <rguenther@suse.de> |
| |
| PR tree-optimization/93040 |
| * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit. |
| |
| 2020-01-09 Georg-Johann Lay <avr@gjlay.de> |
| |
| * common/config/avr/avr-common.c (avr_option_optimization_table) |
| [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early. |
| |
| 2020-01-09 Martin Liska <mliska@suse.cz> |
| |
| * cgraphclones.c (symbol_table::materialize_all_clones): |
| Use cgraph_node::dump_name. |
| |
| 2020-01-09 Jakub Jelinek <jakub@redhat.com> |
| |
| PR inline-asm/93202 |
| * config/riscv/riscv.c (riscv_print_operand_reloc): Use |
| output_operand_lossage instead of gcc_unreachable. |
| * doc/md.texi (riscv f constraint): Fix typo. |
| |
| PR target/93141 |
| * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of |
| SWI. Use <general_hilo_operand> instead of <general_operand>. Use |
| CONST_SCALAR_INT_P instead of CONST_INT_P. |
| (*subv<mode>4_1): Rename to ... |
| (subv<mode>4_1): ... this. |
| (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New |
| define_insn_and_split patterns. |
| (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn |
| patterns. |
| |
| 2020-01-08 David Malcolm <dmalcolm@redhat.com> |
| |
| * vec.c (class selftest::count_dtor): New class. |
| (selftest::test_auto_delete_vec): New test. |
| (selftest::vec_c_tests): Call it. |
| * vec.h (class auto_delete_vec): New class template. |
| (auto_delete_vec<T>::~auto_delete_vec): New dtor. |
| |
| 2020-01-08 David Malcolm <dmalcolm@redhat.com> |
| |
| * sbitmap.h (auto_sbitmap): Add operator const_sbitmap. |
| |
| 2020-01-08 Jim Wilson <jimw@sifive.com> |
| |
| * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out |
| use of TLS_MODEL_LOCAL_EXEC when not pic. |
| |
| 2020-01-08 David Malcolm <dmalcolm@redhat.com> |
| |
| * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix |
| memory leak. |
| |
| 2020-01-08 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93187 |
| * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2, |
| *stack_protect_set_3 peephole2): Also check that the second |
| insns source is general_operand. |
| |
| PR target/93174 |
| * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand |
| predicate for output operand instead of register_operand. |
| (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with |
| memory destination and non-memory operands[2]. |
| |
| 2020-01-08 Martin Liska <mliska@suse.cz> |
| |
| * cgraph.c (cgraph_node::dump): Use ::dump_name or |
| ::dump_asm_name instead of (::name or ::asm_name). |
| * cgraphclones.c (symbol_table::materialize_all_clones): Likewise. |
| * cgraphunit.c (walk_polymorphic_call_targets): Likewise. |
| (analyze_functions): Likewise. |
| (expand_all_functions): Likewise. |
| * ipa-cp.c (ipcp_cloning_candidate_p): Likewise. |
| (propagate_bits_across_jump_function): Likewise. |
| (dump_profile_updates): Likewise. |
| (ipcp_store_bits_results): Likewise. |
| (ipcp_store_vr_results): Likewise. |
| * ipa-devirt.c (dump_targets): Likewise. |
| * ipa-fnsummary.c (analyze_function_body): Likewise. |
| * ipa-hsa.c (check_warn_node_versionable): Likewise. |
| (process_hsa_functions): Likewise. |
| * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise. |
| (set_alias_uids): Likewise. |
| * ipa-inline-transform.c (save_inline_function_body): Likewise. |
| * ipa-inline.c (recursive_inlining): Likewise. |
| (inline_to_all_callers_1): Likewise. |
| (ipa_inline): Likewise. |
| * ipa-profile.c (ipa_propagate_frequency_1): Likewise. |
| (ipa_propagate_frequency): Likewise. |
| * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise. |
| (remove_described_reference): Likewise. |
| * ipa-pure-const.c (worse_state): Likewise. |
| (check_retval_uses): Likewise. |
| (analyze_function): Likewise. |
| (propagate_pure_const): Likewise. |
| (propagate_nothrow): Likewise. |
| (dump_malloc_lattice): Likewise. |
| (propagate_malloc): Likewise. |
| (pass_local_pure_const::execute): Likewise. |
| * ipa-visibility.c (optimize_weakref): Likewise. |
| (function_and_variable_visibility): Likewise. |
| * ipa.c (symbol_table::remove_unreachable_nodes): Likewise. |
| (ipa_discover_variable_flags): Likewise. |
| * lto-streamer-out.c (output_function): Likewise. |
| (output_constructor): Likewise. |
| * tree-inline.c (copy_bb): Likewise. |
| * tree-ssa-structalias.c (ipa_pta_execute): Likewise. |
| * varpool.c (symbol_table::remove_unreferenced_decls): Likewise. |
| |
| 2020-01-08 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/93199 |
| * tree-eh.c (sink_clobbers): Update virtual operands for |
| the first and last stmt only. Add a dry-run capability. |
| (pass_lower_eh_dispatch::execute): Perform clobber sinking |
| after CFG manipulations and in RPO order to catch all |
| secondary opportunities reliably. |
| |
| 2020-01-08 Georg-Johann Lay <avr@gjlay.de> |
| |
| PR target/93182 |
| * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document. |
| |
| 2019-01-08 Richard Biener <rguenther@suse.de> |
| |
| PR middle-end/93199 |
| * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified. |
| * tree-ssa-loop-im.c (move_computations_worker): Properly adjust |
| virtual operand, also updating SSA use. |
| * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction): |
| Update stmt after resetting virtual operand. |
| (tree_loop_interchange::move_code_to_inner_loop): Likewise. |
| * gimple-iterator.c (gsi_remove): When not removing the stmt |
| permanently do not delink immediate uses or mark the stmt modified. |
| |
| 2020-01-08 Martin Liska <mliska@suse.cz> |
| |
| * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name. |
| (ipa_call_context::estimate_size_and_time): Likewise. |
| (inline_analyze_function): Likewise. |
| |
| 2020-01-08 Martin Liska <mliska@suse.cz> |
| |
| * cgraph.c (cgraph_node::dump): Use systematically |
| dump_asm_name. |
| |
| 2020-01-08 Georg-Johann Lay <avr@gjlay.de> |
| |
| Add -nodevicespecs option for avr. |
| |
| PR target/93182 |
| * config/avr/avr.opt (-nodevicespecs): New driver option. |
| * config/avr/driver-avr.c (avr_devicespecs_file): Only issue |
| "-specs=device-specs/..." if that option is not set. |
| * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document. |
| |
| 2020-01-08 Georg-Johann Lay <avr@gjlay.de> |
| |
| Implement 64-bit double functions for avr. |
| |
| PR target/92055 |
| * config.gcc (tm_defines) [target=avr]: Support --with-libf7, |
| --with-double-comparison. |
| * doc/install.texi: Document them. |
| * config/avr/avr-c.c (avr_cpu_cpp_builtins) |
| <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS> |
| <WITH_DOUBLE_COMPARISON>: New built-in defines. |
| * doc/invoke.texi (AVR Built-in Macros): Document them. |
| * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New. |
| * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function. |
| * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro. |
| |
| 2020-01-08 Richard Earnshaw <rearnsha@arm.com> |
| |
| PR target/93188 |
| * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match |
| armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants |
| when only building rm-profile multilibs. |
| |
| 2020-01-08 Feng Xue <fxue@os.amperecomputing.com> |
| |
| PR ipa/93084 |
| * ipa-cp.c (self_recursively_generated_p): Find matched aggregate |
| lattice for a value to check. |
| (propagate_vals_across_arith_jfunc): Add an assertion to ensure |
| finite propagation in self-recursive scc. |
| |
| 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com> |
| |
| * ipa-inline.c (caller_growth_limits): Restore the AND. |
| |
| 2020-01-07 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator. |
| (VEC_ALLREG_ALT): New iterator. |
| (VEC_ALLREG_INT_MODE): New iterator. |
| (VCMP_MODE): New iterator. |
| (VCMP_MODE_INT): New iterator. |
| (vec_cmpu<mode>di): Use VCMP_MODE_INT. |
| (vec_cmp<u>v64qidi): New define_expand. |
| (vec_cmp<mode>di_exec): Use VCMP_MODE. |
| (vec_cmpu<mode>di_exec): New define_expand. |
| (vec_cmp<u>v64qidi_exec): New define_expand. |
| (vec_cmp<mode>di_dup): Use VCMP_MODE. |
| (vec_cmp<mode>di_dup_exec): Use VCMP_MODE. |
| (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ... |
| (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this. |
| (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ... |
| (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this. |
| (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ... |
| (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this. |
| (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ... |
| (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to |
| this. |
| * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes. |
| * config/gcn/gcn.md (expander): Add sign_extend and zero_extend. |
| |
| 2020-01-07 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/constraints.md (DA): Update description and match. |
| (DB): Likewise. |
| (Db): New constraint. |
| * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second |
| parameter. |
| * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter. |
| Implement 'Db' mixed immediate type. |
| * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints. |
| (addcv64si3_dup<exec_vcc>): Delete. |
| (subcv64si3<exec_vcc>): Rework constraints. |
| (addv64di3): Rework constraints. |
| (addv64di3_exec): Rework constraints. |
| (subv64di3): Rework constraints. |
| (addv64di3_dup): Delete. |
| (addv64di3_dup_exec): Delete. |
| (addv64di3_zext): Rework constraints. |
| (addv64di3_zext_exec): Rework constraints. |
| (addv64di3_zext_dup): Rework constraints. |
| (addv64di3_zext_dup_exec): Rework constraints. |
| (addv64di3_zext_dup2): Rework constraints. |
| (addv64di3_zext_dup2_exec): Rework constraints. |
| (addv64di3_sext_dup2): Rework constraints. |
| (addv64di3_sext_dup2_exec): Rework constraints. |
| |
| 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| |
| * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented |
| existing target checks. |
| |
| 2020-01-07 Richard Biener <rguenther@suse.de> |
| |
| * doc/install.texi: Bump minimal supported MPC version. |
| |
| 2020-01-07 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * langhooks-def.h (lhd_simulate_enum_decl): Declare. |
| (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it. |
| * langhooks.c: Include stor-layout.h. |
| (lhd_simulate_enum_decl): New function. |
| * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call |
| handle_arm_sve_h for the LTO frontend. |
| (register_vector_type): Cope with null returns from pushdecl. |
| |
| 2020-01-07 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p) |
| (aarch64_sve::nvectors_if_data_type): Replace with... |
| (aarch64_sve::builtin_type_p): ...this. |
| * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h. |
| (find_vector_type): Delete. |
| (add_sve_type_attribute): New function. |
| (lookup_sve_type_attribute): Likewise. |
| (register_builtin_types): Add an "SVE type" attribute to each type. |
| (register_tuple_type): Likewise. |
| (svbool_type_p, nvectors_if_data_type): Delete. |
| (mangle_builtin_type): Use lookup_sve_type_attribute. |
| (builtin_type_p): Likewise. Add an overload that returns the |
| number of constituent vector and predicate registers. |
| * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete. |
| (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p |
| instead of aarch64_sve_argument_p. |
| (aarch64_takes_arguments_in_sve_regs_p): Likewise. |
| (aarch64_pass_by_reference): Likewise. |
| (aarch64_function_value_1): Likewise. |
| (aarch64_return_in_memory): Likewise. |
| (aarch64_layout_arg): Likewise. |
| |
| 2020-01-07 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93156 |
| * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second |
| least significant bit is always clear. |
| |
| PR tree-optimization/93118 |
| * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new |
| simplifier with two intermediate conversions. |
| |
| 2020-01-07 Martin Liska <mliska@suse.cz> |
| |
| * params.opt: Add Optimization for various parameters. |
| |
| 2020-01-07 Martin Liska <mliska@suse.cz> |
| |
| PR ipa/83411 |
| * doc/extend.texi: Explain cloning for target_clone |
| attribute. |
| |
| 2020-01-07 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/92860 |
| * common.opt: Make in Optimization option |
| as it is affected by -O0, which is an Optimization |
| option. |
| * tree-inline.c (tree_inlinable_function_p): |
| Use opt_for_fn for warn_inline. |
| (expand_call_inline): Likewise. |
| |
| 2020-01-07 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/92860 |
| * common.opt: Make flag_ree as optimization |
| attribute. |
| |
| 2020-01-07 Martin Liska <mliska@suse.cz> |
| |
| PR optimization/92860 |
| * params.opt: Mark param_min_crossjump_insns with Optimization |
| keyword. |
| |
| 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com> |
| |
| * ipa-inline-analysis.c (estimate_growth): Fix typo. |
| * ipa-inline.c (caller_growth_limits): Use OR instead of AND. |
| |
| 2020-01-06 Michael Meissner <meissner@linux.ibm.com> |
| |
| * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New |
| helper function to return the valid addressing formats for a given |
| hard register and mode. |
| (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask. |
| |
| * config/rs6000/constraints.md (Q constraint): Update |
| documentation. |
| * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint |
| documentation. |
| |
| * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator): |
| Use 'Q' for doing vector extract from memory. |
| (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from |
| memory. |
| (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for |
| doing vector extract from memory. |
| (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector |
| extract from memory. |
| |
| * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support |
| for the offset being 34-bits when -mcpu=future is used. |
| |
| 2020-01-06 John David Anglin <danglin@gcc.gnu.org> |
| |
| * config/pa/pa.md: Revert change to use ordered_comparison_operator |
| instead of cmpib_comparison_operator in cmpib patterns. |
| * config/pa/predicates.md (cmpib_comparison_operator): Revert removal |
| of cmpib_comparison_operator. Revise comment. |
| |
| 2020-01-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts |
| in an IFN_DIV_POW2 node to be equal. |
| |
| 2020-01-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * tree-vect-stmts.c (vect_check_load_store_mask): Rename to... |
| (vect_check_scalar_mask): ...this. |
| (vectorizable_store, vectorizable_load): Update call accordingly. |
| (vectorizable_call): Use vect_check_scalar_mask to check the mask |
| argument in calls to conditional internal functions. |
| |
| 2020-01-06 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for |
| '0' matching inputs. |
| (subv64di3_exec): Likewise. |
| |
| 2020-01-06 Bryan Stenson <bryan@siliconvortex.com> |
| |
| * config/mips/mips.c (vr4130_align_insns): Fix typo. |
| * doc/md.texi (movstr): Likewise. |
| |
| 2020-01-06 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early |
| clobber. |
| |
| 2020-01-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md): |
| Depend on... |
| (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents |
| to a temporary file and use move-if-change to update the real |
| file where necessary. |
| |
| 2020-01-06 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl |
| rather than Upa for CPY /M. |
| |
| 2020-01-06 Andrew Stubbs <ams@codesourcery.com> |
| |
| * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline |
| immediate. |
| |
| 2020-01-06 Martin Liska <mliska@suse.cz> |
| |
| PR tree-optimization/92860 |
| * params.opt: Mark param_max_combine_insns with Optimization |
| keyword. |
| |
| 2020-01-05 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93141 |
| * config/i386/i386.md (SWIDWI): New mode iterator. |
| (DWI, dwi): Add TImode variants. |
| (addv<mode>4): Use SWIDWI iterator instead of SWI. Use |
| <general_hilo_operand> instead of <general_operand>. Use |
| CONST_SCALAR_INT_P instead of CONST_INT_P. |
| (*addv<mode>4_1): Rename to ... |
| (addv<mode>4_1): ... this. |
| (QWI): New mode attribute. |
| (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New |
| define_insn_and_split patterns. |
| (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn |
| patterns. |
| (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use |
| <general_hilo_operand> instead of <general_operand>. |
| (*addcarry<mode>_1): New define_insn. |
| (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split. |
| |
| 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru> |
| |
| * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm): |
| Use "call" instead of "set". |
| |
| 2020-01-03 Martin Jambor <mjambor@suse.cz> |
| |
| PR ipa/92917 |
| * ipa-cp.c (print_all_lattices): Skip functions without info. |
| |
| 2020-01-03 Jakub Jelinek <jakub@redhat.com> |
| |
| PR target/93089 |
| * config/i386/i386-options.c (ix86_simd_clone_adjust): If |
| TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd' |
| simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512 |
| for 'e' simd clones. |
| |
| PR target/93089 |
| * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave |
| entry. |
| (mprefer-vector-width=): Add Save. |
| * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print |
| -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment. |
| (ix86_debug_options, ix86_function_specific_print): Adjust |
| ix86_target_string callers. |
| (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=. |
| (ix86_valid_target_attribute_tree): Likewise. |
| * config/i386/i386-options.h (ix86_target_string): Add PVW argument. |
| * config/i386/i386-expand.c (ix86_expand_builtin): Adjust |
| ix86_target_string caller. |
| |
| PR target/93110 |
| * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of |
| emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode |
| instead of gen_int_shift_amount + convert_modes. |
| |
| PR rtl-optimization/93088 |
| * loop-iv.c (find_single_def_src): Punt after looking through |
| 128 reg copies for regs with single definitions. Move definitions |
| to first uses. |
| |
| 2020-01-02 Dennis Zhang <dennis.zhang@arm.com> |
| |
| * config/arm/arm-c.c (arm_cpu_builtins): Define |
| __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC, |
| __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and |
| __ARM_BF16_FORMAT_ALTERNATIVE when enabled. |
| * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features. |
| * config/arm/arm-tables.opt: Regenerated. |
| * config/arm/arm.c (arm_option_reconfigure_globals): Initialize |
| arm_arch_i8mm and arm_arch_bf16 when enabled. |
| * config/arm/arm.h (TARGET_I8MM): New macro. |
| (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise. |
| * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a. |
| * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a. |
| * config/arm/t-multilib: Add matching rules for -march=armv8.6-a. |
| (v8_6_a_simd_variants): New. |
| (v8_*_a_simd_variants): Add i8mm and bf16. |
| * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options. |
| |
| 2020-01-02 Jakub Jelinek <jakub@redhat.com> |
| |
| PR ipa/93087 |
| * predict.c (compute_function_frequency): Don't call |
| warn_function_cold on functions that already have cold attribute. |
| |
| 2020-01-01 John David Anglin <danglin@gcc.gnu.org> |
| |
| PR target/67834 |
| * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to |
| COMDAT group function labels in .data.rel.ro.local section. |
| * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define. |
| |
| PR target/93111 |
| * config/pa/pa.md (scc): Use ordered_comparison_operator instead of |
| comparison_operator in B and S integer comparisons. Likewise, use |
| ordered_comparison_operator instead of cmpib_comparison_operator in |
| cmpib patterns. |
| * config/pa/predicates.md (cmpib_comparison_operator): Remove. |
| |
| 2020-01-01 Jakub Jelinek <jakub@redhat.com> |
| |
| Update copyright years. |
| |
| * gcc.c (process_command): Update copyright notice dates. |
| * gcov-dump.c (print_version): Ditto. |
| * gcov.c (print_version): Ditto. |
| * gcov-tool.c (print_version): Ditto. |
| * gengtype.c (create_file): Ditto. |
| * doc/cpp.texi: Bump @copying's copyright year. |
| * doc/cppinternals.texi: Ditto. |
| * doc/gcc.texi: Ditto. |
| * doc/gccint.texi: Ditto. |
| * doc/gcov.texi: Ditto. |
| * doc/install.texi: Ditto. |
| * doc/invoke.texi: Ditto. |
| |
| 2020-01-01 Jan Hubicka <hubicka@ucw.cz> |
| |
| * ipa.c (walk_polymorphic_call_targets): Fix updating of overall |
| summary. |
| |
| 2020-01-01 Jakub Jelinek <jakub@redhat.com> |
| |
| PR tree-optimization/93098 |
| * match.pd (popcount): For shift amounts, use integer_onep |
| or wi::to_widest () == cst instead of tree_to_uhwi () == cst |
| tests. Make sure that precision is power of two larger than or equal |
| to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro |
| instead of ULL suffixed constants. Formatting fixes. |
| |
| Copyright (C) 2020 Free Software Foundation, Inc. |
| |
| Copying and distribution of this file, with or without modification, |
| are permitted in any medium without royalty provided the copyright |
| notice and this notice are preserved. |