blob: 24886d9bc83ee59cb3207cbbc0fb8ef087a5665f [file] [log] [blame]
2022-05-27 Release Manager
* GCC 9.5.0 released.
2022-05-16 Sebastian Pop <spop@amazon.com>
PR target/105162
* config/aarch64/aarch64-protos.h (atomic_ool_names): Increase dimension
of str array.
* config/aarch64/aarch64.c (aarch64_atomic_ool_func): Call
memmodel_from_int and handle MEMMODEL_SYNC_*.
(DEF0): Add __aarch64_*_sync functions.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-04-27 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/105396
* asan.c (asan_redzone_buffer::emit_redzone_byte): Handle the case
where offset is bigger than off but smaller than m_prev_offset + 32
bits by pushing one or more 0 bytes. Sink the
m_shadow_bytes.safe_push (value); flush_if_full (); statements from
all cases to the end of the function.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-04-19 Jakub Jelinek <jakub@redhat.com>
PR target/105257
* config/sparc/sparc.c (epilogue_renumber): If ORIGINAL_REGNO,
use gen_raw_REG instead of gen_rtx_REG and copy over also
ORIGINAL_REGNO. Use return 0; instead of /* fallthrough */.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-04-12 Jakub Jelinek <jakub@redhat.com>
PR target/105214
* config/i386/i386.c (ix86_emit_i387_log1p): Call
do_pending_stack_adjust.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-04-12 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/105211
* builtins.c (expand_builtin_int_roundingfn_2): If mathfn_built_in_1
fails for TREE_TYPE (arg), retry it with
TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl))) and if even that
fails, emit call normally.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-04-08 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/105189
* fold-const.c (make_range_step): Fix up handling of
(unsigned) x +[low, -] ranges for signed x if low fits into
typeof (x).
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-04-06 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/104985
* combine.c (struct undo): Add where.regno member.
(do_SUBST_MODE): Rename to ...
(subst_mode): ... this. Change first argument from rtx * into int,
operate on regno_reg_rtx[regno] and save regno into where.regno.
(SUBST_MODE): Remove.
(try_combine): Use subst_mode instead of SUBST_MODE, change first
argument from regno_reg_rtx[whatever] to whatever. For UNDO_MODE, use
regno_reg_rtx[undo->where.regno] instead of *undo->where.r.
(undo_to_marker): For UNDO_MODE, use regno_reg_rtx[undo->where.regno]
instead of *undo->where.r.
(simplify_set): Use subst_mode instead of SUBST_MODE, change first
argument from regno_reg_rtx[whatever] to whatever.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-04-03 Jakub Jelinek <jakub@redhat.com>
PR target/105123
* config/i386/i386.c (ix86_expand_vector_init_general): Avoid
using word as target for expand_simple_binop when doing ASHIFT and
IOR.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-03-30 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/105093
* ubsan.c (instrument_object_size): If t is equal to inner and
is a decl other than global var, punt. When emitting call to
UBSAN_OBJECT_SIZE ifn, make sure base is addressable.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-03-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/104971
* config/i386/i386.c
(ix86_expand_builtin) <case IX86_BUILTIN_READ_FLAGS>: If ignore,
don't push/pop anything and just return const0_rtx.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-03-09 Jakub Jelinek <jakub@redhat.com>
PR c/104711
* doc/invoke.texi (-Wextra): Document that -Wshift-negative-value
is enabled by it only for C++11 to C++17 rather than for C++03 or
later.
(-Wshift-negative-value): Similarly (except here we stated
that it is enabled for C++11 or later).
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-03-07 Jakub Jelinek <jakub@redhat.com>
PR target/104775
* config/s390/s390.md (*cmp_and_trap_unsigned_int<mode>): Use
S constraint instead of T in the last alternative.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-02-25 Jakub Jelinek <jakub@redhat.com>
Marc Glisse <marc.glisse@inria.fr>
PR tree-optimization/104675
* match.pd (t * 2U / 2 -> t & (~0 / 2), t / 2U * 2 -> t & ~1):
Restrict simplifications to INTEGRAL_TYPE_P.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-02-25 Jakub Jelinek <jakub@redhat.com>
PR target/104681
* config/rs6000/vector.md (movmisalign<mode>): Use rs6000_emit_move.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-02-25 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/104675
* match.pd (-A - 1 -> ~A, -1 - A -> ~A): Don't simplify for
COMPLEX_TYPE.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-02-17 Jakub Jelinek <jakub@redhat.com>
PR debug/104557
* valtrack.c (debug_lowpart_subreg): Don't call gen_rtx_raw_SUBREG
if expr has VOIDmode.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-02-15 Jakub Jelinek <jakub@redhat.com>
PR debug/104517
* omp-low.c (task_cpyfns): New variable.
(delete_omp_context): Don't call finalize_task_copyfn from here.
(create_task_copyfn): Push task_stmt into task_cpyfns.
(execute_lower_omp): Call finalize_task_copyfn here on entries from
task_cpyfns vector and release the vector.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-02-12 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/104449
* asan.c: Include tree-eh.h.
(handle_builtin_alloca): Handle the case when __builtin_alloca or
__builtin_alloca_with_align can throw.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-02-12 Jakub Jelinek <jakub@redhat.com>
PR target/104502
* config/i386/i386.md (cvtsd2ss splitter): If operands[1] is xmm16+
and AVX512VL isn't available, move operands[1] to operands[0] first.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-02-11 Jakub Jelinek <jakub@redhat.com>
PR middle-end/104446
* combine.c (subst): Don't substitute CONST_INTs into RTX_AUTOINC
operands.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-02-08 Jakub Jelinek <jakub@redhat.com>
PR target/102140
* config/rs6000/rs6000.c (vspltis_shifted): Return false also if
split1 pass has finished already.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-01-21 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/102478
* optabs.c (prepare_cmp_insn): If !can_create_pseudo_p (), don't
force_reg constants and for -fnon-call-exceptions fail if copy_to_reg
would be needed.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-01-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/102860
* match.pd (x %[fl] y -> x % y): New simplification for
unsigned integral types.
* optabs-tree.c (optab_for_tree_code): Return unknown_optab
for {CEIL,FLOOR,ROUND}_{DIV,MOD}_EXPR with VECTOR_TYPE.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2022-01-06 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/103908
* ifcvt.c (bb_valid_for_noce_process_p): Punt on bbs ending with
asm goto.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-12-30 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/103860
* shrink-wrap.c (try_shrink_wrapping): Make sure can_get_prologue is
called on pro even if nothing further is pushed into vec.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-12-28 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/103837
* loop-invariant.c (can_move_invariant_reg): Ignore DEBUG_INSNs in
the decisions whether to return false or continue and right before
returning true reset those debug insns that previously caused
returning false.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-11-27 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/103435
* gimple-ssa-store-merging.c (find_bswap_or_nop_finalize): Avoid UB if
n->range - rsize == 8, just clear both *cmpnop and *cmpxchg in that
case.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-11-17 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/103192
* tree-ssa-loop-im.c (move_computations_worker): Use
reset_flow_sensitive_info instead of manually clearing
SSA_NAME_RANGE_INFO and do it for all SSA_NAMEs, not just ones
with integral types.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-11-15 Jakub Jelinek <jakub@redhat.com>
PR target/103205
* config/i386/sync.md (atomic_bit_test_and_set<mode>,
atomic_bit_test_and_complement<mode>,
atomic_bit_test_and_reset<mode>): Use OPTAB_WIDEN instead of
OPTAB_DIRECT.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-11-11 Jakub Jelinek <jakub@redhat.com>
PR debug/101378
* dwarf2out.c (field_byte_offset): Do the PCC_BITFIELD_TYPE_MATTERS
handling only for DECL_BIT_FIELD_TYPE decls.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-09-28 Jakub Jelinek <jakub@redhat.com>
PR target/102498
* config/i386/i386.c (standard_80387_constant_p): Don't recognize
special 80387 instruction XFmode constants if flag_rounding_math.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-09-15 Jakub Jelinek <jakub@redhat.com>
PR c++/88578
PR c++/102295
* varasm.c (output_constructor_regular_field): Instead of assertion
that array_size_for_constructor result is equal to size of
TREE_TYPE (local->val) in bytes, assert that the type size is greater
or equal to array_size_for_constructor result and use type size as
fieldsize.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-09-08 Jakub Jelinek <jakub@redhat.com>
PR target/102224
* config/i386/i386.md (xorsign<mode>3): If operands[1] is equal to
operands[2], emit abs<mode>2 instead.
(@xorsign<mode>3_1): Add early-clobber for output operand.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-08-23 Jakub Jelinek <jakub@redhat.com>
PR debug/101905
* dwarf2out.c (gen_variable_die): Add DW_AT_location for global
register variables already during early_dwarf if possible.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-28 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101624
* ubsan.c (maybe_instrument_pointer_overflow,
instrument_object_size): Only test DECL_REGISTER on VAR_DECLs,
PARM_DECLs or RESULT_DECLs.
* sanopt.c (maybe_optimize_ubsan_ptr_ifn): Likewise.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-23 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/101562
* expmed.c (store_integral_bit_field): Only use movstrict_optab
if the operand isn't paradoxical.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-21 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101535
* gimplify.c (omp_check_private): Properly skip ORT_TARGET_DATA
contexts in which decl isn't privatized and for ORT_TARGET return
false if decl is mapped.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-20 Jakub Jelinek <jakub@redhat.com>
PR target/101384
* config/rs6000/rs6000.c (vspltis_constant): Accept EASY_VECTOR_MSB
only if step and copies are equal to 1.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-01 Jakub Jelinek <jakub@redhat.com>
PR middle-end/94366
* omp-low.c (lower_rec_input_clauses): Rename is_fp_and_or to
is_truth_op, set it for TRUTH_*IF_EXPR regardless of new_var's type,
use boolean_type_node instead of integer_type_node as NE_EXPR type.
(lower_reduction_clauses): Likewise.
2022-05-11 Tobias Burnus <tobias@codesourcery.com>
Backported from master:
2021-05-04 Tobias Burnus <tobias@codesourcery.com>
* omp-low.c (lower_rec_input_clauses, lower_reduction_clauses): Handle
&& and || with floating-point and complex arguments.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-14 Jakub Jelinek <jakub@redhat.com>
PR go/101407
* godump.c (godump_str_hash): New type.
(godump_container::pot_dummy_types): Use string_hash instead of
ptr_hash in the hash_set.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-07-01 Jakub Jelinek <jakub@redhat.com>
PR debug/101266
* dwarf2out.c (loc_list_from_tree_1): Handle COMPOUND_LITERAL_EXPR.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-29 Jakub Jelinek <jakub@redhat.com>
PR c++/101210
* match.pd ((intptr_t)x eq/ne CST to x eq/ne (typeof x) CST): Don't
perform the optimization in GENERIC when sanitizing and x has a
reference type.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-23 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101167
* omp-low.c (lower_omp_regimplify_p): Regimplify also PARM_DECLs
and RESULT_DECLs that have DECL_HAS_VALUE_EXPR_P set.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-21 Jakub Jelinek <jakub@redhat.com>
PR inline-asm/100785
* cfgexpand.c (expand_asm_stmt): If errors are emitted,
remove all inputs, outputs and clobbers from the asm and
set template to "".
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-18 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101062
* stor-layout.c (finish_bitfield_layout): Don't add bitfield
representatives in QUAL_UNION_TYPE.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-16 Jakub Jelinek <jakub@redhat.com>
PR middle-end/101062
* stor-layout.c (finish_bitfield_representative): For fields in unions
assume nextf is always NULL.
(finish_bitfield_layout): Compute bit field representatives also in
unions, but handle it as if each bitfield was the only field in the
aggregate.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-15 Jakub Jelinek <jakub@redhat.com>
PR target/101046
* expr.c (expand_expr_real_2) <case VEC_PACK_FIX_TRUNC_EXPR,
case VEC_PACK_TRUNC_EXPR>: Clear subtarget when changing mode.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-07 Jakub Jelinek <jakub@redhat.com>
PR middle-end/100898
* tree-inline.c (copy_bb): Only use gimple_call_arg_ptr if memcpy
should copy any arguments. Don't call gimple_call_num_args
on id->call_stmt or call_stmt more than once.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-06-04 Jakub Jelinek <jakub@redhat.com>
PR target/100887
* config/i386/i386.c (ix86_expand_vector_init): Handle
concatenation from half-sized modes with TImode elements.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-12 Jakub Jelinek <jakub@redhat.com>
PR middle-end/100508
* cfgexpand.c (expand_debug_expr): For DEBUG_EXPR_DECL with vector
type, don't reuse DECL_RTL if it has different mode, instead force
creation of a new DEBUG_EXPR.
2022-05-11 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-11 Jakub Jelinek <jakub@redhat.com>
PR middle-end/100471
* omp-low.c (lower_omp_task_reductions): For OMP_TASKLOOP, if data
is 0, bypass the reduction loop including
GOMP_taskgroup_reduction_unregister call.
2022-05-10 Eric Botcazou <ebotcazou@adacore.com>
PR target/105292
* config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Return
true only for 8-byte vector modes.
2022-05-06 Richard Biener <rguenther@suse.de>
Backported from master:
2022-04-21 Richard Biener <rguenther@suse.de>
PR tree-optimization/105070
* tree-switch-conversion.h
(bit_test_cluster::hoist_edge_and_branch_if_true): Add location
argument.
* tree-switch-conversion.c
(bit_test_cluster::hoist_edge_and_branch_if_true): Annotate
cond with location.
(bit_test_cluster::emit): Annotate all generated expressions
with location.
2022-05-06 Tom de Vries <tdevries@suse.de>
Backported from master:
2021-02-05 Tom de Vries <tdevries@suse.de>
PR debug/98656
* tree-switch-conversion.c (jump_table_cluster::emit): Add loc
argument.
(bit_test_cluster::emit): Reuse location_t for newly created
gswitch statement.
(switch_decision_tree::try_switch_expansion): Preserve
location_t.
* tree-switch-conversion.h: Change function signatures.
2022-05-06 Richard Biener <rguenther@suse.de>
Backported from master:
2022-03-09 Richard Biener <rguenther@suse.de>
PR middle-end/104786
* cfgexpand.c (expand_asm_stmt): Do not generate a copy
for VLAs without an upper size bound.
2022-05-06 Richard Biener <rguenther@suse.de>
Backported from master:
2021-11-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/103361
* gimple-loop-jam.c (adjust_unroll_factor): Use lambda_int
for the dependence distance.
* tree-data-ref.c (print_lambda_vector): Properly print a lambda_int.
2022-05-06 Richard Biener <rguenther@suse.de>
Backported from master:
2022-01-20 Richard Biener <rguenther@suse.de>
PR middle-end/100786
* gimple-fold.c (get_symbol_constant_value): Only return
values of compatible type to the symbol.
2022-04-27 Hongyu Wang <hongyu.wang@intel.com>
Backported from master:
2022-04-25 Hongyu Wang <hongyu.wang@intel.com>
PR target/105339
* config/i386/avx512fintrin.h (_mm512_scalef_round_pd):
Add parentheses for parameters and djust format.
(_mm512_mask_scalef_round_pd): Ditto.
(_mm512_maskz_scalef_round_pd): Ditto.
(_mm512_scalef_round_ps): Ditto.
(_mm512_mask_scalef_round_ps): Ditto.
(_mm512_maskz_scalef_round_ps): Ditto.
(_mm_scalef_round_sd): Use _mm_undefined_pd.
(_mm_scalef_round_ss): Use _mm_undefined_ps.
(_mm_mask_scalef_round_sd): New macro.
(_mm_mask_scalef_round_ss): Ditto.
(_mm_maskz_scalef_round_sd): Ditto.
(_mm_maskz_scalef_round_ss): Ditto.
2022-04-06 Alex Coplan <alex.coplan@arm.com>
PR target/99977
* config/arm/arm.c (arm_split_compare_and_swap): Fix up codegen
with negative immediates: ensure we expand cbranchsi4_scratch
correctly and ensure we satisfy its constraints.
* config/arm/sync.md
(@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Don't
attempt to tie two output operands together with constraints;
collapse two alternatives.
(@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise.
* config/arm/thumb1.md (cbranchsi4_neg_late): New.
2022-03-30 Martin Jambor <mjambor@suse.cz>
Backported from master:
2020-10-19 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/97456
PR middle-end/105071
* tree-complex.c (set_component_ssa_name): Do not replace ignored decl
default definitions with new component vars. Reorder if conditions.
2022-03-16 Richard Biener <rguenther@suse.de>
Backported from master:
2022-02-09 Richard Biener <rguenther@suse.de>
PR target/104453
* config/i386/i386.c (ix86_gimple_fold_builtin): Guard shift
folding for NULL LHS.
2022-02-18 Richard Biener <rguenther@suse.de>
Backported from master:
2020-09-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/97043
* tree-vect-slp.c (vect_analyze_slp_instance): Do not
elide a load permutation if the current vectorization
factor is one.
2022-02-18 Richard Biener <rguenther@suse.de>
Backported from master:
2020-08-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/96522
* tree-ssa-address.c (copy_ref_info): Reset flow-sensitive
info of the copied points-to. Transfer bigger alignment
via the access type.
* tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt):
Reset all flow-sensitive info.
2022-02-17 Richard Biener <rguenther@suse.de>
Backported from master:
2021-11-08 Richard Biener <rguenther@suse.de>
PR tree-optimization/102798
* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref):
Only copy points-to info to newly generated SSA names.
2022-02-17 Richard Biener <rguenther@suse.de>
Backported from master:
2021-11-22 Richard Biener <rguenther@suse.de>
PR middle-end/103181
PR middle-end/103248
* tree-eh.c (operation_could_trap_helper_p): Properly
check vector constants for a zero element for integer
division. Separate floating point and integer division code.
Properly handle fixed-point RDIV_EXPR.
2022-02-17 Richard Biener <rguenther@suse.de>
Backported from master:
2021-11-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/103237
* tree-vect-loop.c (vect_is_simple_reduction): Fail for
double reductions with multiple inner loop LC PHI nodes.
2022-02-10 Uros Bizjak <ubizjak@gmail.com>
Backported from master:
2022-02-10 Uroš Bizjak <ubizjak@gmail.com>
PR target/104469
* config/i386/sse.md (vec_unpacks_float_lo_v4si):
Change operand 1 constraint to register_operand.
2022-02-09 liuhongt <hongtao.liu@intel.com>
PR target/104451
* config/i386/sse.md (<insn><mode>3): lowpart_subreg
operands[2] from SImode to QImode.
2022-01-12 Richard Biener <rguenther@suse.de>
Backported from master:
2020-11-26 Richard Biener <rguenther@suse.de>
PR tree-optimization/97953
* gimple-ssa-evrp-analyze.c
(evrp_range_analyzer::record_ranges_from_incoming_edge): Make
sure the condition post-dominates the SSA definition before
recording into SSA_NAME_RANGE_INFO.
2022-01-10 Eric Botcazou <ebotcazou@adacore.com>
PR target/103465
* coretypes.h (unwind_info_type): Swap UI_SEH and UI_TARGET.
2022-01-10 Eric Botcazou <ebotcazou@adacore.com>
* doc/invoke.texi (%X): Remove obsolete reference to -Wl.
2021-12-27 Jonathan Wakely <jwakely@redhat.com>
PR target/100985
* config/aarch64/arm_acle.h: Remove unclosed extern "C" block.
2021-12-15 Kewen Lin <linkw@linux.ibm.com>
Backported from master:
2021-11-30 Kewen Lin <linkw@linux.ibm.com>
PR target/102347
* config/rs6000/rs6000.c (rs6000_builtin_decl): Remove builtin mask
check.
2021-12-01 Martin Jambor <mjambor@suse.cz>
PR ipa/103267
* tree-sra.c (scan_function): Also check ECF_LOOPING_CONST_OR_PURE
flag.
2021-11-25 Jan Hubicka <jh@suse.cz>
Backported from master:
2021-11-20 Jan Hubicka <hubicka@ucw.cz>
PR ipa/103052
* ipa-pure-const.c (propagate_pure_const): Fix merging of loping flag.
2021-11-23 Bill Schmidt <wschmidt@linux.ibm.com>
PR target/101985
* config/rs6000/altivec.h (vec_cpsgn): Swap operand order.
2021-11-22 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
Backported from master:
2021-11-19 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
* config/s390/s390.md (define_peephole2): Variable insn points
to the first matched insn. Use peep2_next_insn(1) to refer to
the second matched insn.
2021-11-09 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-19 Richard Biener <rguenther@suse.de>
PR middle-end/100672
* fold-const.c (fold_negate_expr_1): Use element_precision.
(negate_expr_p): Likewise.
2021-11-08 Richard Biener <rguenther@suse.de>
Backported from master:
2021-08-17 Richard Biener <rguenther@suse.de>
PR tree-optimization/101373
PR tree-optimization/101868
* tree-ssa-pre.c (prune_clobbered_mems): Also prune trapping
references when the BB may not return.
2021-11-08 Richard Biener <rguenther@suse.de>
Backported from master:
2021-08-10 Richard Biener <rguenther@suse.de>
PR middle-end/101824
* tree-nested.c (get_frame_field): Mark the COMPONENT_REF as
volatile in case the variable was.
2021-11-08 Kewen Lin <linkw@linux.ibm.com>
Backported from master:
2021-10-26 Kewen Lin <linkw@linux.ibm.com>
PR tree-optimization/102789
* tree-vect-loop-manip.c (vect_update_inits_of_drs): Do not
update inits of simd_lane_access.
2021-10-26 Piotr Kubaj <pkubaj@FreeBSD.org>
Backported from master:
2021-10-16 Piotr Kubaj <pkubaj@FreeBSD.org>
* configure.ac: Treat powerpc64*-*-freebsd* the same as
powerpc64-*-freebsd*.
* configure: Regenerate.
2021-10-24 John David Anglin <danglin@gcc.gnu.org>
* config/pa/pa.md: Don't use 'G' constraint in integer move patterns.
2021-10-21 H.J. Lu <hjl.tools@gmail.com>
Backported from master:
2021-10-21 H.J. Lu <hjl.tools@gmail.com>
PR target/98667
* doc/invoke.texi: Document -fcf-protection requires i686 or
new.
2021-10-15 John David Anglin <danglin@gcc.gnu.org>
* config/pa/pa.md: Consistently use "rG" constraint for copy
instruction in move patterns.
2021-10-14 John David Anglin <danglin@gcc.gnu.org>
* config/pa/pa.md (cbranchsf4): Disable if TARGET_SOFT_FLOAT.
(cbranchdf4): Likewise.
Add missing move patterns for TARGET_SOFT_FLOAT.
2021-10-13 John David Anglin <danglin@gcc.gnu.org>
* config/pa/pa.md (muldi3): Add support for inlining 64-bit
multiplication on 32-bit PA 1.1 and 2.0 targets.
2021-10-13 Richard Biener <rguenther@suse.de>
Backported from master:
2021-07-07 Richard Biener <rguenther@suse.de>
PR tree-optimization/101173
PR tree-optimization/101280
* gimple-loop-interchange.cc
(tree_loop_interchange::valid_data_dependences): Properly
guard all dependence checks with DDR_REVERSED_P or its
inverse.
2021-10-13 Richard Biener <rguenther@suse.de>
Backported from master:
2021-07-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/101394
* tree-ssa-pre.c (do_pre_regular_insertion): Avoid inserting
copies from abnormals for a full redundancy.
2021-10-13 Richard Biener <rguenther@suse.de>
PR tree-optimization/101105
* tree-vect-data-refs.c (vect_prune_runtime_alias_test_list):
Only ignore steps when they are equal or scalar order is preserved.
2021-10-13 Richard Biener <rguenther@suse.de>
Backported from master:
2021-06-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/100934
* tree-ssa-dom.c (pass_dominator::execute): Properly
mark irreducible regions.
2021-10-13 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-11 Richard Biener <rguenther@suse.de>
PR middle-end/100509
* gimple-fold.c (fold_gimple_assign): Only call
get_symbol_constant_value on register type symbols.
2021-10-11 Andrew Pinski <apinski@marvell.com>
Backported from master:
2021-10-11 Andrew Pinski <apinski@marvell.com>
PR tree-optimization/102622
* tree-ssa-phiopt.c (conditional_replacement): Set neg
to false for one bit signed types.
2021-10-11 Diane Meirowitz <diane.meirowitz@oracle.com>
Backported from master:
2021-10-11 Diane Meirowitz <diane.meirowitz@oracle.com>
* doc/invoke.texi: Add link to UndefinedBehaviorSanitizer
documentation, mention UBSAN_OPTIONS, similar to what is done
for AddressSanitizer.
2021-09-22 Kewen Lin <linkw@linux.ibm.com>
Backported from master:
2021-09-22 Kewen Lin <linkw@linux.ibm.com>
* ipa-fnsummary.c (inline_read_section): Unpack a dummy bit
to keep consistent with the side of streaming out.
2021-09-17 Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/102306
* combine.c (try_combine): Abort the combination if we are about to
duplicate volatile references.
2021-09-08 Jonathan Wakely <jwakely@redhat.com>
Backported from master:
2021-09-08 Jonathan Wakely <jwakely@redhat.com>
PR c++/60318
* doc/trouble.texi (Copy Assignment): Fix description of
behaviour and fix code in example.
2021-08-31 Thomas Schwinge <thomas@codesourcery.com>
Backported from master:
2021-08-31 Thomas Schwinge <thomas@codesourcery.com>
* tree.c (walk_tree_1) <OMP_CLAUSE_TILE>: Handle three operands.
2021-08-25 konglin1 <lingling.kong@intel.com>
PR target/101471
* config/i386/avx512dqintrin.h (_mm512_fpclass_ps_mask): Fix
macro define in O0.
(_mm512_mask_fpclass_ps_mask): Ditto.
2021-08-23 Richard Earnshaw <rearnsha@arm.com>
Backported from master:
2021-08-05 Richard Earnshaw <rearnsha@arm.com>
PR target/101723
* config/arm/arm-cpus.in (quirk_no_asmcpu): New feature bit.
(ALL_QUIRKS): Add it.
(generic-armv7-a): Add quirk to suppress writing .cpu directive in
asm output.
* config/arm/arm.c (arm_identify_fpu_from_isa): New variable.
(arm_last_printed_arch_string): Delete.
(arm_last-printed_fpu_string): Delete.
(arm_configure_build_target): If use of floating-point/SIMD is
disabled, remove all fp/simd related features from the target ISA.
(last_arm_targ_options): New variable.
(arm_print_asm_arch_directives): Add new parameters. Change order
of emitted directives and handle all cases here.
(arm_file_start): Always call arm_print_asm_arch_directives, move
all generation of .arch/.arch_extension here.
(arm_file_end): Call arm_print_asm_arch.
(arm_declare_function_name): Call arm_print_asm_arch_directives
instead of printing .arch/.fpu directives directly.
2021-08-23 Richard Earnshaw <rearnsha@arm.com>
Backported from master:
2021-08-05 Richard Earnshaw <rearnsha@arm.com>
* config/arm/arm.c (arm_configure_build_target): Don't call
arm_option_reconfigure_globals.
(arm_option_restore): Call arm_option_reconfigure_globals after
reconfiguring the target.
* config/arm/arm-c.c (arm_pragma_target_parse): Likewise.
2021-08-23 Richard Earnshaw <rearnsha@arm.com>
Backported from master:
2021-08-05 Richard Earnshaw <rearnsha@arm.com>
* config/arm/arm.c (arm_configure_build_target): Ensure the target's
arch_name is always set.
2021-08-23 Richard Earnshaw <rearnsha@arm.com>
Backported from master:
2019-12-11 Richard Earnshaw <rearnsha@arm.com>
* config/arm/arm-cpus.in (ALL_SIMD_EXTERNAL): New fgroup.
(ALL_SIMD): Use it.
(ALL_FPU_EXTERNAL): New fgroup.
(ALL_FP): Use it.
(cortex-a55, cortex-a75, cortex-a76): Remove redundant
+simd from architecture specification.
(neoverse-n1, cortex-a75.cortex-a55): Likewise.
* config/arm/arm.c (isa_all_fpubits, fpu_bitlist): Rename to ...
(isa_all_fpubits_internal, fpu_bitlist_internal): ... these.
(isa_all_fpbits): New bitmap.
(arm_option_override): Initialize it.
(arm_configure_build_target): If the target isa does not have any
FP enabled, do not warn about mismatches in FP-related feature bits.
2021-08-19 Richard Earnshaw <rearnsha@arm.com>
Backported from master:
2021-05-27 Richard Earnshaw <rearnsha@arm.com>
PR target/100767
* config/arm/arm.c (arm_configure_build_target): Remove parameter
opts_set, directly check opts parameters for being non-null.
(arm_option_restore): Update call to arm_configure_build_target.
(arm_option_override): Likewise.
(arm_can_inline_p): Likewise.
(arm_valid_target_attribute_tree): Likewise.
* config/arm/arm-c.c (arm_pragma_target_parse): Likewise.
* config/arm/arm-protos.h (arm_configure_build_target): Adjust
prototype.
2021-08-17 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2021-08-03 Richard Sandiford <richard.sandiford@arm.com>
* doc/invoke.texi: Document -mtune=neoverse-512tvb and
-mcpu=neoverse-512tvb.
* config/aarch64/aarch64-cores.def (neoverse-512tvb): New entry.
* config/aarch64/aarch64-tune.md: Regenerate.
2021-07-31 Xi Ruoyao <xry111@mengyan1223.wang>
Backported from master:
2021-07-30 Xi Ruoyao <xry111@mengyan1223.wang>
PR target/94780
* config/mips/mips.c (mips_atomic_assign_expand_fenv): Use
TARGET_EXPR instead of MODIFY_EXPR.
2021-07-20 Uroš Bizjak <ubizjak@gmail.com>
PR target/100182
* config/i386/sync.md (define_peephole2 atomic_storedi_fpu):
Remove.
(define_peephole2 atomic_loaddi_fpu): Ditto.
2021-07-19 Bill Schmidt <wschmidt@linux.ibm.com>
PR target/101129
* config/rs6000/rs6000-p8swap.c (has_part_mult): New.
(rs6000_analyze_swaps): Insns containing a subreg of a mult are
not swappable.
2021-07-19 Segher Boessenkool <segher@kernel.crashing.org>
Backported from master:
2021-04-18 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/99927
* combine.c (distribute_notes) [REG_UNUSED]: If the register already
is dead, just drop it.
2021-06-24 Uros Bizjak <ubizjak@gmail.com>
Backported from master:
2021-06-23 Uroš Bizjak <ubizjak@gmail.com>
PR target/101175
* config/i386/i386.md (bsr_rex64): Add zero-flag setting RTX.
(bsr): Ditto.
(*bsrhi): Remove.
(clz<mode>2): Update RTX pattern for additions.
2021-06-17 Marius Hillenbrand <mhillen@linux.ibm.com>
Backported from master:
2021-06-17 Marius Hillenbrand <mhillen@linux.ibm.com>
PR target/100871
* config/s390/vecintrin.h (vec_doublee): Fix to use
__builtin_s390_vflls.
(vec_floate): Fix to use __builtin_s390_vflrd.
2021-06-01 Release Manager
* GCC 9.4.0 released.
2021-05-18 Richard Biener <rguenther@suse.de>
Backported from master:
2021-01-28 Richard Biener <rguenther@suse.de>
PR rtl-optimization/80960
* dse.c (check_mem_read_rtx): Call get_addr on the
offsetted address.
2021-05-18 Richard Biener <rguenther@suse.de>
PR tree-optimization/96513
* tree-vect-slp.c (struct vdhs_data): New.
(vect_detect_hybrid_slp): New walker.
(vect_detect_hybrid_slp): Rewrite.
2021-05-18 Martin Liska <mliska@suse.cz>
PR tree-optimization/96597
* tree-ssa-sccvn.c (vn_reference_lookup_call): Add missing
initialization of ::punned.
(vn_reference_insert): Use consistently false instead of 0.
(vn_reference_insert_pieces): Likewise.
2021-05-18 Richard Biener <rguenther@suse.de>
PR tree-optimization/88240
* tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
* tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
(vn_reference_insert_pieces): Likewise.
(visit_reference_op_call): Likewise.
(visit_reference_op_load): Track whether a ref was punned.
* tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
insertion on punned floating point loads.
2021-05-17 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/100566
* tree-ssa-sccvn.c (dominated_by_p_w_unex): Properly handle
allow_back for all edge queries.
2021-05-12 Alex Coplan <alex.coplan@arm.com>
Backported from master:
2021-05-11 Alex Coplan <alex.coplan@arm.com>
PR target/99988
* config/aarch64/aarch64-bti-insert.c (aarch64_bti_j_insn_p): New.
(rest_of_insert_bti): Avoid inserting duplicate bti j insns for
jump table targets.
2021-05-11 Geng Qi <gengqi@linux.alibaba.com>
Backported from master:
2021-04-30 Geng Qi <gengqi@linux.alibaba.com>
* config/riscv/riscv.opt (march=,mabi=): Negative itself.
2021-05-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/99037
PR target/100441
* config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Use
aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern
matching const_int 0.
(move_lo_quad_internal_be_<mode>): Likewise.
(move_lo_quad_<mode>): Update for the above.
* config/aarch64/iterators.md (VQ_2E): Delete.
2021-05-06 Roman Zhuykov <zhroma@ispras.ru>
Backported from master:
2021-04-30 Roman Zhuykov <zhroma@ispras.ru>
PR rtl-optimization/100225
PR rtl-optimization/84878
* modulo-sched.c (sms_schedule): Use note_stores to skip loops
where we have an instruction which touches (writes) any hard
register from df->regular_block_artificial_uses set.
Allow not-single-set instruction only right before basic block
tail.
2021-05-05 Eric Botcazou <ebotcazou@adacore.com>
PR target/100402
* config/i386/i386.c (ix86_compute_frame_layout): For a SEH target,
always return the establisher frame for __builtin_frame_address (0).
2021-05-05 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
Backported from master:
2021-05-05 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
PR rtl-optimization/100263
* postreload.c (move2add_valid_value_p): Ensure register can
change mode.
2021-05-05 Richard Biener <rguenther@suse.de>
Backported from master:
2021-05-05 Richard Biener <rguenther@suse.de>
PR tree-optimization/98786
* tree-ssa-phiopt.c (factor_out_conditional_conversion): Avoid
adding new uses of abnormals.
2021-05-04 Alex Coplan <alex.coplan@arm.com>
Backported from master:
2021-04-23 Alex Coplan <alex.coplan@arm.com>
PR rtl-optimization/100230
* early-remat.c (early_remat::sort_candidates): Use delete[]
instead of delete for array allocated with new[].
2021-05-04 Richard Biener <rguenther@suse.de>
Backported from master:
2021-04-13 Richard Biener <rguenther@suse.de>
PR tree-optimization/100053
* tree-ssa-sccvn.c (vn_nary_op_get_predicated_value): Do
not use optimistic dominance queries for backedges to validate
predicated values.
(dominated_by_p_w_unex): Add parameter to ignore executable
state on backedges.
(rpo_elim::eliminate_avail): Adjust.
2021-05-04 Richard Biener <rguenther@suse.de>
Backported from master:
2021-01-29 Richard Biener <rguenther@suse.de>
PR rtl-optimization/98144
* df.h (df_mir_bb_info): Add con_visited member.
* df-problems.c (df_mir_alloc): Initialize con_visited,
do not fully populate IN and OUT.
(df_mir_reset): Likewise.
(df_mir_confluence_0): Set con_visited.
(df_mir_confluence_n): Properly handle implicitely
fully populated IN and OUT as designated by con_visited
and update con_visited accordingly.
2021-05-04 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-05-02 Jakub Jelinek <jakub@redhat.com>
PR target/100375
* config/nvptx/nvptx.c (nvptx_sese_pseudo): Use NULL instead of 0
as first argument of pseudo_node_t constructors.
2021-05-04 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-29 Jakub Jelinek <jakub@redhat.com>
PR target/100302
* config/aarch64/aarch64.c (aarch64_add_offset_1_temporaries): Use
absu_hwi instead of abs_hwi.
2021-05-04 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-27 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/100254
* cfgcleanup.c (outgoing_edges_match): Check REG_EH_REGION on
last1 and last2 insns rather than BB_END (bb1) and BB_END (bb2) insns.
2021-05-04 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-26 Jakub Jelinek <jakub@redhat.com>
PR debug/100255
* vmsdbgout.c (ASM_OUTPUT_DEBUG_STRING, vmsdbgout_begin_block,
vmsdbgout_end_block, lookup_filename, vmsdbgout_source_line): Remove
register keywords.
2021-05-04 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-21 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/100148
* cprop.c (constprop_register): Use next_nondebug_insn instead of
NEXT_INSN.
2021-05-04 Martin Sebor <msebor@redhat.com>
PR tree-optimization/91914
* expr.c (string_constant): Pass argument type to
fold_ctor_reference to guide it.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
Jakub Jelinek <jakub@redhat.com>
PR target/97865
* configure: Regenerate.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2020-12-23 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin-driver.c (validate_macosx_version_min): Allow
MACOSX_DEPLOYMENT_TARGET=11.
(darwin_default_min_version): Adjust warning spelling to avoid
an apostrophe.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2020-12-21 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin-driver.c (darwin_find_version_from_kernel):
Compute the minor OS version from the minor kernel version.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2020-11-06 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin-c.c: Allow for Darwin20 to correspond to macOS 11.
* config/darwin-driver.c: Likewise.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2020-11-01 Iain Sandoe <iain@sandoe.co.uk>
* config/host-darwin.c: Align pch_address_space to 16384.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2021-03-01 Iain Sandoe <iain@sandoe.co.uk>
PR target/44107
PR target/48097
* config/darwin-protos.h (darwin_should_restore_cfa_state): New.
* config/darwin.c (darwin_should_restore_cfa_state): New.
* config/darwin.h (TARGET_ASM_SHOULD_RESTORE_CFA_STATE): New.
* doc/tm.texi: Regenerated.
* doc/tm.texi.in: Document TARGET_ASM_SHOULD_RESTORE_CFA_STATE.
* dwarf2cfi.c (connect_traces): If the target requests, restore
the CFA expression after a DW_CFA_restore.
* target.def (TARGET_ASM_SHOULD_RESTORE_CFA_STATE): New hook.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2021-04-03 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.c (machopic_legitimize_pic_address): Check
that the current pic register is one of the hard reg set
before setting liveness.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2020-11-22 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin-c.c (struct f_align_stack): Rename
to type from align_stack to f_align_stack.
(push_field_alignment): Likewise.
(pop_field_alignment): Likewise.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
Backported from master:
2020-09-07 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.c (darwin_libc_has_function): Report sincos
available from 10.9.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.c: Lookup Objective C metadata and force indirection
for IVAR refs.
2021-05-01 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.h (ASM_GENERATE_INTERNAL_LABEL):
Make ubsan_{data,type},ASAN symbols linker-visible.
2021-04-30 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
Backported from master:
2019-11-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR tree-optimization/92608
* tree-ssa-loop-unswitch.c (find_loop_guard): Use safe_dyn_cast instead
of dyn_cast.
2021-04-30 James Clarke <jrtc27@jrtc27.com>
PR bootstrap/87338
* dwarf2out.c (dwarf2out_inline_entry): Use ASM_OUTPUT_DEBUG_LABEL
instead of ASM_GENERATE_INTERNAL_LABEL and ASM_OUTPUT_LABEL.
2021-04-28 Uros Bizjak <ubizjak@gmail.com>
Backported from master:
2021-04-23 Uroš Bizjak <ubizjak@gmail.com>
PR target/100182
* config/i386/sync.md (FILD_ATOMIC/FIST_ATOMIC FP load peephole2):
Copy operand 3 to operand 4. Use sse_reg_operand
as operand 3 predicate.
(FILD_ATOMIC/FIST_ATOMIC FP load peephole2 with mem blockage): Ditto.
(LDX_ATOMIC/STX_ATOMIC FP load peephole2): Ditto.
(LDX_ATOMIC/LDX_ATOMIC FP load peephole2 with mem blockage): Ditto.
(FILD_ATOMIC/FIST_ATOMIC FP store peephole2):
Copy operand 1 to operand 0.
(FILD_ATOMIC/FIST_ATOMIC FP store peephole2 with mem blockage): Ditto.
(LDX_ATOMIC/STX_ATOMIC FP store peephole2): Ditto.
(LDX_ATOMIC/LDX_ATOMIC FP store peephole2 with mem blockage): Ditto.
2021-04-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/99954
* tree-loop-distribution.c: Include tree-affine.h.
(generate_memcpy_builtin): Try using tree-affine to prove
non-overlap.
(loop_distribution::classify_builtin_ldst): Always classify
as PKIND_MEMMOVE.
2021-04-25 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2021-04-14 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/99929
* rtl.h (same_vector_encodings_p): New function.
* cse.c (exp_equiv_p): Check that CONST_VECTORs have the same encoding.
* cselib.c (rtx_equal_for_cselib_1): Likewise.
* jump.c (rtx_renumbered_equal_p): Likewise.
* lra-constraints.c (operands_match_p): Likewise.
* reload.c (operands_match_p): Likewise.
* rtl.c (rtx_equal_p_cb, rtx_equal_p): Likewise.
2021-04-25 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2021-03-30 Richard Sandiford <richard.sandiford@arm.com>
PR target/98136
* config/aarch64/aarch64.md (mov<mode>): Pass multi-instruction
CONST_INTs to aarch64_expand_mov_immediate when called after RA.
2021-04-25 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/96796
* lra-constraints.c (in_class_p): Add a default-false
allow_all_reload_class_changes_p parameter. Do not treat
reload moves specially when the parameter is true.
(get_reload_reg): Try to narrow the class of an existing OP_OUT
reload if we're reloading a reload pseudo in a reload instruction.
2021-04-25 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2020-12-31 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/98302
* tree-vect-patterns.c (vect_determine_precisions_from_users): Make
sure that the precision remains greater than the shift count.
2021-04-25 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
PR middle-end/95694
* expr.c (expand_expr_real_2): Get the mode from the type rather
than the rtx, and assert that it is consistent with the mode of
the rtx (where known). Optimize all constant integers, not just
those that can be represented in poly_int64.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-20 Jakub Jelinek <jakub@redhat.com>
PR target/99767
* tree-vect-loop.c (vect_transform_loop): Don't remove just
dead scalar .MASK_LOAD calls, but also dead .COND_* calls - replace
them by their last argument.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-20 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/99905
* combine.c (expand_compound_operation): If pos + len > modewidth,
perform the right shift by pos in inner_mode and then convert to mode,
instead of trying to simplify a shift of rtx with inner_mode by pos
as if it was a shift in mode.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-20 Jakub Jelinek <jakub@redhat.com>
PR debug/99830
* combine.c (simplify_and_const_int_1): Don't optimize varop
away if it has side-effects.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-20 Jakub Jelinek <jakub@redhat.com>
PR lto/99849
* expr.c (expand_expr_addr_expr_1): Test is_global_var rather than
just TREE_STATIC on COMPOUND_LITERAL_EXPR_DECLs.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-20 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/98601
* rtlanal.c (rtx_addr_can_trap_p_1): Allow in assert unknown size
not just for BLKmode, but also for VOIDmode. For STRICT_ALIGNMENT
unaligned_mems handle VOIDmode like BLKmode.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-04-20 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/99863
* dse.c (replace_read): Drop regs_live argument. Instead of
regs_live, use store_insn->fixed_regs_live if non-NULL,
otherwise punt if insns sequence clobbers or sets any hard
registers.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-30 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/99777
* fold-const.c (extract_muldiv_1): For conversions, punt on casts from
types other than scalar integral types.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-30 Jakub Jelinek <jakub@redhat.com>
PR debug/99334
* dwarf2out.h (struct dw_fde_node): Add rule18 member.
* dwarf2cfi.c (dwarf2out_frame_debug_expr): When handling (set hfp sp)
assignment with drap_reg active, queue reg save for hfp with offset 0
and flush queued reg saves. When handling a push with rule18,
defer queueing reg save for hfp and just assert the offset is 0.
(scan_trace): Assert that fde->rule18 is false.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-30 Jakub Jelinek <jakub@redhat.com>
PR debug/99388
* dwarf2out.c (insert_float): Change return type from void to
unsigned, handle GET_MODE_SIZE (mode) == 2 and return element size.
(mem_loc_descriptor, loc_descriptor, add_const_value_attribute):
Adjust callers.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR target/99542
* config/aarch64/aarch64.c
(aarch64_simd_clone_compute_vecsize_and_simdlen): If not a function
definition, walk TYPE_ARG_TYPES list if non-NULL for argument types
instead of DECL_ARGUMENTS. Ignore types for uniform arguments.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/93235
* expmed.c (store_bit_field_using_insv): Return false of xop0 is a
SUBREG and a SUBREG to op_mode can't be created.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/99225
* fold-const.c (fold_binary_loc) <case NE_EXPR>: In (x & (1 << y)) != 0
to ((x >> y) & 1) != 0 simplifications use build_one_cst instead of
build_int_cst (..., 1). Formatting fixes.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/99204
* fold-const.c (fold_read_from_constant_string): Check that
tree_fits_uhwi_p (index) rather than just that index is INTEGER_CST.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR ipa/99034
* tree-cfg.c (gimple_merge_blocks): If bb a starts with eh landing
pad or non-local label, put FORCED_LABELs from bb b after that label
rather than before it.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/99079
* match.pd (A % (pow2pcst << N) -> A & ((pow2pcst << N) - 1)): Remove
useless tree_nop_conversion_p (type, TREE_TYPE (@3)) check. Instead
require both type and TREE_TYPE (@1) to be integral types and either
type having smaller or equal precision, or TREE_TYPE (@1) being
unsigned type, or type being signed type. If TREE_TYPE (@1)
doesn't have wrapping overflow, perform the subtraction of one in
unsigned type.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR c++/99035
* varasm.c (declare_weak): For -fsyntax-only, allow even
TREE_ASM_WRITTEN function decls.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/99007
* gimplify.c (gimplify_scan_omp_clauses): For MEM_REF on reductions,
temporarily disable gimplify_ctxp->into_ssa around gimplify_expr
calls.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/97487
* ifcvt.c (noce_can_force_operand): New function.
(noce_emit_move_insn): Use it.
(noce_try_sign_mask): Likewise. Formatting fix.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-03-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/97971
* lra-constraints.c (process_alt_operands): For inline asm, don't call
fatal_insn, but instead return false.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-29 Jakub Jelinek <jakub@redhat.com>
PR debug/98331
* cfgbuild.c (find_bb_boundaries): Reset debug_insn when seeing
a BARRIER.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-29 Jakub Jelinek <jakub@redhat.com>
PR target/98853
* config/aarch64/aarch64.md (*aarch64_bfxilsi_uxtw): Use
%w0, %w1 and %2 instead of %0, %1 and %2.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-29 Jakub Jelinek <jakub@redhat.com>
PR target/98681
* config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p):
Use UINTVAL (shft_amnt) and UINTVAL (mask) instead of INTVAL (shft_amnt)
and INTVAL (mask). Add && INTVAL (mask) > 0 condition.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-29 Jakub Jelinek <jakub@redhat.com>
PR testsuite/97301
* config/rs6000/mmintrin.h (__m64): Add __may_alias__ attribute.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-29 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/90248
* match.pd (X cmp 0.0 ? 1.0 : -1.0 -> copysign(1, +-X),
X cmp 0.0 ? -1.0 : +1.0 -> copysign(1, -+X)): Remove
simplifications.
(X * (X cmp 0.0 ? 1.0 : -1.0) -> +-abs(X),
X * (X cmp 0.0 ? -1.0 : 1.0) -> +-abs(X)): New simplifications.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-09 Jakub Jelinek <jakub@redhat.com>
PR c++/98556
* tree-cfg.c (verify_gimple_assign_binary): Allow lhs of
POINTER_DIFF_EXPR to be any integral type.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-06 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/98474
* wide-int.cc (wi::to_mpz): If wide_int has MSB set, but type
is unsigned and excess negative, append set bits after len until
precision.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-06 Jakub Jelinek <jakub@redhat.com>
PR c++/98353
* gimplify.c (gimplify_init_ctor_eval_range): Gimplify value before
storing it into cref.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-06 Jakub Jelinek <jakub@redhat.com>
* gimplify.c (struct gimplify_omp_ctx): Add has_depend member.
(gimplify_scan_omp_clauses): Set it to true if OMP_CLAUSE_DEPEND
appears on OMP_TASK.
(gimplify_adjust_omp_clauses_1, gimplify_adjust_omp_clauses): Force
GOVD_WRITTEN on shared variables if task construct has depend clause.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-06 Jakub Jelinek <jakub@redhat.com>
PR middle-end/98183
* omp-low.c (lower_omp_target): Don't add OMP_RETURN for
data regions.
* omp-expand.c (expand_omp_target): Don't try to remove
OMP_RETURN for data regions.
(build_omp_regions_1, omp_make_gimple_edges): Don't expect
OMP_RETURN for data regions.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-06 Jakub Jelinek <jakub@redhat.com>
PR middle-end/98205
* omp-expand.c (expand_omp_for_generic): Fix up broken_loop handling.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-06 Jakub Jelinek <jakub@redhat.com>
PR target/98100
* cfgexpand.c (expand_gimple_basic_block): For vars with
vector type, use TYPE_MODE rather than DECL_MODE.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-06 Jakub Jelinek <jakub@redhat.com>
* dwarf2out.c (add_scalar_info): Only use add_AT_wide for 128-bit
constants and only in dwarf-5 or later, where DW_FORM_data16 is
available. Otherwise use DW_FORM_block*/DW_FORM_exprloc with
DW_OP_implicit_value to describe the constant.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2021-01-06 Jakub Jelinek <jakub@redhat.com>
PR target/98063
* config/i386/i386.c (ix86_expand_call): Handle non-plt
CM_LARGE_PIC calls.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-11-25 Jakub Jelinek <jakub@redhat.com>
PR debug/97599
* dwarf2out.c (gen_subprogram_die): Call
gen_unspecified_parameters_die even if not early dwarf, but only
if subr_die is a newly created DIE.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-11-02 Jakub Jelinek <jakub@redhat.com>
* wide-int.cc (wi::set_bit_large): Call canonize unless setting
msb bit and clearing bits above it.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-10-16 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/97386
* combine.c (simplify_shift_const_1): Don't optimize nested ROTATEs if
they have different modes.
2021-04-20 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-10-16 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/97294
* tree-cfg.c (move_block_to_fn): Call notice_special_calls on
call stmts being moved into dest_cfun.
* omp-low.c (lower_rec_input_clauses): Set cfun->calls_alloca when
adding __builtin_alloca_with_align call without gimplification.
2021-04-19 Eric Botcazou <ebotcazou@adacore.com>
* config/i386/winnt.c (i386_pe_seh_cold_init): Properly deal with
frames larger than the SEH maximum frame size.
2021-04-15 Lili Cui <lili.cui@intel.com>
* common/config/i386/i386-common.c
(processor_names): Add tigerlake.
(processor_alias_table): Ditto.
* config.gcc (x86_64_archs): Ditto.
* config/i386/driver-i386.c
(host_detect_local_cpu): Detect tigerlake, add "has_avx" to
classify processor.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
PROCESSOR_TIGERLAKE.
* config/i386/i386.c (m_TIGERLAKE): Define.
(m_CORE_AVX512): Add m_TIGERLAKE.
(processor_cost_table): Add skylake_cost for tigerlake.
(processor_model): Add M_INTEL_COREI7_TIGERLAKE.
(arch_names_table): Add tigerlake.
(get_builtin_code_for_version): Handle PROCESSOR_TIGERLAKE.
* config/i386/i386.h (TARGET_TIGERLAKE): Define.
(enum processor_type): Add PROCESSOR_TIGERLAKE.
(PTA_TIGERLAKE): Define.
* doc/extend.texi (__builtin_cpu_is): Add tigerlake.
* doc/invoke.texi (-march=cpu-type): Ditto.
2021-04-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
Backported from master:
2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
PR driver/47785
* gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
(driver::main): Call putenv_COLLECT_AS_OPTIONS.
* opts-common.c (parse_options_from_collect_gcc_options): New function.
(prepend_xassembler_to_collect_as_options): Likewise.
* opts.h (parse_options_from_collect_gcc_options): Declare prototype.
(prepend_xassembler_to_collect_as_options): Likewise.
* lto-opts.c (lto_write_options): Stream assembler options
in COLLECT_AS_OPTIONS.
* lto-wrapper.c (xassembler_options_error): New static variable.
(get_options_from_collect_gcc_options): Move parsing options code to
parse_options_from_collect_gcc_options and call it.
(merge_and_complain): Validate -Xassembler options.
(append_compiler_options): Handle OPT_Xassembler.
(run_gcc): Append command line -Xassembler options to
collect_gcc_options.
* doc/invoke.texi: Add documentation about using Xassembler
options with LTO.
2021-04-12 Richard Biener <rguenther@suse.de>
Backported from master:
2021-03-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/99694
* tree-ssa-sccvn.c (visit_phi): Ignore edges with the
PHI result.
2021-04-12 Richard Biener <rguenther@suse.de>
Backported from master:
2021-02-24 Richard Biener <rguenther@suse.de>
PR c/99224
* builtins.c (fold_builtin_next_arg): Avoid NULL arg.
2021-04-12 Richard Biener <rguenther@suse.de>
Backported from master:
2021-02-08 Richard Biener <rguenther@suse.de>
PR lto/96591
* tree.c (walk_tree_1): Walk VECTOR_CST elements.
2021-04-08 Martin Jambor <mjambor@suse.cz>
Backported from master:
2021-04-01 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/97009
* tree-sra.c (access_or_its_child_written): New function.
(propagate_subaccesses_from_rhs): Use it instead of a simple grp_write
test.
2021-04-01 Richard Biener <rguenther@suse.de>
Backported from master:
2021-04-01 Richard Biener <rguenther@suse.de>
PR tree-optimization/99856
* tree-vect-patterns.c (vect_recog_over_widening_pattern): Promote
precision to vector element precision.
2021-03-26 Iain Buclaw <ibuclaw@gdcproject.org>
Backported from master:
2021-03-26 Iain Buclaw <ibuclaw@gdcproject.org>
PR ipa/99466
* tree-emutls.c (get_emutls_init_templ_addr): Mark initializer of weak
TLS declarations as public.
2021-03-25 Xionghu Luo <luoxhu@linux.ibm.com>
Backported from master:
2021-03-25 Xionghu Luo <luoxhu@linux.ibm.com>
PR target/97329
* config/rs6000/rs6000.c (power8_costs): Change l2 cache
from 256 to 512.
2021-03-23 H.J. Lu <hjl.tools@gmail.com>
Backported from master:
2021-03-23 H.J. Lu <hjl.tools@gmail.com>
PR target/99704
* config/i386/cpuid.h (__cpuid): Add __volatile__.
(__cpuid_count): Likewise.
2021-03-22 Kito Cheng <kito.cheng@sifive.com>
Backported from master:
2021-03-22 Kito Cheng <kito.cheng@sifive.com>
PR target/99702
* config/riscv/riscv.c (riscv_expand_block_move): Get RTL value
after type checking.
2021-03-18 Sinan Lin <sinan@isrc.iscas.ac.cn>
Backported from master:
2021-03-18 Sinan Lin <sinan@isrc.iscas.ac.cn>
Kito Cheng <kito.cheng@sifive.com>
* config/riscv/riscv.c (riscv_block_move_straight): Change type
to unsigned HOST_WIDE_INT for parameter and local variable with
HOST_WIDE_INT type.
(riscv_adjust_block_mem): Ditto.
(riscv_block_move_loop): Ditto.
(riscv_expand_block_move): Ditto.
2021-03-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2021-03-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-builtins.c (aarch64_expand_rng_builtin): Use EQ
to compare against CC_REG rather than NE.
2021-03-17 Martin Jambor <mjambor@suse.cz>
Backported from master:
2021-03-05 Martin Jambor <mjambor@suse.cz>
PR ipa/98078
* cgraph.c (cgraph_edge::set_call_stmt): Do not update all
corresponding speculative edges if we are about to resolve
speculation. Make edge direct (and so resolve speculations) before
removing it from call_site_hash.
(cgraph_edge::make_direct): Relax the initial assert to allow calling
the function on speculative direct edges.
2021-03-17 Richard Biener <rguenther@suse.de>
Backported from master:
2021-03-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/98758
* tree-data-ref.c (int_divides_p): Use lambda_int arguments.
(lambda_matrix_right_hermite): Avoid undefinedness with
signed integer abs and multiplication.
(analyze_subscript_affine_affine): Use lambda_int.
2021-03-17 Richard Biener <rguenther@suse.de>
Backported from master:
2021-01-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/98282
* tree-ssa-sccvn.c (vn_get_stmt_kind): Classify tcc_reference on
invariants as VN_NARY.
2021-03-17 Richard Biener <rguenther@suse.de>
Backported from master:
2021-01-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/98117
* tree-vect-loop-manip.c (vect_gen_vector_loop_niters):
Properly handle degenerate niter when setting the vector
loop IV range.
2021-03-17 Richard Biener <rguenther@suse.de>
Backported from master:
2020-03-04 Richard Biener <rguenther@suse.de>
PR tree-optimization/93964
* graphite-isl-ast-to-gimple.c
(gcc_expression_from_isl_ast_expr_id): Add intermediate
conversion for pointer to integer converts.
* graphite-scop-detection.c (assign_parameter_index_in_region):
Relax assert.
2021-03-07 John David Anglin <danglin@gcc.gnu.org>
PR target/85074
* config/pa/pa.c (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Define as
hook_bool_const_tree_hwi_hwi_const_tree_true.
(pa_asm_output_mi_thunk): Add support for nonzero vcall_offset.
2021-03-03 Eric Botcazou <ebotcazou@adacore.com>
PR target/99234
* config/i386/i386.c (ix86_compute_frame_layout): For a SEH target,
point back the hard frame pointer to its default location when the
frame is larger than SEH_MAX_FRAME_SIZE.
2021-03-01 Eric Botcazou <ebotcazou@adacore.com>
PR target/99234
* config/i386/i386.c (ix86_compute_frame_layout): For a SEH target,
point the hard frame pointer to the SSE register save area instead
of the general register save area. Perform only minimal adjustment
for small frames if it is initially not correctly aligned.
(ix86_expand_prologue): Remove early saves for a SEH target.
* config/i386/winnt.c (struct seh_frame_state): Document constraint.
2021-02-23 Qian Jianhua <qianjh@cn.fujitsu.com>
Backported from master:
2021-02-23 Qian Jianhua <qianjh@cn.fujitsu.com>
* config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
* config/aarch64/aarch64.c (a64fx_addrcost_table): New.
(a64fx_regmove_cost, a64fx_vector_cost): New.
(a64fx_tunings): Use the new added cost tables.
2021-02-15 Eric Botcazou <ebotcazou@adacore.com>
* df-core.c (df_worklist_dataflow_doublequeue): Use proper cast.
2021-02-11 Eric Botcazou <ebotcazou@adacore.com>
* config/i386/winnt.c (i386_pe_seh_unwind_emit): When switching to
the cold section, emit a nop before the directive if the previous
active instruction can throw.
2021-02-05 Matthias Klose <doko@ubuntu.com>
Backported from master:
2020-10-06 Richard Biener <rguenther@suse.de>
PR tree-optimization/97236
* tree-vect-stmts.c (get_group_load_store_type): Keep
VMAT_ELEMENTWISE for single-element vectors.
2021-02-03 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-11-20 Jakub Jelinek <jakub@redhat.com>
PR target/97528
* config/arm/arm.c (neon_vector_mem_operand): For POST_MODIFY, require
first POST_MODIFY operand is a REG and is equal to the first operand
of PLUS.
2021-01-29 Richard Biener <rguenther@suse.de>
Backported from master:
2021-01-29 Bin Cheng <bin.cheng@linux.alibaba.com>
Richard Biener <rguenther@suse.de>
PR tree-optimization/97627
* tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions):
Do not analyze fake edges.
2021-01-21 Wilco Dijkstra <wdijkstr@arm.com>
Backported from master:
2019-10-16 Wilco Dijkstra <wdijkstr@arm.com>
PR target/98618
* config/aarch64/aarch64.c (aarch64_classify_symbol):
Apply reasonable limit to symbol offsets.
2021-01-13 Samuel Thibault <samuel.thibault@ens-lyon.org>
Backported from master:
2021-01-13 Samuel Thibault <samuel.thibault@ens-lyon.org>
* config.gcc [$target == *-*-gnu*]: Enable
'default_gnu_indirect_function'.
2021-01-06 2019-07-10 Marc Glisse <marc.glisse@inria.fr>
PR testsuite/90806
Backport from mainline
* wide-int.h (wi::lshift): Reject negative values for the fast path.
2020-12-28 Uroš Bizjak <ubizjak@gmail.com>
PR target/96793
* config/i386/i386.c (ix86_expand_rint):
Remove the sign of the intermediate value for flag_rounding_math.
2020-12-28 Piotr Kubaj <pkubaj@FreeBSD.org>
Backported from master:
2020-12-16 Piotr Kubaj <pkubaj@FreeBSD.org>
* config.gcc (powerpc*le-*-freebsd*): Add.
* configure.ac (powerpc*le-*-freebsd*): Ditto.
* configure: Regenerate.
* config/rs6000/freebsd64.h (ASM_SPEC_COMMON): Use ENDIAN_SELECT.
(DEFAULT_ASM_ENDIAN): Add little endian support.
(LINK_OS_FREEBSD_SPEC64): Ditto.
2020-12-27 Uroš Bizjak <ubizjak@gmail.com>
PR target/96793
* config/i386/i386.c (ix86_expand_truncdf_32):
Remove the sign of the intermediate value for flag_rounding_math.
2020-12-24 Roman Zhuykov <zhroma@ispras.ru>
Backported from master:
2020-12-05 Roman Zhuykov <zhroma@ispras.ru>
PR rtl-optimization/97421
* modulo-sched.c (generate_prolog_epilog): Remove forward
declaration, adjust last argument name and type.
(const_iteration_count): Add bool pointer parameter to return
whether count register is read in pre-header after its
initialization.
(sms_schedule): Fix count register initialization adjustment
procedure according to what const_iteration_count said.
2020-12-23 Uroš Bizjak <ubizjak@gmail.com>
PR target/96793
* config/i386/i386.c (ix86_expand_floorceil):
Remove the sign of the intermediate value for flag_rounding_math.
(ix86_expand_floorceildf_32): Ditto.
2020-12-14 Wilco Dijkstra <wdijkstr@arm.com>
* config.gcc (aarch64*-*-*): Add --with-tune. Support --with-cpu=native.
* config/aarch64/aarch64.h (OPTION_DEFAULT_SPECS): Add --with-tune.
2020-12-14 Sebastian Pop <spop@amazon.com>
* config.gcc (aarch64*-*-*): Remove --with-{cpu,arch,tune}-32 flags.
2020-12-03 Uroš Bizjak <ubizjak@gmail.com>
Jakub Jelinek <jakub@redhat.com>
PR target/98086
* config/i386/i386.c (ix86_md_asm_adjustmd): Rewrite
zero-extension part to use convert_to_mode.
2020-12-02 Richard Biener <rguenther@suse.de>
Backported from master:
2020-07-06 Richard Biener <rguenther@suse.de>
PR tree-optimization/96075
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
for the misalignment calculation for negative step.
2020-12-02 Richard Biener <rguenther@suse.de>
Backported from master:
2020-07-31 Richard Biener <rguenther@suse.de>
PR middle-end/96369
* fold-const.c (fold_range_test): Special-case constant
LHS for short-circuiting operations.
2020-12-02 Richard Biener <rguenther@suse.de>
Backported from master:
2020-11-13 Richard Biener <rguenther@suse.de>
PR tree-optimization/97812
* tree-vrp.c (register_edge_assert_for_2): Extend the range
according to its sign before seeing whether it fits.
2020-12-02 Richard Biener <rguenther@suse.de>
Backported from master:
2020-10-01 Richard Biener <rguenther@suse.de>
PR tree-optimization/97255
* tree-vect-patterns.c (vect_recog_bool_pattern): Also handle
VIEW_CONVERT_EXPR.
2020-12-02 Richard Biener <rguenther@suse.de>
Backported from master:
2020-09-18 Richard Biener <rguenther@suse.de>
PR tree-optimization/97081
* tree-vect-patterns.c (vect_recog_rotate_pattern): Use the
precision of the shifted operand to determine the mask.
2020-12-02 Richard Biener <rguenther@suse.de>
Backported from master:
2020-08-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/96579
* tree-ssa-reassoc.c (linearize_expr_tree): If we expand
rhs via special ops make sure to swap operands.
2020-12-02 Richard Biener <rguenther@suse.de>
Backported from master:
2020-07-30 Richard Biener <rguenther@suse.de>
PR tree-optimization/96370
* tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
code parameter and use it instead of picking it up from
the stmt that is being rewritten.
(reassociate_bb): Pass down the operation code.
2020-12-02 Richard Biener <rguenther@suse.de>
Backported from master:
2020-08-07 Richard Biener <rguenther@suse.de>
PR tree-optimization/96514
* tree-if-conv.c (if_convertible_bb_p): If the last stmt
is a call that is control-altering, fail.
2020-12-01 Richard Biener <rguenther@suse.de>
Backported from master:
2020-10-26 Richard Biener <rguenther@suse.de>
PR middle-end/97554
* sbitmap.c (sbitmap_vector_alloc): Use size_t for byte
quantities to avoid overflow.
2020-11-30 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
* config/arm/arm.c (arm_gen_far_branch): New function
arm_gen_far_branch.
* config/arm/arm.md: Update b<cond> for Thumb2 range checks.
2020-11-28 Eric Botcazou <ebotcazou@adacore.com>
PR target/97939
* config/sparc/predicates.md (arith_double_add_operand): Comment.
* config/sparc/sparc.md (uaddvdi4): Use arith_double_operand.
(addvdi4): Use arith_double_add_operand.
(addsi3): Remove useless attributes.
(addvsi4): Use arith_add_operand.
(*cmp_ccv_plus): Likewise and add second alternative accordingly.
(*cmp_ccxv_plus): Likewise.
(*cmp_ccv_plus_set): Likewise.
(*cmp_ccxv_plus_set): Likewise.
(*cmp_ccv_plus_sltu_set): Likewise.
(usubvdi4): Use arith_double_operand.
(subvdi4): Use arith_double_add_operand.
(subsi3): Remove useless attributes.
(subvsi4): Use arith_add_operand.
(*cmp_ccv_minus): Likewise and add second alternative accordingly.
(*cmp_ccxv_minus): Likewise.
(*cmp_ccv_minus_set): Likewise.
(*cmp_ccxv_minus_set): Likewise.
(*cmp_ccv_minus_sltu_set): Likewise.
(negsi2): Use register_operand.
(unegvsi3): Likewise.
(negvsi3) Likewise.
(*cmp_ccnz_neg): Likewise.
(*cmp_ccxnz_neg): Likewise.
(*cmp_ccnz_neg_set): Likewise.
(*cmp_ccxnz_neg_set): Likewise.
(*cmp_ccc_neg_set): Likewise.
(*cmp_ccxc_neg_set): Likewise.
(*cmp_ccc_neg_sltu_set): Likewise.
(*cmp_ccv_neg): Likewise.
(*cmp_ccxv_neg): Likewise.
(*cmp_ccv_neg_set): Likewise.
(*cmp_ccxv_neg_set): Likewise.
(*cmp_ccv_neg_sltu_set): Likewise.
2020-11-28 Eric Botcazou <ebotcazou@adacore.com>
PR target/96607
* config/sparc/sparc-protos.h (eligible_for_call_delay): Delete.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
* config/sparc/sparc.md (in_call_delay): Likewise.
(tls_delay_slot): New attribute.
(define_delay [call]): Use in_branch_delay.
(tgd_call<P:mode>): Set type to call_no_delay_slot when
tls_delay_slot is false.
(tldm_call<P:mode>): Likewise.
2020-11-24 Jason Merrill <jason@redhat.com>
PR c++/97918
* dwarf2out.c (dwarf2out_early_finish): flush_limbo_die_list
after gen_scheduled_generic_parms_dies.
2020-11-17 Sebastian Pop <spop@amazon.com>
Backported from master:
2020-11-17 Sebastian Pop <spop@amazon.com>
* config.gcc: add configure flags --with-{cpu,arch,tune}-{32,64}
as alias flags for --with-{cpu,arch,tune} on AArch64.
* doc/install.texi: Document new flags for aarch64.
2020-11-17 Sebastian Pop <spop@amazon.com>
Backported from master:
2020-11-17 Sebastian Pop <spop@amazon.com>
* config.gcc: Add --with-tune to AArch64 configure flags.
2020-11-17 Tamar Christina <tamar.christina@arm.com>
Backported from master:
2020-10-27 Tamar Christina <tamar.christina@arm.com>
PR target/97535
* config/aarch64/aarch64.c (aarch64_expand_cpymem): Use unsigned
arithmetic in check.
2020-11-17 Monk Chiang <monk.chiang@sifive.com>
Backported from master:
2020-11-14 Monk Chiang <monk.chiang@sifive.com>
PR target/97682
* config/riscv/riscv.h (RISCV_PROLOGUE_TEMP_REGNUM): Change register
to t0.
(RISCV_CALL_ADDRESS_TEMP_REGNUM): New Marco, define t1 register.
(RISCV_CALL_ADDRESS_TEMP): Use it for call instructions.
* config/riscv/riscv.c (riscv_legitimize_call_address): Use
RISCV_CALL_ADDRESS_TEMP.
(riscv_compute_frame_info): Change temporary register to t0 form t1.
(riscv_trampoline_init): Adjust comment.
2020-11-16 Cui,Lili <lili.cui@intel.com>
* config/i386/i386.h: Add PREFETCHW to march=broadwell.
* doc/invoke.texi: Put PREFETCHW back to relation arch.
2020-11-11 liuhongt <hongtao.liu@intel.com>
* config/i386/i386.c (ix86_option_override_internal):
Handle PTA_CLDEMOTE, PTA_MOVDIRI, PTA_MOVDIR64B.
* config/i386/i386.h (PTA_CLDEMOTE, PTA_MOVDIRI,
PTA_MOVDIR64B.): Define.
2020-11-09 Lili Cui <lili.cui@intel.com>
PR target/97685
* config/i386/i386.h:
(PTA_BROADWELL): Delete PTA_PRFCHW.
(PTA_SILVERMONT): Add PTA_PRFCHW.
(PTA_KNL): Add PTA_PREFETCHWT1.
(PTA_TREMONT): Add PTA_MOVDIRI, PTA_MOVDIR64B, PTA_CLDEMOTE and PTA_WAITPKG.
* doc/invoke.texi: Delete PREFETCHW for broadwell, skylake, knl, knm,
skylake-avx512, cannonlake, icelake-client, icelake-server, cascadelake,
cooperlake, tigerlake and sapphirerapids.
Add PREFETCHW for silvermont, goldmont, goldmont-plus and tremont.
Add XSAVEC and XSAVES for goldmont, goldmont-plus and tremont.
Add MOVDIRI, MOVDIR64B, CLDEMOTE and WAITPKG for tremont.
Add KEYLOCKER and HREST for alderlake.
Add AMX-BF16, AMX-TILE, AMX-INT8 and UINTR for sapphirerapids.
Add KEYLOCKER for tigerlake.
2020-10-22 Andreas Krebbel <krebbel@linux.ibm.com>
Backported from master:
2020-10-22 Andreas Krebbel <krebbel@linux.ibm.com>
PR rtl-optimization/97439
* dfp.c (decimal_real_maxval): Set the sign flag in the
generated number.
2020-10-16 Martin Liska <mliska@suse.cz>
Backported from master:
2020-10-16 Martin Liska <mliska@suse.cz>
PR ipa/97404
* ipa-prop.c (struct ipa_vr_ggc_hash_traits):
Compare types of VRP as we can merge ranges of different types.
2020-10-15 Martin Liska <mliska@suse.cz>
Backported from master:
2020-10-15 Martin Liska <mliska@suse.cz>
PR ipa/97295
* profile-count.c (profile_count::to_frequency): Move part of
gcc_assert to STATIC_ASSERT.
* regs.h (REG_FREQ_FROM_BB): Do not use count.to_frequency for
a function that does not have count_max initialized.
2020-10-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (neoversen2_tunings): Define.
* config/aarch64/aarch64-cores.def (neoverse-n2): Use it.
2020-10-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-10-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/97349
* config/aarch64/arm_neon.h (vdupq_n_p8, vdupq_n_p16,
vdupq_n_p64, vdupq_n_s8, vdupq_n_s16, vdupq_n_u8, vdupq_n_u16):
Fix argument type.
2020-10-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.md ("unspec"): Add UNSPEC_FRINT32Z,
UNSPEC_FRINT32X, UNSPEC_FRINT64Z, UNSPEC_FRINT64X.
(aarch64_<frintnzs_op><mode>): New define_insn.
* config/aarch64/aarch64.h (TARGET_FRINT): Define.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
__ARM_FEATURE_FRINT when appropriate.
* config/aarch64/aarch64-simd-builtins.def: Add builtins for frint32z,
frint32x, frint64z, frint64x.
* config/aarch64/arm_acle.h (__rint32zf, __rint32z, __rint64zf,
__rint64z, __rint32xf, __rint32x, __rint64xf, __rint64x): Define.
* config/aarch64/arm_neon.h (vrnd32z_f32, vrnd32zq_f32, vrnd32z_f64,
vrnd32zq_f64, vrnd32x_f32, vrnd32xq_f32, vrnd32x_f64, vrnd32xq_f64,
vrnd64z_f32, vrnd64zq_f32, vrnd64z_f64, vrnd64zq_f64, vrnd64x_f32,
vrnd64xq_f32, vrnd64x_f64, vrnd64xq_f64): Define.
* config/aarch64/iterators.md (VSFDF): Define.
(FRINTNZX): Likewise.
(frintnzs_op): Likewise.
2020-10-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-10-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/97150
* config/aarch64/arm_neon.h (vqrshlb_u8): Make second argument
signed.
(vqrshlh_u16): Likewise.
(vqrshls_u32): Likewise.
(vqrshld_u64): Likewise.
(vqshlb_u8): Likewise.
(vqshlh_u16): Likewise.
(vqshls_u32): Likewise.
(vqshld_u64): Likewise.
(vshld_u64): Likewise.
2020-10-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-10-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/96313
* config/aarch64/aarch64-simd-builtins.def (sqmovun): Use UNOPUS
qualifiers.
* config/aarch64/arm_neon.h (vqmovun_s16): Adjust builtin call.
Remove unnecessary result cast.
(vqmovun_s32): Likewise.
(vqmovun_s64): Likewise.
(vqmovunh_s16): Likewise. Fix return type.
(vqmovuns_s32): Likewise.
(vqmovund_s64): Likewise.
2020-10-08 Alan Modra <amodra@gmail.com>
Backported from master:
2020-10-01 Alan Modra <amodra@gmail.com>
* config/rs6000/rs6000.c (rs6000_legitimize_address): Use
gen_int_mode for high part of address constant.
2020-10-05 Alex Coplan <alex.coplan@arm.com>
* config/arm/arm-cpus.in (neoverse-v1): Add missing vendor and
part numbers.
2020-10-02 Alex Coplan <alex.coplan@arm.com>
* config/arm/arm-cpus.in (neoverse-n2): New.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* doc/invoke.texi: Document support for Neoverse N2.
2020-10-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (neoversev1_tunings): Define.
* config/aarch64/aarch64-cores.def (zeus): Use it.
(neoverse-v1): Likewise.
2020-10-02 Martin Liska <mliska@suse.cz>
Backported from master:
2020-10-02 Martin Liska <mliska@suse.cz>
PR gcov-profile/97193
* coverage.c (coverage_init): GCDA note files should not be
mangled and should end in output directory.
2020-10-02 Martin Liska <mliska@suse.cz>
Backported from master:
2020-09-25 Martin Liska <mliska@suse.cz>
PR gcov-profile/64636
* value-prof.c (stream_out_histogram_value): Allow negative
values for HIST_TYPE_IOR.
2020-10-02 Martin Liska <mliska@suse.cz>
Backported from master:
2020-09-23 Martin Liska <mliska@suse.cz>
PR gcov-profile/97069
* profile.c (branch_prob): Line number must be at least 1.
2020-10-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-tuning-flags.def
(PREFER_ADVSIMD_AUTOVEC): Define.
* config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Use
it.
(aarch64_autovectorize_vector_sizes): Likewise.
2020-10-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-cores.def (zeus): Add AARCH64_FL_RNG to
features.
(neoverse-v1): Likewise.
2020-10-01 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-10-01 Jakub Jelinek <jakub@redhat.com>
* config/s390/s390.c (s390_atomic_assign_expand_fenv): Use
TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
fenv_var and old_fpc. Formatting fixes.
2020-10-01 Alex Coplan <alex.coplan@arm.com>
* config/aarch64/aarch64-cores.def: Add Neoverse N2.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Document AArch64 support for Neoverse N2.
2020-09-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-09-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-option-extensions.def (rng): Add
cpuinfo string.
2020-09-30 H.J. Lu <hjl.tools@gmail.com>
Backported from master:
2020-09-30 H.J. Lu <hjl.tools@gmail.com>
PR target/97184
* config/i386/i386.md (UNSPECV_MOVDIRI): Renamed to ...
(UNSPEC_MOVDIRI): This.
(UNSPECV_MOVDIR64B): Renamed to ...
(UNSPEC_MOVDIR64B): This.
(movdiri<mode>): Use SET operation.
(@movdir64b_<mode>): Likewise.
2020-09-29 Hongyu Wang <hongyu.wang@intel.com>
Backported from master:
2020-09-29 Hongyu Wang <hongyu.wang@intel.com>
PR target/97231
* config/i386/pconfigintrin.h: Add FSF copyright notes.
* config/i386/wbnoinvdintrin.h: Ditto.
2020-09-29 Alex Coplan <alex.coplan@arm.com>
* config/arm/arm-cpus.in (neoverse-v1): New.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* doc/invoke.texi: Document AArch32 support for Neoverse V1.
2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71233
* config/aarch64/arm_neon.h (vreinterpretq_f64_p128,
vreinterpretq_p128_f64): Define.
2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71233
* config/aarch64/aarch64-simd-builtins.def (frintn): Use BUILTIN_VHSDF_HSDF
for modes. Remove explicit hf instantiation.
* config/aarch64/arm_neon.h (vrndns_f32): Define.
2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71233
* config/aarch64/arm_neon.h (vtrn1q_p64, vtrn2q_p64, vuzp1q_p64,
vuzp2q_p64, vzip1q_p64, vzip2q_p64): Define.
2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71233
* config/aarch64/arm_neon.h (vldrq_p128): Define.
2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71233
* config/aarch64/arm_neon.h (vstrq_p128): Define.
2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71233
* config/aarch64/arm_neon.h (vcls_u8, vcls_u16, vcls_u32,
vclsq_u8, vclsq_u16, vclsq_u32): Define.
2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71233
* config/aarch64/arm_neon.h (vceqq_p64, vceqz_p64, vceqzq_p64): Define.
2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71233
* config/aarch64/arm_neon.h (vadd_p8, vadd_p16, vadd_p64, vaddq_p8,
vaddq_p16, vaddq_p64, vaddq_p128): Define.
2020-09-27 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-09-27 Jakub Jelinek <jakub@redhat.com>
PR middle-end/97073
* optabs.c (expand_binop, expand_absneg_bit, expand_unop,
expand_copysign_bit): Check reg_overlap_mentioned_p between target
and operand(s) and if it returns true, force a pseudo as target.
2020-09-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/71233
* config/aarch64/aarch64.md (UNSPEC_RNDR, UNSPEC_RNDRRS):
Define.
(aarch64_rndr): New define_insn.
(aarch64_rndrrs): Likewise.
* config/aarch64/aarch64.h (AARCH64_ISA_RNG): Define.
(TARGET_RNG): Likewise.
* config/aarch64/aarch64-builtins.c (enum aarch64_builtins):
Add AARCH64_BUILTIN_RNG_RNDR, AARCH64_BUILTIN_RNG_RNDRRS.
(aarch64_init_rng_builtins): Define.
(aarch64_init_builtins): Call aarch64_init_rng_builtins.
(aarch64_expand_rng_builtin): Define.
(aarch64_expand_builtin): Use IGNORE argument, handle
RNG builtins.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
Define __ARM_FEATURE_RNG when TARGET_RNG.
* config/aarch64/arm_acle.h (__rndr, __rndrrs): Define.
2020-09-24 H.J. Lu <hjl.tools@gmail.com>
Backported from master:
2020-09-16 H.J. Lu <hjl.tools@gmail.com>
PR target/97032
* cfgexpand.c (asm_clobber_reg_kind): Set sp_is_clobbered_by_asm
to true if the stack pointer is clobbered by asm statement.
* emit-rtl.h (rtl_data): Add sp_is_clobbered_by_asm.
* config/i386/i386.c (ix86_get_drap_rtx): Set need_drap to true
if the stack pointer is clobbered by asm statement.
2020-09-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backported from master:
2020-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Andrea Corallo <andrea.corallo@arm.com>
PR target/71233
* config/aarch64/aarch64.md (UNSPEC_FJCVTZS): Define.
(aarch64_fjcvtzs): New define_insn.
* config/aarch64/aarch64.h (TARGET_JSCVT): Define.
* config/aarch64/aarch64-builtins.c (aarch64_builtins):
Add AARCH64_JSCVT.
(aarch64_init_builtins): Initialize __builtin_aarch64_jcvtzs.
(aarch64_expand_builtin): Handle AARCH64_JSCVT.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
__ARM_FEATURE_JCVT where appropriate.
* config/aarch64/arm_acle.h (__jcvt): Define.
* doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
target supports option.
2020-09-24 Alex Coplan <alex.coplan@arm.com>
* config/aarch64/aarch64-cores.def: Add Neoverse V1.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Document support for Neoverse V1.
2020-09-18 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-09-16 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/97053
* gimple-ssa-store-merging.c (check_no_overlap): Add FIRST_ORDER,
START, FIRST_EARLIER and LAST_EARLIER arguments. Return false if
any stores between FIRST_EARLIER inclusive and LAST_EARLIER exclusive
has order in between FIRST_ORDER and LAST_ORDER and overlaps the to
be merged store.
(imm_store_chain_info::try_coalesce_bswap): Add FIRST_EARLIER argument.
Adjust check_no_overlap caller.
(imm_store_chain_info::coalesce_immediate_stores): Add first_earlier
and last_earlier variables, adjust them during iterations. Adjust
check_no_overlap callers, call check_no_overlap even when extending
overlapping stores by extra INTEGER_CST stores.
2020-09-18 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
* config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
fenv_var and new_fenv_var.
2020-09-17 Segher Boessenkool <segher@kernel.crashing.org>
Backported from master:
2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
PR target/94710
* config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
endian byteshift_val calculation.
2020-09-17 liuhongt <hongtao.liu@intel.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX_UNSET): Remove OPTION_MASK_ISA_XSAVE_UNSET.
(OPTION_MASK_ISA_XSAVE_UNSET): Add OPTION_MASK_ISA_AVX_UNSET.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-08-26 Jakub Jelinek <jakub@redhat.com>
PR debug/96729
* dwarf2out.c (dwarf2out_next_real_insn): Adjust function comment.
(dwarf2out_var_location): Look for next_note only if next_real is
non-NULL, in that case look for the first non-deleted
NOTE_INSN_VAR_LOCATION between loc_note and next_real, if any.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-08-25 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/96722
* gimple.c (infer_nonnull_range): Formatting fix.
(infer_nonnull_range_by_dereference): Return false for clobber stmts.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-08-08 Jakub Jelinek <jakub@redhat.com>
PR fortran/93553
* tree-nested.c (convert_nonlocal_omp_clauses): For
OMP_CLAUSE_REDUCTION, OMP_CLAUSE_LASTPRIVATE and OMP_CLAUSE_LINEAR
save info->new_local_var_chain around walks of the clause gimple
sequences and declare_vars if needed into the sequence.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-08-05 Jakub Jelinek <jakub@redhat.com>
PR middle-end/96459
* omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in
for host teams.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-08-04 Jakub Jelinek <jakub@redhat.com>
PR middle-end/96426
* tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
call with GIMPLE_NOP if there is no lhs.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-07-15 Jakub Jelinek <jakub@redhat.com>
PR target/96174
* config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
_mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
_mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
_mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
_mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
_mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
_mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
_mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
_mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
_mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
_mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
_mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
_mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
_mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
_mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
_mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
_mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
section.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-07-02 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/95857
* tree-cfg.c (group_case_labels_stmt): When removing an unreachable
base_bb, remember all forced and non-local labels on it and later
treat those as if they have NULL label_to_block. Formatting fix.
Fix a comment typo.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-06-24 Jakub Jelinek <jakub@redhat.com>
PR middle-end/95810
* fold-const.c (fold_cond_expr_with_comparison): Optimize
A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-05-14 Jakub Jelinek <jakub@redhat.com>
PR middle-end/95108
* omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
(ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
entry block if info->after_stmt is NULL, otherwise add after that stmt
and update it after adding each stmt.
(ipa_simd_modify_function_body): Initialize info.after_stmt.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-05-13 Jakub Jelinek <jakub@redhat.com>
PR debug/95080
* cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
if the last insn is a note.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-05-07 Jakub Jelinek <jakub@redhat.com>
PR target/94950
* config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-05-07 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/94873
* combine.c (combine_instructions): Don't optimize using REG_EQUAL
note if SET_SRC (set) has side-effects.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-05-02 Jakub Jelinek <jakub@redhat.com>
* config/tilegx/tilegx.md
(insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
rather than just <n>.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-29 Jakub Jelinek <jakub@redhat.com>
PR target/94832
* config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
_mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
used in casts into parens.
* config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
_mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
_mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
_mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
_mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
_mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
_mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
* config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
_mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
_mm256_mask_cmp_epu8_mask): Likewise.
* config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
_mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
* config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
* config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-29 Jakub Jelinek <jakub@redhat.com>
PR target/94832
* config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
_mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
_mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
_mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
_mm256_mask_i64gather_ps, _mm_i32gather_epi64,
_mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
_mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
_mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
_mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
_mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
_mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
_mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
_mm256_mask_i64gather_epi32): Surround macro parameter uses with
parens.
(_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
_mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
_mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
as mask vector containing -1.0 or -1.0f elts, but instead vector
with all bits set using _mm*_cmpeq_p? with zero operands.
* config/i386/avx512fintrin.h (_mm512_i32gather_ps,
_mm512_mask_i32gather_ps, _mm512_i32gather_pd,
_mm512_mask_i32gather_pd, _mm512_i64gather_ps,
_mm512_mask_i64gather_ps, _mm512_i64gather_pd,
_mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
_mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
_mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
_mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
_mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
_mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
_mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
_mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
_mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
_mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
_mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
_mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
_mm512_mask_i64scatter_epi64): Surround macro parameter uses with
parens.
* config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
_mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
_mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
_mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
_mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
_mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
_mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
_mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
_mm512_mask_prefetch_i64scatter_ps): Likewise.
* config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
_mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
_mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
_mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
_mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
_mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
_mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
_mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
_mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
_mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
_mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
_mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
_mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
_mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
_mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
_mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
_mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
_mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
_mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
_mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
_mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
_mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
_mm_mask_i64scatter_epi64): Likewise.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-29 Jakub Jelinek <jakub@redhat.com>
PR target/94826
* config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
TARGET_EXPR instead of MODIFY_EXPR for first assignment to
fenv_var, fenv_clear and old_fenv variables. For fenv_addr
take address of TARGET_EXPR of fenv_var with void_node initializer.
Formatting fixes.
2020-09-16 Haijian Zhang <z.zhanghaijian@huawei.com>
Backported from master:
2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
PR target/94820
* config/aarch64/aarch64-builtins.c
(aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
new_fenv_var.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-28 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94809
* tree.c (build_call_expr_internal_loc_array): Call
process_call_operands.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-27 Jakub Jelinek <jakub@redhat.com>
PR target/94780
* config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
TARGET_EXPR instead of MODIFY_EXPR for first assignment to
sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-23 Jakub Jelinek <jakub@redhat.com>
PR target/94710
* optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
just return v2.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-23 Jakub Jelinek <jakub@redhat.com>
PR c/94705
* attribs.c (decl_attribute): Don't diagnose attribute exclusions
if last_decl is error_mark_node or has such a TREE_TYPE.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-21 Jakub Jelinek <jakub@redhat.com>
PR c/94641
* stor-layout.c (place_field, finalize_record_size): Don't emit
-Wpadded warning on TYPE_ARTIFICIAL rli->t.
* ubsan.c (ubsan_get_type_descriptor_type,
ubsan_get_source_location_type, ubsan_create_data): Set
TYPE_ARTIFICIAL.
* asan.c (asan_global_struct): Likewise.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-17 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/94618
* cfgrtl.c (delete_insn_and_edges): Set purge not just when
insn is the BB_END of its block, but also when it is only followed
by DEBUG_INSNs in its block.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-17 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94621
* tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
Move id->adjust_array_error_bounds check first in the condition.
2020-09-16 Gustavo Romero <gromero@linux.ibm.com>
Backported from master:
2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
PR bootstrap/89494
* dumpfile.c (selftest::temp_dump_context::temp_dump_context):
Don't construct a dump_context temporary to call static method.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-08 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94524
* tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
op1 rather than op1 itself at the end. Punt for signed modulo by
most negative constant.
* tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
modulo by most negative constant.
2020-09-16 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-04-08 Jakub Jelinek <jakub@redhat.com>
PR target/94438
* config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
1, 2, 4 and 8.
2020-09-16 Sylvia Taylor <sylvia.taylor@arm.com>
Backported from master:
2019-08-22 Sylvia Taylor <sylvia.taylor@arm.com>
* config/aarch64/aarch64-simd-builtins.def:
(ld1x4): New.
(st1x4): Likewise.
* config/aarch64/aarch64-simd.md:
(aarch64_ld1x4<VALLDIF:mode>): New pattern.
(aarch64_st1x4<VALLDIF:mode>): Likewise.
(aarch64_ld1_x4_<mode>): Likewise.
(aarch64_st1_x4_<mode>): Likewise.
* config/aarch64/arm_neon.h:
(vld1_s8_x4): New function.
(vld1q_s8_x4): Likewise.
(vld1_s16_x4): Likewise.
(vld1q_s16_x4): Likewise.
(vld1_s32_x4): Likewise.
(vld1q_s32_x4): Likewise.
(vld1_u8_x4): Likewise.
(vld1q_u8_x4): Likewise.
(vld1_u16_x4): Likewise.
(vld1q_u16_x4): Likewise.
(vld1_u32_x4): Likewise.
(vld1q_u32_x4): Likewise.
(vld1_f16_x4): Likewise.
(vld1q_f16_x4): Likewise.
(vld1_f32_x4): Likewise.
(vld1q_f32_x4): Likewise.
(vld1_p8_x4): Likewise.
(vld1q_p8_x4): Likewise.
(vld1_p16_x4): Likewise.
(vld1q_p16_x4): Likewise.
(vld1_s64_x4): Likewise.
(vld1_u64_x4): Likewise.
(vld1_p64_x4): Likewise.
(vld1q_s64_x4): Likewise.
(vld1q_u64_x4): Likewise.
(vld1q_p64_x4): Likewise.
(vld1_f64_x4): Likewise.
(vld1q_f64_x4): Likewise.
(vst1_s8_x4): Likewise.
(vst1q_s8_x4): Likewise.
(vst1_s16_x4): Likewise.
(vst1q_s16_x4): Likewise.
(vst1_s32_x4): Likewise.
(vst1q_s32_x4): Likewise.
(vst1_u8_x4): Likewise.
(vst1q_u8_x4): Likewise.
(vst1_u16_x4): Likewise.
(vst1q_u16_x4): Likewise.
(vst1_u32_x4): Likewise.
(vst1q_u32_x4): Likewise.
(vst1_f16_x4): Likewise.
(vst1q_f16_x4): Likewise.
(vst1_f32_x4): Likewise.
(vst1q_f32_x4): Likewise.
(vst1_p8_x4): Likewise.
(vst1q_p8_x4): Likewise.
(vst1_p16_x4): Likewise.
(vst1q_p16_x4): Likewise.
(vst1_s64_x4): Likewise.
(vst1_u64_x4): Likewise.
(vst1_p64_x4): Likewise.
(vst1q_s64_x4): Likewise.
(vst1q_u64_x4): Likewise.
(vst1q_p64_x4): Likewise.
(vst1_f64_x4): Likewise.
(vst1q_f64_x4): Likewise.
2020-09-15 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_init_builtin): Update V2DI_type_node
and unsigned_V2DI_type_node definitions.
2020-09-15 Jakub Jelinek <jakub@redhat.com>
Backported from master:
2020-09-15 Jakub Jelinek <jakub@redhat.com>
PR target/97028
* config/i386/sse.md (mul<mode>3<mask_name>_bcs,
<avx512>_div<mode>3<mask_name>_bcst): Use <avx512bcst> instead of
<<avx512bcst>>.
2020-09-11 Richard Biener <rguenther@suse.de>
Backported from master:
2020-05-07 Richard Biener <rguenther@suse.de>
PR ipa/94947
* tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
(refered_from_nonlocal_var): Likewise.
(ipa_pta_execute): Likewise.
2020-09-11 Richard Biener <rguenther@suse.de>
Backported from master:
2020-05-05 Richard Biener <rguenther@suse.de>
PR ipa/94947
* tree-ssa-structalias.c (ipa_pta_execute): Use
varpool_node::externally_visible_p ().
(refered_from_nonlocal_var): Likewise.
2020-09-11 Richard Biener <rguenther@suse.de>
Backported from master:
2020-05-06 Richard Biener <rguenther@suse.de>
PR middle-end/94964
* cfgloopmanip.c (create_preheader): Require non-complex
preheader edge for CP_SIMPLE_PREHEADERS.
2020-09-11 Richard Biener <rguenther@suse.de>
Backported from master:
2020-05-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/95049
* tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
between different constants.
2020-09-11 Richard Biener <rguenther@suse.de>
Backported from master:
2020-05-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/95133
* gimple-ssa-split-paths.c
(find_block_to_duplicate_for_splitting_paths): Check for
normal edges.
2020-09-11 Richard Biener <rguenther@suse.de>
Backported from master:
2020-06-17 Richard Biener <rguenther@suse.de>
PR tree-optimization/95717
* tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
Move BB SSA updating before exit/latch PHI current def copying.
2020-09-02 Kewen Lin <linkw@linux.ibm.com>
Backported from master:
2019-12-30 Peter Bergner <bergner@linux.ibm.com>
PR target/92923
* config/rs6000/rs6000-builtin.def (VAND, VANDC, VNOR, VOR, VXOR):
Delete.
(EQV_V16QI_UNS, EQV_V8HI_UNS, EQV_V4SI_UNS, EQV_V2DI_UNS, EQV_V1TI_UNS,
NAND_V16QI_UNS, NAND_V8HI_UNS, NAND_V4SI_UNS, NAND_V2DI_UNS,
NAND_V1TI_UNS, ORC_V16QI_UNS, ORC_V8HI_UNS, ORC_V4SI_UNS, ORC_V2DI_UNS,
ORC_V1TI_UNS, VAND_V16QI_UNS, VAND_V16QI, VAND_V8HI_UNS, VAND_V8HI,
VAND_V4SI_UNS, VAND_V4SI, VAND_V2DI_UNS, VAND_V2DI, VAND_V4SF,
VAND_V2DF, VANDC_V16QI_UNS, VANDC_V16QI, VANDC_V8HI_UNS, VANDC_V8HI,
VANDC_V4SI_UNS, VANDC_V4SI, VANDC_V2DI_UNS, VANDC_V2DI, VANDC_V4SF,
VANDC_V2DF, VNOR_V16QI_UNS, VNOR_V16QI, VNOR_V8HI_UNS, VNOR_V8HI,
VNOR_V4SI_UNS, VNOR_V4SI, VNOR_V2DI_UNS, VNOR_V2DI, VNOR_V4SF,
VNOR_V2DF, VOR_V16QI_UNS, VOR_V16QI, VOR_V8HI_UNS, VOR_V8HI,
VOR_V4SI_UNS, VOR_V4SI, VOR_V2DI_UNS, VOR_V2DI, VOR_V4SF, VOR_V2DF,
VXOR_V16QI_UNS, VXOR_V16QI, VXOR_V8HI_UNS, VXOR_V8HI,
VXOR_V4SI_UNS, VXOR_V4SI, VXOR_V2DI_UNS, VXOR_V2DI, VXOR_V4SF,
VXOR_V2DF): Add definitions.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins)
<ALTIVEC_BUILTIN_VAND, ALTIVEC_BUILTIN_VANDC, ALTIVEC_BUILTIN_VNOR,
ALTIVEC_BUILTIN_VOR, ALTIVEC_BUILTIN_VXOR>: Remove.
<ALTIVEC_BUILTIN_VAND_V4SF, ALTIVEC_BUILTIN_VAND_V2DF,
ALTIVEC_BUILTIN_VAND_V2DI, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
ALTIVEC_BUILTIN_VAND_V4SI_UNS, ALTIVEC_BUILTIN_VAND_V4SI,
ALTIVEC_BUILTIN_VAND_V8HI_UNS, ALTIVEC_BUILTIN_VAND_V8HI,
ALTIVEC_BUILTIN_VAND_V16QI, ALTIVEC_BUILTIN_VAND_V16QI_UNS,
ALTIVEC_BUILTIN_VANDC_V4SF, ALTIVEC_BUILTIN_VANDC_V2DF,
ALTIVEC_BUILTIN_VANDC_V2DI, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
ALTIVEC_BUILTIN_VANDC_V4SI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI,
ALTIVEC_BUILTIN_VANDC_V8HI_UNS, ALTIVEC_BUILTIN_VANDC_V8HI,
ALTIVEC_BUILTIN_VANDC_V16QI, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
ALTIVEC_BUILTIN_VNOR_V4SF, ALTIVEC_BUILTIN_VNOR_V2DF,
ALTIVEC_BUILTIN_VNOR_V2DI, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
ALTIVEC_BUILTIN_VNOR_V4SI, ALTIVEC_BUILTIN_VNOR_V4SI_UNS,
ALTIVEC_BUILTIN_VNOR_V8HI, ALTIVEC_BUILTIN_VNOR_V8HI_UNS,
ALTIVEC_BUILTIN_VNOR_V16QI, ALTIVEC_BUILTIN_VNOR_V16QI_UNS,
ALTIVEC_BUILTIN_VOR_V4SF, ALTIVEC_BUILTIN_VOR_V2DF,
ALTIVEC_BUILTIN_VOR_V2DI, ALTIVEC_BUILTIN_VOR_V2DI_UNS,
ALTIVEC_BUILTIN_VOR_V4SI_UNS, ALTIVEC_BUILTIN_VOR_V4SI,
ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V8HI,
ALTIVEC_BUILTIN_VOR_V16QI, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
ALTIVEC_BUILTIN_VXOR_V4SF, ALTIVEC_BUILTIN_VXOR_V2DF,
ALTIVEC_BUILTIN_VXOR_V2DI, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
ALTIVEC_BUILTIN_VXOR_V4SI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI,
ALTIVEC_BUILTIN_VXOR_V8HI, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
ALTIVEC_BUILTIN_VXOR_V16QI, ALTIVEC_BUILTIN_VXOR_V16QI_UNS>: Add
definitions.
<P8V_BUILTIN_EQV_V16QI, P8V_BUILTIN_EQV_V8HI, P8V_BUILTIN_EQV_V4SI,
P8V_BUILTIN_EQV_V2DI, P8V_BUILTIN_NAND_V16QI, P8V_BUILTIN_NAND_V8HI,
P8V_BUILTIN_NAND_V4SI, P8V_BUILTIN_NAND_V2DI, P8V_BUILTIN_ORC_V16QI,
P8V_BUILTIN_ORC_V8HI, P8V_BUILTIN_ORC_V4SI,
P8V_BUILTIN_ORC_V2DI>: Change unsigned usages to use the new *_UNS
definition names.
* config/rs6000/rs6000.c
(rs6000_gimple_fold_builtin) <ALTIVEC_BUILTIN_VAND_V16QI_UNS,
ALTIVEC_BUILTIN_VAND_V16QI, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
ALTIVEC_BUILTIN_VAND_V8HI, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
ALTIVEC_BUILTIN_VAND_V4SI, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
ALTIVEC_BUILTIN_VAND_V2DI, ALTIVEC_BUILTIN_VAND_V4SF,
ALTIVEC_BUILTIN_VAND_V2DF, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
ALTIVEC_BUILTIN_VANDC_V16QI, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
ALTIVEC_BUILTIN_VANDC_V8HI, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
ALTIVEC_BUILTIN_VANDC_V4SI, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
ALTIVEC_BUILTIN_VANDC_V2DI, ALTIVEC_BUILTIN_VANDC_V4SF,
ALTIVEC_BUILTIN_VANDC_V2DF, P8V_BUILTIN_NAND_V16QI_UNS,
P8V_BUILTIN_NAND_V8HI_UNS, P8V_BUILTIN_NAND_V4SI_UNS,
P8V_BUILTIN_NAND_V2DI_UNS, P8V_BUILTIN_NAND_V2DI,
ALTIVEC_BUILTIN_VOR_V16QI_UNS, ALTIVEC_BUILTIN_VOR_V16QI,
ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V8HI,
ALTIVEC_BUILTIN_VOR_V4SI_UNS, ALTIVEC_BUILTIN_VOR_V4SI,
ALTIVEC_BUILTIN_VOR_V2DI_UNS, ALTIVEC_BUILTIN_VOR_V2DI,
ALTIVEC_BUILTIN_VOR_V4SF, ALTIVEC_BUILTIN_VOR_V2DF,
P8V_BUILTIN_ORC_V16QI_UNS, P8V_BUILTIN_ORC_V8HI_UNS,
P8V_BUILTIN_ORC_V4SI_UNS, P8V_BUILTIN_ORC_V2DI_UNS,
P8V_BUILTIN_ORC_V2DI, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
ALTIVEC_BUILTIN_VXOR_V16QI, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
ALTIVEC_BUILTIN_VXOR_V8HI, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
ALTIVEC_BUILTIN_VXOR_V4SI, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
ALTIVEC_BUILTIN_VXOR_V2DI, ALTIVEC_BUILTIN_VXOR_V4SF,
ALTIVEC_BUILTIN_VXOR_V2DF, ALTIVEC_BUILTIN_VNOR_V16QI_UNS,
ALTIVEC_BUILTIN_VNOR_V16QI, ALTIVEC_BUILTIN_VNOR_V8HI_UNS,
ALTIVEC_BUILTIN_VNOR_V8HI, ALTIVEC_BUILTIN_VNOR_V4SI_UNS,
ALTIVEC_BUILTIN_VNOR_V4SI, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
ALTIVEC_BUILTIN_VNOR_V2DI, ALTIVEC_BUILTIN_VNOR_V4SF,
ALTIVEC_BUILTIN_VNOR_V2DF>: Use new definition names.
(builtin_function_type) <ALTIVEC_BUILTIN_VAND_V16QI_UNS,
ALTIVEC_BUILTIN_VAND_V8HI_UNS, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
ALTIVEC_BUILTIN_VAND_V2DI_UNS, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
ALTIVEC_BUILTIN_VANDC_V8HI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
ALTIVEC_BUILTIN_VANDC_V2DI_UNS, ALTIVEC_BUILTIN_VNOR_V16QI_UNS,
ALTIVEC_BUILTIN_VNOR_V8HI_UNS, ALTIVEC_BUILTIN_VNOR_V4SI_UNS,
ALTIVEC_BUILTIN_VNOR_V2DI_UNS, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V4SI_UNS,
ALTIVEC_BUILTIN_VOR_V2DI_UNS, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
ALTIVEC_BUILTIN_VXOR_V8HI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
ALTIVEC_BUILTIN_VXOR_V2DI_UNS, P8V_BUILTIN_EQV_V16QI_UNS,
P8V_BUILTIN_EQV_V8HI_UNS, P8V_BUILTIN_EQV_V4SI_UNS,
P8V_BUILTIN_EQV_V2DI_UNS, P8V_BUILTIN_EQV_V1TI_UNS,
P8V_BUILTIN_NAND_V16QI_UNS, P8V_BUILTIN_NAND_V8HI_UNS,
P8V_BUILTIN_NAND_V4SI_UNS, P8V_BUILTIN_NAND_V2DI_UNS,
P8V_BUILTIN_NAND_V1TI_UNS, P8V_BUILTIN_ORC_V16QI_UNS,
P8V_BUILTIN_ORC_V8HI_UNS, P8V_BUILTIN_ORC_V4SI_UNS,
P8V_BUILTIN_ORC_V2DI_UNS, P8V_BUILTIN_ORC_V1TI_UNS>: Handle unsigned
builtins.
2020-08-27 Christophe Lyon <christophe.lyon@linaro.org>
Backported from master:
2020-08-24 Christophe Lyon <christophe.lyon@linaro.org>
PR target/94538
PR target/94538
* config/arm/thumb1.md: Disable set-constant splitter when
TARGET_HAVE_MOVT.
(thumb1_movsi_insn): Fix -mpure-code
alternative.
2020-08-21 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2020-08-21 Richard Sandiford <richard.sandiford@arm.com>
* doc/extend.texi: Update links to Arm docs.
* doc/invoke.texi: Likewise.
2020-08-21 Tamar Christina <tamar.christina@arm.com>
Backported from master:
2020-08-03 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/driver-aarch64.c (readline): Check return value fgets.
2020-08-21 Tamar Christina <tamar.christina@arm.com>
Backported from master:
2020-07-17 Tamar Christina <tamar.christina@arm.com>
* doc/sourcebuild.texi (dg-set-compiler-env-var,
dg-set-target-env-var): Document.
2020-08-21 Tamar Christina <tamar.christina@arm.com>
Backported from master:
2020-07-17 Tamar Christina <tamar.christina@arm.com>
* config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
2020-08-21 Tamar Christina <tamar.christina@arm.com>
Backported from master:
2020-07-17 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/driver-aarch64.c (host_detect_local_cpu):
Add GCC_CPUINFO.
2020-08-21 Tamar Christina <tamar.christina@arm.com>
Backported from master:
2020-07-17 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
(parse_field): Use std::string.
(split_words, readline, find_field): New.
(host_detect_local_cpu): Fix truncation issues.
2020-08-18 Uroš Bizjak <ubizjak@gmail.com>
PR target/96536
* config/i386/i386.md (restore_stack_nonlocal):
Add missing compare RTX.
2020-08-07 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2020-08-06 Richard Sandiford <richard.sandiford@arm.com>
PR target/96191
* config/arm/arm.md (arm_stack_protect_test_insn): Zero out
operand 2 after use.
* config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise.
2020-08-07 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
PR target/96191
* config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the
CC register directly, instead of a GPR. Replace the original GPR
destination with an extra scratch register. Zero out operand 3
after use.
(stack_protect_test): Update accordingly.
2020-08-07 Qian Jianhua <qianjh@cn.fujitsu.com>
Backported from master:
2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com>
* config/aarch64/aarch64-cores.def (a64fx): New core.
* config/aarch64/aarch64-tune.md: Regenerated.
* config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
* doc/invoke.texi: Add a64fx to the list.
2020-08-07 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/94605
* early-remat.c (early_remat::process_block): Handle insns that
set multiple candidate registers.
2020-08-07 Richard Sandiford <richard.sandiford@arm.com>
Backported from master:
2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
PR middle-end/95114
* tree.h (virtual_method_call_p): Add a default-false parameter
that indicates whether the function is being called from dump
routines.
(obj_type_ref_class): Likewise.
* tree.c (virtual_method_call_p): Likewise.
* ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
type information for the type when the parameter is false.
* tree-pretty-print.c (dump_generic_node): Update calls to
virtual_method_call_p and obj_type_ref_class accordingly.
2020-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
New declaration.
* config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
stub registers class.
(aarch64_class_max_nregs): Likewise.
(aarch64_register_move_cost): Likewise.
(aarch64_sls_shared_thunks): Global array to store stub labels.
(aarch64_sls_emit_function_stub): New.
(aarch64_create_blr_label): New.
(aarch64_sls_emit_blr_function_thunks): New.
(aarch64_sls_emit_shared_blr_thunks): New.
(aarch64_asm_file_end): New.
(aarch64_indirect_call_asm): New.
(TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
(TARGET_ASM_FUNCTION_EPILOGUE): Use
aarch64_sls_emit_blr_function_thunks.
* config/aarch64/aarch64.h (STB_REGNUM_P): New.
(enum reg_class): Add STUB_REGS class.
(machine_function): Introduce `call_via` array for
function-local stub labels.
* config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
aarch64_indirect_call_asm to emit code when hardening BLR
instructions.
* config/aarch64/constraints.md (Ucr): New constraint
representing registers for indirect calls. Is GENERAL_REGS
usually, and STUB_REGS when hardening BLR instruction against
SLS.
* config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
is also a general register.
2020-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
* config/aarch64/aarch64.c (aarch64_output_casesi): Emit
speculation barrier after BR instruction if needs be.
(aarch64_trampoline_init): Handle ptr_mode value & adjust size
of code copied.
(aarch64_sls_barrier): New.
(aarch64_asm_trampoline_template): Add needed barriers.
* config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
(TARGET_SB): New.
(TRAMPOLINE_SIZE): Account for barrier.
* config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
Emit barrier if needs be, also account for possible barrier using
"sls_length" attribute.
(sls_length): New attribute.
(length): Determine default using any non-default sls_length
value.
2020-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
New.
(aarch64_harden_sls_blr_p): New.
* config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
New.
(aarch64_harden_sls_retbr_p): New.
(aarch64_harden_sls_blr_p): New.
(aarch64_validate_sls_mitigation): New.
(aarch64_override_options): Parse options for SLS mitigation.
* config/aarch64/aarch64.opt (-mharden-sls): New option.
* doc/invoke.texi: Document new option.
2020-08-03 Jonathan Wakely <jwakely@redhat.com>
Backported from master:
2020-08-03 Jonathan Wakely <jwakely@redhat.com>
* doc/cpp.texi (Variadic Macros): Use the exact ... token in
code examples.
2020-07-23 David Edelsohn <dje.gcc@gmail.com>
Backported from master:
2020-03-06 David Edelsohn <dje.gcc@gmail.com>
PR target/94065
* config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
cmodel=large.
(TARGET_NO_FP_IN_TOC): Same.
* config/rs6000/aix71.h: Same.
* config/rs6000/aix72.h: Same.
2020-07-17 Romain Naour <romain.naour@gmail.com>
Backported from master:
2020-07-17 Romain Naour <romain.naour@gmail.com>
* Makefile.in (SELFTEST_DEPS): Move before including language makefile
fragments.
2020-07-16 Szabolcs Nagy <szabolcs.nagy@arm.com>
Backported from master:
2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
__ARM_FEATURE_PAC_DEFAULT support.
2020-07-16 Szabolcs Nagy <szabolcs.nagy@arm.com>
Backported from master:
2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
PR target/94891
* doc/extend.texi: Update the text for __builtin_return_address.
2020-07-16 Szabolcs Nagy <szabolcs.nagy@arm.com>
Backported from master:
2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
PR target/94891
* config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
Disable return address signing if __builtin_eh_return is used.
2020-07-16 Szabolcs Nagy <szabolcs.nagy@arm.com>
Backported from master:
2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
PR target/94891
PR target/94791
* config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
* config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
(aarch64_return_addr): Use aarch64_return_addr_rtx.
* config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
2020-07-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
Backported from master:
2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
* config.in: Regenerate.
* config/s390/s390.c (print_operand): Emit vector alignment hints
for target z13, if AS accepts them. For other targets the logic
stays the same.
* config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
macro.
* configure: Regenerate.
* configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
2020-07-10 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/altivec.h (vec_vmsumudm): New define.
* config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
(altivec_vmsumudm): New define_insn.
* config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
entries for ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
* doc/extend.texi: Add document for vmsumudm behind vmsum.
2020-07-10 Bin Cheng <bin.cheng@linux.alibaba.com>
Backported from master:
2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
PR tree-optimization/95804
* tree-loop-distribution.c (break_alias_scc_partitions): Force
negative post order to reduction partition.
2020-07-10 Bin Cheng <bin.cheng@linux.alibaba.com>
Backported from master:
2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
PR tree-optimization/95638
* tree-loop-distribution.c (pg_edge_callback_data): New field.
(loop_distribution::break_alias_scc_partitions): Record and restore
postorder information. Fix memory leak.
2020-07-06 Will Schmidt <will_schmidt@vnet.ibm.com>
PR target/94954
* config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
* config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
(convert_4f32_8f16): New define_expand
* config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
and overload.
* config/rs6000/rs6000-c.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
overloaded builtin entry.
* config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
(vsx_xvcvsphp): New define_insn.
2020-06-30 Alex Coplan <alex.coplan@arm.com>
Backported from master:
2020-05-18 Alex Coplan <alex.coplan@arm.com>
* config/arm/arm.c (output_move_double): Fix codegen when loading into
a register pair with an odd base register.
2020-06-25 H.J. Lu <hjl.tools@gmail.com>
Backported from master:
2020-06-25 H.J. Lu <hjl.tools@gmail.com>
PR target/95874
* config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
(PTA_ICELAKE_SERVER): Add PTA_CLWB.
2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
Backported from master:
2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
* hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
NULL_TREE' check earlier.
2020-06-12 Martin Liska <mliska@suse.cz>
Jakub Jelinek <jakub@redhat.com>
PR sanitizer/95634
* asan.c (asan_emit_stack_protection): Fix emission for ilp32
by using Pmode instead of ptr_mode.
2020-06-12 Martin Liska <mliska@suse.cz>
PR sanitizer/94910
* asan.c (asan_emit_stack_protection): Emit
also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
a stack frame.
2020-06-06 Carl Love <cel@us.ibm.com>
PR target/94833
* config/rs6000/vsx.md (define_expand): Fix instruction generation for
first_match_index_<mode>.
2020-06-05 H.J. Lu <hjl.tools@gmail.com>
* config/i386/driver-i386.c (host_detect_local_cpu): Support
Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
processor families.
2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-cores.def (zeus): Define.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
2020-05-31 Gerald Pfeifer <gerald@pfeifer.com>
* config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
__ILP32__ for 32-bit targets.
2020-05-29 Alex Coplan <alex.coplan@arm.com>
PR target/94591
* config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
identity permutation.
2020-05-29 Dong JianQiang <dongjianqiang2@huawei.com>
PR gcov-profile/95332
* gcov-io.c (gcov_var::endian): Move field.
(from_file): Add IN_GCOV_TOOL check.
* gcov-io.h (gcov_magic): Ditto.
2020-05-26 Alexandre Oliva <oliva@adacore.com>
PR target/94812
* config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
output operand in emulation. Don't overwrite pseudos.
2020-05-24 H.J. Lu <hongjiu.lu@intel.com>
PR target/95258
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
AVX512VPOPCNTDQ.
2020-05-22 Bin Cheng <bin.cheng@linux.alibaba.com>
Backport from master
PR tree-optimization/94969
2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
* tree-data-ref.c (constant_access_functions): Rename to...
(invariant_access_functions): ...this. Add parameter. Check for
invariant access function, rather than constant.
(build_classic_dist_vector): Call above function.
* tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
2020-05-21 Martin Liska <mliska@suse.cz>
* common/config/aarch64/aarch64-common.c (aarch64_handle_option):
Use MASK_OUTLINE_ATOMICS for x_target_flags.
2020-05-21 Martin Liska <mliska@suse.cz>
* common/config/aarch64/aarch64-common.c (aarch64_handle_option):
Handle OPT_moutline_atomics.
* config/aarch64/aarch64.c: Add outline-atomics to
aarch64_attributes.
* doc/extend.texi: Document the newly added target attribute.
2020-05-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
Backport from mainline.
2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
PR target/94748
* config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
the check for NOTE_INSN_DELETED_LABEL.
2020-05-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
Backport from mainline.
2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
PR target/94697
* config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
bti c and bti j handling.
2020-05-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
Backport from mainline.
2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
PR target/94515
* dwarf2cfi.c (struct GTY): Add ra_mangled.
(cfi_row_equal_p): Check ra_mangled.
(dwarf2out_frame_debug_cfa_window_save): Remove the argument,
this only handles the sparc logic now.
(dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
the aarch64 specific logic.
(dwarf2out_frame_debug): Update to use the new subroutines.
(change_cfi_row): Check ra_mangled.
2020-05-12 David Edelsohn <dje.gcc@gmail.com>
Backport from mainline
2020-04-08 Clement Chigot <clement.chigot@atos.net>
* config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
* config/rs6000/aix71.h (LIB_SPEC): Likewise.
* config/rs6000/aix72.h (LIB_SPEC): Likewise.
2020-05-12 David Edelsohn <dje.gcc@gmail.com>
Backport from mainline
2020-05-04 Clement Chigot <clement.chigot@atos.net>
David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/rs6000.c (rs6000_init_builtins): Override explicit
for fmodl, frexpl, ldexpl and modfl builtins.
2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
Backport from master.
2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
PR target/91518
* config/rs6000/rs6000.c (frame_pointer_needed_indeed):
New variable.
(rs6000_emit_prologue_components):
Check with frame_pointer_needed_indeed.
(rs6000_emit_epilogue_components): Likewise.
(rs6000_emit_prologue): Likewise.
(rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
* config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
fenv_var and new_fenv_var.
2020-05-05 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/constraints.md ("j>f", "jb4"): New constraints.
* config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
macro definitions.
* config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
separate expander.
("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
Change constraint for vlrl/vstrl to jb4.
2020-05-04 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
("popcountv2di2_vx"): Use simplify_gen_subreg.
2020-05-04 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
PR target/94613
* config/s390/s390-builtin-types.def: Add 3 new function modes.
* config/s390/s390-builtins.def: Add mode dependent low-level
builtin and map the overloaded builtins to these.
* config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
("vsel<V_HW"): ... this and rewrite the pattern with bitops.
2020-05-04 Bin Cheng <bin.cheng@linux.alibaba.com>
PR tree-optimization/93674
Backport from master
2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
* tree-ssa-loop-ivopts.c (langhooks.h): New include.
(add_iv_candidate_for_use): For iv_use of non integer or pointer type,
or non-mode precision type, add candidate in unsigned type with the
same precision.
2020-05-01 Alan Modra <amodra@gmail.com>
PR target/94145
Backport from master
2020-03-27 Alan Modra <amodra@gmail.com>
* config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
for PLT16_LO.
* config/rs6000/rs6000.md (UNSPEC_PLT16_LO): Remove.
(UNSPECV_PLT16_LO): Define.
(pltseq_plt16_lo_): Use unspec_volatile.
2020-04-30 Carl Love <cel@us.ibm.com>
* config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
PR target/93654
* config/i386/i386.c (ix86_set_indirect_branch_type): Allow
-fcf-protection with -mindirect-branch=thunk-extern and
-mfunction-return=thunk-extern.
* doc/invoke.texi: Update notes for -fcf-protection=branch with
-mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
2020-04-21 Martin Jambor <mjambor@suse.cz>
Backport from master
2020-04-09 Martin Jambor <mjambor@suse.cz>
Richard Biener <rguenther@suse.de>
PR tree-optimization/94482
* tree-sra.c (create_access_replacement): Dump new replacement with
TDF_UID.
(sra_modify_expr): Fix handling of cases when the original EXPR writes
to only part of the replacement.
* tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
the first operand of combinations into REAL/IMAGPART_EXPR and
BIT_FIELD_REF.
2020-04-20 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
PR target/94556
* config/i386/i386.c (ix86_expand_epilogue): Restore the frame
pointer in word_mode for eh_return epilogues.
2020-04-20 Andrea Corallo <andrea.corallo@arm.com>
Backport from mainline.
2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
PR target/94530
* config/aarch64/falkor-tag-collision-avoidance.c
(valid_src_p): Check for aarch64_address_info type before
accessing base field.
2020-04-20 Tamar Christina <tamar.christina@arm.com>
Backport from mainline.
2020-04-03 Tamar Christina <tamar.christina@arm.com>
PR target/94396
* common/config/aarch64/aarch64-common.c
(aarch64_get_extension_string_for_isa_flags): Handle default flags.
2020-04-20 Martin Liska <mliska@suse.cz>
Backport from mainline
2020-04-17 Martin Liska <mliska@suse.cz>
Jonathan Yong <10walls@gmail.com>
PR gcov-profile/94570
* coverage.c (coverage_init): Use separator properly.
2020-04-17 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
PR target/94417
* config/i386/i386.c (rest_of_insert_endbranch): Insert ENDBR at
function entry if function will be called indirectly.
2020-04-17 Kewen Lin <linkw@gcc.gnu.org>
Backport from mainline
2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
PR tree-optimization/94443
* tree-vect-loop.c (vectorizable_live_operation): Use
gsi_insert_seq_before to replace gsi_insert_before.
2020-04-17 Kewen Lin <linkw@gcc.gnu.org>
Backport from mainline
2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
PR tree-optimization/94043
* tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
phi for vec_lhs and use it for lane extraction.
2020-04-16 Michael Meissner <meissner@linux.ibm.com>
PR target/94557
* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Fix
regression caused by PR target/93932 backport. Mask variable
vector extract index so it does not go beyond the vector when
extracting a vector element from memory.
2020-04-16 Richard Biener <rguenther@suse.de>
Backport from mainline
2020-04-07 Richard Biener <rguenther@suse.de>
PR middle-end/94479
* gimplify.c (gimplify_addr_expr): Also consider generated
MEM_REFs.
2020-04-15 Max Filippov <jcmvbkbc@gmail.com>
Backport from mainline.
2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
PR target/94584
* config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
(extendhisi2_internal): Add %v1 before the load instructions.
2020-04-15 Max Filippov <jcmvbkbc@gmail.com>
Backport from mainline.
2019-09-26 Max Filippov <jcmvbkbc@gmail.com>
* config/xtensa/xtensa.c (hwloop_optimize): Insert zero overhead
loop instruction into new basic block before the loop when basic
block that precedes the loop is empty.
2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
PR target/94603
* config/i386/i386-builtin.def (__builtin_ia32_movq128):
Require OPTION_MASK_ISA_SSE2.
2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
PR target/94494
* config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
condition for V4SI, V8HI and V16QI modes.
2020-04-10 Claudiu Zissulescu <claziss@synopsys.com>
Backport from trunk
2020-0-31 Vineet Gupta <vgupta@synopsys.com>
* config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
2020-04-09 Michael Meissner <meissner@linux.ibm.com>
Back port from trunk
2020-02-26 Michael Meissner <meissner@linux.ibm.com>
PR target/93932
* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
Split the insn into two parts. This insn only does variable
extract from a register.
(vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
variable extract from memory.
(vsx_extract_v4sf_var): Split the insn into two parts. This insn
only does variable extract from a register.
(vsx_extract_v4sf_var_load): New insn, do variable extract from
memory.
(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
into two parts. This insn only does variable extract from a
register.
(vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
do variable extract from memory.
2020-04-07 Will Schmidt <will_schmidt@vnet.ibm.com>
Backport from mainline.
2020-03-23 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000-call.c altivec_init_builtins(): Remove
code to skip defining builtins based on builtin_mask.
2020-04-07 Jakub Jelinek <jakub@redhat.com>
PR target/94509
* config/i386/i386.c (expand_vec_perm_pshufb): Fix the check
for inter-lane permutation for 64-byte modes.
PR target/94488
* config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
Assume it is a REG after that instead of testing it and doing FAIL
otherwise. Formatting fix.
Backported from mainline
2020-04-04 Hannes Domani <ssbssa@yahoo.de>
Jakub Jelinek <jakub@redhat.com>
PR debug/94459
* dwarf2out.c (gen_subprogram_die): Look through references, pointers,
arrays, pointer-to-members, function types and qualifiers when
checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
to emit type again on definition.
2020-04-03 Jakub Jelinek <jakub@redhat.com>
PR target/94460
* config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
second half of first lane from first lane of second operand and
first half of second lane from second lane of first operand.
2020-04-01 Jakub Jelinek <jakub@redhat.com>
PR middle-end/94423
* tree-object-size.c (pass_object_sizes::execute): Don't call
replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
call replace_call_with_value.
2020-03-31 Marc Glisse <marc.glisse@inria.fr>
Jakub Jelinek <jakub@redhat.com>
PR middle-end/94412
* fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
2020-03-30 Jakub Jelinek <jakub@redhat.com>
PR target/93069
* config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
<store_mask_constraint> instead of m in output operand constraint.
(vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
%{%3%}.
2020-03-28 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94329
* tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
on the last stmt in a bb, make sure gsi_prev isn't done immediately
after gsi_last_bb.
2020-03-25 Jakub Jelinek <jakub@redhat.com>
PR middle-end/94303
* varasm.c (output_constructor_array_range): If local->index
RANGE_EXPR doesn't start at the current location in the constructor,
skip needed number of bytes using assemble_zeros or assert we don't
go backwards.
2020-03-25 Richard Biener <rguenther@suse.de>
Jakub Jelinek <jakub@redhat.com>
PR debug/94283
* tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
2020-03-24 Jakub Jelinek <jakub@redhat.com>
PR debug/94283
* tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
GF_PLF_2, but don't add them to worklist. Don't add an assigment to
worklist or set GF_PLF_2 just because it is used in a debug stmt in
another bb. Formatting improvements.
PR debug/94277
* cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
regardless of whether TREE_NO_WARNING is set on it or whether
warn_unused_function is true or not.
2020-03-19 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94211
* tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
instead of estimate_num_insns for bb_seq (middle_bb). Rename
emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
all uses.
2020-04-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/94518
2019-09-23 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/atomics.md (aarch64_store_exclusive_pair): Fix
memmodel index.
2020-04-07 Jakub Jelinek <jakub@redhat.com>
PR target/94500
* config/i386/i386.c (emit_reduc_half): For V{64QI,32HI}mode
handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
2020-04-02 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/93435
* params.def (PARAM_SRA_MAX_PROPAGATIONS): New parameter.
* tree-sra.c (propagation_budget): New variable.
(budget_for_propagation_access): New function.
(propagate_subaccesses_across_link): Use it.
(propagate_all_subaccesses): Set up and destroy propagation_budget.
* doc/invoke.texi (sra-max-propagations): New.
2020-04-03 Martin Liska <mliska@suse.cz>
Backport from mainline
2020-04-03 Martin Liska <mliska@suse.cz>
PR ipa/94445
* ipa-icf-gimple.c (func_checker::compare_gimple_call):
Compare type attributes for gimple_call_fntypes.
2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
Backport from master.
2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
PR fortran/85982
* fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
attribute checking used by TYPE.
2020-04-02 Richard Biener <rguenther@suse.de>
Backport from mainline
2020-03-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/94103
* tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
punning when the mode precision is not sufficient.
2020-03-18 Richard Biener <rguenther@suse.de>
PR middle-end/94206
* gimple-fold.c (gimple_fold_builtin_memset): Avoid using
partial int modes or not mode-precision integer types for
the store.
2020-04-02 Jakub Jelinek <jakub@redhat.com>
PR target/94435
* config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
2020-04-01 Zackery Spytz <zspytz@gmail.com>
* doc/extend.texi: Fix a typo in the documentation of the
copy function attribute.
2020-04-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backport from mainline
2020-03-31 Jakub Jelinek <jakub@redhat.com>
PR target/94368
* config/aarch64/constraints.md (Uph): New constraint.
* config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
(@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
constraint.
2020-04-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backport from mainline
2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
PR target/92692
* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
Use epilogue_completed rather than reload_completed.
2020-04-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backport from mainline
2019-09-19 Richard Henderson <richard.henderson@linaro.org>
* config/aarch64/aarch64.opt (-moutline-atomics): New.
* config/aarch64/aarch64.c (aarch64_atomic_ool_func): New.
(aarch64_ool_cas_names, aarch64_ool_swp_names): New.
(aarch64_ool_ldadd_names, aarch64_ool_ldset_names): New.
(aarch64_ool_ldclr_names, aarch64_ool_ldeor_names): New.
(aarch64_expand_compare_and_swap): Honor TARGET_OUTLINE_ATOMICS.
* config/aarch64/atomics.md (atomic_exchange<ALLI>): Likewise.
(atomic_<atomic_op><ALLI>): Likewise.
(atomic_fetch_<atomic_op><ALLI>): Likewise.
(atomic_<atomic_op>_fetch<ALLI>): Likewise.
* doc/invoke.texi: Document -moutline-atomics.
2020-04-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Backport from mainline
2019-09-19 Richard Henderson <richard.henderson@linaro.org>