commit | 37f0e8395c279b5eb969bf678e5c571c1f3d3b32 | [log] [tgz] |
---|---|---|
author | Jiawei <jiawei@iscas.ac.cn> | Thu Jun 05 13:46:39 2025 +0800 |
committer | Jiawei <jiawei@iscas.ac.cn> | Thu Jun 05 19:33:25 2025 +0800 |
tree | 0ed94734d5d70cf8dfbabbbfdad4346069ee5763 | |
parent | 6a2a0ab8b71e0985f6950f450f8c34437a2fbdcc [diff] |
RISC-V: Support Sstvala extension. Support the Sstvala extension, which provides all needed values in Supervisor Trap Value register (stval). gcc/ChangeLog: * config/riscv/riscv-ext.def: New extension definition. * config/riscv/riscv-ext.opt: New extension mask. * doc/riscv-ext.texi: Document the new extension. gcc/testsuite/ChangeLog: * gcc.target/riscv/arch-sstvala.c: New test. Signed-off-by: Jiawei <jiawei@iscas.ac.cn>