| /* { dg-do compile } */ |
| /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-Os" "-Oz" } } */ |
| /* { dg-options "-march=rv64gc_xtheadcondmov -mtune=thead-c906 -mbranch-cost=1 -fdump-rtl-ce1" { target { rv64 } } } */ |
| /* { dg-options "-march=rv32gc_xtheadcondmov -mtune=thead-c906 -mbranch-cost=1 -fdump-rtl-ce1" { target { rv32 } } } */ |
| |
| typedef int __attribute__ ((mode (SI))) int_t; |
| |
| int_t |
| movsine (int_t w, int_t x, int_t y, int_t z) |
| { |
| return w != x ? y : z; |
| } |
| |
| /* Expect branched assembly like: |
| |
| beq a0,a1,.L3 |
| mv a0,a2 |
| ret |
| .L3: |
| mv a0,a3 |
| ret |
| */ |
| |
| /* { dg-final { scan-rtl-dump-not "Conversion succeeded on pass \[0-9\]+\\." "ce1" { xfail "*-*-*" } } } */ |
| /* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" { xfail "*-*-*" } } } */ |
| /* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s" 1 { xfail "*-*-*" } } } */ |
| /* { dg-final { scan-assembler-not "\\ssub\\s" { xfail "*-*-*" } } } */ |
| /* { dg-final { scan-assembler-not "\\s(?:th\\.mveqz|th\\.mvnez)\\s" { xfail "*-*-*" } } } */ |
| /* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */ |
